OSDN Git Service
Justin Bogner [Thu, 12 May 2016 23:10:30 +0000 (23:10 +0000)]
SDAG: Implement Select instead of SelectImpl in AArch64DAGToDAGISel
This one has a lot of code churn, but it's all mechanical and
straightforward.
- Where we were returning a node before, call ReplaceNode instead.
- Where we would return null to fall back to another selector, rename
the method to try* and return a bool for success.
- Where we were calling SelectNodeTo, just return afterwards.
Part of llvm.org/pr26808.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269379
91177308-0d34-0410-b5e6-
96231b3b80d8
Hemant Kulkarni [Thu, 12 May 2016 22:51:26 +0000 (22:51 +0000)]
llvm-readobj: Fix GNU style entry point print width
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269376
91177308-0d34-0410-b5e6-
96231b3b80d8
Reid Kleckner [Thu, 12 May 2016 22:46:41 +0000 (22:46 +0000)]
[codeview] Fix dumping VFTables, stop when we see LF_PAD*
Also stop visiting type records when we encounter an error.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269374
91177308-0d34-0410-b5e6-
96231b3b80d8
Chandler Carruth [Thu, 12 May 2016 22:19:39 +0000 (22:19 +0000)]
[PM] Port of the DepndenceAnalysis to the new PM.
Ported DA to the new PM by splitting the former DependenceAnalysis Pass
into a DependenceInfo result type and DependenceAnalysisWrapperPass type
and adding a new PM-style DependenceAnalysis analysis pass returning the
DependenceInfo.
Patch by Philip Pfaffe, most of the review by Justin.
Differential Revision: http://reviews.llvm.org/D18834
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269370
91177308-0d34-0410-b5e6-
96231b3b80d8
Hemant Kulkarni [Thu, 12 May 2016 22:16:53 +0000 (22:16 +0000)]
llvm-readobj: Change Hex output for GNU style dynamic table print
Dynamic table when printed shows uppercase tag/values.
This changes it to lower case when printing in GNU style
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269368
91177308-0d34-0410-b5e6-
96231b3b80d8
Justin Bogner [Thu, 12 May 2016 21:56:18 +0000 (21:56 +0000)]
SDAG: Implement Select instead of SelectImpl in LanaiDAGToDAGISel
- Where we were returning a node before, call ReplaceNode instead.
- Where we were calling SelectNodeTo, just return afterwards.
Part of llvm.org/pr26808.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269364
91177308-0d34-0410-b5e6-
96231b3b80d8
Justin Bogner [Thu, 12 May 2016 21:46:18 +0000 (21:46 +0000)]
SDAG: Implement Select instead of SelectImpl in HexagonDAGToDAGISel
- Where we were returning a node before, call ReplaceNode instead.
- Where we had already replaced all uses and we returned a node, just
remove the dead node instead.
- Where we would return null to fall back to another selector, rename
the method to try* and return a bool for success.
Part of llvm.org/pr26808.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269358
91177308-0d34-0410-b5e6-
96231b3b80d8
Adam Nemet [Thu, 12 May 2016 21:41:53 +0000 (21:41 +0000)]
[LAA] Use std::min. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269356
91177308-0d34-0410-b5e6-
96231b3b80d8
Justin Bogner [Thu, 12 May 2016 21:24:23 +0000 (21:24 +0000)]
SDAG: Clean up a dangling node in HexagonISelDAGToDAG::SelectImpl
When we convert to the void Select interface, leaving unreferenced
nodes around won't be allowed anymore.
Part of llvm.org/pr26808.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269355
91177308-0d34-0410-b5e6-
96231b3b80d8
Renato Golin [Thu, 12 May 2016 21:22:42 +0000 (21:22 +0000)]
[ARM] Support and tests for transform of LDR rt, = to MOV
This change implements the transformation in processInstruction() for the
LDR rt, =expression to MOV rt, expression when the expression can be evaluated
and can fit into the immediate field of the MOV or a MVN.
Across the ARM and Thumb instruction sets there are several cases to consider,
each with a different range of representatble constants.
In ARM we have:
* Modified immediate (All ARM architectures)
* MOVW (v6t2 and above)
In Thumb we have:
* Modified immediate (v6t2, v7m and v8m.mainline)
* MOVW (v6t2, v7m, v8.mainline and v8m.baseline)
* Narrow Thumb MOV that can be used in an IT block (non flag-setting)
If the immediate fits any of the available alternatives then we make the transformation.
Fixes 25722.
Patch by Peter Smith.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269354
91177308-0d34-0410-b5e6-
96231b3b80d8
Renato Golin [Thu, 12 May 2016 21:22:37 +0000 (21:22 +0000)]
[ARM] Fixup tests to take into account mov translation. NFC.
Alter instances in the test-suite that use immediates that can be represented
in the immediate field of a MOV. The reason for doing this is that when the
LDR rt,=imm transformation to MOV rt, imm the existing tests do not need to
be modified.
Required by the patch that fixes PR25722.
Patch by Peter Smith.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269353
91177308-0d34-0410-b5e6-
96231b3b80d8
Renato Golin [Thu, 12 May 2016 21:22:31 +0000 (21:22 +0000)]
[ARM] Delay ARM constant pool creation. NFC.
This change adds a new constant pool kind to ARMOperand. When parsing the
operand for =immediate we create an instance of this operand rather than
creating a constant pool entry and rewriting the operand.
As the new operand kind is only created for ldr rt,= we can make ldr rt,=
an explicit pseudo instruction in ARM, Thumb and Thumb2
The pseudo instruction is expanded in processInstruction(). This creates the
constant pool and transforms the pseudo instruction into a pc-relative ldr to
the constant pool.
There are no functional changes and no modifications needed to existing tests.
Required by the patch that fixes PR25722.
Patch by Peter Smith.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269352
91177308-0d34-0410-b5e6-
96231b3b80d8
Justin Bogner [Thu, 12 May 2016 21:14:47 +0000 (21:14 +0000)]
SDAG: Implement Select instead of SelectImpl in BPFDAGToDAGISel
- Where we were returning a node before, call ReplaceNode instead.
- Where we were calling SelectNodeTo, just return afterwards.
Part of llvm.org/pr26808.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269350
91177308-0d34-0410-b5e6-
96231b3b80d8
Justin Bogner [Thu, 12 May 2016 21:03:32 +0000 (21:03 +0000)]
SDAG: Implement Select instead of SelectImpl in AMDGPUDAGToDAGISel
- Where we were returning a node before, call ReplaceNode instead.
- Where we would return null to fall back to another selector, rename
the method to try* and return a bool for success.
- Where we were calling SelectNodeTo, just return afterwards.
Part of llvm.org/pr26808.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269349
91177308-0d34-0410-b5e6-
96231b3b80d8
Simon Pilgrim [Thu, 12 May 2016 21:01:20 +0000 (21:01 +0000)]
Tidied up switch cases. NFCI.
Split FCMP//ICMP/SEL from the basic arithmetic cost functions. They were not sharing any notable code path (just the return) and were repeatedly testing the opcode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269348
91177308-0d34-0410-b5e6-
96231b3b80d8
John Regehr [Thu, 12 May 2016 20:55:09 +0000 (20:55 +0000)]
[Docs] clarify semantics of x.with.overflow intrinsics
Differential Revision: http://reviews.llvm.org/D20151
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269346
91177308-0d34-0410-b5e6-
96231b3b80d8
Justin Bogner [Thu, 12 May 2016 20:54:27 +0000 (20:54 +0000)]
SDAG: Clean up dangling nodes in AArch64ISelDAGToDAG::SelectImpl
When we convert to the void Select interface, leaving unreferenced
nodes around won't be allowed anymore.
Part of llvm.org/pr26808.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269345
91177308-0d34-0410-b5e6-
96231b3b80d8
Tom Stellard [Thu, 12 May 2016 20:27:40 +0000 (20:27 +0000)]
Revert "LiveIntervalAnalysis: Rework constructMainRangeFromSubranges()"
This reverts commit r269016 and also the follow-up commit r269020.
This patch caused PR27705.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269344
91177308-0d34-0410-b5e6-
96231b3b80d8
David Blaikie [Thu, 12 May 2016 19:59:54 +0000 (19:59 +0000)]
llvm-dwp: Use llvm::Error to improve diagnostic quality/error handling in llvm-dwp
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269339
91177308-0d34-0410-b5e6-
96231b3b80d8
Hemant Kulkarni [Thu, 12 May 2016 19:58:52 +0000 (19:58 +0000)]
llvm-readobj: Fix the GNU section header flags for SHF_MASKPROC and SHF_MASKOS
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269338
91177308-0d34-0410-b5e6-
96231b3b80d8
Amjad Aboud [Thu, 12 May 2016 19:58:32 +0000 (19:58 +0000)]
Fixed the callee saved registers list for X86 AllRegs calling convention.
32-bit AllRegs:
SSE: xmm0-xmm7
AVX: ymm0-ymm7
AVX512: zmm0-zmm7 + k0-k7
64-bit AllRegs:
SSE: xmm0-xmm15
AVX: ymm0-ymm15
AVX512: zmm0-zmm31 + k0-k7
Differential Revision: http://reviews.llvm.org/D20142
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269337
91177308-0d34-0410-b5e6-
96231b3b80d8
Chris Bieneman [Thu, 12 May 2016 19:57:07 +0000 (19:57 +0000)]
[obj2yaml] Fix ASAN bot failure
I was leaking out of a unique_ptr, should have just kept it in the unique_ptr.
http://lab.llvm.org:8011/builders/sanitizer-x86_64-linux-fast/builds/12738/steps/check-llvm%20asan/logs/stdio
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269336
91177308-0d34-0410-b5e6-
96231b3b80d8
Chad Rosier [Thu, 12 May 2016 19:51:58 +0000 (19:51 +0000)]
[AArch64] Give function a more appropriate name.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269335
91177308-0d34-0410-b5e6-
96231b3b80d8
Amjad Aboud [Thu, 12 May 2016 19:49:24 +0000 (19:49 +0000)]
Fixed dwarf X86-32 register mapping for k0-k7 registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269333
91177308-0d34-0410-b5e6-
96231b3b80d8
Chad Rosier [Thu, 12 May 2016 19:38:18 +0000 (19:38 +0000)]
[AArch64] Minor refactoring to simplify future patch. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269329
91177308-0d34-0410-b5e6-
96231b3b80d8
Krzysztof Parzyszek [Thu, 12 May 2016 19:16:02 +0000 (19:16 +0000)]
[Hexagon] Expand VSelect pseudo instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269328
91177308-0d34-0410-b5e6-
96231b3b80d8
Vedant Kumar [Thu, 12 May 2016 19:01:11 +0000 (19:01 +0000)]
[unittests] Use coveragemap_error in CoverageMappingReaderMock (NFC)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269324
91177308-0d34-0410-b5e6-
96231b3b80d8
Davide Italiano [Thu, 12 May 2016 18:49:32 +0000 (18:49 +0000)]
[PM] Make LowerAtomic a FunctionPass.
Differential Revision: http://reviews.llvm.org/D20025
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269322
91177308-0d34-0410-b5e6-
96231b3b80d8
Michael Kuperstein [Thu, 12 May 2016 18:44:51 +0000 (18:44 +0000)]
[LoopVectorizer] LoopVectorBody doesn't need to be a vector. NFC.
LoopVectorBody was changed from a single pointer to a SmallVector when
store predication was introduced in r200270. Since r247139, store predication
no longer splits the vector loop body in-place, so we can go back to having
a single LoopVectorBody block.
This reverts the no-longer-needed changes from r200270.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269321
91177308-0d34-0410-b5e6-
96231b3b80d8
Chris Bieneman [Thu, 12 May 2016 18:21:09 +0000 (18:21 +0000)]
[yaml2macho] Handle mach_header_64 reserved field
I've added the reserved field as an "optional" in YAML, but I've added asserts in the yaml2macho code to enforce that the field is present in mach_header_64, but not in mach_header.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269320
91177308-0d34-0410-b5e6-
96231b3b80d8
Chris Bieneman [Thu, 12 May 2016 18:02:13 +0000 (18:02 +0000)]
[yaml2macho] Use memset instead of bzero
This should fix the bots I broke.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269319
91177308-0d34-0410-b5e6-
96231b3b80d8
Chris Bieneman [Thu, 12 May 2016 17:53:01 +0000 (17:53 +0000)]
[ObjectYAML] filetype is a required field in MachO headers
Not sure how I managed to copy-pasta this wrong, but I did.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269317
91177308-0d34-0410-b5e6-
96231b3b80d8
Zachary Turner [Thu, 12 May 2016 17:45:51 +0000 (17:45 +0000)]
Get rid of CVLeafTypes.def and combine with TypeRecords.def
This merges the functionality of the macros in `CVLeafTypes.def` and the
macros in `TypeRecords.def` into a single set of macros.
Differential Revision: http://reviews.llvm.org/D20190
Reviewed By: rnk, amccarth
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269316
91177308-0d34-0410-b5e6-
96231b3b80d8
Zachary Turner [Thu, 12 May 2016 17:45:44 +0000 (17:45 +0000)]
Make CodeView record serialization more generic.
This introduces a variadic template and some helper macros to
safely and correctly deserialize many types of common record
fields while maintaining error checking.
Differential Revision: http://reviews.llvm.org/D20183
Reviewed By: rnk, amccarth
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269315
91177308-0d34-0410-b5e6-
96231b3b80d8
Chris Bieneman [Thu, 12 May 2016 17:44:48 +0000 (17:44 +0000)]
[yaml2obj] Support for dumping mach_header from yaml
With this change obj2yaml and yaml2obj can now round-trip mach_headers.
This change also adds ObjectYAML/MachO tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269314
91177308-0d34-0410-b5e6-
96231b3b80d8
Chris Bieneman [Thu, 12 May 2016 17:44:43 +0000 (17:44 +0000)]
[obj2yaml] Include all mach_header fields in yaml
Since we want to be able to use yaml to describe degenerate object files as well as valid ones, we need to be explicit of some fields in your yaml definitions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269313
91177308-0d34-0410-b5e6-
96231b3b80d8
Krzysztof Parzyszek [Thu, 12 May 2016 17:21:40 +0000 (17:21 +0000)]
[Hexagon] Properly handle instruction selection of vsplat intrinsics
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269312
91177308-0d34-0410-b5e6-
96231b3b80d8
Xinliang David Li [Thu, 12 May 2016 16:41:27 +0000 (16:41 +0000)]
minor test clean up /NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269308
91177308-0d34-0410-b5e6-
96231b3b80d8
Xinliang David Li [Thu, 12 May 2016 16:39:02 +0000 (16:39 +0000)]
Fix option description /NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269307
91177308-0d34-0410-b5e6-
96231b3b80d8
Chris Bieneman [Thu, 12 May 2016 16:04:20 +0000 (16:04 +0000)]
[macho2yaml] Add support for dumping mach_headers
This patch adds the ability to dump mach headers. For my local clang binary the macho2yaml output is now:
--- !mach-o
FileHeader:
cputype: 0x01000007
cpusubtype: 0x80000003
filetype: 0x00000002
ncmds: 19
flags: 0x00A18085
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269304
91177308-0d34-0410-b5e6-
96231b3b80d8
Chris Bieneman [Thu, 12 May 2016 16:04:16 +0000 (16:04 +0000)]
[ObjectYAML] Support Thin MachO headers to YAML
This patch adds support to ObjectYAML for serializing mach_header structs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269303
91177308-0d34-0410-b5e6-
96231b3b80d8
Daniel Sanders [Thu, 12 May 2016 14:01:50 +0000 (14:01 +0000)]
[mips][ias] Fix O32 .cprestore directive when inside .set noat region and offset is in range.
Summary:
This expands on r269179 to fix an additional case that was not covered by our
tests. The assembler temporary is not needed when the .cprestore offset fits
inside a simm16 and it is not an error to use it inside a '.set noat' in this
case.
Reviewers: emaste, seanbruno, sdardis
Subscribers: dsanders, sdardis, llvm-commits
Differential Revision: http://reviews.llvm.org/D20199
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269295
91177308-0d34-0410-b5e6-
96231b3b80d8
Daniel Sanders [Thu, 12 May 2016 13:39:13 +0000 (13:39 +0000)]
[mips][ias] Work around incorrect another microMIPS relocation evaluation exposed by r268900
As explained in r269196, microMIPS has a special case that is not correctly
implemented in LLVM. If we have a symbol 'foo' which is equivalent to
'.text+0x10'. The value of an R_MICROMIPS_LO16 relocation using 'foo' is
'foo+0x11' and not 'foo+0x10'. The in-place addend should therefore be 0x11.
This commit reverts a little more of the effect of r268900 by keeping the
symbol when the STO_MIPS_MICROMIPS flag is set for R_MIPS_GPREL32 relocations.
This fixes SingleSource/UnitTests/2003-08-11-VaListArg, and
SingleSource/UnitTests/2003-05-07-VarArgs for microMIPS.
I believe there are additional relocations that have the same issue (e.g.
R_MIPS_64, and R_MIPS_GPREL16) but for now I'm focusing on restoring our
internal buildbots back to the green state we had in r268899.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269294
91177308-0d34-0410-b5e6-
96231b3b80d8
Chad Rosier [Thu, 12 May 2016 13:27:24 +0000 (13:27 +0000)]
[AArch64] Remove command-line option use for testing.
The EXTR combine has been in tree for over 2 years without complain, so go ahead
and remove the option.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269292
91177308-0d34-0410-b5e6-
96231b3b80d8
Simon Pilgrim [Thu, 12 May 2016 13:09:49 +0000 (13:09 +0000)]
[SelectionDAG] Attempt to split BITREVERSE vector legalization into BSWAP and BITREVERSE stages
For BITREVERSE, bit shifting/masking every bit in a vector element is a very lengthy procedure.
If the input vector type is a whole multiple of bytes wide then we can split this into a BSWAP shuffle stage (to reverse at the byte level) and then a BITREVERSE stage applied to each byte. Most vector capable targets can efficiently BSWAP using shuffles resulting in a considerable reduction in instructions.
With this patch targets would only need to implement a target specific vXi8 BITREVERSE implementation to efficiently reverse most legal vector types.
Differential Revision: http://reviews.llvm.org/D19978
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269290
91177308-0d34-0410-b5e6-
96231b3b80d8
Hrvoje Varga [Thu, 12 May 2016 12:46:06 +0000 (12:46 +0000)]
Revert "[mips][microMIPS] Implement CFC*, CTC* and LDC* instructions"
This reverts commit r269176 as it caused test-suite failure.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269287
91177308-0d34-0410-b5e6-
96231b3b80d8
Rafael Espindola [Thu, 12 May 2016 12:37:52 +0000 (12:37 +0000)]
Refactor duplicated code. NFC.
Linkage is always followed by visibility and dll storage.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269286
91177308-0d34-0410-b5e6-
96231b3b80d8
Renato Golin [Thu, 12 May 2016 12:33:33 +0000 (12:33 +0000)]
[scan-build] fix warnings emitted on LLVM ARM code base
Fix "Logic error" warnings of the type "Called C++ object pointer is
null" reported by Clang Static Analyzer.
Patch by Apelete Seketeli.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269285
91177308-0d34-0410-b5e6-
96231b3b80d8
Daniel Sanders [Thu, 12 May 2016 11:31:19 +0000 (11:31 +0000)]
[mips][ias] Correct ELF eflags when Octeon is the target.
Reviewers: sdardis
Subscribers: petarj, mpf, dsanders, spetrovic, llvm-commits, sdardis
Differential Revision: http://reviews.llvm.org/D18899
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269283
91177308-0d34-0410-b5e6-
96231b3b80d8
Daniel Sanders [Thu, 12 May 2016 10:55:00 +0000 (10:55 +0000)]
[mips][ias] Handle N64 compound relocations and R_MIPS_SUB in needsRelocateWithSymbol()
Summary:
This eliminates the default case for N64 that was left out of r269047.
The change to R_MIPS_SUB is needed in this patch to make this testable since
%lo(%neg(%gp_rel(foo))) and %hi(%neg(%gp_rel(foo))) remain the only ways to get
a compound relocation from the assembler.
Reviewers: sdardis, rafael
Subscribers: dsanders, llvm-commits, sdardis
Differential Revision: http://reviews.llvm.org/D20097
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269280
91177308-0d34-0410-b5e6-
96231b3b80d8
Dan Gohman [Thu, 12 May 2016 04:19:09 +0000 (04:19 +0000)]
[WebAssembly] Fast-isel support for calls, arguments, and selects.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269273
91177308-0d34-0410-b5e6-
96231b3b80d8
Hal Finkel [Thu, 12 May 2016 04:00:56 +0000 (04:00 +0000)]
[PowerPC] Fix a DAG replacement bug in PPCTargetLowering::DAGCombineExtBoolTrunc
While promoting nodes in PPCTargetLowering::DAGCombineExtBoolTrunc, it is
possible for one of the nodes to be replaced by another. To make sure we do not
visit the deleted nodes, and to make sure we visit the replacement nodes, use a
list of HandleSDNodes to track the to-be-promoted nodes during the promotion
process.
The same fix has been applied to the analogous code in
PPCTargetLowering::DAGCombineTruncBoolExt.
Fixes PR26985.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269272
91177308-0d34-0410-b5e6-
96231b3b80d8
David Majnemer [Thu, 12 May 2016 03:07:40 +0000 (03:07 +0000)]
[SCCP] Resolve shifts beyond the bitwidth to undef
Shifts beyond the bitwidth are undef but SCCP resolved them to zero.
Instead, DTRT and resolve them to undef.
This reimplements the transform which caused PR27712.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269269
91177308-0d34-0410-b5e6-
96231b3b80d8
Matt Arsenault [Thu, 12 May 2016 02:45:18 +0000 (02:45 +0000)]
AMDGPU: Fix getIntegerAttribute type and error message
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269268
91177308-0d34-0410-b5e6-
96231b3b80d8
Xinliang David Li [Thu, 12 May 2016 02:19:16 +0000 (02:19 +0000)]
[Layout] Add a new test case for optimal rotation
Enabled by -force-precise-rotation-cost option
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269267
91177308-0d34-0410-b5e6-
96231b3b80d8
Xinliang David Li [Thu, 12 May 2016 02:04:41 +0000 (02:04 +0000)]
[Layout] Add a new option (NFC)
Currently cost based loop rotation algo can only be turned on with
two conditions: the function has real profile data, and -precise-rotation-cost
flag is turned on. This is not convenient for developers to experiment
when profile is not available. Add a new option to force the new
rotation algorithm -force-precise-rotation-cost
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269266
91177308-0d34-0410-b5e6-
96231b3b80d8
Matt Arsenault [Thu, 12 May 2016 01:58:58 +0000 (01:58 +0000)]
AMDGPU: Fix breaking IR on instructions with multiple pointer operands
The promote alloca pass would attempt to promote an alloca with
a select, icmp, or phi user, even though the other operand was
from a non-promotable source, producing a select on two different
pointer types.
Only do this if we know that both operands derive from the same
alloca. In the future we should be able to relax this to an alloca
which will also be promoted.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269265
91177308-0d34-0410-b5e6-
96231b3b80d8
Chris Bieneman [Thu, 12 May 2016 01:52:33 +0000 (01:52 +0000)]
[obj2yaml] Adding Error/Expected to macho2yaml
I figure if I'm adding Mach support I may as well use the new fancy Error model.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269264
91177308-0d34-0410-b5e6-
96231b3b80d8
Chad Rosier [Thu, 12 May 2016 01:42:01 +0000 (01:42 +0000)]
[AArch64] Add support for unscaled narrow stores in getUsefulBitsForUse.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269263
91177308-0d34-0410-b5e6-
96231b3b80d8
Sanjoy Das [Thu, 12 May 2016 01:38:08 +0000 (01:38 +0000)]
Appease MSVC with curly braces
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269262
91177308-0d34-0410-b5e6-
96231b3b80d8
Sanjoy Das [Thu, 12 May 2016 01:17:38 +0000 (01:17 +0000)]
All llvm.deoptimize declarations must use the same calling convention
This new verifier rule lets us unambigously pick a calling convention
when creating a new declaration for
`@llvm.experimental.deoptimize.<ty>`. It is also congruent with our
lowering strategy -- since all calls to `@llvm.experimental.deoptimize`
are lowered to calls to `__llvm_deoptimize`, it is reasonable to enforce
a unique calling convention.
Some of the tests that were breaking this verifier rule have had to be
split up into different .ll files.
The inliner was violating this rule as well, and has been fixed to avoid
producing invalid IR.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269261
91177308-0d34-0410-b5e6-
96231b3b80d8
Chad Rosier [Thu, 12 May 2016 01:04:15 +0000 (01:04 +0000)]
[AArch64] Remove floating-point narrow stores from getUsefulBitsForUse.
While not impossible, it's unlikely we'd be performing bitwise operations on FP
values.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269260
91177308-0d34-0410-b5e6-
96231b3b80d8
Justin Bogner [Thu, 12 May 2016 00:31:09 +0000 (00:31 +0000)]
SDAG: Implement Select instead of SelectImpl in ARMDAGToDAGISel
This is a large change, but it's pretty mechanical:
- Where we were returning a node before, call ReplaceNode instead.
- Where we would return null to fall back to another selector, rename
the method to try* and return a bool for success.
- Where we were calling SelectNodeTo, just return afterwards.
Part of llvm.org/pr26808.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269258
91177308-0d34-0410-b5e6-
96231b3b80d8
Justin Bogner [Thu, 12 May 2016 00:20:19 +0000 (00:20 +0000)]
SDAG: Clean up dangling nodes in ARMISelDAGToDAG::SelectImpl
When we convert to the void Select interface, leaving unreferenced
nodes around won't be allowed anymore.
Part of llvm.org/pr26808.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269256
91177308-0d34-0410-b5e6-
96231b3b80d8
Xinliang David Li [Wed, 11 May 2016 23:21:12 +0000 (23:21 +0000)]
[profile] profile writing cleanup
Do not precompute value counts for all sites. This
eliminates one more use of dynamic allocation
in profiler writer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269253
91177308-0d34-0410-b5e6-
96231b3b80d8
Davide Italiano [Wed, 11 May 2016 23:06:10 +0000 (23:06 +0000)]
Revert "[SCCP] Partially propagate informations when the input is not fully defined."
This reverts commit r269105 as it caused PR27712.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269252
91177308-0d34-0410-b5e6-
96231b3b80d8
Teresa Johnson [Wed, 11 May 2016 22:56:19 +0000 (22:56 +0000)]
[ThinLTO] Don't re-analyze callee at same threshold unnecessarily
This should just be a compile-time change. Correct the check for whether
we have already analyzed the callee when making summary based decisions.
There is no need to reprocess one at the same threshold as when it was
last processed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269251
91177308-0d34-0410-b5e6-
96231b3b80d8
Wei Mi [Wed, 11 May 2016 22:37:43 +0000 (22:37 +0000)]
Fix a bug when hoist spill to a BB with landingpad successor.
This is to fix the bug in https://llvm.org/bugs/show_bug.cgi?id=27612.
When spill is hoisted to a BB with landingpad successor, and if the VNI
of the spill reg lives into the landingpad successor, the spill should be
inserted before the call which may throw exception. InsertPointAnalysis
is used to compute the safe insert point.
http://reviews.llvm.org/D20027 is a preparing patch for this patch.
Differential Revision: http://reviews.llvm.org/D19884.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269249
91177308-0d34-0410-b5e6-
96231b3b80d8
Wei Mi [Wed, 11 May 2016 22:28:29 +0000 (22:28 +0000)]
[NFC] Extract LastSplitPoint computation from SplitAnalysis to a new class
InsertPointAnalysis.
Because both split and spill hoisting want to use LastSplitPoint computation
result, extract the LastSplitPoint computation from SplitAnalysis class which
also contains a bunch of other analysises only related to split.
Differential Revision: http://reviews.llvm.org/D20027.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269248
91177308-0d34-0410-b5e6-
96231b3b80d8
Justin Bogner [Wed, 11 May 2016 22:21:50 +0000 (22:21 +0000)]
SDAG: Use ReplaceNode here, not ReplaceUses
This was a typo in an earlier commit - there's no point in keeping the
old node around here.
Noticed by Meador Inge. Thanks!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269245
91177308-0d34-0410-b5e6-
96231b3b80d8
Chris Bieneman [Wed, 11 May 2016 22:07:48 +0000 (22:07 +0000)]
Initial add for MachO support for yaml2obj
Adding the initial files for adding MachO support to yaml2obj. Passing a MachO file will result in an error.
I will be implementing obj2yaml and yaml2obj for MachO in parallel so that one can be used to test the other.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269244
91177308-0d34-0410-b5e6-
96231b3b80d8
Chris Bieneman [Wed, 11 May 2016 22:07:45 +0000 (22:07 +0000)]
Initial add for MachO support for obj2yaml
Adding the initial files for adding MachO support to obj2yaml. Passing a MachO file will result in a new not_implemented error.
I will be implementing obj2yaml and yaml2obj for MachO in parallel so that one can be used to test the other.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269243
91177308-0d34-0410-b5e6-
96231b3b80d8
Sanjay Patel [Wed, 11 May 2016 21:51:28 +0000 (21:51 +0000)]
regenerate checks
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269241
91177308-0d34-0410-b5e6-
96231b3b80d8
Matthias Braun [Wed, 11 May 2016 21:31:39 +0000 (21:31 +0000)]
MachineVerifier: Fix error reporting.
Do not use getVRegDef() to print "the definition" of a vreg. If there
are multiple or none the function will fail.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269239
91177308-0d34-0410-b5e6-
96231b3b80d8
Xinliang David Li [Wed, 11 May 2016 21:17:10 +0000 (21:17 +0000)]
cleanup: do not recompute size for preallocated buffer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269238
91177308-0d34-0410-b5e6-
96231b3b80d8
Justin Bogner [Wed, 11 May 2016 21:13:17 +0000 (21:13 +0000)]
SDAG: Add a helper to replace and remove a node during ISel
It's very common to want to replace a node and then remove it since
it's dead, especially as we port backends from the SDNode *Select API
to the void Select one. This helper makes this sequence a bit less
verbose.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269236
91177308-0d34-0410-b5e6-
96231b3b80d8
Justin Bogner [Wed, 11 May 2016 21:00:33 +0000 (21:00 +0000)]
SDAG: Have SelectNodeTo replace uses if it CSE's instead of morphing a node
It's awkward to force callers of SelectNodeTo to figure out whether
the node was morphed or CSE'd. Update uses here instead of requiring
callers to (sometimes) do it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269235
91177308-0d34-0410-b5e6-
96231b3b80d8
Teresa Johnson [Wed, 11 May 2016 20:46:22 +0000 (20:46 +0000)]
[ThinLTO] Fix Windows debug failure in new iterator
This fixes a debug assert on Windows from the new iterator
implementation added in r269059. The Windows std::vector iterator
operator== checks in debug mode that the containers being iterated over
are the same, which they may not be.
Fixed by checking that we are iterating over the same container before
comparing the container iterators.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269232
91177308-0d34-0410-b5e6-
96231b3b80d8
Chad Rosier [Wed, 11 May 2016 20:19:54 +0000 (20:19 +0000)]
[AArch64] Improve getUsefulBitsForUse for narrow stores.
For narrow stores (e.g., strb, srth) we know the upper bits of the register are
unused/not useful. In some cases we can use this information to eliminate
unnecessary instructions.
For example, without this patch we generate (from the 2nd test case):
ldr w8, [x0]
and w8, w8, #0xfff0
bfxil w8, w2, #16, #4
strh w8, [x1]
and after the patch the 'and' is removed:
ldr w8, [x0]
bfxil w8, w2, #16, #4
strh w8, [x1]
ret
During the lowering of the bitfield insert instruction the 'and' is eliminated
because we know the upper 16-bits that are masked off are unused and the lower
4-bits that are masked off are overwritten by the insert itself. Therefore, the
'and' is unnecessary.
Differential Revision: http://reviews.llvm.org/D20175
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269226
91177308-0d34-0410-b5e6-
96231b3b80d8
Sanjay Patel [Wed, 11 May 2016 20:10:33 +0000 (20:10 +0000)]
fix documentation comments; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269225
91177308-0d34-0410-b5e6-
96231b3b80d8
Vedant Kumar [Wed, 11 May 2016 19:42:19 +0000 (19:42 +0000)]
[ProfileData] Use SoftInstrProfErrors to count soft errors, NFC
Differential Revision: http://reviews.llvm.org/D20082
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269222
91177308-0d34-0410-b5e6-
96231b3b80d8
Simon Pilgrim [Wed, 11 May 2016 18:53:44 +0000 (18:53 +0000)]
[X86][AVX512] Fixed VPERMILPD/VPERMILPS shuffle comments.
Fixed incorrect operands indices used to access src registers
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269221
91177308-0d34-0410-b5e6-
96231b3b80d8
Rafael Espindola [Wed, 11 May 2016 18:21:59 +0000 (18:21 +0000)]
Return a StringRef from getSection.
This is similar to how getName is handled.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269218
91177308-0d34-0410-b5e6-
96231b3b80d8
Zachary Turner [Wed, 11 May 2016 17:54:20 +0000 (17:54 +0000)]
Fix build breakage in DebugInfoCodeview
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269217
91177308-0d34-0410-b5e6-
96231b3b80d8
Zachary Turner [Wed, 11 May 2016 17:47:35 +0000 (17:47 +0000)]
Refactor CodeView type records to use common code.
Differential Revision: http://reviews.llvm.org/D20138
Reviewed By: rnk
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269216
91177308-0d34-0410-b5e6-
96231b3b80d8
Justin Bogner [Wed, 11 May 2016 17:46:03 +0000 (17:46 +0000)]
SDAG: Minor cleanup in X86
Don't bother returning a result we don't use here. I've also renamed
this from selectGather to tryGather to better indicate that it may not
do anything.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269215
91177308-0d34-0410-b5e6-
96231b3b80d8
Sanjoy Das [Wed, 11 May 2016 17:41:41 +0000 (17:41 +0000)]
[SCEVExpander] Fix a failed cast<> assertion
SCEVExpander::replaceCongruentIVs assumes the backedge value of an
SCEV-analysable PHI to always be an instruction, when this is not
necessarily true. For now address this by bailing out of the
optimization if the backedge value of the PHI is a non-Instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269213
91177308-0d34-0410-b5e6-
96231b3b80d8
Sanjoy Das [Wed, 11 May 2016 17:41:34 +0000 (17:41 +0000)]
[SCEVExpander] Don't break SSA in replaceCongruentIVs
`SCEVExpander::replaceCongruentIVs` bypasses `hoistIVInc` if both the
original and the isomorphic increments are PHI nodes. Doing this can
break SSA if the isomorphic increment is not dominated by the original
increment. Get rid of the bypass, and let `hoistIVInc` do the right
thing.
Fixes PR27232 (compile time crash/hang).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269212
91177308-0d34-0410-b5e6-
96231b3b80d8
Sanjoy Das [Wed, 11 May 2016 17:41:26 +0000 (17:41 +0000)]
[SCEV] Be more aggressive around proving no-wrap
... for AddRec's in loops for which SCEV is unable to compute a max
tripcount. This is not a problem for "normal" loops[0] that don't have
guards or assumes, but helps in cases where we have guards or assumes in
the loop that can be used to constrain incoming values over the backedge.
This partially fixes PR27691 (we still don't handle the NUW case).
[0]: for "normal" loops, in the cases where we'd be able to prove
no-wrap via isKnownPredicate, we'd also be able to compute a max
tripcount.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269211
91177308-0d34-0410-b5e6-
96231b3b80d8
Simon Pilgrim [Wed, 11 May 2016 17:36:32 +0000 (17:36 +0000)]
[X86][SSE] Avoid repeatedly calling MCInst::getNumOperands(). NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269209
91177308-0d34-0410-b5e6-
96231b3b80d8
Jan Vesely [Wed, 11 May 2016 17:24:45 +0000 (17:24 +0000)]
AMDGPU: Split private memory tests
Reenable R600 testing
reviewer: arsenm
Differential Revision: http://reviews.llvm.org/D20031
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269207
91177308-0d34-0410-b5e6-
96231b3b80d8
Sanjay Patel [Wed, 11 May 2016 17:00:07 +0000 (17:00 +0000)]
fix typos in comments; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269206
91177308-0d34-0410-b5e6-
96231b3b80d8
Filipe Cabecinhas [Wed, 11 May 2016 16:38:40 +0000 (16:38 +0000)]
[NFC] Remove some dead code:
DbgInfoIntrinsic::StripCast() is dead since r79977
The only function that creates Comdat objects seems to be in Module, and always creates them using the default constructor.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269204
91177308-0d34-0410-b5e6-
96231b3b80d8
Dan Gohman [Wed, 11 May 2016 16:32:42 +0000 (16:32 +0000)]
[WebAssembl] Implement enough of fast-isel to run the comparison tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269203
91177308-0d34-0410-b5e6-
96231b3b80d8
Vedant Kumar [Wed, 11 May 2016 16:03:02 +0000 (16:03 +0000)]
Use an emplace_back for consistency, NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269199
91177308-0d34-0410-b5e6-
96231b3b80d8
Vedant Kumar [Wed, 11 May 2016 15:45:43 +0000 (15:45 +0000)]
[BasicAA] Compare GEP indices based on value (Fix PR27418)
Equivalent GEP indices with different types are treated as different
indices altogether, leading to an incorrect AA result. Fix the issue
by comparing indices based on their values.
Thanks to Mikael Holmén for reporting the issue!
Differential Revision: http://reviews.llvm.org/D19935
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269197
91177308-0d34-0410-b5e6-
96231b3b80d8
Daniel Sanders [Wed, 11 May 2016 15:44:23 +0000 (15:44 +0000)]
[mips][ias] Work around incorrect microMIPS relocation evaluation exposed by r268900
microMIPS has a special case that is not correctly implemented in LLVM. If we
have a symbol 'foo' which is equivalent to '.text+0x10'. The value of an
R_MICROMIPS_LO16 relocation using 'foo' is 'foo+0x11' and not 'foo+0x10'. The
in-place addend should therefore be 0x11.
Work around this by partially reverting the effect of r268900 by keeping the
symbol when the STO_MIPS_MICROMIPS flag is set. This fixes
SingleSource/Regression/C/PR640 for microMIPS.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269196
91177308-0d34-0410-b5e6-
96231b3b80d8
Simon Pilgrim [Wed, 11 May 2016 15:13:29 +0000 (15:13 +0000)]
[X86][AVX512] Regenerate intrinsics test
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269193
91177308-0d34-0410-b5e6-
96231b3b80d8
Krzysztof Parzyszek [Wed, 11 May 2016 15:01:30 +0000 (15:01 +0000)]
[Hexagon] Add a debug option to disable all backend optimizations
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269192
91177308-0d34-0410-b5e6-
96231b3b80d8
Krzysztof Parzyszek [Wed, 11 May 2016 14:53:07 +0000 (14:53 +0000)]
[Hexagon] Use offsets relative to FP+8 in .cfi_offset instructions
When generating .cfi_offset instructions, make sure that the offset is
calculated with respect to the register used to define the CFA (which is
currently always FP+8).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269191
91177308-0d34-0410-b5e6-
96231b3b80d8