OSDN Git Service
Simon Pilgrim [Thu, 17 May 2018 12:43:42 +0000 (12:43 +0000)]
[X86] Split WriteADC/WriteADCRMW scheduler classes
For integer ALU instructions taking eflags as an input (ADC/SBB/ADCX/ADOX)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332605
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Clement Courbet [Thu, 17 May 2018 12:41:56 +0000 (12:41 +0000)]
[llvm-exegesis] Disable failing ARM assembler tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332604
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Andrea Di Biagio [Thu, 17 May 2018 12:27:03 +0000 (12:27 +0000)]
[llvm-mca] add flag -all-views and flag -all-stats.
Flag -all-views enables all the views.
Flag -all-stats enables all the views that print hardware statistics.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332602
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Clement Courbet [Thu, 17 May 2018 12:25:18 +0000 (12:25 +0000)]
[llvm-exegesis] Analysis: detect clustering inconsistencies.
Summary:
Warn on instructions that should have the same performance
characteristics according to the sched model but actually
differ in their benchmarks.
Next step: Make the display nicer to browse, I was thinking maybe html.
Reviewers: gchatelet
Subscribers: tschuett, llvm-commits
Differential Revision: https://reviews.llvm.org/D46945
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332601
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Clement Courbet [Thu, 17 May 2018 11:55:08 +0000 (11:55 +0000)]
[llvm-exegesis] Disable the tests failing on buildbots while we investigate.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332600
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Jonas Paulsson [Thu, 17 May 2018 11:53:56 +0000 (11:53 +0000)]
[SystemZ] Commenting (NFC)
Some minor commenting in scheduler files.
Review: Ulrich Weigand
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332599
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Clement Courbet [Thu, 17 May 2018 11:51:49 +0000 (11:51 +0000)]
[llvm-exegesis][NFC] Remove dead function.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332597
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Simon Pilgrim [Thu, 17 May 2018 11:32:38 +0000 (11:32 +0000)]
[llvm-mca][X86] Add ADX test files
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332595
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Clement Courbet [Thu, 17 May 2018 11:31:24 +0000 (11:31 +0000)]
Fix r332592 : X86 tests should use the X86 target, not the native targets.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332594
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Clement Courbet [Thu, 17 May 2018 10:52:18 +0000 (10:52 +0000)]
reland r332579: [llvm-exegesis] Update to cover latency through another opcode.
Restructuring the code to measure latency and uops.
The end goal is to have this program spawn another process to deal with SIGILL and other malformed programs. It is not yet the case in this redesign, it is still the main program that runs the code (and may crash).
It now uses BitVector instead of Graph for performance reasons.
https://reviews.llvm.org/D46821
(with fixed ARM tests)
Authored by Guillaume Chatelet
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332592
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Simon Pilgrim [Thu, 17 May 2018 10:36:29 +0000 (10:36 +0000)]
[X86][SNB] Minor scheduler cleanup
Merge 2 instregex and explain the VMOVDQArr/MOVDQArr difference
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332591
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Sander de Smalen [Thu, 17 May 2018 09:05:41 +0000 (09:05 +0000)]
[AArch64][SVE] Asm: Support for structured ST2, ST3 and ST4 (scalar+scalar) store instructions.
Reviewers: rengolin, fhahn, samparker, SjoerdMeijer, javed.absar
Reviewed By: SjoerdMeijer
Differential Revision: https://reviews.llvm.org/D46680
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332584
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Mikael Holmen [Thu, 17 May 2018 09:05:40 +0000 (09:05 +0000)]
Require DominatorTree when requiring/preserving LoopInfo in the old pass manager
Summary:
Require DominatorTree when requiring/preserving LoopInfo in the old pass manager
BreakCriticalEdges tries to keep LoopInfo and DominatorTree updated if they
exist. However, since commit r321653 and r321805, to update LoopInfo we
must have a DominatorTree, or we will hit an assert.
To fix this we now make a couple of passes that only required/preserved
LoopInfo also require DominatorTree.
This solves PR37334.
Reviewers: eli.friedman, efriedma
Reviewed By: efriedma
Subscribers: efriedma, llvm-commits
Differential Revision: https://reviews.llvm.org/D46829
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332583
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Martin Storsjo [Thu, 17 May 2018 08:16:08 +0000 (08:16 +0000)]
[Analysis] Only use _unlocked stdio functions on linux
The existing comment said that the functions were available only
on GNU/Linux (and on certain Android versions), but only checked
T.isGNUEnvironment() which also is true on MinGW (for arch-windows-gnu
triplets), which doesn't have such functions.
Existing checks in the initialize function in TargetLibraryInfo.cpp
also use only T.isOSLinux() to check for glibc features.
This fixes use of stdio on MinGW.
Differential Revision: https://reviews.llvm.org/D47002
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332581
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Clement Courbet [Thu, 17 May 2018 08:12:29 +0000 (08:12 +0000)]
Revert r332579 "[llvm-exegesis] Update to cover latency through another opcode."
The revision failed to update the ARM tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332580
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Clement Courbet [Thu, 17 May 2018 07:38:21 +0000 (07:38 +0000)]
[llvm-exegesis] Update to cover latency through another opcode.
Restructuring the code to measure latency and uops.
The end goal is to have this program spawn another process to deal with SIGILL and other malformed programs. It is not yet the case in this redesign, it is still the main program that runs the code (and may crash).
It now uses BitVector instead of Graph for performance reasons.
https://reviews.llvm.org/D46821
Authored by Guillaume Chatelet
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332579
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Bjorn Pettersson [Thu, 17 May 2018 07:21:41 +0000 (07:21 +0000)]
[SROA] Handle PHI with multiple duplicate predecessors
Summary:
The verifier accepts PHI nodes with multiple entries for the
same basic block, as long as the value is the same.
As seen in PR37203, SROA did not handle such PHI nodes properly
when speculating loads over the PHI, since it inserted multiple
loads in the predecessor block and changed the PHI into having
multiple entries for the same basic block, but with different
values.
This patch teaches SROA to reuse the same speculated load for
each PHI duplicate entry in such situations.
Resolves: https://bugs.llvm.org/show_bug.cgi?id=37203
Reviewers: uabelho, chandlerc, hfinkel, bkramer, efriedma
Reviewed By: efriedma
Subscribers: dberlin, efriedma, llvm-commits
Differential Revision: https://reviews.llvm.org/D46426
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332577
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Hiroshi Inoue [Thu, 17 May 2018 06:32:17 +0000 (06:32 +0000)]
[SROA] pr37267: fix assertion failure in integer widening
The current integer widening does not support rewriting partial split slices in rewriteIntegerStore (and rewriteIntegerLoad).
This patch adds explicit checks for this case in isIntegerWideningViableForSlice.
Before r322533, splitting is allowed only for the whole-alloca slice and hence the above case is implicitly rejected by another check `if (DL.getTypeStoreSize(ValueTy) > Size)` because whole-alloca slice is larger than the partition.
Differential Revision: https://reviews.llvm.org/D46750
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332575
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Alex Bradbury [Thu, 17 May 2018 05:58:08 +0000 (05:58 +0000)]
[RISCV] Add support for .half, .hword, .word, .dword directives
These directives are recognised by gas. Support is added through the use of
addAliasForDirective.
Also match RISC-V gcc in preferring .half and .word for 16-bit and 32-bit data
directives.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332574
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Craig Topper [Thu, 17 May 2018 05:41:11 +0000 (05:41 +0000)]
[X86] Add OptForSize to a couple load folding patterns. Remove some bad FIXME comments.
The FIXME comments were about preventing load folding to avoid a partial xmm update. But these instructions use GPR as input when the load isn't folded. This won't help prevent a partial xmm update.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332573
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Petr Hosek [Thu, 17 May 2018 03:39:03 +0000 (03:39 +0000)]
[CMake] Support building shared library for Fuchsia
Fuchsia uses ELF as a file format and LLD as the linker so we can
use the same implementation as other ELF based platforms.
Differential Revision: https://reviews.llvm.org/D46991
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332570
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Sanjay Patel [Thu, 17 May 2018 03:24:25 +0000 (03:24 +0000)]
[Thumb2] fix typo in test from r332548
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332569
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Douglas Yung [Thu, 17 May 2018 01:36:25 +0000 (01:36 +0000)]
Mark test with "REQUIRES: shell" since it directly invokes "sh" and was failing on Windows.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332563
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Stanislav Mekhanoshin [Thu, 17 May 2018 01:30:51 +0000 (01:30 +0000)]
[AMDGPU] Move lsr test. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332562
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Dan Gohman [Thu, 17 May 2018 00:14:13 +0000 (00:14 +0000)]
[WebAssembly] Fix the opcode number for i64.load16_u.
Fixes PR37488.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332561
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Craig Topper [Wed, 16 May 2018 23:39:27 +0000 (23:39 +0000)]
[CodeGen] Use MachineInstr::getOperand(0) instead of gets the defs iterator_range and calling begin. NFC
Defs are well defined to come first in MachineInstr operand list. No need for a more complex indirection.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332559
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Greg Clayton [Wed, 16 May 2018 23:29:36 +0000 (23:29 +0000)]
Revert 332508 as it caused problems in the clang test suite.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332555
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Vedant Kumar [Wed, 16 May 2018 23:20:42 +0000 (23:20 +0000)]
[STLExtras] Add size() for ranges, and remove distance()
r332057 introduced distance() for ranges. Based on post-commit feedback,
this renames distance() to size(). The new size() is also only enabled
when the operation is O(1).
Differential Revision: https://reviews.llvm.org/D46976
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332551
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Sanjay Patel [Wed, 16 May 2018 22:49:08 +0000 (22:49 +0000)]
[Hexagon] preserve test intent by removing undef
We need to clean up the DAG floating-point undef logic.
This process is similar to how we handled integer undef
logic in D43141.
And as we did there, I'm trying to reduce the patch by
changing tests that would probably become meaningless
once we correct FP undef folding.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332550
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Sanjay Patel [Wed, 16 May 2018 22:48:48 +0000 (22:48 +0000)]
[PowerPC] preserve test intent by removing undef
We need to clean up the DAG floating-point undef logic.
This process is similar to how we handled integer undef
logic in D43141.
And as we did there, I'm trying to reduce the patch by
changing tests that would probably become meaningless
once we correct FP undef folding.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332549
91177308-0d34-0410-b5e6-
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Sanjay Patel [Wed, 16 May 2018 22:47:51 +0000 (22:47 +0000)]
[Thumb] preserve test intent by removing undef
We need to clean up the DAG floating-point undef logic.
This process is similar to how we handled integer undef
logic in D43141.
And as we did there, I'm trying to reduce the patch by
changing tests that would probably become meaningless
once we correct FP undef folding.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332548
91177308-0d34-0410-b5e6-
96231b3b80d8
Sanjay Patel [Wed, 16 May 2018 22:47:42 +0000 (22:47 +0000)]
[Thumb] preserve test intent by removing undef
We need to clean up the DAG floating-point undef logic.
This process is similar to how we handled integer undef
logic in D43141.
And as we did there, I'm trying to reduce the patch by
changing tests that would probably become meaningless
once we correct FP undef folding.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332547
91177308-0d34-0410-b5e6-
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JF Bastien [Wed, 16 May 2018 22:31:42 +0000 (22:31 +0000)]
[NFC] WebAssembly build break #2
Summary:
Same as r332530, move WasmSymbol::dump to an implementation file to avoid linker
issues when the dump function is seen in the header, doesn't get eliminated, and
then linking fails because of the missing dependency.
<rdar://problem/
40258137>
Reviewers: sbc100, ncw, paquette, vsk, dschuff
Subscribers: jgravelle-google, aheejin, sunfish, llvm-commits
Differential Revision: https://reviews.llvm.org/D46985
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332542
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Lang Hames [Wed, 16 May 2018 22:24:30 +0000 (22:24 +0000)]
[ORC] Rewrite the VSO symbol table yet again. Update related utilities.
VSOs now track dependencies for materializing symbols. Each symbol must have its
dependencies registered with the VSO prior to finalization. Usually this will
involve registering the dependencies returned in
AsynchronousSymbolQuery::ResolutionResults for queries made while linking the
symbols being materialized.
Queries against symbols are notified that a symbol is ready once it and all of
its transitive dependencies are finalized, allowing compilation work to be
broken up and moved between threads without queries returning until their
symbols fully safe to access / execute.
Related utilities (VSO, MaterializationUnit, MaterializationResponsibility) are
updated to support dependence tracking and more explicitly track responsibility
for symbols from the point of definition until they are finalized.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332541
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Simon Pilgrim [Wed, 16 May 2018 22:24:22 +0000 (22:24 +0000)]
[X86] Update SNB/generic scheduler tests missed from rL332536
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332540
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Sanjay Patel [Wed, 16 May 2018 22:20:33 +0000 (22:20 +0000)]
[ARM] preserve test intent by removing undef
We need to clean up the DAG floating-point undef logic.
This process is similar to how we handled integer undef
logic in D43141.
And as we did there, I'm trying to reduce the patch by
changing tests that would probably become meaningless
once we correct FP undef folding.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332539
91177308-0d34-0410-b5e6-
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Sanjay Patel [Wed, 16 May 2018 22:20:26 +0000 (22:20 +0000)]
[ARM] preserve test intent by removing undef
We need to clean up the DAG floating-point undef logic.
This process is similar to how we handled integer undef
logic in D43141.
And as we did there, I'm trying to reduce the patch by
changing tests that would probably become meaningless
once we correct FP undef folding.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332538
91177308-0d34-0410-b5e6-
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Sanjay Patel [Wed, 16 May 2018 22:20:11 +0000 (22:20 +0000)]
[ARM] preserve test intent by removing undef
We need to clean up the DAG floating-point undef logic.
This process is similar to how we handled integer undef
logic in D43141.
And as we did there, I'm trying to reduce the patch by
changing tests that would probably become meaningless
once we correct FP undef folding.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332537
91177308-0d34-0410-b5e6-
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Simon Pilgrim [Wed, 16 May 2018 22:14:29 +0000 (22:14 +0000)]
[X86][SNB] Remove unnecessary CVT InstRW overrides
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332536
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Sam Clegg [Wed, 16 May 2018 22:13:18 +0000 (22:13 +0000)]
[WebAssembly] Remove unused headers in MCWasmObjectWriter
Differential Revision: https://reviews.llvm.org/D46969
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332535
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Sanjay Patel [Wed, 16 May 2018 21:57:57 +0000 (21:57 +0000)]
[AArch64] preserve test intent by removing undef
We need to clean up the DAG floating-point undef logic.
This process is similar to how we handled integer undef
logic in D43141.
And as we did there, I'm trying to reduce the patch by
changing tests that would probably become meaningless
once we correct FP undef folding.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332534
91177308-0d34-0410-b5e6-
96231b3b80d8
Sanjay Patel [Wed, 16 May 2018 21:57:19 +0000 (21:57 +0000)]
[ARM] preserve test intent by removing undef
We need to clean up the DAG floating-point undef logic.
This process is similar to how we handled integer undef
logic in D43141.
And as we did there, I'm trying to reduce the patch by
changing tests that would probably become meaningless
once we correct FP undef folding.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332533
91177308-0d34-0410-b5e6-
96231b3b80d8
Sanjay Patel [Wed, 16 May 2018 21:57:00 +0000 (21:57 +0000)]
[ARM] preserve test intent by removing undef
We need to clean up the DAG floating-point undef logic.
This process is similar to how we handled integer undef
logic in D43141.
And as we did there, I'm trying to reduce the patch by
changing tests that would probably become meaningless
once we correct FP undef folding.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332532
91177308-0d34-0410-b5e6-
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Benjamin Kramer [Wed, 16 May 2018 21:45:39 +0000 (21:45 +0000)]
[InstCombine] Fix the signature of fgets_unlocked.
It returns a pointer, not an int. This miscompiles all code that uses
the return value of fgets.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332531
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JF Bastien [Wed, 16 May 2018 21:24:03 +0000 (21:24 +0000)]
[NFC] WebAssembly build fix
Summary:
r332305 added a use of llvm::wasm::toString in llvm::object::WasmSymbol::print,
which is in a header file. It also moves toString to BinaryFormat. This has the
unintended side-effect that any inclusion of Object/Wasm.h now relies on
toString, and needs to required_libraries = BinaryFormat. Thankfully most builds
don't fail with this because print just isn't used and gets eliminated, dropping
the required dependency in the process. Not all builds are so lucky.
Fix this issue by moving print to the corresponding .cpp file.
<rdar://problem/
40258137>
Reviewers: sbc100, ncw, paquette
Subscribers: dschuff, jgravelle-google, aheejin, sunfish, llvm-commits
Differential Revision: https://reviews.llvm.org/D46977
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332530
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Eli Friedman [Wed, 16 May 2018 21:20:16 +0000 (21:20 +0000)]
[MachineOutliner] Don't outline instructions that modify SP.
This breaks the code which saves and restores LR, so we can't outline
without doing something more complicated for stack adjustment.
Found by inspection; we get lucky in most cases because getMemOpInfo
only handles STRWpost, not any other pre/post-increment forms. But it
hits a couple of artificial testcases in the tree.
Differential Revision: https://reviews.llvm.org/D46920
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332529
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Nico Weber [Wed, 16 May 2018 21:13:56 +0000 (21:13 +0000)]
_WIN32 straggler I missed in r331127; no-op in practice
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332528
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Krzysztof Parzyszek [Wed, 16 May 2018 21:02:43 +0000 (21:02 +0000)]
[Hexagon] Fix the order of operands when selecting QCAT
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332526
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Krzysztof Parzyszek [Wed, 16 May 2018 21:00:24 +0000 (21:00 +0000)]
[Hexagon] Mark HVX vector predicate bitwise ops as legal, add patterns
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332525
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Simon Pilgrim [Wed, 16 May 2018 20:52:52 +0000 (20:52 +0000)]
[X86][SSE] Reduce instruction/register usages for v4i32 vector shifts (PR37441)
As suggested by Fabian on PR37441, use PSHUFLW to extend shift amount types for use with PSRAD/PSRLD to reduce register pressure.
Some of this ideally would be done by combineTargetShuffle but its tricky to do as most of the shuffles are sharing inputs.
Differential Revision: https://reviews.llvm.org/D46959
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332524
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Konstantin Zhuravlyov [Wed, 16 May 2018 20:47:48 +0000 (20:47 +0000)]
AMDGPU : Recalculate SGPRs when trap handler is supported
Differential Revision: https://reviews.llvm.org/D29911
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332523
91177308-0d34-0410-b5e6-
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Eric Christopher [Wed, 16 May 2018 20:34:00 +0000 (20:34 +0000)]
Fix small grammar-o.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332522
91177308-0d34-0410-b5e6-
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Eric Christopher [Wed, 16 May 2018 20:33:59 +0000 (20:33 +0000)]
Fix up a misleading format warning.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332521
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Sam Clegg [Wed, 16 May 2018 20:09:05 +0000 (20:09 +0000)]
[WebAssembly] MC: Ensure that FUNCTION_OFFSET relocations are always against function symbols.
The getAtom() method wasn't doing what we needed in all cases. We want
the symbols for the function which defines that section. We can compute
this easily enough and we know that we have at most one function in each
section.
Once this lands I will revert rL331412 which is no longer needed.
Fixes PR37409
Differential Revision: https://reviews.llvm.org/D46970
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332517
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Eli Friedman [Wed, 16 May 2018 19:49:01 +0000 (19:49 +0000)]
[MachineOutliner] Don't save/restore LR for tail calls.
The cost computation assumes we do this correctly, but the actual
lowering was wrong.
Differential Revision: https://reviews.llvm.org/D46923
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332514
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Simon Pilgrim [Wed, 16 May 2018 18:31:17 +0000 (18:31 +0000)]
[X86] Fix typo in instregex for CVTSI642SDrr
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332510
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Greg Clayton [Wed, 16 May 2018 18:25:51 +0000 (18:25 +0000)]
Fix llvm::sys::path::remove_dots() to return "." instead of an empty path.
Differential Revision: https://reviews.llvm.org/D46887
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332508
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Roman Lebedev [Wed, 16 May 2018 18:16:01 +0000 (18:16 +0000)]
[Timers] TimerGroup: add constructor from StringMap<TimeRecord>
Summary:
This is needed for the continuation of D46504,
to be able to store the timings.
Reviewers: george.karpenkov, NoQ, alexfh, sbenza
Reviewed By: alexfh
Subscribers: llvm-commits, cfe-commits
Differential Revision: https://reviews.llvm.org/D46939
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332506
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Roman Lebedev [Wed, 16 May 2018 18:15:56 +0000 (18:15 +0000)]
[Timers] TimerGroup: make printJSONValues() method public
Summary:
This is needed for the continuation of D46504,
to be able to store the timings.
Reviewers: george.karpenkov, NoQ, alexfh, sbenza
Reviewed By: alexfh
Subscribers: llvm-commits, cfe-commits
Differential Revision: https://reviews.llvm.org/D46938
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332505
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Roman Lebedev [Wed, 16 May 2018 18:15:51 +0000 (18:15 +0000)]
[Timers] TimerGroup::printJSONValue(): print doubles with no precision loss
Summary:
Although this is not stricly required, i would very much prefer
not to have known random precision losses along the way.
Reviewers: george.karpenkov, NoQ, alexfh, sbenza
Reviewed By: george.karpenkov
Subscribers: llvm-commits, cfe-commits
Differential Revision: https://reviews.llvm.org/D46937
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332504
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Roman Lebedev [Wed, 16 May 2018 18:15:47 +0000 (18:15 +0000)]
[Timers] TimerGroup::printJSONValues(): print mem timer with .mem suffix
Summary: We have just used `.sys` suffix for the previous timer, this is clearly a typo
Reviewers: george.karpenkov, NoQ, alexfh, sbenza
Reviewed By: alexfh
Subscribers: llvm-commits, cfe-commits
Differential Revision: https://reviews.llvm.org/D46936
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332503
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Sanjay Patel [Wed, 16 May 2018 17:58:50 +0000 (17:58 +0000)]
[x86] preserve test intent by removing undef
We need to clean up the DAG floating-point undef logic.
This process is similar to how we handled integer undef
logic in D43141.
And as we did there, I'm trying to reduce the patch by
changing tests that would probably become meaningless
once we make those fixes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332501
91177308-0d34-0410-b5e6-
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Sanjay Patel [Wed, 16 May 2018 17:58:08 +0000 (17:58 +0000)]
[x86] preserve test intent by removing undef
We need to clean up the DAG floating-point undef logic.
This process is similar to how we handled integer undef
logic in D43141.
And as we did there, I'm trying to reduce the patch by
changing tests that would probably become meaningless
once we make those fixes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332500
91177308-0d34-0410-b5e6-
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Sanjay Patel [Wed, 16 May 2018 17:57:35 +0000 (17:57 +0000)]
[x86] preserve test intent by removing undef
We need to clean up the DAG floating-point undef logic.
This process is similar to how we handled integer undef
logic in D43141.
And as we did there, I'm trying to reduce the patch by
changing tests that would probably become meaningless
once we make those fixes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332499
91177308-0d34-0410-b5e6-
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Craig Topper [Wed, 16 May 2018 17:40:07 +0000 (17:40 +0000)]
[X86][AVX512DQ] Use packed instructions for scalar FP<->i64 conversions on 32-bit targets
As i64 types are not legal on 32-bit targets, insert these into a suitable zero vector and use the packed vXi64<->FP conversion instructions instead.
Fixes PR3163.
Differential Revision: https://reviews.llvm.org/D43441
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332498
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Vedant Kumar [Wed, 16 May 2018 17:30:58 +0000 (17:30 +0000)]
[Debugify] Tighten up the test for -debugify-each, NFC
In post-commit review for r332416, Paul Robinson pointed out that the
test for -debugify-each is not checking what it needs to.
This commit tightens up the test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332497
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JF Bastien [Wed, 16 May 2018 17:25:35 +0000 (17:25 +0000)]
Signal handling should be signal-safe
Summary:
Before this patch, signal handling wasn't signal safe. This leads to real-world
crashes. It used ManagedStatic inside of signals, this can allocate and can lead
to unexpected state when a signal occurs during llvm_shutdown (because
llvm_shutdown destroys the ManagedStatic). It also used cl::opt without custom
backing storage. Some de-allocation was performed as well. Acquiring a lock in a
signal handler is also a great way to deadlock.
We can't just disable signals on llvm_shutdown because the signals might do
useful work during that shutdown. We also can't just disable llvm_shutdown for
programs (instead of library uses of clang) because we'd have to then mark the
pointers as not leaked and make sure all the ManagedStatic uses are OK to leak
and remain so.
Move all of the code to lock-free datastructures instead, and avoid having any
of them in an inconsistent state. I'm not trying to be fancy, I'm not using any
explicit memory order because this code isn't hot. The only purpose of the
atomics is to guarantee that a signal firing on the same or a different thread
doesn't see an inconsistent state and crash. In some cases we might miss some
state (for example, we might fail to delete a temporary file), but that's fine.
Note that I haven't touched any of the backtrace support despite it not
technically being totally signal-safe. When that code is called we know
something bad is up and we don't expect to continue execution, so calling
something that e.g. sets errno is the least of our problems.
A similar patch should be applied to lib/Support/Windows/Signals.inc, but that
can be done separately.
Fix r332428 which I reverted in r332429. I originally used double-wide CAS
because I was lazy, but some platforms use a runtime function for that which
thankfully failed to link (it would have been bad for signal handlers
otherwise). I use a separate flag to guard the data instead.
<rdar://problem/
28010281>
Reviewers: dexonsmith
Subscribers: steven_wu, llvm-commits
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332496
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Matt Davis [Wed, 16 May 2018 17:07:08 +0000 (17:07 +0000)]
[llvm-mca] Move the RegisterFile class into its own translation unit. NFC
Summary: This change will help us turn the DispatchUnit into its own stage.
Reviewers: andreadb, RKSimon, courbet
Reviewed By: andreadb, courbet
Subscribers: mgorny, tschuett, gbedwell, llvm-commits
Differential Revision: https://reviews.llvm.org/D46916
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332493
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Nirav Dave [Wed, 16 May 2018 16:48:20 +0000 (16:48 +0000)]
[DAG] Prune cycle check in store merge.
As part of merging stores we check that fusing the nodes does not
cause a cycle due to one candidate store being indirectly dependent on
another store (this may happen via chained memory copies). This is
done by searching if a store is a predecessor to another store's
value.
Prune the search at the candidate search's root node which is a
predecessor to all candidate stores. This reduces the
size of the subgraph searched in large basic blocks.
Reviewers: jyknight
Subscribers: llvm-commits, hiraditya
Differential Revision: https://reviews.llvm.org/D46955
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332490
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Nirav Dave [Wed, 16 May 2018 16:47:54 +0000 (16:47 +0000)]
[DAG] Defer merge store cycle checking to just before merge. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332489
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Nico Weber [Wed, 16 May 2018 16:29:05 +0000 (16:29 +0000)]
Give shared modules in unittests the platform-native extension, make PipSqueak a MODULE
As far as I can tell from revision history, there's no good reason to call
these files .so instead of .dll in Windows, so use the normal extension.
Also change PipSquak from SHARED to MODULE -- it's never passed to
target_link_libraries() and only loaded via dlopen(), so MODULE is more
appropriate. This makes it possible to delete a workaround for SHARED ldflags
being not quite right as well.
No intended behavior change.
https://reviews.llvm.org/D46898
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332487
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Sanjay Patel [Wed, 16 May 2018 16:23:41 +0000 (16:23 +0000)]
[x86] add run with unsafe global param; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332486
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Tony Tye [Wed, 16 May 2018 16:19:34 +0000 (16:19 +0000)]
[AMDGPU] Change llvm.debugtrap to be a debug breakpoint that can resume execution.
No longer require the queue pointer to be passed in in fixed SGPRs.
Differential Revision: https://reviews.llvm.org/D46769
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332485
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Sanjay Patel [Wed, 16 May 2018 16:16:48 +0000 (16:16 +0000)]
[x86] add tests for DAG FP undef operands; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332484
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Sander de Smalen [Wed, 16 May 2018 15:45:17 +0000 (15:45 +0000)]
[AArch64][SVE] Improve diagnostics for vectors with incorrect element-size.
For regular SVE vector operands, this patch introduces a more
sensible diagnostic when the vector has a wrong suffix (e.g. z0.s vs z0.b).
For example:
add z0.s, z1.s, z2.b -> invalid element width
^_____^
mismatch
For the vector-with-shift/extend (e.g. z0.s, uxtw #2) this patch takes
a slightly different approach and instead returns a 'invalid operand'
if the element size is not as expected. This is because the diagnostics
are more specificied to suggest using the right shift/extend suffix. This
is a trade-off not to introduce more operand classes and still provide
useful diagnostics for LD1 and PRF instructions.
For example:
ld1w z1.s, p0/z, [x0, z0.s] -> invalid shift/extend specified, expected 'z[0..31].s, (uxtw|sxtw)'
ld1w z1.d, p0/z, [x0, z0.s] -> invalid operand
^________________^
mismatch
For gather prefetches, both 'z0.s' and 'z0.d' would be allowed:
prfw #0, p0, [x0, z0.s] -> invalid shift/extend specified, expected 'z[0..31].s, (uxtw|sxtw) #2'
prfw #0, p0, [x0, z0.d] -> invalid shift/extend specified, expected 'z[0..31].d, (lsl|uxtw|sxtw) #2'
Without this change, the diagnostic would unnecessarily suggest a
different element size:
prfw #0, p0, [x0, z0.s] -> invalid shift/extend specified, expected 'z[0..31].d, (lsl|uxtw|sxtw) #2'
Reviewers: SjoerdMeijer, aemerson, fhahn, samparker, javed.absar
Reviewed By: SjoerdMeijer
Differential Revision: https://reviews.llvm.org/D46688
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332483
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Sirish Pande [Wed, 16 May 2018 15:36:52 +0000 (15:36 +0000)]
[AArch64] Gangup loads and stores for pairing.
Keep loads and stores together (target defines how many loads
and stores to gang up), such that it will help in pairing
and vectorization.
Differential Revision https://reviews.llvm.org/D46477
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332482
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Sanjay Patel [Wed, 16 May 2018 15:15:22 +0000 (15:15 +0000)]
[InstCombine] allow more binop (shuffle X), C transforms
The canonicalization was restricted to shuffle masks with
a 1-to-1 mapping to the constant vector, but that disqualifies
the common splat pattern. This is part of solving PR37463:
https://bugs.llvm.org/show_bug.cgi?id=37463
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332479
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Teresa Johnson [Wed, 16 May 2018 14:58:14 +0000 (14:58 +0000)]
[ThinLTO] Make llvm-lto module ID numbering consistent with linkers
The module ID numbering typically starts at 0 (in both the new and old
LTO APIs, used by linkers). Make llvm-lto consistent with that.
Split out of D46699.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332476
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Teresa Johnson [Wed, 16 May 2018 14:56:02 +0000 (14:56 +0000)]
[ThinLTO] Add const qualifier to a couple of flag getter methods
Split these minor fixes out of D46699.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332475
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Sander de Smalen [Wed, 16 May 2018 14:16:01 +0000 (14:16 +0000)]
[AArch64][SVE] Asm: Support for gather PRF prefetch instructions
Reviewers: rengolin, fhahn, samparker, SjoerdMeijer, javed.absar
Reviewed By: SjoerdMeijer
Differential Revision: https://reviews.llvm.org/D46686
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332472
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Andrea Di Biagio [Wed, 16 May 2018 13:38:17 +0000 (13:38 +0000)]
[llvm-mca] Move definitions in FetchStage.cpp inside namespace mca. NFC
Also, get rid of a redundant include in FetchStage.h and FetchStage.cpp.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332468
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Krzysztof Pszeniczny [Wed, 16 May 2018 13:16:54 +0000 (13:16 +0000)]
[BasicAA] Fix handling of invariant group launders
Summary:
A recent patch ([[ https://reviews.llvm.org/rL331587 | rL331587 ]]) to Capture Tracking taught it that the `launder_invariant_group` intrinsic captures its argument only by returning it. Unfortunately, BasicAA still considered every call instruction as a possible escape source and hence concluded that the result of a `launder_invariant_group` call cannot alias any local non-escaping value. This led to [[ https://bugs.llvm.org/show_bug.cgi?id=37458 | bug 37458 ]].
This patch updates the relevant check for escape sources in BasicAA.
Reviewers: Prazek, kuhar, rsmith, hfinkel, sanjoy, xbolva00
Reviewed By: hfinkel, xbolva00
Subscribers: JDevlieghere, hiraditya, llvm-commits
Differential Revision: https://reviews.llvm.org/D46900
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332466
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Simon Dardis [Wed, 16 May 2018 12:44:27 +0000 (12:44 +0000)]
[mips] Simplify some of the predicate scopes for (negative) multiply add/sub instructions (NFCI)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332464
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Simon Dardis [Wed, 16 May 2018 12:37:04 +0000 (12:37 +0000)]
[mips] Join existing scopes for DecoderNamespace (NFCI)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332462
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Andrea Di Biagio [Wed, 16 May 2018 12:33:09 +0000 (12:33 +0000)]
[llvm-mca] Fix perf regression after r332390.
Revision 332390 introduced a FetchStage class in llvm-mca.
By design, FetchStage owns all the instructions in-flight in the OoO Backend.
Before this change, new instructions were added to a DenseMap indexed by
instruction id. The problem with using a DenseMap is that elements are not
ordered by key. This was causing a massive slow down in method
FetchStage::postExecute(), which searches for instructions retired that can be
deleted.
This patch replaces the DenseMap with a std::map ordered by instruction index.
At the end of every cycle, we search for the first instruction which is not
marked as "retired", and we remove all the previous instructions before it.
This works well because instructions are retired in-order.
Before this patch, a debug build of llvm-mca (on my Ryzen linux machine) took
~8.0 seconds to simulate 3000 iterations of a x86 dot-product (a `vmulps,
vpermilps, vaddps, vpermilps, vaddps` sequence). With this patch, it now takes
~0.8s to run all the 3000 iterations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332461
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Clement Courbet [Wed, 16 May 2018 11:49:15 +0000 (11:49 +0000)]
[llvm-exegesis] Fix unused variable warning in release mode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332455
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Matt Arsenault [Wed, 16 May 2018 11:47:30 +0000 (11:47 +0000)]
AMDGPU: Custom lower v4i16/v4f16 vector operations
Avoids stack access.
Also handle extract hi elt pattern from truncate + shift
to avoid a couple test regressions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332453
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David Bolvansky [Wed, 16 May 2018 11:39:52 +0000 (11:39 +0000)]
[SimplifyLibcalls] Replace locked IO with unlocked IO
Summary: If file stream arg is not captured and source is fopen, we could replace IO calls by unlocked IO ("_unlocked" function variants) to gain better speed,
Reviewers: efriedma, RKSimon, spatel, sanjoy, hfinkel, majnemer, lebedev.ri, rja
Reviewed By: rja
Subscribers: rja, srhines, efriedma, lebedev.ri, llvm-commits
Differential Revision: https://reviews.llvm.org/D45736
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332452
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Simon Pilgrim [Wed, 16 May 2018 10:53:45 +0000 (10:53 +0000)]
[X86] Split WriteCvtI2F/WriteCvtF2I into I<->F32 and I<->F64 scheduler classes
A lot of the models still have too many InstRW overrides for these new classes - this needs cleaning up but I wanted to get the classes in first
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332451
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David Green [Wed, 16 May 2018 10:41:58 +0000 (10:41 +0000)]
[LoopUnroll] Split out simplify code after Unroll into a new function. NFC
So that it can be shared with other passes that may end up doing the same
thing.
Differential Revision: https://reviews.llvm.org/D45874
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332450
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Amara Emerson [Wed, 16 May 2018 10:32:02 +0000 (10:32 +0000)]
[GlobalISel][IRTranslator] Split aggregates during IR translation.
We currently handle all aggregates by creating one large LLT, and letting the
legalizer deal with splitting them up. However using this approach means that
we can't support big endian code correctly.
This patch changes the way that the IRTranslator deals with aggregate values,
by splitting them up into their constituent element values. To do this, parts
of the translator need to be modified to deal with multiple VRegs for a single
Value.
A new Value to VReg mapper is introduced to help keep compile time under
control, currently there is no measurable impact on CTMark despite the extra
code being generated in some cases.
Patch is based on the original work of Tim Northover.
Differential Revision: https://reviews.llvm.org/D46018
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332449
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Andrea Di Biagio [Wed, 16 May 2018 10:12:06 +0000 (10:12 +0000)]
[llvm-mca] Regenerate tests after r332381 and r332361. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332447
91177308-0d34-0410-b5e6-
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Simon Dardis [Wed, 16 May 2018 10:03:05 +0000 (10:03 +0000)]
[mips] Add support for isBranchOffsetInRange and use it for MipsLongBranch
Add support for this target hook, covering MIPS, microMIPS and MIPSR6, along
with some tests. Also add missing getOppositeBranchOpc() cases exposed by the
tests.
Reviewers: atanasyan, abeserminji, smaksimovic
Differential Revision: https://reviews.llvm.org/D46794
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332446
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Clement Courbet [Wed, 16 May 2018 09:50:04 +0000 (09:50 +0000)]
[llvm-exegesis] Add a flag to output analysis csv to a file.
Reviewers: gchatelet
Subscribers: llvm-commits, tschuett
Differential Revision: https://reviews.llvm.org/D46931
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332445
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Peter Smith [Wed, 16 May 2018 09:33:25 +0000 (09:33 +0000)]
[AArch64] Support "S" inline assembler constraint
This patch re-introduces the "S" inline assembler constraint. This matches
an absolute symbolic address or a label reference. The primary use case is
asm("adrp %0, %1\n\t"
"add %0, %0, :lo12:%1" : "=r"(addr) : "S"(&var));
I say re-introduces as it seems like "S" was implemented in the original
AArch64 backend, but it looks like it wasn't carried forward to the merged
backend. The original implementation had A and L modifiers that could be
used to print ":lo12:" to the string. It looks like gcc doesn't use these
and :lo12: is expected to be written in the inline assembly string so I've
not implemented A and L. Clang already supports the S modifier.
Fixes PR37180
Differential Revision: https://reviews.llvm.org/D46745
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332444
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Andrea Di Biagio [Wed, 16 May 2018 09:24:38 +0000 (09:24 +0000)]
[llvm-mca] Remove redundant includes in Stage.h.
This patch also makes Stage::isReady() a const method.
No functional change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332443
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Sander de Smalen [Wed, 16 May 2018 09:16:20 +0000 (09:16 +0000)]
[AArch64][SVE] Asm: Support for structured LD2, LD3 and LD4 (scalar+scalar) load instructions.
Reviewers: rengolin, fhahn, samparker, SjoerdMeijer, javed.absar
Reviewed By: fhahn
Differential Revision: https://reviews.llvm.org/D46679
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332442
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Clement Courbet [Wed, 16 May 2018 09:10:04 +0000 (09:10 +0000)]
Fix unused variable warning in r332437.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332441
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Alexander Richardson [Wed, 16 May 2018 09:00:28 +0000 (09:00 +0000)]
Escape ]]> in xunit xml output
Summary:
This sequence ends the CDATA block so any characters after that are no
longer escaped. This can be fixed by replacing "]]>" with "]]]]><![CDATA[>".
Reviewers: cmatthews
Reviewed By: cmatthews
Differential Revision: https://reviews.llvm.org/D46886
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332440
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Alexander Richardson [Wed, 16 May 2018 08:58:26 +0000 (08:58 +0000)]
Emit a left-shift instead of a power-of-two multiply for jump-tables
Summary:
SelectionDAGLegalize::ExpandNode() inserts an ISD::MUL when lowering a
BR_JT opcode. While many backends optimize this multiply into a shift, e.g.
the MIPS backend currently always lowers this into a sequence of
load-immediate+multiply+mflo in MipsSETargetLowering::lowerMulDiv().
I initially changed the multiply to a shift in the MIPS backend but it
turns out that would not have handled the MIPSR6 case and was a lot more
code than doing it in LegalizeDAG.
I believe performing this simple optimization in LegalizeDAG instead of
each individual backend is the better solution since this also fixes other
backeds such as MSP430 which calls the multiply runtime function
__mspabi_mpyi without this patch.
Reviewers: sdardis, atanasyan, pftbest, asl
Reviewed By: sdardis
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D45760
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332439
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