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22 months agodrm/amdgpu: cleanup CS init/fini and pass1
Christian König [Wed, 7 Sep 2022 09:37:06 +0000 (11:37 +0200)]
drm/amdgpu: cleanup CS init/fini and pass1

Cleanup the coding style and function names to represent the data
they process. Only initialize and cleanup the CS structure in
init/fini.

Check the size of the IB chunk in pass1.

v2: fix job initialisation order and use correct scheduler instance
v3: try to move all functional changes into a separate patch.
v4: move reordering and pass2 out of this patch as well

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
22 months agodrm/amdgpu: use DMA_RESV_USAGE_BOOKKEEP v2
Christian König [Tue, 5 Apr 2022 08:35:31 +0000 (10:35 +0200)]
drm/amdgpu: use DMA_RESV_USAGE_BOOKKEEP v2

Use DMA_RESV_USAGE_BOOKKEEP for VM page table updates and KFD preemption fence.

v2: actually update all usages for KFD

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
22 months agodrm/amdgpu: revert "partial revert "remove ctx->lock" v2"
Christian König [Thu, 14 Jul 2022 08:23:38 +0000 (10:23 +0200)]
drm/amdgpu: revert "partial revert "remove ctx->lock" v2"

This reverts commit 94f4c4965e5513ba624488f4b601d6b385635aec.

We found that the bo_list is missing a protection for its list entries.
Since that is fixed now this workaround can be removed again.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
22 months agodrm/amdgpu: move setting the job resources
Christian König [Tue, 1 Mar 2022 09:59:14 +0000 (10:59 +0100)]
drm/amdgpu: move setting the job resources

Move setting the job resources into amdgpu_job.c

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Reviewed-by: Luben Tuikov <luben.tuikov@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
22 months agodrm/amdgpu: remove SRIOV and MCBP dependencies from the CS
Christian König [Mon, 28 Feb 2022 19:46:57 +0000 (20:46 +0100)]
drm/amdgpu: remove SRIOV and MCBP dependencies from the CS

We should not have any different CS constrains based
on the execution environment.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
22 months agodrm/amd/display: Mark dml30's UseMinimumDCFCLK() as noinline for stack usage
Nathan Chancellor [Tue, 30 Aug 2022 20:34:09 +0000 (13:34 -0700)]
drm/amd/display: Mark dml30's UseMinimumDCFCLK() as noinline for stack usage

This function consumes a lot of stack space and it blows up the size of
dml30_ModeSupportAndSystemConfigurationFull() with clang:

  drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn30/display_mode_vba_30.c:3542:6: error: stack frame size (2200) exceeds limit (2048) in 'dml30_ModeSupportAndSystemConfigurationFull' [-Werror,-Wframe-larger-than]
  void dml30_ModeSupportAndSystemConfigurationFull(struct display_mode_lib *mode_lib)
       ^
  1 error generated.

Commit a0f7e7f759cf ("drm/amd/display: fix i386 frame size warning")
aimed to address this for i386 but it did not help x86_64.

To reduce the amount of stack space that
dml30_ModeSupportAndSystemConfigurationFull() uses, mark
UseMinimumDCFCLK() as noinline, using the _for_stack variant for
documentation. While this will increase the total amount of stack usage
between the two functions (1632 and 1304 bytes respectively), it will
make sure both stay below the limit of 2048 bytes for these files. The
aforementioned change does help reduce UseMinimumDCFCLK()'s stack usage
so it should not be reverted in favor of this change.

Link: https://github.com/ClangBuiltLinux/linux/issues/1681
Reported-by: "Sudip Mukherjee (Codethink)" <sudipm.mukherjee@gmail.com>
Tested-by: Maíra Canal <mairacanal@riseup.net>
Reviewed-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Nathan Chancellor <nathan@kernel.org>
Signed-off-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
22 months agodrm/amd/display: Reduce number of arguments of dml31's CalculateFlipSchedule()
Nathan Chancellor [Tue, 30 Aug 2022 20:34:08 +0000 (13:34 -0700)]
drm/amd/display: Reduce number of arguments of dml31's CalculateFlipSchedule()

Most of the arguments are identical between the two call sites and they
can be accessed through the 'struct vba_vars_st' pointer. This reduces
the total amount of stack space that
dml31_ModeSupportAndSystemConfigurationFull() uses by 112 bytes with
LLVM 16 (1976 -> 1864), helping clear up the following clang warning:

  drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn31/display_mode_vba_31.c:3908:6: error: stack frame size (2216) exceeds limit (2048) in 'dml31_ModeSupportAndSystemConfigurationFull' [-Werror,-Wframe-larger-than]
  void dml31_ModeSupportAndSystemConfigurationFull(struct display_mode_lib *mode_lib)
      ^
  1 error generated.

Link: https://github.com/ClangBuiltLinux/linux/issues/1681
Reported-by: "Sudip Mukherjee (Codethink)" <sudipm.mukherjee@gmail.com>
Tested-by: Maíra Canal <mairacanal@riseup.net>
Reviewed-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Nathan Chancellor <nathan@kernel.org>
Signed-off-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
22 months agodrm/amd/display: Reduce number of arguments of dml31's CalculateWatermarksAndDRAMSpee...
Nathan Chancellor [Tue, 30 Aug 2022 20:34:07 +0000 (13:34 -0700)]
drm/amd/display: Reduce number of arguments of dml31's CalculateWatermarksAndDRAMSpeedChangeSupport()

Most of the arguments are identical between the two call sites and they
can be accessed through the 'struct vba_vars_st' pointer. This reduces
the total amount of stack space that
dml31_ModeSupportAndSystemConfigurationFull() uses by 240 bytes with
LLVM 16 (2216 -> 1976), helping clear up the following clang warning:

  drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn31/display_mode_vba_31.c:3908:6: error: stack frame size (2216) exceeds limit (2048) in 'dml31_ModeSupportAndSystemConfigurationFull' [-Werror,-Wframe-larger-than]
  void dml31_ModeSupportAndSystemConfigurationFull(struct display_mode_lib *mode_lib)
      ^
  1 error generated.

Link: https://github.com/ClangBuiltLinux/linux/issues/1681
Reported-by: "Sudip Mukherjee (Codethink)" <sudipm.mukherjee@gmail.com>
Tested-by: Maíra Canal <mairacanal@riseup.net>
Reviewed-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Nathan Chancellor <nathan@kernel.org>
Signed-off-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
22 months agodrm/amd/display: Reduce number of arguments of dml32_CalculatePrefetchSchedule()
Nathan Chancellor [Tue, 30 Aug 2022 20:34:06 +0000 (13:34 -0700)]
drm/amd/display: Reduce number of arguments of dml32_CalculatePrefetchSchedule()

Several of the arguments are identical between the two call sites and
they can be accessed through the 'struct vba_vars_st' pointer. This
reduces the total amount of stack space that
dml32_ModeSupportAndSystemConfigurationFull() uses by 208 bytes with
LLVM 16 (1936 -> 1728), helping clear up the following clang warning:

  drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn32/display_mode_vba_32.c:1721:6: error: stack frame size (2152) exceeds limit (2048) in 'dml32_ModeSupportAndSystemConfigurationFull' [-Werror,-Wframe-larger-than]
  void dml32_ModeSupportAndSystemConfigurationFull(struct display_mode_lib *mode_lib)
       ^
  1 error generated.

Additionally, while modifying the arguments to
dml32_CalculatePrefetchSchedule(), use 'v' consistently, instead of 'v'
mixed with 'mode_lib->vba'.

Link: https://github.com/ClangBuiltLinux/linux/issues/1681
Reported-by: "Sudip Mukherjee (Codethink)" <sudipm.mukherjee@gmail.com>
Tested-by: Maíra Canal <mairacanal@riseup.net>
Reviewed-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Nathan Chancellor <nathan@kernel.org>
Signed-off-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
22 months agodrm/amd/display: Reduce number of arguments of dml32_CalculateWatermarksMALLUseAndDRA...
Nathan Chancellor [Tue, 30 Aug 2022 20:34:05 +0000 (13:34 -0700)]
drm/amd/display: Reduce number of arguments of dml32_CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport()

Most of the arguments are identical between the two call sites and they
can be accessed through the 'struct vba_vars_st' pointer created at the
top of dml32_ModeSupportAndSystemConfigurationFull(). This reduces the
total amount of stack space that
dml32_ModeSupportAndSystemConfigurationFull() uses by 216 bytes with
LLVM 16 (2152 -> 1936), helping clear up the following clang warning:

  drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn32/display_mode_vba_32.c:1721:6: error: stack frame size (2152) exceeds limit (2048) in 'dml32_ModeSupportAndSystemConfigurationFull' [-Werror,-Wframe-larger-than]
  void dml32_ModeSupportAndSystemConfigurationFull(struct display_mode_lib *mode_lib)
       ^
  1 error generated.

Additionally, while modifying the arguments to
dml32_CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport(), use 'v'
consistently, instead of 'v' mixed with 'mode_lib->vba'.

Link: https://github.com/ClangBuiltLinux/linux/issues/1681
Reported-by: "Sudip Mukherjee (Codethink)" <sudipm.mukherjee@gmail.com>
Tested-by: Maíra Canal <mairacanal@riseup.net>
Reviewed-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Nathan Chancellor <nathan@kernel.org>
Signed-off-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
22 months agodrm/amd/display: 3.2.202
Aric Cyr [Sat, 27 Aug 2022 19:08:49 +0000 (15:08 -0400)]
drm/amd/display: 3.2.202

This version brings along following fixes:

*Fixed register definitions for DCN32/321
*Adding log for spread_spectrum_info
*Reverted DSC programming sequence change
*Correct I2C register offset
*Updated DCN30 header files, viewport position for phantom pipes
*Enable dlg and vba compilation for dcn314

Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Acked-by: Pavle Kotarac <Pavle.Kotarac@amd.com>
Signed-off-by: Aric Cyr <aric.cyr@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
22 months agodrm/amd/display: Fix register definitions for DCN32/321
Aurabindo Pillai [Thu, 1 Sep 2022 19:27:36 +0000 (15:27 -0400)]
drm/amd/display: Fix register definitions for DCN32/321

[Why & How]
Fix the instatiation sequence for MPC registers and add a few other
missing register definitions that were ommited erroneously when copying
them over to enable runtime initialization of reigster offsets for
DCN32/321

Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Reviewed-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
22 months agodrm/amd/display: Refactor SubVP calculation to remove FPU
Alvin Lee [Fri, 5 Aug 2022 17:58:00 +0000 (01:58 +0800)]
drm/amd/display: Refactor SubVP calculation to remove FPU

Refactor calculation to remove floating point operations from dmub_srv.
To ensure that 32-bit compilation works well, we use the div64 family of
macros to do integer division for SubVP-related timing parameters.

Cc: Maíra Canal <mairacanal@riseup.net>
Cc: Alex Deucher <alexander.deucher@amd.com>
Cc: Isabella Basso <isabbasso@riseup.net>
Cc: Magali Lemes <magalilemes00@gmail.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Reviewed-by: Samson Tam <Samson.Tam@amd.com>
Acked-by: Tom Chung <chiahsuan.chung@amd.com>
Signed-off-by: Alvin Lee <alvin.lee2@amd.com>
Co-developed-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
Signed-off-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
Co-developed-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
22 months agodrm/amd/display: Avoid force minimal transaction in case of surface_count equal to 0
JeromeHong [Thu, 25 Aug 2022 07:52:11 +0000 (15:52 +0800)]
drm/amd/display: Avoid force minimal transaction in case of surface_count equal to 0

[why]
Call commit_minimal_transition_state wrongly in case of surface_count
equal to 0.

[how]
Add a condition to filter case of surface_count equal to 0.

Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Reviewed-by: Aric Cyr <Aric.Cyr@amd.com>
Acked-by: Pavle Kotarac <Pavle.Kotarac@amd.com>
Signed-off-by: JeromeHong <jerome.hong@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
22 months agodrm/amd/display: Don't adjust VRR unnecessarily
Aric Cyr [Fri, 26 Aug 2022 21:53:34 +0000 (17:53 -0400)]
drm/amd/display: Don't adjust VRR unnecessarily

[why]
Do not need to spend time reprogramming DRR if there were no updates to
the parameters.

[how]
Compare the current stream state to the requested one to determine if an
update is required.

In amdgpu_dm the timing_changed flag is set but never used so can remove it.
Similarly, the stream update for VRR is done after dc_commit and should
not update its adjust field until after the update is completed.  The
adjust field is managed by dc_stream_adjust_vmin_vmax and should not be
manually updated in amdgpu_dm.

Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Reviewed-by: Anthony Koo <Anthony.Koo@amd.com>
Acked-by: Pavle Kotarac <Pavle.Kotarac@amd.com>
Signed-off-by: Aric Cyr <aric.cyr@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
22 months agodrm/amd/display: Adding log for spread_spectrum_info
Leo Chen [Fri, 26 Aug 2022 15:29:23 +0000 (11:29 -0400)]
drm/amd/display: Adding log for spread_spectrum_info

[Why & How]
Enable logging for spread_spectrum_percentage in spread_spectrum_info
to facilitate debugging for audio compliance issues

Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Co-authored-by: Leo Chen <SanChuan.Chen@amd.com>
Reviewed-by: Charlene Liu <Charlene.Liu@amd.com>
Acked-by: Pavle Kotarac <Pavle.Kotarac@amd.com>
Signed-off-by: Leo Chen <SanChuan.Chen@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
22 months agodrm/amd/display: Limit user regamma to a valid value
Yao Wang1 [Mon, 22 Aug 2022 10:30:31 +0000 (18:30 +0800)]
drm/amd/display: Limit user regamma to a valid value

[Why]
For HDR mode, we get total 512 tf_point and after switching to SDR mode
we actually get 400 tf_point and the rest of points(401~512) still use
dirty value from HDR mode. We should limit the rest of the points to max
value.

[How]
Limit the value when coordinates_x.x > 1, just like what we do in
translate_from_linear_space for other re-gamma build paths.

Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Reviewed-by: Krunoslav Kovac <Krunoslav.Kovac@amd.com>
Reviewed-by: Aric Cyr <Aric.Cyr@amd.com>
Acked-by: Pavle Kotarac <Pavle.Kotarac@amd.com>
Signed-off-by: Yao Wang1 <Yao.Wang1@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
22 months agodrm/amd/display: add workaround for subvp cursor corruption for DCN32/321
Aurabindo Pillai [Thu, 25 Aug 2022 19:05:58 +0000 (15:05 -0400)]
drm/amd/display: add workaround for subvp cursor corruption for DCN32/321

[Why&How]
Kernel does not have a means to tell the userspace to use software
cursor. Due to lack of this functionality, reducing the max cursor size
is the only way to ensure that power savings of Subview port feature is
utilized for asics that support it. The workaround could be removed
after cursor caching is fixed while a subviewport config is active.

Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Reviewed-by: Alvin Lee <Alvin.Lee2@amd.com>
Acked-by: Pavle Kotarac <Pavle.Kotarac@amd.com>
Signed-off-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
22 months agodrm/amd/display: Added debug option for forcing subvp num ways
Lee, Alvin [Thu, 25 Aug 2022 20:05:03 +0000 (16:05 -0400)]
drm/amd/display: Added debug option for forcing subvp num ways

[Description]
Regkey option for forcing num ways for subvp for debug purposes

Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Reviewed-by: Jun Lei <Jun.Lei@amd.com>
Acked-by: Pavle Kotarac <Pavle.Kotarac@amd.com>
Signed-off-by: Alvin Lee <Alvin.Lee2@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
22 months agodrm/amd/display: Update viewport position for phantom pipes
Alvin Lee [Thu, 25 Aug 2022 20:04:29 +0000 (16:04 -0400)]
drm/amd/display: Update viewport position for phantom pipes

[Description]
In some cases the viewport position of the main pipes can change without
triggering a full update. In this case the subvp phantom viewports must
be updated accordingly.

Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Reviewed-by: Jun Lei <Jun.Lei@amd.com>
Acked-by: Pavle Kotarac <Pavle.Kotarac@amd.com>
Signed-off-by: Alvin Lee <Alvin.Lee2@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
22 months agodrm/amd/display: Round cursor width up for MALL allocation
Taimur Hassan [Thu, 25 Aug 2022 16:33:12 +0000 (12:33 -0400)]
drm/amd/display: Round cursor width up for MALL allocation

[Why & How]
When calculating cursor size for MALL allocation, the cursor width should
be the actual width rounded up to 64 alignment. Additionally, the bit
depth should vary depending on color format.

Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Reviewed-by: Alvin Lee <Alvin.Lee2@amd.com>
Acked-by: Pavle Kotarac <Pavle.Kotarac@amd.com>
Signed-off-by: Taimur Hassan <Syed.Hassan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
22 months agodrm/amd/display: Correct dram channel width for dcn314
Duncan Ma [Wed, 24 Aug 2022 18:35:03 +0000 (14:35 -0400)]
drm/amd/display: Correct dram channel width for dcn314

[Why]
The interpretation of the number of memory channels
differ by memory type, and this affects channel width
for the DML input.

[How]
Set dram channel width according to memory type for
dcn314.

Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Reviewed-by: Nicholas Kazlauskas <Nicholas.Kazlauskas@amd.com>
Reviewed-by: Jun Lei <Jun.Lei@amd.com>
Acked-by: Pavle Kotarac <Pavle.Kotarac@amd.com>
Signed-off-by: Duncan Ma <duncan.ma@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
22 months agodrm/amd/display: Relax swizzle checks for video non-RGB formats on DCN314
Nicholas Kazlauskas [Wed, 24 Aug 2022 14:51:21 +0000 (10:51 -0400)]
drm/amd/display: Relax swizzle checks for video non-RGB formats on DCN314

[Why]
HW can support the display swizzle modes for video, and those are
preferable over standard or linear for decode use.

[How]
Remove the check for DCN314.

Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Reviewed-by: Jun Lei <Jun.Lei@amd.com>
Acked-by: Pavle Kotarac <Pavle.Kotarac@amd.com>
Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
22 months agodrm/amd/display: Hook up DCN314 specific dml implementation
Nicholas Kazlauskas [Wed, 24 Aug 2022 13:24:18 +0000 (09:24 -0400)]
drm/amd/display: Hook up DCN314 specific dml implementation

[Why & How]
Add support for the DML314 functions and hook up DCN314 to use them.

This has some necessary additions for calculating Max VSTARTUP for
future features, but there's also some changes that we have to make
for pixel format/swizzle support.

That will come in a following patch to make this transition easier to
bisect.

Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Reviewed-by: Jun Lei <Jun.Lei@amd.com>
Acked-by: Pavle Kotarac <Pavle.Kotarac@amd.com>
Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
22 months agodrm/amd/display: Enable dlg and vba compilation for dcn314
Rodrigo Siqueira [Thu, 1 Sep 2022 20:07:19 +0000 (16:07 -0400)]
drm/amd/display: Enable dlg and vba compilation for dcn314

We were not using the VBA and DLG files for DCN314, but the next
sequence of changes for DCN314 will require those files. This commit
adds the necessary files to the Makefile.

Cc: Roman Li <roman.li@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
22 months agodrm/amd/display: Fix compilation errors on DCN314
Rodrigo Siqueira [Thu, 1 Sep 2022 20:00:52 +0000 (16:00 -0400)]
drm/amd/display: Fix compilation errors on DCN314

We have some compilation errors in some DML files from DCN314 that we
never noticed because we were not compiling some of the DML files. This
commit fixes those syntax errors before we enable the compilation.

Cc: Roman Li <roman.li@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
22 months agodrm/amd/display: Fix divide by zero in DML
Aric Cyr [Wed, 24 Aug 2022 20:34:53 +0000 (16:34 -0400)]
drm/amd/display: Fix divide by zero in DML

[why]
Incorrectly using MicroTileWidth instead of MacroTileWidth for
calculations.

[how]
Remove all unused references to MicroTile and change them to MacroTile.

Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Reviewed-by: Alvin Lee <Alvin.Lee2@amd.com>
Reviewed-by: Jun Lei <Jun.Lei@amd.com>
Acked-by: Pavle Kotarac <Pavle.Kotarac@amd.com>
Signed-off-by: Aric Cyr <aric.cyr@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
22 months agodrm/amd/display: Fixing DIG FIFO Error
Leo Chen [Wed, 24 Aug 2022 19:34:24 +0000 (15:34 -0400)]
drm/amd/display: Fixing DIG FIFO Error

[Why & How]
DIG_FIFO_READ_START_LEVEL should only be set to default value (7) by software.
Removed all instances of resetting the register to 0

Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Reviewed-by: Nicholas Kazlauskas <Nicholas.Kazlauskas@amd.com>
Acked-by: Pavle Kotarac <Pavle.Kotarac@amd.com>
Signed-off-by: Leo Chen <sancchen@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
22 months agodrm/amd/display: SW cursor fallback for SubVP
Alvin Lee [Wed, 24 Aug 2022 15:53:50 +0000 (11:53 -0400)]
drm/amd/display: SW cursor fallback for SubVP

[Description]
Leverage SW cursor fall back for SubVP when the cursor is too big. We
want to take advantage of being able to fallback to SW cursor when
possible because it's not worth it to disable MCLK switching because the
cursor is slightly too big.

Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Reviewed-by: Aurabindo Pillai <Aurabindo.Pillai@amd.com>
Acked-by: Pavle Kotarac <Pavle.Kotarac@amd.com>
Signed-off-by: Alvin Lee <Alvin.Lee2@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
22 months agodrm/amd/display: Assign link type before check dsc workaround.
JinZe.Xu [Wed, 24 Aug 2022 05:18:06 +0000 (22:18 -0700)]
drm/amd/display: Assign link type before check dsc workaround.

[Why]
link type is not assigned before check dpia_mst_dsc_always_on conditions.

Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Reviewed-by: Wenjing Liu <Wenjing.Liu@amd.com>
Acked-by: Pavle Kotarac <Pavle.Kotarac@amd.com>
Signed-off-by: JinZe.Xu <JinZe.Xu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
22 months agodrm/amd/display: Reverted DSC programming sequence change
Nagulendran, Iswara [Tue, 23 Aug 2022 16:01:56 +0000 (12:01 -0400)]
drm/amd/display: Reverted DSC programming sequence change

[HOW&WHY]
Revert a previous commit by moving DSC programming back to before link
enablement.

Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Reviewed-by: Jayendran Ramani <Jayendran.Ramani@amd.com>
Acked-by: Pavle Kotarac <Pavle.Kotarac@amd.com>
Signed-off-by: Nagulendran, Iswara <Iswara.Nagulendran@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
22 months agodrm/amd/display: Update MBLK calculation for SubVP
Alvin Lee [Tue, 23 Aug 2022 21:14:03 +0000 (17:14 -0400)]
drm/amd/display: Update MBLK calculation for SubVP

[Description]
Update MBLK calculation according to hardware doc.  For DCC case we were
not allocation enough MALL due to an inaccurate MBLK calculation.

Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Reviewed-by: Jun Lei <Jun.Lei@amd.com>
Acked-by: Pavle Kotarac <Pavle.Kotarac@amd.com>
Signed-off-by: Alvin Lee <Alvin.Lee2@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
22 months agodrm/amd/display: Revert "Fallback to SW cursor if SubVP + cursor too big"
Aurabindo Pillai [Thu, 11 Aug 2022 20:42:12 +0000 (16:42 -0400)]
drm/amd/display: Revert "Fallback to SW cursor if SubVP + cursor too big"

This reverts commit a4f1b04216023ff0f4cd89328b59ee6890248130 since
returning false in case of SubVP results in no cursor being visible on
desktop as there is no sw cursor fallback path on all platforms.

Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Reviewed-by: Alvin Lee <Alvin.Lee2@amd.com>
Acked-by: Pavle Kotarac <Pavle.Kotarac@amd.com>
Signed-off-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
22 months agodrm/amd/display: Correct I2C register offset
Chris Park [Tue, 23 Aug 2022 16:21:52 +0000 (12:21 -0400)]
drm/amd/display: Correct I2C register offset

[Why]
I2C register name starts with 1, unlike other registers that start with
0. This creates a problem with the new register macro refactoring when
I2C HW objects are created in an array.

[How]
Correct I2C register offset by making a new macro to account for array
offset.

Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Reviewed-by: Charlene Liu <Charlene.Liu@amd.com>
Acked-by: Pavle Kotarac <Pavle.Kotarac@amd.com>
Signed-off-by: Chris Park <chris.park@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
22 months agodrm/amd/display: Optimizations for DML math
Aric Cyr [Sat, 20 Aug 2022 21:20:30 +0000 (17:20 -0400)]
drm/amd/display: Optimizations for DML math

[why]
Conditionals in the DML basic math functions significantly impact mode
enumeration.

[how]
Remove conditionals for floor/ceil operations which are used frequently
in DML and add an assertion for invalid callers using zero granuality.
Fix existing callers that rely on 0 granularity.

Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Reviewed-by: Nevenko Stupar <Nevenko.Stupar@amd.com>
Acked-by: Pavle Kotarac <Pavle.Kotarac@amd.com>
Signed-off-by: Aric Cyr <aric.cyr@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
22 months agodrm/amdgpu: Skip reset error status for psp v13_0_0
Candice Li [Wed, 7 Sep 2022 07:52:04 +0000 (15:52 +0800)]
drm/amdgpu: Skip reset error status for psp v13_0_0

No need to reset error status since only umc ras supported on psp v13_0_0.

Signed-off-by: Candice Li <candice.li@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
22 months agodrm/amdgpu: Add EEPROM I2C address for smu v13_0_0
Candice Li [Wed, 7 Sep 2022 07:54:25 +0000 (15:54 +0800)]
drm/amdgpu: Add EEPROM I2C address for smu v13_0_0

Set correct EEPROM I2C address for smu v13_0_0.

Signed-off-by: Candice Li <candice.li@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
22 months agodrm/amdgpu: added support for ras driver loading
John Clements [Fri, 29 Jul 2022 22:08:36 +0000 (06:08 +0800)]
drm/amdgpu: added support for ras driver loading

copy ras driver to psp if present

Signed-off-by: John Clements <john.clements@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
22 months agodrm/amdgpu: add HDP remap functionality to nbio 7.7
Alex Deucher [Tue, 30 Aug 2022 15:08:09 +0000 (11:08 -0400)]
drm/amdgpu: add HDP remap functionality to nbio 7.7

Was missing before and would have resulted in a write to
a non-existant register. Normally APUs don't use HDP, but
other asics could use this code and APUs do use the HDP
when used in passthrough.

Reviewed-by: Lijo Lazar <lijo.lazar@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
22 months agodrm/amdgpu/display: remove unneeded "default n" options
Jingyu Wang [Fri, 9 Sep 2022 19:53:30 +0000 (03:53 +0800)]
drm/amdgpu/display: remove unneeded "default n" options

Remove "default n" options. If the "default" line is removed, it
defaults to 'n'.

Signed-off-by: Jingyu Wang <jingyuwang_vip@163.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
22 months agodrm/amd/display: fix repeated words in comments
Jilin Yuan [Wed, 7 Sep 2022 04:10:58 +0000 (12:10 +0800)]
drm/amd/display: fix repeated words in comments

Delete the redundant word 'in'.

Signed-off-by: Jilin Yuan <yuanjilin@cdjrlc.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
22 months agodrm/amdgpu: cleanup coding style in amdgpu_amdkfd_gpuvm.c
Jingyu Wang [Mon, 5 Sep 2022 08:38:25 +0000 (16:38 +0800)]
drm/amdgpu: cleanup coding style in amdgpu_amdkfd_gpuvm.c

Fix everything checkpatch.pl complained about in amdgpu_amdkfd_gpuvm.c

Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Jingyu Wang <jingyuwang_vip@163.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
22 months agodrm/amdgpu: cleanup coding style in amdgpu_amdkfd.c
Jingyu Wang [Mon, 5 Sep 2022 07:56:24 +0000 (15:56 +0800)]
drm/amdgpu: cleanup coding style in amdgpu_amdkfd.c

Fix everything checkpatch.pl complained about in amdgpu_amdkfd.c

Signed-off-by: Jingyu Wang <jingyuwang_vip@163.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
22 months agodrm/amdgpu: cleanup coding style in amdgpu_sync.c file
Jingyu Wang [Sun, 4 Sep 2022 18:33:07 +0000 (02:33 +0800)]
drm/amdgpu: cleanup coding style in amdgpu_sync.c file

This is a patch to the amdgpu_sync.c file that fixes some warnings found by the checkpatch.pl tool

Signed-off-by: Jingyu Wang <jingyuwang_vip@163.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
22 months agodrm/amdgpu: cleanup coding style in amdgpu_acpi.c
Jingyu Wang [Mon, 5 Sep 2022 01:14:31 +0000 (09:14 +0800)]
drm/amdgpu: cleanup coding style in amdgpu_acpi.c

Fix everything checkpatch.pl complained about in amdgpu_acpi.c

Signed-off-by: Jingyu Wang <jingyuwang_vip@163.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
22 months agodrm/amdgpu: Remove the unneeded result variable
zhang songyi [Fri, 2 Sep 2022 08:04:01 +0000 (08:04 +0000)]
drm/amdgpu: Remove the unneeded result variable

Return the sdma_v6_0_start() directly instead of storing it in another
redundant variable.

Reported-by: Zeal Robot <zealci@zte.com.cn>
Signed-off-by: zhang songyi <zhang.songyi@zte.com.cn>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
22 months agodrm/radeon: Remove the unneeded result variable
ye xingchen [Fri, 2 Sep 2022 07:33:20 +0000 (07:33 +0000)]
drm/radeon: Remove the unneeded result variable

Return the value radeon_drm_ioctl() directly instead of storing it in
another redundant variable.

Reported-by: Zeal Robot <zealci@zte.com.cn>
Signed-off-by: ye xingchen <ye.xingchen@zte.com.cn>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
22 months agodrm/radeon/ci_dpm: Remove the unneeded result variable
ye xingchen [Fri, 2 Sep 2022 07:31:48 +0000 (07:31 +0000)]
drm/radeon/ci_dpm: Remove the unneeded result variable

Return the value ci_load_smc_ucode() directly instead of storing it in
another redundant variable.

Reported-by: Zeal Robot <zealci@zte.com.cn>
Signed-off-by: ye xingchen <ye.xingchen@zte.com.cn>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
22 months agodrm/amd/display: remove possible condition with no effect (if == else)
Yang Li [Thu, 1 Sep 2022 08:34:38 +0000 (16:34 +0800)]
drm/amd/display: remove possible condition with no effect (if == else)

Conditional statements have no effect to next process.So remove it.

Link: https://bugzilla.openanolis.cn/show_bug.cgi?id=2028
Reported-by: Abaci Robot <abaci@linux.alibaba.com>
Signed-off-by: Yang Li <yang.lee@linux.alibaba.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
22 months agodrm/amd/display: Simplify bool conversion
Yang Li [Thu, 1 Sep 2022 08:11:31 +0000 (16:11 +0800)]
drm/amd/display: Simplify bool conversion

The result of relational operation is Boolean, and the question mark
expression is redundant.

Link: https://bugzilla.openanolis.cn/show_bug.cgi?id=2027
Reported-by: Abaci Robot <abaci@linux.alibaba.com>
Signed-off-by: Yang Li <yang.lee@linux.alibaba.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
22 months agodrm/amd/display: clean up some inconsistent indentings
Yang Li [Thu, 1 Sep 2022 07:56:55 +0000 (15:56 +0800)]
drm/amd/display: clean up some inconsistent indentings

This if statement is the content of the for statement above it. It
should be indented.

Link: https://bugzilla.openanolis.cn/show_bug.cgi?id=2026
Reported-by: Abaci Robot <abaci@linux.alibaba.com>
Signed-off-by: Yang Li <yang.lee@linux.alibaba.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
22 months agodrm/amdgpu: Fix hive reference count leak
Vignesh Chander [Fri, 9 Sep 2022 13:28:46 +0000 (09:28 -0400)]
drm/amdgpu: Fix hive reference count leak

both get_xgmi_hive and put_xgmi_hive can be skipped since the
reset domain is not necessary for VF

Signed-off-by: Vignesh Chander <Vignesh.Chander@amd.com>
Reviewed-by: Shaoyun Liu <Shaoyun.Liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
22 months agodrm/amdkfd: Migrate in CPU page fault use current mm
Philip Yang [Thu, 8 Sep 2022 21:56:09 +0000 (17:56 -0400)]
drm/amdkfd: Migrate in CPU page fault use current mm

migrate_vma_setup shows below warning because we don't hold another
process mm mmap_lock. We should use current vmf->vma->vm_mm instead, the
caller already hold current mmap lock inside CPU page fault handler.

 WARNING: CPU: 10 PID: 3054 at include/linux/mmap_lock.h:155 find_vma
 Call Trace:
  walk_page_range+0x76/0x150
  migrate_vma_setup+0x18a/0x640
  svm_migrate_vram_to_ram+0x245/0xa10 [amdgpu]
  svm_migrate_to_ram+0x36f/0x470 [amdgpu]
  do_swap_page+0xcfe/0xec0
  __handle_mm_fault+0x96b/0x15e0
  handle_mm_fault+0x13f/0x3e0
  do_user_addr_fault+0x1e7/0x690

Fixes: e1f84eef313f ("drm/amdkfd: handle CPU fault on COW mapping")
Signed-off-by: Philip Yang <Philip.Yang@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
22 months agodrm/amdgpu: change the alignment size of TMR BO to 1M
Yang Wang [Fri, 9 Sep 2022 03:06:50 +0000 (11:06 +0800)]
drm/amdgpu: change the alignment size of TMR BO to 1M

align TMR BO size TO tmr size is not necessary,
modify the size to 1M to avoid re-create BO fail
when serious VRAM fragmentation.

v2:
add new macro PSP_TMR_ALIGNMENT for TMR BO alignment size

Signed-off-by: Yang Wang <KevinYang.Wang@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
22 months agodrm/amdgpu: Enable full reset when RAS is supported on gc v11_0_0
Candice Li [Wed, 7 Sep 2022 07:58:59 +0000 (15:58 +0800)]
drm/amdgpu: Enable full reset when RAS is supported on gc v11_0_0

Enable full reset for RAS supported configuration on gc v11_0_0.

v2: simplify the code.

Signed-off-by: Candice Li <candice.li@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
22 months agodrm/amdgpu: Rely on MCUMC_STATUS for umc v8_10 correctable error counter only
Candice Li [Wed, 7 Sep 2022 07:56:27 +0000 (15:56 +0800)]
drm/amdgpu: Rely on MCUMC_STATUS for umc v8_10 correctable error counter only

Only check MCUMC_STATUS for CE counter for umc v8_10.

Signed-off-by: Candice Li <candice.li@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
22 months agodrm/amd/display: update header files
Charlene Liu [Tue, 23 Aug 2022 13:39:56 +0000 (09:39 -0400)]
drm/amd/display: update header files

[why]
update header files, and remove not used register access marco

Reviewed-by: Hansen Dsouza <hansen.dsouza@amd.com>
Acked-by: Pavle Kotarac <Pavle.Kotarac@amd.com>
Signed-off-by: Charlene Liu <Charlene.Liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
22 months agodrm/amdkfd: Remove prefault before migrating to VRAM
Philip Yang [Tue, 26 Jul 2022 19:13:30 +0000 (15:13 -0400)]
drm/amdkfd: Remove prefault before migrating to VRAM

Prefaulting potentially allocates system memory pages before a
migration. This adds unnecessary overhead. Instead we can skip
unallocated pages in the migration and just point migrate->dst to a
0-initialized VRAM page directly. Then the VRAM page will be inserted
to the PTE. A subsequent CPU page fault will migrate the page back to
system memory.

Signed-off-by: Philip Yang <Philip.Yang@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
22 months agodrm/amdkfd: handle CPU fault on COW mapping
Philip Yang [Wed, 7 Sep 2022 16:30:12 +0000 (12:30 -0400)]
drm/amdkfd: handle CPU fault on COW mapping

If CPU page fault in a page with zone_device_data svm_bo from another
process, that means it is COW mapping in the child process and the
range is migrated to VRAM by parent process. Migrate the parent
process range back to system memory to recover the CPU page fault.

Signed-off-by: Philip Yang <Philip.Yang@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
22 months agoamd/amdkfd: fix repeated words in comments
wangjianli [Thu, 8 Sep 2022 13:17:12 +0000 (21:17 +0800)]
amd/amdkfd: fix repeated words in comments

Delete the redundant word 'to'.

Signed-off-by: wangjianli <wangjianli@cdjrlc.com>
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
22 months agodrm/amdgpu: Use per device reset_domain for XGMI on sriov configuration
shaoyunl [Wed, 7 Sep 2022 03:05:11 +0000 (23:05 -0400)]
drm/amdgpu: Use per device reset_domain for XGMI on sriov configuration

For SRIOV configuration, host driver control the reset method(either FLR or
heavier chain reset). The host will notify the guest individually with FLR
message if individual GPU within the hive need to be reset. So for guest
side, no need to use hive->reset_domain to replace the original per
device reset_domain

Signed-off-by: shaoyunl <shaoyun.liu@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
22 months agodrm/amd/amdgpu: update GC 10.3.0 pwrdec
Tom St Denis [Thu, 8 Sep 2022 13:36:18 +0000 (09:36 -0400)]
drm/amd/amdgpu: update GC 10.3.0 pwrdec

The 10.3 GC headers were missing most of the pwrdec block.
This patch adds the registers and bits present in the 10.1 header
but based on the contents of the 10.3 specs.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
22 months agodrm/amdkfd: Fix CRIU restore op due to doorbell offset
Rajneesh Bhardwaj [Wed, 7 Sep 2022 18:13:54 +0000 (14:13 -0400)]
drm/amdkfd: Fix CRIU restore op due to doorbell offset

Recently introduced change to allocate doorbells only when the first
queue is created or mapped for CPU / GPU access, did not consider
Checkpoint Restore scenario completely. This fix allows the CRIU restore
operation by extending the doorbell optimization to CRIU restore
scenario.

Fixes: 16f0013157bf ("drm/amdkfd: Allocate doorbells only when needed")

Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Rajneesh Bhardwaj <rajneesh.bhardwaj@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
22 months agodrm/amdgpu: use dirty framebuffer helper
Hamza Mahfooz [Tue, 6 Sep 2022 19:01:49 +0000 (15:01 -0400)]
drm/amdgpu: use dirty framebuffer helper

Currently, we aren't handling DRM_IOCTL_MODE_DIRTYFB. So, use
drm_atomic_helper_dirtyfb() as the dirty callback in the amdgpu_fb_funcs
struct.

Signed-off-by: Hamza Mahfooz <hamza.mahfooz@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
22 months agodrm/amdgpu: Don't enable LTR if not supported
Lijo Lazar [Thu, 8 Sep 2022 02:58:57 +0000 (08:28 +0530)]
drm/amdgpu: Don't enable LTR if not supported

As per PCIE Base Spec r4.0 Section 6.18
'Software must not enable LTR in an Endpoint unless the Root Complex
and all intermediate Switches indicate support for LTR.'

This fixes the Unsupported Request error reported through AER during
ASPM enablement.

Link: https://bugzilla.kernel.org/show_bug.cgi?id=216455
The error was unnoticed before and got visible because of the commit
referenced below. This doesn't fix anything in the commit below, rather
fixes the issue in amdgpu exposed by the commit. The reference is only
to associate this commit with below one so that both go together.

Fixes: 8795e182b02d ("PCI/portdrv: Don't disable AER reporting in get_port_device_capability()")

Reported-by: Gustaw Smolarczyk <wielkiegie@gmail.com>
Signed-off-by: Lijo Lazar <lijo.lazar@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
22 months agodrm/amd/pm: disable BACO entry/exit completely on several sienna cichlid cards
Guchun Chen [Wed, 7 Sep 2022 12:31:36 +0000 (20:31 +0800)]
drm/amd/pm: disable BACO entry/exit completely on several sienna cichlid cards

To avoid hardware intermittent failures.

Signed-off-by: Guchun Chen <guchun.chen@amd.com>
Reviewed-by: Lijo Lazar <lijo.lazar@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
22 months agoMerge tag 'drm-intel-gt-next-2022-09-09' of git://anongit.freedesktop.org/drm/drm...
Dave Airlie [Mon, 12 Sep 2022 11:12:22 +0000 (21:12 +1000)]
Merge tag 'drm-intel-gt-next-2022-09-09' of git://anongit.freedesktop.org/drm/drm-intel into drm-next

UAPI Changes:

- Revert "drm/i915/dg2: Add preemption changes for Wa_14015141709"

  The intent of Wa_14015141709 was to inform us that userspace can no
  longer control object-level preemption as it has on past platforms
  (i.e., by twiddling register bit CS_CHICKEN1[0]).  The description of
  the workaround in the spec wasn't terribly well-written, and when we
  requested clarification from the hardware teams we were told that on the
  kernel side we should also probably stop setting
  FF_SLICE_CS_CHICKEN1[14], which is the register bit that directs the
  hardware to honor the settings in per-context register CS_CHICKEN1.  It
  turns out that this guidance about FF_SLICE_CS_CHICKEN1[14] was a
  mistake; even though CS_CHICKEN1[0] is non-operational and useless to
  userspace, there are other bits in the register that do still work and
  might need to be adjusted by userspace in the future (e.g., to implement
  other workarounds that show up).  If we don't set
  FF_SLICE_CS_CHICKEN1[14] in i915, then those future workarounds would
  not take effect.

  Even more details at:

  https://lists.freedesktop.org/archives/intel-gfx/2022-September/305478.html

Driver Changes:

- Align GuC/HuC firmware versioning scheme to kernel practices (John)
- Fix #6639: h264 hardware video decoding broken in 5.19 on Intel(R)
  Celeron(R) N3060 (Nirmoy)
- Meteorlake (MTL) enabling (Matt R)
- GuC SLPC improvements (Vinay, Rodrigo)
- Add thread execution tuning setting for ATS-M (Matt R)
- Don't start PXP without mei_pxp bind (Juston)
- Remove leftover verbose debug logging from GuC error capture (John)
- Abort suspend on low system memory conditions (Nirmoy, Matt A, Chris)
- Add DG2 Wa_16014892111 (Matt R)

- Rename ggtt_view as gtt_view (Niranjana)
- Consider HAS_FLAT_CCS() in needs_ccs_pages (Matt A)
- Don't try to disable host RPS when this was never enabled. (Rodrigo)
- Clear stalled GuC CT request after a reset (Daniele)
- Remove runtime info printing from GuC time stamp logging (Jani)
- Skip Bit12 fw domain reset for gen12+ (Sushma, Radhakrishna)

- Make GuC log sizes runtime configurable (John)
- Selftest improvements (Daniele, Matt B, Andrzej)

Signed-off-by: Dave Airlie <airlied@redhat.com>
From: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/YxshfqUN+vDe92Zn@jlahtine-mobl.ger.corp.intel.com
22 months agoMerge tag 'amd-drm-next-6.1-2022-09-08' of https://gitlab.freedesktop.org/agd5f/linux...
Dave Airlie [Mon, 12 Sep 2022 09:17:40 +0000 (19:17 +1000)]
Merge tag 'amd-drm-next-6.1-2022-09-08' of https://gitlab.freedesktop.org/agd5f/linux into drm-next

amd-drm-next-6.1-2022-09-08:

amdgpu:
- Mode2 reset for RDNA2
- Lots of new DC documentation
- Add documentation about different asic families
- DSC improvements
- Aldebaran fixes
- Misc spelling and grammar fixes
- GFXOFF stats support for vangogh
- DC frame size fixes
- NBIO 7.7 updates
- DCN 3.2 updates
- DCN 3.1.4 Updates
- SMU 13.x updates
- Misc bug fixes
- Rework DC register offset handling
- GC 11.x updates
- PSP 13.x updates
- SDMA 6.x updates
- GMC 11.x updates
- SR-IOV updates
- PSP fixes for TA unloading
- DSC passthrough support
- Misc code cleanups

amdkfd:
- ISA fixes for some GC 10.3 IPs
- Misc code cleanups

radeon:
- Delayed work flush fix
- Use time_after for some jiffies calculations

drm:
- DSC passthrough aux support

Signed-off-by: Dave Airlie <airlied@redhat.com>
From: Alex Deucher <alexander.deucher@amd.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220908155202.57862-1-alexander.deucher@amd.com
22 months agodrm/vkms: fix 32bit compilation error by replacing macros
Melissa Wen [Sat, 10 Sep 2022 19:03:03 +0000 (18:03 -0100)]
drm/vkms: fix 32bit compilation error by replacing macros

Replace vkms_formats macro for fixed-point operations with functions
from drm/drm_fixed.h to do the same job and fix 32-bit compilation
errors.

v2:
- don't cast results to s32 (Igor)
- add missing drm_fixp2int conversion (Igor)

Fixes: a19c2ac9858 ("drm: vkms: Add support to the RGB565 format")
Tested-by: Sudip Mukherjee <sudipm.mukherjee@gmail.com> (v1)
Reviewed-by: Alex Deucher <alexander.deucher@amd.com> (v1)
Reported-by: Sudip Mukherjee <sudipm.mukherjee@gmail.com>
Reported-by: kernel test robot <lkp@intel.com>
Signed-off-by: Melissa Wen <mwen@igalia.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220910190303.682897-1-mwen@igalia.com
22 months agoMerge tag 'drm-misc-next-2022-09-09' of git://anongit.freedesktop.org/drm/drm-misc...
Dave Airlie [Sun, 11 Sep 2022 11:46:57 +0000 (21:46 +1000)]
Merge tag 'drm-misc-next-2022-09-09' of git://anongit.freedesktop.org/drm/drm-misc into drm-next

drm-misc-next for v6.1-rc1:

[airlied - fix sun4i_tv build]

UAPI Changes:
- Hide unregistered connectors from GETCONNECTOR ioctl.
- drm/virtio no longer advertises LINEAR modifier, as it doesn't work.
-

Cross-subsystem Changes:
- Fix GPF in udmabuf failure path.

Core Changes:
- Rework TTM placement to use intersect/compatible functions.
- Drop legacy DP-MST support.
- More DP-MST related fixes, and move all state into atomic.
- Make DRM_MIPI_DBI select DRM_KMS_HELPER.
- Add audio_infoframe packing for DP.
- Add logging when some atomic check functions fail.
- Assorted documentation updates and fixes.

Driver Changes:
- Assorted cleanups and fixes in msm, lcdif, nouveau, virtio,
  panel/ilitek, bridge/icn6211, tve200, gma500, bridge/*, panfrost, via,
  bochs, qxl, sun4i.
- Add add AUO B133UAN02.1, IVO M133NW4J-R3, Innolux N120ACA-EA1 eDP panels.
- Improve DP-MST modeset state handling in amdgpu, nouveau, i915.
- Drop DP-MST from radeon driver, it was broken and only user of legacy
  DP-MST.
- Handle unplugging better in vc4.
- Simplify drm cmdparser tests.
- Add DP support to ti-sn65dsi86.
- Add MT8195 DP support to mediatek.
- Support RGB565, XRGB64, and ARGB64 formats in vkms.
- Convert sun4i tv support to atomic.
- Refactor vc4/vec TV Modesetting, and fix timings.
- Use atomic helpers instead of simple display helpers in ssd130x.

Maintainer changes:
- Add Douglas Anderson as reviewer for panel-edp.

Signed-off-by: Dave Airlie <airlied@redhat.com>
From: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/a489485b-3ebc-c734-0f80-aed963d89efe@linux.intel.com
22 months agodrm/dp_mst: Avoid deleting payloads for connectors staying enabled
Imre Deak [Wed, 7 Sep 2022 14:25:42 +0000 (17:25 +0300)]
drm/dp_mst: Avoid deleting payloads for connectors staying enabled

When an MST connector stays enabled during a commit the connector's MST
state needs to be added to the atomic state, but the corresponding MST
payload allocation shouldn't be set for deletion; fix such modesets by
ensuring the above even if the connector was already enabled before the
modeset.

The issue led to the following:
[  761.992923] i915 0000:00:02.0: drm_WARN_ON(payload->delete)
[  761.992949] WARNING: CPU: 6 PID: 1401 at drivers/gpu/drm/display/drm_dp_mst_topology.c:4221 drm_dp_atomic_find_time_slots+0x236/0x280 [drm_display_helper]
[  761.992955] Modules linked in: snd_hda_intel i915 drm_buddy drm_display_helper drm_kms_helper ttm drm snd_hda_codec_hdmi snd_intel_dspcfg snd_hda_codec snd_hwdep snd_hda_core snd_pcm prime_numbers i2c_algo_bit syscopyarea sysfillrect sysimgblt fb_sys_fops x86_pkg_temp_thermal cdc_ether coretemp crct10dif_pclmul usbnet crc32_pclmul mii ghash_clmulni_intel e1000e mei_me ptp i2c_i801 pps_core mei i2c_smbus intel_lpss_pci fuse [last unloaded: drm]
[  761.992986] CPU: 6 PID: 1401 Comm: testdisplay Tainted: G     U             6.0.0-rc4-imre+ #565
[  761.992989] Hardware name: Intel Corporation Alder Lake Client Platform/AlderLake-P DDR5 RVP, BIOS ADLPFWI1.R00.3135.A00.2203251419 03/25/2022
[  761.992990] RIP: 0010:drm_dp_atomic_find_time_slots+0x236/0x280 [drm_display_helper]
[  761.992994] Code: 4c 8b 67 50 4d 85 e4 75 03 4c 8b 27 e8 03 28 4e e1 48 c7 c1 8b 26 2c a0 4c 89 e2 48 c7 c7 a8 26 2c a0 48 89 c6 e8 31 d5 88 e1 <0f> 0b 49 8b 85 d0 00 00 00 4c 89 fa 48 c7 c6 a0 41 2c a0 48 8b 78
[  761.992995] RSP: 0018:ffffc9000177ba60 EFLAGS: 00010286
[  761.992998] RAX: 0000000000000000 RBX: ffff88810d2f1540 RCX: 0000000000000000
[  761.992999] RDX: 0000000000000001 RSI: ffffffff82368a25 RDI: 00000000ffffffff
[  761.993000] RBP: ffff888142299d80 R08: ffff8884adbfdfe8 R09: 00000000ffefffff
[  761.993001] R10: ffff8884a6bfe000 R11: ffff8884ac443c30 R12: ffff888102972f90
[  761.993002] R13: ffff8881163e2cf0 R14: 00000000000003ac R15: ffff88810c501000
[  761.993003] FS:  00007f81e4c459c0(0000) GS:ffff888496500000(0000) knlGS:0000000000000000
[  761.993004] CS:  0010 DS: 0000 ES: 0000 CR0: 0000000080050033
[  761.993005] CR2: 0000555dac962a98 CR3: 0000000123a34006 CR4: 0000000000770ee0
[  761.993006] PKRU: 55555554
[  761.993007] Call Trace:
[  761.993009]  <TASK>
[  761.993012]  intel_dp_mst_compute_config+0x19a/0x350 [i915]
[  761.993090]  intel_atomic_check+0xf37/0x3180 [i915]
[  761.993168]  drm_atomic_check_only+0x5d3/0xa60 [drm]
[  761.993182]  drm_atomic_commit+0x56/0xc0 [drm]
[  761.993192]  ? drm_plane_get_damage_clips.cold+0x1c/0x1c [drm]
[  761.993204]  drm_atomic_helper_set_config+0x78/0xc0 [drm_kms_helper]
[  761.993214]  drm_mode_setcrtc+0x1ed/0x750 [drm]
[  761.993232]  ? drm_mode_getcrtc+0x180/0x180 [drm]
[  761.993241]  drm_ioctl_kernel+0xb5/0x150 [drm]
[  761.993252]  drm_ioctl+0x203/0x3d0 [drm]
[  761.993261]  ? drm_mode_getcrtc+0x180/0x180 [drm]
[  761.993276]  __x64_sys_ioctl+0x8a/0xb0
[  761.993281]  do_syscall_64+0x38/0x90
[  761.993285]  entry_SYSCALL_64_after_hwframe+0x63/0xcd
[  761.993287] RIP: 0033:0x7f81e551aaff
[  761.993288] Code: 00 48 89 44 24 18 31 c0 48 8d 44 24 60 c7 04 24 10 00 00 00 48 89 44 24 08 48 8d 44 24 20 48 89 44 24 10 b8 10 00 00 00 0f 05 <41> 89 c0 3d 00 f0 ff ff 77 1f 48 8b 44 24 18 64 48 2b 04 25 28 00
[  761.993290] RSP: 002b:00007fff4304af10 EFLAGS: 00000246 ORIG_RAX: 0000000000000010
[  761.993292] RAX: ffffffffffffffda RBX: 00007fff4304afa0 RCX: 00007f81e551aaff
[  761.993293] RDX: 00007fff4304afa0 RSI: 00000000c06864a2 RDI: 0000000000000004
[  761.993294] RBP: 00000000c06864a2 R08: 0000000000000000 R09: 0000555dac8a9c68
[  761.993294] R10: 0000000000000000 R11: 0000000000000246 R12: 00000000000008c4
[  761.993295] R13: 0000000000000004 R14: 0000555dac8a9c68 R15: 00007fff4304b098
[  761.993301]  </TASK>

Fixes: 083351e96386 ("drm/display/dp_mst: Fix modeset tracking in drm_dp_atomic_release_vcpi_slots()")
Testcase: igt@testdisplay
Cc: Lyude Paul <lyude@redhat.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220907142542.1681994-1-imre.deak@intel.com
22 months agodrm/panel-edp: Add Innolux N120ACA-EA1 panel entry
Chen-Yu Tsai [Thu, 8 Sep 2022 08:54:54 +0000 (16:54 +0800)]
drm/panel-edp: Add Innolux N120ACA-EA1 panel entry

This panel has the same delay timing as N116BCA-EA1 from the same
company, which is also the same as delay_200_500_e80_d50.

Add an entry for it.

Signed-off-by: Chen-Yu Tsai <wenst@chromium.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20220908085454.1024167-2-wenst@chromium.org
22 months agodrm/sun4i: tv: Merge mode_set into atomic_enable
Maxime Ripard [Mon, 29 Aug 2022 13:11:50 +0000 (15:11 +0200)]
drm/sun4i: tv: Merge mode_set into atomic_enable

Our mode_set implementation can be merged into our atomic_enable
implementation to simplify things, so let's do this.

Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Link: https://patchwork.freedesktop.org/patch/msgid/20220728-rpi-analog-tv-properties-v2-36-459522d653a7@cerno.tech
22 months agodrm/i915: Set correct domains values at _i915_vma_move_to_active
Nirmoy Das [Wed, 7 Sep 2022 17:26:41 +0000 (19:26 +0200)]
drm/i915: Set correct domains values at _i915_vma_move_to_active

Fix regression introduced by commit:
"drm/i915: Individualize fences before adding to dma_resv obj"
which sets obj->read_domains to 0 for both read and write paths.
Also set obj->write_domain to 0 on read path which was removed by
the commit.

References: https://gitlab.freedesktop.org/drm/intel/-/issues/6639
Fixes: 420a07b841d0 ("drm/i915: Individualize fences before adding to dma_resv obj")
Signed-off-by: Nirmoy Das <nirmoy.das@intel.com>
Cc: <stable@vger.kernel.org> # v5.16+
Cc: Matthew Auld <matthew.auld@intel.com>
Cc: Andrzej Hajda <andrzej.hajda@intel.com>
Reviewed-by: Andrzej Hajda <andrzej.hajda@intel.com>
Signed-off-by: Matthew Auld <matthew.auld@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220907172641.12555-1-nirmoy.das@intel.com
22 months agodrm/i915: Rename ggtt_view as gtt_view
Niranjana Vishwanathapura [Thu, 1 Sep 2022 18:38:54 +0000 (11:38 -0700)]
drm/i915: Rename ggtt_view as gtt_view

So far, different views (normal, partial, rotated and remapped)
into the same object are only supported for GGTT mappings.
But with the upcoming VM_BIND feature, PPGTT will also use the
partial view mapping. Hence rename ggtt_view to more generic
gtt_view.

Signed-off-by: Niranjana Vishwanathapura <niranjana.vishwanathapura@intel.com>
Acked-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220901183854.3446-1-niranjana.vishwanathapura@intel.com
22 months agodrm/ssd130x: Replace simple display helpers with the atomic helpers
Javier Martinez Canillas [Mon, 5 Sep 2022 22:27:59 +0000 (00:27 +0200)]
drm/ssd130x: Replace simple display helpers with the atomic helpers

The simple display pipeline is a set of helpers that can be used by DRM
drivers to avoid dealing with all the needed components and just define
a few functions to operate a simple display device with one full-screen
scanout buffer feeding a single output.

But it is arguable that this provides the correct level of abstraction
for simple drivers, and recently some have been ported from using these
simple display helpers to use the regular atomic helpers instead.

The rationale for this is that the simple display pipeline helpers don't
hide that much of the DRM complexity, while adding an indirection layer
that conflates the concepts of CRTCs and planes. This makes the helpers
less flexible and harder to be reused among different graphics drivers.

Also, for simple drivers, using the full atomic helpers doesn't require
a lot of additional code. So adding a simple display pipeline layer may
not be worth it.

For these reasons, let's follow that trend and make ssd130x a plain DRM
driver that creates its own primary plane, CRTC, enconder and connector.

Suggested-by: Thomas Zimmermann <tzimmermann@suse.de>
Signed-off-by: Javier Martinez Canillas <javierm@redhat.com>
Acked-by: Thomas Zimmermann <tzimmermann@suse.de>
Link: https://patchwork.freedesktop.org/patch/msgid/20220905222759.2597186-1-javierm@redhat.com
22 months agodrm/amd/amdgpu: Add missing CGTS*TCC_DISABLE to 10.3 headers
Tom St Denis [Wed, 7 Sep 2022 14:18:01 +0000 (10:18 -0400)]
drm/amd/amdgpu: Add missing CGTS*TCC_DISABLE to 10.3 headers

The TCC_DISABLE registers were not included in the 10.3 headers and
instead just placed directly in the gfx_v10_0.c source.  This patch
adds them to the headers so tools like umr can scan them and support them.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
22 months agodrm/amdgpu: prevent toc firmware memory leak
Guchun Chen [Fri, 2 Sep 2022 06:08:55 +0000 (14:08 +0800)]
drm/amdgpu: prevent toc firmware memory leak

It's missed in psp fini.

Signed-off-by: Guchun Chen <guchun.chen@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
22 months agodrm/amdgpu: correct doorbell range/size value for CSDMA_DOORBELL_RANGE
Yifan Zhang [Tue, 6 Sep 2022 05:09:20 +0000 (13:09 +0800)]
drm/amdgpu: correct doorbell range/size value for CSDMA_DOORBELL_RANGE

current function mixes CSDMA_DOORBELL_RANGE and SDMA0_DOORBELL_RANGE
range/size manipulation, while these 2 registers have difference size
field mask. Remove range/size manipulation for SDMA0_DOORBELL_RANGE.

Signed-off-by: Yifan Zhang <yifan1.zhang@amd.com>
Reviewed-by: Xiaojian Du <Xiaojian.Du@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
22 months agodrm/amdkfd: print address in hex format rather than decimal
Yifan Zhang [Sun, 4 Sep 2022 07:53:27 +0000 (15:53 +0800)]
drm/amdkfd: print address in hex format rather than decimal

Addresses should be printed in hex format.

Signed-off-by: Yifan Zhang <yifan1.zhang@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
22 months agodrm/amd/display: Remove the unneeded result variable
zhang songyi [Fri, 2 Sep 2022 07:54:50 +0000 (07:54 +0000)]
drm/amd/display: Remove the unneeded result variable

Return the enable_link_dp() directly instead of storing it in another
redundant variable.

Reported-by: Zeal Robot <zealci@zte.com.cn>
Reviewed-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: zhang songyi <zhang.songyi@zte.com.cn>
Signed-off-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
22 months agodrm/amd/display: fix memory leak when using debugfs_lookup()
Greg Kroah-Hartman [Fri, 2 Sep 2022 13:01:05 +0000 (15:01 +0200)]
drm/amd/display: fix memory leak when using debugfs_lookup()

When calling debugfs_lookup() the result must have dput() called on it,
otherwise the memory will leak over time.  Fix this up by properly
calling dput().

Cc: Harry Wentland <harry.wentland@amd.com>
Cc: Leo Li <sunpeng.li@amd.com>
Cc: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Cc: Alex Deucher <alexander.deucher@amd.com>
Cc: "Christian König" <christian.koenig@amd.com>
Cc: "Pan, Xinhui" <Xinhui.Pan@amd.com>
Cc: David Airlie <airlied@linux.ie>
Cc: Daniel Vetter <daniel@ffwll.ch>
Cc: Wayne Lin <Wayne.Lin@amd.com>
Cc: hersen wu <hersenxs.wu@amd.com>
Cc: Wenjing Liu <wenjing.liu@amd.com>
Cc: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
Cc: Thelford Williams <tdwilliamsiv@gmail.com>
Cc: Fangzhi Zuo <Jerry.Zuo@amd.com>
Cc: Yongzhi Liu <lyz_cs@pku.edu.cn>
Cc: Mikita Lipski <mikita.lipski@amd.com>
Cc: Jiapeng Chong <jiapeng.chong@linux.alibaba.com>
Cc: Bhanuprakash Modem <bhanuprakash.modem@intel.com>
Cc: Sean Paul <seanpaul@chromium.org>
Cc: amd-gfx@lists.freedesktop.org
Cc: dri-devel@lists.freedesktop.org
Cc: stable@vger.kernel.org
Reviewed-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
22 months agodrm/amd/pm: add missing SetMGpuFanBoostLimitRpm mapping for SMU 13.0.7
Evan Quan [Thu, 1 Sep 2022 05:48:58 +0000 (13:48 +0800)]
drm/amd/pm: add missing SetMGpuFanBoostLimitRpm mapping for SMU 13.0.7

Missing SetMGpuFanBoostLimitRpm mapping leads to loading failure for SMU
13.0.7.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
22 months agodrm/amd/amdgpu: add rlc_firmware_header_v2_4 to amdgpu_firmware_header
Chengming Gui [Tue, 6 Sep 2022 01:26:37 +0000 (09:26 +0800)]
drm/amd/amdgpu: add rlc_firmware_header_v2_4 to amdgpu_firmware_header

Add missing structure to avoid incorrect size and version check.

Signed-off-by: Chengming Gui <Jack.Gui@amd.com>
Reviewed-by: Feifei Xu <Feifei.Xu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
22 months agodrm/amdgpu: TA unload messages are not actually sent to psp when amdgpu is uninstalled
YiPeng Chai [Thu, 18 Aug 2022 08:46:59 +0000 (16:46 +0800)]
drm/amdgpu: TA unload messages are not actually sent to psp when amdgpu is uninstalled

V1:
  The psp_cmd_submit_buf function is called by psp_hw_fini to send
TA unload messages to psp to terminate ras, asd and tmr. But when
amdgpu is uninstalled, drm_dev_unplug is called earlier than
psp_hw_fini in amdgpu_pci_remove, the calling order as follows:
static void amdgpu_pci_remove(struct pci_dev *pdev) {
drm_dev_unplug
......
amdgpu_driver_unload_kms->amdgpu_device_fini_hw->...
->.hw_fini->psp_hw_fini->...
->psp_ta_unload->psp_cmd_submit_buf
......
}
The program will return when calling drm_dev_enter in psp_cmd_submit_buf.

So the call to drm_dev_enter in psp_cmd_submit_buf should be
removed, so that the TA unload messages can be sent to the psp
when amdgpu is uninstalled.

V2:
1. Restore psp_cmd_submit_buf to its original code.
2. Move drm_dev_unplug call after amdgpu_driver_unload_kms in
   amdgpu_pci_remove.
3. Since amdgpu_device_fini_hw is called by amdgpu_driver_unload_kms,
   remove the unplug check to release device mmio resource in
   amdgpu_device_fini_hw before calling drm_dev_unplug.

Signed-off-by: YiPeng Chai <YiPeng.Chai@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
22 months agodrm/i915/uc: Add patch level version number support
John Harrison [Tue, 6 Sep 2022 23:01:47 +0000 (16:01 -0700)]
drm/i915/uc: Add patch level version number support

With the move to un-versioned filenames, it becomes more difficult to
know exactly what version of a given firmware is being used. So add
the patch level version number to the debugfs output.

Also, support matching by patch level when selecting code paths for
firmware compatibility. While a patch level change cannot be backwards
breaking, it is potentially possible that a new feature only works
from a given patch level onwards (even though it was theoretically
added in an earlier version that bumped the major or minor version).

Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220906230147.479945-2-daniele.ceraolospurio@intel.com
22 months agodrm/i915/uc: Support for version reduced and multiple firmware files
John Harrison [Tue, 6 Sep 2022 23:01:46 +0000 (16:01 -0700)]
drm/i915/uc: Support for version reduced and multiple firmware files

There was a misunderstanding in how firmware file compatibility should
be managed within i915. This has been clarified as:
  i915 must support all existing firmware releases forever
  new minor firmware releases should replace prior versions
  only backwards compatibility breaking releases should be a new file

This patch cleans up the single fallback file support that was added
as a quick fix emergency effort. That is now removed in preference to
supporting arbitrary numbers of firmware files per platform.

The patch also adds support for having GuC firmware files that are
named by major version only (because the major version indicates
backwards breaking changes that affect the KMD) and for having HuC
firmware files with no version number at all (because the KMD has no
interface requirements with the HuC).

For GuC, the driver will report via dmesg if the found file is older than
expected. For HuC, the KMD will no longer require updating for any new
HuC release so will not be able to report what the latest expected
version is.

Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220906230147.479945-1-daniele.ceraolospurio@intel.com
22 months agodrm/gma500: fix repeated words in comments
Jilin Yuan [Wed, 7 Sep 2022 11:39:27 +0000 (19:39 +0800)]
drm/gma500: fix repeated words in comments

Delete the redundant word 'for'.

Signed-off-by: Jilin Yuan <yuanjilin@cdjrlc.com>
Signed-off-by: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220907113927.35305-1-yuanjilin@cdjrlc.com
22 months agodrm/qxl: fix the suspend/resume issue on qxl device
Zongmin Zhou [Wed, 7 Sep 2022 09:44:23 +0000 (17:44 +0800)]
drm/qxl: fix the suspend/resume issue on qxl device

Details:
Currently, when trying to suspend and resume with qxl device,
there are some error messages after resuming,
eventually caused to black screen and can't be recovered.

The first error message:
[   64.668577][    C3] [drm] driver is in bug mode

This error is due to guest qxl driver
will call qxl_reinit_memslots(qdev) during system resume,
but didn't call qxl_io_reset(qdev) before this,
Then will cause the QXL_IO_MEMSLOT_ADD operation to fail on QEMU,
qxl->guest_bug flag will be set,As a result,
the QXL device can't communicate with guest qxl driver through the IO port.

after fix the first error,can success to resume and login to desktop,
but shortly after that will observe the second error message :
[  353.095343][  T863] qxl 0000:00:02.0: object_init failed for (262144, 0x00000001)
[  353.096660][  T863] [drm:qxl_gem_object_create [qxl]] *ERROR* Failed to allocate GEM object (260852, 1, 4096, -12)
[  353.097277][  T863] [drm:qxl_alloc_ioctl [qxl]] *ERROR* qxl_alloc_ioctl: failed to create gem ret=-12
[  368.197538][  T863] qxl 0000:00:02.0: object_init failed for (3149824, 0x00000001)
[  368.197541][  T863] [drm:qxl_alloc_bo_reserved [qxl]] *ERROR* failed to allocate VRAM BO

The problem is caused by calling qxl_ring_init_hdr(qdev->release_ring)
in qxl_drm_resume() function.
When do QXL_IO_RESET,QEMU will call init_qxl_ram(),
so params like prod,cons,notify_on_cons and notify_on_prod
will be set to default value.
Ring push/pop actions for release_ring can be performed normally.
But call qxl_ring_init_hdr(qdev->release_ring)
will eventually set notify_on_prod to number of QXL_RELEASE_RING_SIZE,
affect the value of notify in qxl_push_free_res() function always be false,
QEMU will no longer send events of QXL_INTERRUPT_DISPLAY to the
guest qxl driver,so qxl_ring_pop() will never been called anymore,
and can't do dma_fence_signal(),result to ttm_bo_wait_ctx(bo, ctx)
always return EBUSY,fail to call qxl_bo_create().

Test scenario:
1) start virtual machine with qemu command "-device qxl-vga"
2) click suspend botton to enter suspend mode
3) resume and observe the error message in kernel logs,screen will be black

Let's fix this by reset io and remove the qxl_ring_init_hdr calling.

Signed-off-by: Zongmin Zhou<zhouzongmin@kylinos.cn>
Suggested-by: Ming Xie<xieming@kylinos.cn>
Link: http://patchwork.freedesktop.org/patch/msgid/20220907094423.93581-1-min_halo@163.com
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
22 months agodrm/bochs: fix blanking
Gerd Hoffmann [Tue, 6 Sep 2022 14:29:57 +0000 (16:29 +0200)]
drm/bochs: fix blanking

VGA_IS1_RC is the color mode register (VGA_IS1_RM the one for monochrome
mode, note C vs. M at the end).  So when using VGA_IS1_RC make sure the
vga device is actually in color mode and set the corresponding bit in the
misc register.

Reproducible when booting VMs in UEFI mode with some edk2 versions (edk2
fix is on the way too).  Doesn't happen in BIOS mode because in that
case the vgabios already flips the bit.

Fixes: 250e743915d4 ("drm/bochs: Add screen blanking support")
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Acked-by: Thomas Zimmermann <tzimmermann@suse.de>
Link: http://patchwork.freedesktop.org/patch/msgid/20220906142957.2763577-1-kraxel@redhat.com
22 months agodrm/virtio: set fb_modifiers_not_supported
Chia-I Wu [Wed, 31 Aug 2022 19:06:01 +0000 (12:06 -0700)]
drm/virtio: set fb_modifiers_not_supported

Without this, the drm core advertises LINEAR modifier which is
incorrect.

Also userspace virgl does not support modifiers.  For example, it causes
chrome on ozone/drm to fail with "Failed to create scanout buffer".

Fixes: 2af104290da5 ("drm: introduce fb_modifiers_not_supported flag in mode_config")
Suggested-by: Shao-Chuan Lee <shaochuan@chromium.org>
Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Link: http://patchwork.freedesktop.org/patch/msgid/20220831190601.1295129-1-olvaffe@gmail.com
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
22 months agodrm/sun4i: tv: Add missing reset assertion
Maxime Ripard [Mon, 29 Aug 2022 13:11:54 +0000 (15:11 +0200)]
drm/sun4i: tv: Add missing reset assertion

The reset line is deasserted at bind, and asserted if we ever encounter an
error there. However, it's never asserted in unbind which will lead to a
resource unbalance.

Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Link: https://patchwork.freedesktop.org/patch/msgid/20220728-rpi-analog-tv-properties-v2-40-459522d653a7@cerno.tech
22 months agodrm/sun4i: tv: Rename error label
Maxime Ripard [Mon, 29 Aug 2022 13:11:53 +0000 (15:11 +0200)]
drm/sun4i: tv: Rename error label

The other error labels in sun4i_tv_bind() are named after the task they
perform (err_disable_clk to call clk_disable_unprepare for example).

However, the err_cleanup_connector is named after the calling site
(drm_connector_init failing) and will actually cleanup the encoder. Let's
rename it to err_cleanup_encoder to be consistent.

Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Link: https://patchwork.freedesktop.org/patch/msgid/20220728-rpi-analog-tv-properties-v2-39-459522d653a7@cerno.tech
22 months agodrm/sun4i: tv: Remove useless destroy function
Maxime Ripard [Mon, 29 Aug 2022 13:11:52 +0000 (15:11 +0200)]
drm/sun4i: tv: Remove useless destroy function

Our destroy implementation is just calling the generic helper, so let's
just remove our function and directly use the helper.

Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Link: https://patchwork.freedesktop.org/patch/msgid/20220728-rpi-analog-tv-properties-v2-38-459522d653a7@cerno.tech
22 months agodrm/sun4i: tv: Remove useless function
Maxime Ripard [Mon, 29 Aug 2022 13:11:51 +0000 (15:11 +0200)]
drm/sun4i: tv: Remove useless function

The drm_connector_to_sun4i_tv() function isn't used anywhere in the driver,
so let's remove it.

Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Link: https://patchwork.freedesktop.org/patch/msgid/20220728-rpi-analog-tv-properties-v2-37-459522d653a7@cerno.tech
22 months agodrm/sun4i: tv: Convert to atomic hooks
Maxime Ripard [Mon, 29 Aug 2022 13:11:49 +0000 (15:11 +0200)]
drm/sun4i: tv: Convert to atomic hooks

The sun4i TV driver still uses legacy enable and disable hook
implementation. Let's convert to the atomic variants.

Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Link: https://patchwork.freedesktop.org/patch/msgid/20220728-rpi-analog-tv-properties-v2-35-459522d653a7@cerno.tech
22 months agodrm/sun4i: tv: Remove unused mode_valid
Maxime Ripard [Mon, 29 Aug 2022 13:11:48 +0000 (15:11 +0200)]
drm/sun4i: tv: Remove unused mode_valid

The mode_valid implementation is pretty much a nop, let's remove it.

Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Link: https://patchwork.freedesktop.org/patch/msgid/20220728-rpi-analog-tv-properties-v2-34-459522d653a7@cerno.tech
22 months agodrm/vc4: vec: Fix timings for VEC modes
Mateusz Kwiatkowski [Mon, 29 Aug 2022 13:11:42 +0000 (15:11 +0200)]
drm/vc4: vec: Fix timings for VEC modes

This commit fixes vertical timings of the VEC (composite output) modes
to accurately represent the 525-line ("NTSC") and 625-line ("PAL") ITU-R
standards.

Previous timings were actually defined as 502 and 601 lines, resulting
in non-standard 62.69 Hz and 52 Hz signals being generated,
respectively.

Signed-off-by: Mateusz Kwiatkowski <kfyatek+publicgit@gmail.com>
Acked-by: Noralf Trønnes <noralf@tronnes.org>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Link: https://patchwork.freedesktop.org/patch/msgid/20220728-rpi-analog-tv-properties-v2-28-459522d653a7@cerno.tech
22 months agodrm/vc4: vec: Remove redundant atomic_mode_set
Mateusz Kwiatkowski [Mon, 29 Aug 2022 13:11:41 +0000 (15:11 +0200)]
drm/vc4: vec: Remove redundant atomic_mode_set

Let's remove the superfluous tv_mode field, which was redundant with the
mode field in struct drm_tv_connector_state.

Signed-off-by: Mateusz Kwiatkowski <kfyatek+publicgit@gmail.com>
Reviewed-by: Noralf Trønnes <noralf@tronnes.org>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Link: https://patchwork.freedesktop.org/patch/msgid/20220728-rpi-analog-tv-properties-v2-27-459522d653a7@cerno.tech
22 months agodrm/vc4: vec: Refactor VEC TV mode setting
Mateusz Kwiatkowski [Mon, 29 Aug 2022 13:11:40 +0000 (15:11 +0200)]
drm/vc4: vec: Refactor VEC TV mode setting

Change the mode_set function pointer logic to declarative config0,
config1 and custom_freq fields, to make TV mode setting logic more
concise and uniform.

Signed-off-by: Mateusz Kwiatkowski <kfyatek+publicgit@gmail.com>
Reviewed-by: Noralf Trønnes <noralf@tronnes.org>
[Maxime: Fixed != 0 check, added tv_mode variable]
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Link: https://patchwork.freedesktop.org/patch/msgid/20220728-rpi-analog-tv-properties-v2-26-459522d653a7@cerno.tech