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Andrew Kaylor [Tue, 6 Feb 2018 22:28:15 +0000 (22:28 +0000)]
Add SelectionDAGDumper support for strict FP nodes
Patch by Kevin P. Neal
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324416
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Lang Hames [Tue, 6 Feb 2018 22:22:10 +0000 (22:22 +0000)]
Add OrcJIT dependency for Kaleidoscope Chapter 9.
This should fix the error at
http://green.lab.llvm.org/green/job/clang-stage1-cmake-RA-expensive/10421
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324413
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Adrian Prantl [Tue, 6 Feb 2018 22:17:45 +0000 (22:17 +0000)]
Fix a crash when emitting DIEs for variable-length arrays
VLAs may refer to a previous DIE to express the DW_AT_count of their
type. Clang generates an artificial "vla_expr" variable for this. If
this DIE hasn't been created yet LLVM asserts. This patch fixes this
by sorting the local variables so that dependencies come before they
are needed. It also replaces the linear scan in DWARFFile with a
std::map, which can be faster.
Differential Revision: https://reviews.llvm.org/D42940
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324412
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Lang Hames [Tue, 6 Feb 2018 22:17:09 +0000 (22:17 +0000)]
[ORC] Use explicit constructor calls to fix a builder error at
http://lab.llvm.org:8011/builders/lld-x86_64-darwin13/builds/17627
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324411
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Lang Hames [Tue, 6 Feb 2018 21:52:46 +0000 (21:52 +0000)]
[ORC] Remove some unused lambda captures.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324410
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Craig Topper [Tue, 6 Feb 2018 21:47:04 +0000 (21:47 +0000)]
[X86] Add test cases that exercise the BSR/BSF optimization combineCMov.
combineCmov tries to remove compares against BSR/BSF if we can prove the input to the BSR/BSF are never zero.
As far as I can tell most of the time codegenprepare despeculates ctlz/cttz and gives us a cttz_zero_undef/ctlz_zero_undef which don't use a cmov.
So the only way I found to trigger this code is to show codegenprepare an illegal type which it won't despeculate.
I think we should be turning ctlz/cttz into ctlz_zero_undef/cttz_zero_undef for these cases before we ever get to operation legalization where the cmov is created. But wanted to add these tests so we don't regress.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324409
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Sanjay Patel [Tue, 6 Feb 2018 21:43:57 +0000 (21:43 +0000)]
[x86] add tests to show demanded bits shortcoming; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324408
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Lang Hames [Tue, 6 Feb 2018 21:25:20 +0000 (21:25 +0000)]
[docs] Add out-of-date warnings to the BuildingAJIT tutorial text.
The text will be updated once the ORC API churn dies down.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324406
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Lang Hames [Tue, 6 Feb 2018 21:25:11 +0000 (21:25 +0000)]
[ORC] Start migrating ORC layers to use the new ORC Core.h APIs.
In particular this patch switches RTDyldObjectLinkingLayer to use
orc::SymbolResolver and threads the requried changse (ExecutionSession
references and VModuleKeys) through the existing layer APIs.
The purpose of the new resolver interface is to improve query performance and
better support parallelism, both in JIT'd code and within the compiler itself.
The most visibile change is switch of the <Layer>::addModule signatures from:
Expected<Handle> addModule(std::shared_ptr<ModuleType> Mod,
std::shared_ptr<JITSymbolResolver> Resolver)
to:
Expected<Handle> addModule(VModuleKey K, std::shared_ptr<ModuleType> Mod);
Typical usage of addModule will now look like:
auto K = ES.allocateVModuleKey();
Resolvers[K] = createSymbolResolver(...);
Layer.addModule(K, std::move(Mod));
See the BuildingAJIT tutorial code for example usage.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324405
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Sanjay Patel [Tue, 6 Feb 2018 21:25:02 +0000 (21:25 +0000)]
[AArch64] add test to show sub-optimal isel; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324404
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Sanjay Patel [Tue, 6 Feb 2018 21:18:53 +0000 (21:18 +0000)]
[x86] add test to show missed BMI isel; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324403
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Daniel Neilson [Tue, 6 Feb 2018 21:18:33 +0000 (21:18 +0000)]
[DSE] Upgrade uses of MemoryIntrinic::getAlignment() to new API. (NFC)
Summary:
This change is part of step five in the series of changes to remove alignment argument from
memcpy/memmove/memset in favour of alignment attributes. In particular, this changes the
DeadStoreElimination pass to cease using the old getAlignment() API of MemoryIntrinsic
in favour of getting dest specific alignments through the new API.
Steps:
Step 1) Remove alignment parameter and create alignment parameter attributes for
memcpy/memmove/memset. ( rL322965, rC322964, rL322963 )
Step 2) Expand the IRBuilder API to allow creation of memcpy/memmove with differing
source and dest alignments. ( rL323597 )
Step 3) Update Clang to use the new IRBuilder API. ( rC323617 )
Step 4) Update Polly to use the new IRBuilder API. ( rL323618 )
Step 5) Update LLVM passes that create memcpy/memmove calls to use the new IRBuilder API,
and those that use use MemIntrinsicInst::[get|set]Alignment() to use [get|set]DestAlignment()
and [get|set]SourceAlignment() instead. ( rL323886, rL323891, rL324148, rL324273, rL324278,
rL324384, rL324395 )
Step 6) Remove the single-alignment IRBuilder API for memcpy/memmove, and the
MemIntrinsicInst::[get|set]Alignment() methods.
Reference
http://lists.llvm.org/pipermail/llvm-dev/2015-August/089384.html
http://lists.llvm.org/pipermail/llvm-commits/Week-of-Mon-
20151109/312083.html
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324402
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Sanjay Patel [Tue, 6 Feb 2018 21:09:42 +0000 (21:09 +0000)]
[TargetLowering] use local variable to reduce duplication; NFCI
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324401
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Sanjay Patel [Tue, 6 Feb 2018 20:49:28 +0000 (20:49 +0000)]
[TargetLowering] use local variables to reduce duplication; NFCI
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324397
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Daniel Neilson [Tue, 6 Feb 2018 20:33:36 +0000 (20:33 +0000)]
[InferAddressSpaces] Update uses of IRBuilder memory intrinsic creation to new API
Summary:
This change is part of step five in the series of changes to remove alignment argument from
memcpy/memmove/memset in favour of alignment attributes. In particular, this changes the
InferAddressSpaces pass to cease using:
1) The old getAlignment() API of MemoryIntrinsic in favour of getting source & dest specific
alignments through the new API.
2) The old IRBuilder CreateMemCpy/CreateMemMove single-alignment APIs in favour of the new
API that allows setting source and destination alignments independently.
Steps:
Step 1) Remove alignment parameter and create alignment parameter attributes for
memcpy/memmove/memset. ( rL322965, rC322964, rL322963 )
Step 2) Expand the IRBuilder API to allow creation of memcpy/memmove with differing
source and dest alignments. ( rL323597 )
Step 3) Update Clang to use the new IRBuilder API. ( rC323617 )
Step 4) Update Polly to use the new IRBuilder API. ( rL323618 )
Step 5) Update LLVM passes that create memcpy/memmove calls to use the new IRBuilder API,
and those that use use MemIntrinsicInst::[get|set]Alignment() to use [get|set]DestAlignment()
and [get|set]SourceAlignment() instead. ( rL323886, rL323891, rL324148, rL324273, rL324278,
rL324384 )
Step 6) Remove the single-alignment IRBuilder API for memcpy/memmove, and the
MemIntrinsicInst::[get|set]Alignment() methods.
Reference
http://lists.llvm.org/pipermail/llvm-dev/2015-August/089384.html
http://lists.llvm.org/pipermail/llvm-commits/Week-of-Mon-
20151109/312083.html
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324395
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Paul Robinson [Tue, 6 Feb 2018 20:29:21 +0000 (20:29 +0000)]
[DWARFv5] Emit .debug_line_str (in a non-DWO file).
This should enable the linker to do string-pooling of path names.
Differential Revision: https://reviews.llvm.org/D42707
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324393
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Krzysztof Parzyszek [Tue, 6 Feb 2018 20:22:20 +0000 (20:22 +0000)]
[Hexagon] Extract HVX lowering and selection into HVX-specific files, NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324392
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Krzysztof Parzyszek [Tue, 6 Feb 2018 20:18:58 +0000 (20:18 +0000)]
[Hexagon] Lower concat of more than 2 vectors into build_vector
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324391
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Alexey Bataev [Tue, 6 Feb 2018 20:00:05 +0000 (20:00 +0000)]
[SLP] Update test checks, NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324387
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Daniel Neilson [Tue, 6 Feb 2018 19:14:31 +0000 (19:14 +0000)]
[InlineFunction] Update deprecated use of IRBuilder CreateMemCpy (NFC)
Summary:
This change is part of step five in the series of changes to remove alignment argument from
memcpy/memmove/memset in favour of alignment attributes. In particular, this changes the
InlineFunction pass to ceause using the old IRBuilder CreateMemCpy single-alignment API
in favour of the new API that allows setting source and destination alignments independently.
Steps:
Step 1) Remove alignment parameter and create alignment parameter attributes for
memcpy/memmove/memset. ( rL322965, rC322964, rL322963 )
Step 2) Expand the IRBuilder API to allow creation of memcpy/memmove with differing
source and dest alignments. ( rL323597 )
Step 3) Update Clang to use the new IRBuilder API. ( rC323617 )
Step 4) Update Polly to use the new IRBuilder API. ( rL323618 )
Step 5) Update LLVM passes that create memcpy/memmove calls to use the new IRBuilder API,
and those that use use MemIntrinsicInst::[get|set]Alignment() to use [get|set]DestAlignment()
and [get|set]SourceAlignment() instead. ( rL323886, rL323891, rL324148, rL324273, rL324278 )
Step 6) Remove the single-alignment IRBuilder API for memcpy/memmove, and the
MemIntrinsicInst::[get|set]Alignment() methods.
Reference
http://lists.llvm.org/pipermail/llvm-dev/2015-August/089384.html
http://lists.llvm.org/pipermail/llvm-commits/Week-of-Mon-
20151109/312083.html
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324384
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Stanislav Mekhanoshin [Tue, 6 Feb 2018 19:11:56 +0000 (19:11 +0000)]
[AMDGPU] removed dead code handling rmw in memory legalizer
It was always using cmpxchg path and in rmw and cmpxchg instructions
are not distinguishable in the BE.
Differential Revision: https://reviews.llvm.org/D42976
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324383
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Krzysztof Parzyszek [Tue, 6 Feb 2018 19:08:41 +0000 (19:08 +0000)]
[Hexagon] Don't form new-value jumps from floating-point instructions
Additionally, verify that the register defined by the producer is a
32-bit register.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324381
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Simon Pilgrim [Tue, 6 Feb 2018 18:39:23 +0000 (18:39 +0000)]
[InstCombine][ValueTracking] Match non-uniform constant power-of-two vectors
Generalize existing constant matching to work with non-uniform constant vectors as well.
Differential Revision: https://reviews.llvm.org/D42818
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324369
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Craig Topper [Tue, 6 Feb 2018 18:18:49 +0000 (18:18 +0000)]
[X86] Auto-generate checks. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324367
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Sjoerd Meijer [Tue, 6 Feb 2018 16:28:43 +0000 (16:28 +0000)]
[ARM] f16 conversions
This is a follow up of r324321, adding f16 <-> f32 and f16 <-> f64 conversion
match patterns.
Differential Revision: https://reviews.llvm.org/D42954
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324360
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Nirav Dave [Tue, 6 Feb 2018 16:14:29 +0000 (16:14 +0000)]
[DAG, X86] Improve Dependency analysis when doing multi-node
Instruction Selection
Cleanup cycle/validity checks in ISel (IsLegalToFold,
HandleMergeInputChains) and X86 (isFusableLoadOpStore). Now do a full
search for cycles / dependencies pruning the search when topological
property of NodeId allows.
As part of this propogate the NodeId-based cutoffs to narrow
hasPreprocessorHelper searches.
Reviewers: craig.topper, bogner
Subscribers: llvm-commits, hiraditya
Differential Revision: https://reviews.llvm.org/D41293
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324359
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Simon Pilgrim [Tue, 6 Feb 2018 16:10:12 +0000 (16:10 +0000)]
Regenerate vector-urem test. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324357
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Marek Olsak [Tue, 6 Feb 2018 15:17:55 +0000 (15:17 +0000)]
AMDGPU: Fix S_BUFFER_LOAD_DWORD_SGPR moveToVALU
Author: Bas Nieuwenhuizen
https://reviews.llvm.org/D42881
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324353
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Krzysztof Parzyszek [Tue, 6 Feb 2018 15:15:13 +0000 (15:15 +0000)]
[Hexagon] Remove leftover assert
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324352
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Krzysztof Parzyszek [Tue, 6 Feb 2018 14:24:57 +0000 (14:24 +0000)]
[Hexagon] Split HVX operations on vector pairs
Vector pairs are legal types, but not every operation can work on pairs.
For those operations that are legal for single vectors, generate a concat
of their results on pair halves.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324350
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Krzysztof Parzyszek [Tue, 6 Feb 2018 14:21:31 +0000 (14:21 +0000)]
[Hexagon] Add helper functions to identify single/pair vector types, NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324349
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Krzysztof Parzyszek [Tue, 6 Feb 2018 14:16:52 +0000 (14:16 +0000)]
[Hexagon] Handle lowering of SETCC via setCondCodeAction
It was expanded directly into instructions earlier. That was to avoid
loads from a constant pool for a vector negation: "xor x, splat(i1 -1)".
Implement ISD opcodes QTRUE and QFALSE to denote logical vectors of
all true and all false values, and handle setcc with negations through
selection patterns.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324348
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Simon Pilgrim [Tue, 6 Feb 2018 14:07:46 +0000 (14:07 +0000)]
[X86][SSE] Add PACKUS support for truncation of clamped values
Followup to D42544 that matches PACKUSWB cases for non-AVX512, SSE and PACKUSDW cases will have to wait until we can add support for general SMIN/SMAX matching.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324347
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Tim Renouf [Tue, 6 Feb 2018 13:39:38 +0000 (13:39 +0000)]
[AMDGPU] do not generate .AMDGPU.config for amdpal os type
Summary:
Now we generate PAL metadata for the amdpal os type, there is no need to
generate the .AMDGPU.config section.
Reviewers: arsenm, nhaehnle, dstuttard
Subscribers: kzhuravl, wdng, yaxunl, t-tye, llvm-commits
Differential Revision: https://reviews.llvm.org/D37760
Change-Id: I303c5fad66656ce97293da60621afac6595b4c18
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324346
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Sander de Smalen [Tue, 6 Feb 2018 13:13:21 +0000 (13:13 +0000)]
[AArch64][SVE] Asm: Add AND_ZI instructions and aliases
Summary: Adds support for the SVE AND instruction with vector and logical-immediate operands, and their corresponding aliases.
Reviewers: fhahn, rengolin, samparker, echristo, aadg, kristof.beyls
Reviewed By: fhahn
Subscribers: aemerson, javed.absar, tschuett, llvm-commits
Differential Revision: https://reviews.llvm.org/D42295
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324343
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Clement Courbet [Tue, 6 Feb 2018 12:25:33 +0000 (12:25 +0000)]
[MergeICmps] Handle chains with several complex BCE basic blocks.
- Fix condition for detecting that a complex basic block was the first in
the chain.
- Add tests.
This was caught by buildbots when submitting rL324319.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324341
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Simon Pilgrim [Tue, 6 Feb 2018 12:16:10 +0000 (12:16 +0000)]
[X86][SSE] Add PACKSS support for truncation of clamped values
Followup to D42544 that matches PACKSSWB cases for non-AVX512, SSE and PACKSSDW cases will have to wait until we can add support for general SMIN/SMAX matching.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324339
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Hiroshi Inoue [Tue, 6 Feb 2018 11:34:16 +0000 (11:34 +0000)]
[PowerPC] fix up in rL324229, NFC
This patch fixes up my previous commit (add initialization of local variables).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324336
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Petar Jovanovic [Tue, 6 Feb 2018 11:11:28 +0000 (11:11 +0000)]
[DeadArgumentElim] Set pointer to DISubprogram before calling RAUW. NFC
It is better to update pointer of the DISuprogram before we call RAUW for
still live arguments of the function, because with the change reviewed in
D42541 in RAUW we compare DISubprograms rather than functions itself.
Patch by Djordje Todorovic.
Differential Revision: https://reviews.llvm.org/D42794
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324335
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Alexander Ivchenko [Tue, 6 Feb 2018 09:53:02 +0000 (09:53 +0000)]
Fix unused variable warning in release mode. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324330
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Oliver Stannard [Tue, 6 Feb 2018 09:39:04 +0000 (09:39 +0000)]
[AArch64] Fix spelling of ICH_ELRSR_EL2 system register
This register was mis-spelled as ICH_ELSR_EL2, but has the correct encoding for
ICH_ELRSR_EL2.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324325
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Oliver Stannard [Tue, 6 Feb 2018 09:24:47 +0000 (09:24 +0000)]
[ARM][AArch64] Add CSDB speculation barrier instruction
This adds the CSDB instruction, which is a new barrier instruction
described by the whitepaper at [1].
This is in encoding space which was previously executed as a NOP, so it is
available for all targets that have the relevant NOP encoding space. This
matches the binutils behaviour for these instructions [2][3].
[1] https://developer.arm.com/support/security-update
[2] https://sourceware.org/ml/binutils/2018-01/msg00116.html
[3] https://sourceware.org/ml/binutils/2018-01/msg00120.html
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324324
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Clement Courbet [Tue, 6 Feb 2018 09:14:00 +0000 (09:14 +0000)]
[MergeICmps][NFC] Add more assertions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324323
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Sjoerd Meijer [Tue, 6 Feb 2018 08:43:56 +0000 (08:43 +0000)]
[ARM] Armv8.2-A FP16 code generation (part 3/3)
This adds most of the FP16 codegen support, but these areas need further work:
- FP16 literals and immediates are not properly supported yet (e.g. literal
pool needs work),
- Instructions that are generated from intrinsics (e.g. vabs) haven't been
added.
This will be addressed in follow-up patches.
Differential Revision: https://reviews.llvm.org/D42849
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324321
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Clement Courbet [Tue, 6 Feb 2018 08:40:18 +0000 (08:40 +0000)]
Revert "[MergeICmps] Enable the MergeICmps Pass by default."
Breaks clang-ppc64be-linux-multistage buildbot.
This reverts commit
515bab711f308c2e8299c49dd8c84ea6a2e0b60e.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324319
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Clement Courbet [Tue, 6 Feb 2018 07:20:33 +0000 (07:20 +0000)]
[MergeICmps] Enable the MergeICmps Pass by default.
Summary: Now that PR33325 is fixed, this should always improve the generated code.
Reviewers: spatel
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D42793
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324317
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Hiroshi Inoue [Tue, 6 Feb 2018 07:03:09 +0000 (07:03 +0000)]
[ThinLTO] fix test failure without x86 backend
This patch moves ThinLTOBitcodeWriter/module-asm.ll test case into x86 directory to avoid a test failure when x86 backend is not enabled.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324316
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Craig Topper [Tue, 6 Feb 2018 06:44:05 +0000 (06:44 +0000)]
[X86] Modify a few tests to not use icmps that are provably false.
These used things like unsigned less than zero, which is always false because there is no unsigned number less than zero.
I plan to teach DAG combine to optimize these so need to stop using them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324315
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Konstantin Zhuravlyov [Tue, 6 Feb 2018 04:06:04 +0000 (04:06 +0000)]
AMDGPU/MemoryModel: Fix monotonic atomic loads
Those should have glc bit set for system and agent synchronization scopes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324314
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Peter Collingbourne [Tue, 6 Feb 2018 03:29:18 +0000 (03:29 +0000)]
ThinLTOBitcodeWriter: Do not include module-level inline asm in the merged module.
If the inline asm provides the definition of a symbol, this can result
in duplicate symbol errors.
Differential Revision: https://reviews.llvm.org/D42944
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324313
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Craig Topper [Tue, 6 Feb 2018 03:23:27 +0000 (03:23 +0000)]
[DAGCombiner] Pass the original load to ExtendSetCCUses not the turncate.
Summary:
This method is trying to use the truncate node to find which SETCC operand should be replaced directly with the extended load.
This used to work correctly because all uses of the original load were replaced by the truncate before this function was called. So this was used to effectively bypass the truncate and find the load under it.
All but one of the callers now call this before the truncate has replaced the laod so the setcc doesn't yet use the truncate. To account for this we should pass the original load instead.
I changed the order of that one caller to make this work there too.
I don't have a test case because this is probably hidden by later DAG combines causing the extend and truncate to cancel out. I assume this way is a little more efficient and matches what was originally intended.
Reviewers: RKSimon, spatel, niravd
Reviewed By: niravd
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D42878
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324311
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Derek Schuff [Tue, 6 Feb 2018 01:21:17 +0000 (01:21 +0000)]
[WebAssembly] Fix test expectations after r324274
Wasm uses the expand action for several FP compare ops, and that behavior
changed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324305
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Reid Kleckner [Tue, 6 Feb 2018 00:56:06 +0000 (00:56 +0000)]
Update test expectations after reverting PLT change
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324304
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Ahmed Charles [Tue, 6 Feb 2018 00:55:23 +0000 (00:55 +0000)]
[RISCV] Add support for %pcrel_lo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324303
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Reid Kleckner [Tue, 6 Feb 2018 00:47:14 +0000 (00:47 +0000)]
Revert "Don't assume a null GV is local for ELF and MachO."
This reverts r323297.
It breaks building grub.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324301
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Teresa Johnson [Tue, 6 Feb 2018 00:43:39 +0000 (00:43 +0000)]
[ThinLTO] Remove dead and dropped symbol declarations when possible
Summary:
Removing the dropped symbols will prevent indirect call promotion in the
ThinLTO Backend from adding a new reference to a symbol, which can
result in linker unsats. This can happen when we compile with a sample
profile collected from one binary by used for another, which may have
profiled targets that aren't used in the new binary.
Note that until dropDeadSymbols handles variables and aliases (in
progress), we may not be able to remove the declaration and can still
have an issue.
Reviewers: grimar, davidxl
Subscribers: mehdi_amini, inglorion, llvm-commits, eraman
Differential Revision: https://reviews.llvm.org/D42816
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324299
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Paul Robinson [Tue, 6 Feb 2018 00:43:26 +0000 (00:43 +0000)]
Fix regex from r324279 more better.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324298
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Craig Topper [Mon, 5 Feb 2018 23:57:03 +0000 (23:57 +0000)]
[X86] Auto-generate complete checks. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324295
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Craig Topper [Mon, 5 Feb 2018 23:57:01 +0000 (23:57 +0000)]
[X86] Relax restrictions on what setcc condition codes can be folded with a sext when AVX512 is enabled.
We now allow all signed comparisons and not equal. The complement that needs to be added for this is no worse than the extend. And the vector output forms of pcmpeq/pcmpgt have better latency than the k-register version on SKX.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324294
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Peter Collingbourne [Mon, 5 Feb 2018 23:46:32 +0000 (23:46 +0000)]
LTO: Also include dso-local bit for calls in ThinLTO cache key.
Differential Revision: https://reviews.llvm.org/D42934
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324291
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Sanjay Patel [Mon, 5 Feb 2018 23:43:05 +0000 (23:43 +0000)]
[LoopStrengthReduce, x86] don't add cost for a cmp that will be macro-fused (PR35681)
In the motivating case from PR35681 and represented by the macro-fuse-cmp test:
https://bugs.llvm.org/show_bug.cgi?id=35681
...there's a 37 -> 31 byte size win for the loop because we eliminate the big base
address offsets.
SPEC2017 on Ryzen shows no significant perf difference.
Differential Revision: https://reviews.llvm.org/D42607
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324289
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Francis Visoiu Mistrih [Mon, 5 Feb 2018 23:06:47 +0000 (23:06 +0000)]
[PEI] Fix failing test caused by r324283
X86FrameLowering sets stack size to 0 if redzone is enabled.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324285
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Francis Visoiu Mistrih [Mon, 5 Feb 2018 22:46:54 +0000 (22:46 +0000)]
[PEI][NFC] Move StackSize opt-remark code next to -warn-stack code
This allows us to make sure we're always having the same sizes in both
remarks and warnings.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324283
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Paul Robinson [Mon, 5 Feb 2018 22:30:00 +0000 (22:30 +0000)]
Fix Windows bots for test from r324270.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324279
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Daniel Neilson [Mon, 5 Feb 2018 22:23:58 +0000 (22:23 +0000)]
[LowerMemIntrinsics] Update uses of deprecated MemIntrinsic::getAlignment API (NFC)
Summary:
This change is part of step five in the series of changes to remove alignment argument from
memcpy/memmove/memset in favour of alignment attributes. In particular, this changes the
LowerMemIntrinsics pass to cease using the old getAlignment() API of MemoryIntrinsic in
favour of getting source & dest specific alignments through the new API.
Steps:
Step 1) Remove alignment parameter and create alignment parameter attributes for
memcpy/memmove/memset. ( rL322965, rC322964, rL322963 )
Step 2) Expand the IRBuilder API to allow creation of memcpy/memmove with differing
source and dest alignments. ( rL323597 )
Step 3) Update Clang to use the new IRBuilder API. ( rC323617 )
Step 4) Update Polly to use the new IRBuilder API. ( rL323618 )
Step 5) Update LLVM passes that create memcpy/memmove calls to use the new IRBuilder API,
and those that use use MemIntrinsicInst::[get|set]Alignment() to use [get|set]DestAlignment()
and [get|set]SourceAlignment() instead. ( rL323886, rL323891, rL324148, rL324273 )
Step 6) Remove the single-alignment IRBuilder API for memcpy/memmove, and the
MemIntrinsicInst::[get|set]Alignment() methods.
Reference
http://lists.llvm.org/pipermail/llvm-dev/2015-August/089384.html
http://lists.llvm.org/pipermail/llvm-commits/Week-of-Mon-
20151109/312083.html
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324278
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Sanjay Patel [Mon, 5 Feb 2018 21:50:32 +0000 (21:50 +0000)]
[InstCombine] don't try to evaluate instructions with >1 use (revert r324014)
This example causes a compile-time explosion:
define i16 @foo(i16 %in) {
%x = zext i16 %in to i32
%a1 = mul i32 %x, %x
%a2 = mul i32 %a1, %a1
%a3 = mul i32 %a2, %a2
%a4 = mul i32 %a3, %a3
%a5 = mul i32 %a4, %a4
%a6 = mul i32 %a5, %a5
%a7 = mul i32 %a6, %a6
%a8 = mul i32 %a7, %a7
%a9 = mul i32 %a8, %a8
%a10 = mul i32 %a9, %a9
%a11 = mul i32 %a10, %a10
%a12 = mul i32 %a11, %a11
%a13 = mul i32 %a12, %a12
%a14 = mul i32 %a13, %a13
%a15 = mul i32 %a14, %a14
%a16 = mul i32 %a15, %a15
%a17 = mul i32 %a16, %a16
%a18 = mul i32 %a17, %a17
%a19 = mul i32 %a18, %a18
%a20 = mul i32 %a19, %a19
%a21 = mul i32 %a20, %a20
%a22 = mul i32 %a21, %a21
%a23 = mul i32 %a22, %a22
%a24 = mul i32 %a23, %a23
%T = trunc i32 %a24 to i16
ret i16 %T
}
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324276
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Krzysztof Parzyszek [Mon, 5 Feb 2018 21:27:16 +0000 (21:27 +0000)]
[SDAG] Legalize all CondCodes by inverting them and/or swapping operands
Differential Revision: https://reviews.llvm.org/D42788
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324274
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Daniel Neilson [Mon, 5 Feb 2018 21:23:22 +0000 (21:23 +0000)]
[SimplifyLibCalls] Update from deprecated IRBuilder API for creating memory intrinsics (NFC)
Summary:
This change is part of step five in the series of changes to remove alignment argument from
memcpy/memmove/memset in favour of alignment attributes. In particular, this changes the
SimplifyLibCalls pass to cease using the old IRBuilder createMemCpy/createMemMove
single-alignment APIs in favour of the new API that allows setting source and destination
alignments independently.
Steps:
Step 1) Remove alignment parameter and create alignment parameter attributes for
memcpy/memmove/memset. ( rL322965, rC322964, rL322963 )
Step 2) Expand the IRBuilder API to allow creation of memcpy/memmove with differing
source and dest alignments. ( rL323597 )
Step 3) Update Clang to use the new IRBuilder API. ( rC323617 )
Step 4) Update Polly to use the new IRBuilder API. ( rL323618 )
Step 5) Update LLVM passes that create memcpy/memmove calls to use the new IRBuilder API,
and those that use use MemIntrinsicInst::[get|set]Alignment() to use [get|set]DestAlignment()
and [get|set]SourceAlignment() instead. ( rL323886, rL323891, r3L24148 )
Step 6) Remove the single-alignment IRBuilder API for memcpy/memmove, and the
MemIntrinsicInst::[get|set]Alignment() methods.
Reference
http://lists.llvm.org/pipermail/llvm-dev/2015-August/089384.html
http://lists.llvm.org/pipermail/llvm-commits/Week-of-Mon-
20151109/312083.html
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324273
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Paul Robinson [Mon, 5 Feb 2018 20:43:15 +0000 (20:43 +0000)]
[DWARF] Regularize dumping strings from line tables.
The major visible difference here is that in line-table dumps,
directory and file names are wrapped in double-quotes; previously,
directory names got single quotes and file names were not quoted at
all.
The improvement in this patch is that when a DWARF v5 line table
header has indirect strings, in a verbose dump these will all have
their section[offset] printed as well as the name itself. This
matches the format used for dumping strings in the .debug_info
section.
Differential Revision: https://reviews.llvm.org/D42802
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324270
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Sanjay Patel [Mon, 5 Feb 2018 19:59:52 +0000 (19:59 +0000)]
[InstCombine] add test corresponding to r324252 (PR36225); NFC
As PR36225 shows, we definitely don't want to enable the
canEvaluate* logic with phis.
There's still a question of whether we should just revert
r324014 completely because it exposes a compile-time sinkhole
(although that problem might exist independently).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324266
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Daniel Neilson [Mon, 5 Feb 2018 19:39:38 +0000 (19:39 +0000)]
Add release note on change to memcpy/memmove/memset builtin signatures
Summary:
The signatures for the builtins @llvm.memcpy, @llvm.memmove, and @llvm.memset
where changed in rL322965. The number of arguments has decreased from five to
four with the removal of the alignment argument. Alignment is now conveyed
by supplying the align parameter attribute on the destination and/or source of
the cpy/move/set.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324265
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Nirav Dave [Mon, 5 Feb 2018 18:58:58 +0000 (18:58 +0000)]
[X86] Teach DAG unfoldMemoryOperand to reconvert CMPs to tests
Summary:
Copy MI-level cmp->test conversion to SelectionDAG-level memory unfold.
This fixes a regression from upcoming D41293 change.
Reviewers: craig.topper, RKSimon
Reviewed By: craig.topper
Subscribers: llvm-commits, hiraditya
Differential Revision: https://reviews.llvm.org/D42808
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324261
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Craig Topper [Mon, 5 Feb 2018 18:31:04 +0000 (18:31 +0000)]
[X86] Artificially lower the complexity of the scalar ANDN patterns so that AND with immediate will match first.
This allows the immediate to folded into the and instead of being forced to move into a register. This can sometimes result in shorter encodings since the and can sign extend an immediate.
This also allows us to match an and to a movzx after a not.
This can cause an extra move if the input to the separate NOT has an additional user which requires a copy before the NOT.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324260
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Sanjay Patel [Mon, 5 Feb 2018 17:53:29 +0000 (17:53 +0000)]
[InstCombine] add unsigned saturation subtraction canonicalizations
This is the instcombine part of unsigned saturation canonicalization.
Backend patches already commited:
https://reviews.llvm.org/D37510
https://reviews.llvm.org/D37534
It converts unsigned saturated subtraction patterns to forms recognized
by the backend:
(a > b) ? a - b : 0 -> ((a > b) ? a : b) - b)
(b < a) ? a - b : 0 -> ((a > b) ? a : b) - b)
(b > a) ? 0 : a - b -> ((a > b) ? a : b) - b)
(a < b) ? 0 : a - b -> ((a > b) ? a : b) - b)
((a > b) ? b - a : 0) -> - ((a > b) ? a : b) - b)
((b < a) ? b - a : 0) -> - ((a > b) ? a : b) - b)
((b > a) ? 0 : b - a) -> - ((a > b) ? a : b) - b)
((a < b) ? 0 : b - a) -> - ((a > b) ? a : b) - b)
Patch by Yulia Koval!
Differential Revision: https://reviews.llvm.org/D41480
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324255
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Peter Collingbourne [Mon, 5 Feb 2018 17:17:51 +0000 (17:17 +0000)]
LTO: Include dso-local bit in ThinLTO cache key.
Differential Revision: https://reviews.llvm.org/D42713
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324253
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Sanjay Patel [Mon, 5 Feb 2018 17:16:50 +0000 (17:16 +0000)]
[InstCombine] only allow narrow/wide evaluation of values with >1 use if that user is a binop
There was a logic hole in D42739 / rL324014 because we're not accounting for select and phi
instructions that might have repeated operands. This is likely a source of an infinite loop.
I haven't manufactured a test case to prove that, but it should be safe to speculatively limit
this transform to binops while we try to create that test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324252
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Krzysztof Parzyszek [Mon, 5 Feb 2018 17:12:07 +0000 (17:12 +0000)]
[Hexagon] Memoize instruction positions in BitTracker
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324250
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Craig Topper [Mon, 5 Feb 2018 16:54:07 +0000 (16:54 +0000)]
[X86] Teach X86DAGToDAGISel::shrinkAndImmediate to preserve upper 32 zeroes of a 64 bit mask.
If the upper 32 bits of a 64 bit mask are all zeros, we have special isel patterns to use a 32-bit and instead of a 64-bit and by relying on the impliciting zeroing of 32 bit ops.
This patch teachs shrinkAndImmediate not to break that optimization.
Differential Revision: https://reviews.llvm.org/D42899
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324249
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Hans Wennborg [Mon, 5 Feb 2018 16:10:42 +0000 (16:10 +0000)]
Revert r323472 "[Debug] Add dbg.value intrinsics for PHIs created during LCSSA."
This broke the Chromium build; see PR36238.
> This patch is an enhancement to propagate dbg.value information when
> Phis are created on behalf of LCSSA. I noticed a case where a value
> carried across a loop was reported as <optimized out>.
>
> Specifically this case:
>
> int bar(int x, int y) {
> return x + y;
> }
>
> int foo(int size) {
> int val = 0;
> for (int i = 0; i < size; ++i) {
> val = bar(val, i); // Both val and i are correct
> }
> return val; // <optimized out>
> }
>
> In the above case, after all of the interesting computation completes
> our value is reported as "optimized out." This change will add a
> dbg.value to correct this.
>
> This patch also moves the dbg.value insertion routine from
> LoopRotation.cpp into Local.cpp, so that we can share it in both places
> (LoopRotation and LCSSA).
>
> Patch by Matt Davis!
>
> Differential Revision: https://reviews.llvm.org/D42551
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324247
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Benjamin Kramer [Mon, 5 Feb 2018 15:56:24 +0000 (15:56 +0000)]
BitTracker.h needs a full definition of MachineInstr, so include the defining file.
Patch by Dean Sturtevant!
Differential Revision: https://reviews.llvm.org/D42907
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324245
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Krzysztof Parzyszek [Mon, 5 Feb 2018 15:52:54 +0000 (15:52 +0000)]
[Hexagon] Forgot about HexagonISD::VZERO in selecting const vectors
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324244
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Krzysztof Parzyszek [Mon, 5 Feb 2018 15:46:41 +0000 (15:46 +0000)]
[Hexagon] Don't use garbage mask in HvxSelector::shuffp2
The function shuffp2 was breaking up a wide shuffle into a pair of
narrower ones, except that the narrower shuffle masks were actually
uninitialized.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324243
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Teresa Johnson [Mon, 5 Feb 2018 15:44:27 +0000 (15:44 +0000)]
[ThinLTO] Convert dead alias to declarations
Summary:
This complements the fixes in r323633 and r324075 which drop the
definitions of dead functions and variables, respectively.
Fixes PR36208.
Reviewers: grimar, rafael
Subscribers: mehdi_amini, llvm-commits, inglorion
Differential Revision: https://reviews.llvm.org/D42856
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324242
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Krzysztof Parzyszek [Mon, 5 Feb 2018 15:40:06 +0000 (15:40 +0000)]
[Hexagon] Use V6_vmpyih for halfword multiplication
Unlike V6_vmpyhv, it produces the result in the exact form that is
expected without the need for a shuffle.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324241
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Dmitry Preobrazhensky [Mon, 5 Feb 2018 14:18:53 +0000 (14:18 +0000)]
[AMDGPU][MC] Corrected dst/data size for MIMG opcodes with d16 modifier
See bug 36154: https://bugs.llvm.org/show_bug.cgi?id=36154
Differential Revision: https://reviews.llvm.org/D42847
Reviewers: cfang, artem.tamazov, arsenm
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324237
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Igor Laevsky [Mon, 5 Feb 2018 12:47:40 +0000 (12:47 +0000)]
[llvm-opt-fuzzer] Fix build after rL324225
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324232
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Dmitry Preobrazhensky [Mon, 5 Feb 2018 12:45:43 +0000 (12:45 +0000)]
[AMDGPU][MC] Added validation of d16 and r128 modifiers of MIMG opcodes
See bugs 36094, 36095:
https://bugs.llvm.org/show_bug.cgi?id=36094
https://bugs.llvm.org/show_bug.cgi?id=36095
Differential Revision: https://reviews.llvm.org/D42692
Reviewers: vpykhtin, artem.tamazov, arsenm
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324231
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Hiroshi Inoue [Mon, 5 Feb 2018 12:25:29 +0000 (12:25 +0000)]
[PowerPC] Check hot loop exit edge in PPCCTRLoops
PPCCTRLoops transform loops using mtctr/bdnz instructions if loop trip count is known and big enough to compensate for the cost of mtctr.
But if there is a loop exit edge which is known to be frequently taken (by builtin_expect or by PGO), we should not transform the loop to avoid the cost of mtctr instruction. Here is an example of a loop with hot exit edge:
for (unsigned i = 0; i < TripCount; i++) {
// do something
if (__builtin_expect(check(), 1))
break;
// do something
}
Differential Revision: https://reviews.llvm.org/D42637
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324229
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Clement Courbet [Mon, 5 Feb 2018 12:23:51 +0000 (12:23 +0000)]
[CodeGenSchedule][NFC] Always emit ProcResourceUnits.
Summary:
Right now only the ProcResourceUnits that are directly referenced by
instructions are emitted. This change emits all of them, so that
analysis passes can use the information.
This has no functional impact. It typically adds a few entries (e.g. 4
for X86/haswell) to the generated ProcRes table.
Reviewers: gchatelet
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D42903
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324228
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Igor Laevsky [Mon, 5 Feb 2018 11:05:47 +0000 (11:05 +0000)]
[llvm-opt-fuzzer] Avoid adding incorrect inputs to the fuzzer corpus
Differential Revision: https://reviews.llvm.org/D42414
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324225
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James Henderson [Mon, 5 Feb 2018 10:47:13 +0000 (10:47 +0000)]
Fix more print format specifiers in debug_rnglists dumping
See also r324096.
I have made the assumption that DWARF64 is not an issue for the time
being with these fixes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324223
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Serguei Katkov [Mon, 5 Feb 2018 09:05:43 +0000 (09:05 +0000)]
Revert [SimplifyCFG] Relax restriction for folding unconditional branches
The patch causes the failure of the test
compiler-rt/test/profile/Linux/counter_promo_nest.c
To unblock buildbot, revert the patch while investigation is in progress.
Differential Revision: https://reviews.llvm.org/D42691
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324214
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Craig Topper [Mon, 5 Feb 2018 08:37:37 +0000 (08:37 +0000)]
[X86] Add isel patterns for selecting masked SUBV_BROADCAST with bitcasts. Remove combineBitcastForMaskedOp.
Add test cases for the merge masked versions to make sure we have all those covered.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324210
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Max Kazantsev [Mon, 5 Feb 2018 08:09:49 +0000 (08:09 +0000)]
[NFC] Add tests for PR35743
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324209
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Serguei Katkov [Mon, 5 Feb 2018 07:56:43 +0000 (07:56 +0000)]
[SimplifyCFG] Relax restriction for folding unconditional branches
The commit rL308422 introduces a restriction for folding unconditional
branches. Specifically if empty block with unconditional branch leads to
header of the loop then elimination of this basic block is prohibited.
However it seems this condition is redundantly strict.
If elimination of this basic block does not introduce more back edges
then we can eliminate this block.
The patch implements this relax of restriction.
Reviewers: efriedma, mcrosier, pacxx, hsung, davidxl
Reviewed By: pacxx
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D42691
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324208
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Craig Topper [Mon, 5 Feb 2018 06:56:33 +0000 (06:56 +0000)]
[X86] Remove unused lambda. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324206
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Craig Topper [Mon, 5 Feb 2018 06:00:23 +0000 (06:00 +0000)]
[X86] Remove X86ISD::SHUF128 from combineBitcastForMaskedOp. Use isel patterns instead.
We always created X86ISD::SHUF128 with a 64-bit element type so we can use isel patterns to detect a bitconvert to 32-bit to handle masking.
The test changes are because we also match the bitconvert even if there is no masking. This leads to unnecessary isel pattern, but it requires more multiclass hackery in tablegen to get rid of it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324205
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Serguei Katkov [Mon, 5 Feb 2018 05:49:47 +0000 (05:49 +0000)]
Re-apply [SCEV] Fix isLoopEntryGuardedByCond usage
ScalarEvolution::isKnownPredicate invokes isLoopEntryGuardedByCond without check
that SCEV is available at entry point of the loop. It is incorrect and fixed by patch.
To bugs additionally fixed:
assert is moved after the check whether loop is not a nullptr.
Usage of isLoopEntryGuardedByCond in ScalarEvolution::isImpliedCondOperandsViaNoOverflow
is guarded by isAvailableAtLoopEntry.
Reviewers: sanjoy, mkazantsev, anna, dorit, reames
Reviewed By: mkazantsev
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D42417
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324204
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Craig Topper [Sun, 4 Feb 2018 23:48:51 +0000 (23:48 +0000)]
[X86] Auto-generate full checks. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324202
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Zvi Rackover [Sun, 4 Feb 2018 19:31:14 +0000 (19:31 +0000)]
X86 Tests: Add shuffle that can be improved by widening elements. NFC
To be improved by D42044
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324200
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