OSDN Git Service
Craig Topper [Mon, 1 Jan 2018 01:11:32 +0000 (01:11 +0000)]
[X86] Add missing NoVLX predicate around some patterns that use zmm registers to implement 128/256-bit operations without VLX.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321613
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Craig Topper [Mon, 1 Jan 2018 01:11:29 +0000 (01:11 +0000)]
[X86] Add patterns for using zmm registers for v8i32/v8f32 vselect with the false input being zero.
We can use zmm move with zero masking for this. We already had patterns for using a masked move, but we didn't check for the zero masking case separately.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321612
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Craig Topper [Sun, 31 Dec 2017 19:17:52 +0000 (19:17 +0000)]
[X86] Use CONCAT_VECTORS instead of INSERT_SUBVECTOR for padding v4i1/v2i1 vector to v8i1 pre-legalize.
The CONCAT_VECTORS will be lowered to INSERT_SUBVECTOR later. In the modified cases this seems to be enough to trick a later DAG combine into running in a different order than allows the ANDs to be removed.
I'll admit this is a bit of a hack that happens to work, but using CONCAT_VECTORS is more consistent with other legalization code anyway.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321611
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Simon Pilgrim [Sun, 31 Dec 2017 18:59:30 +0000 (18:59 +0000)]
[X86][AVX2] Combine extract(broadcast(scalar_value)) --> scalar_value
As it has a scalar source we don't treat it as a target shuffle so needs special handling.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321610
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Simon Pilgrim [Sun, 31 Dec 2017 17:16:48 +0000 (17:16 +0000)]
[X86][AVX] Add test case from PR33740
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321608
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Simon Pilgrim [Sun, 31 Dec 2017 17:07:47 +0000 (17:07 +0000)]
[X86][SSE] Don't vectorize splat buildvector of binops (PR30780)
Don't combine buildvector(binop(),binop(),binop(),binop()) -> binop(buildvector(), buildvector()) if its a splat - keep the binop scalar and just splat the result to avoid large vector constants.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321607
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Davide Italiano [Sun, 31 Dec 2017 16:54:03 +0000 (16:54 +0000)]
[SimplifyCFG] Return to the pass manager the correct value.
I wanted to commit this with r321603, but I failed to squash
the two commits.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321606
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Davide Italiano [Sun, 31 Dec 2017 16:51:50 +0000 (16:51 +0000)]
[Utils/Local] Use `auto` when the type is obvious. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321605
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Davide Italiano [Sun, 31 Dec 2017 16:48:44 +0000 (16:48 +0000)]
[Utils] Remove commented debug message. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321604
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Davide Italiano [Sun, 31 Dec 2017 16:47:16 +0000 (16:47 +0000)]
[SimplifyCFG] Stop hoisting musttail calls incorrectly.
PR35774.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321603
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Craig Topper [Sun, 31 Dec 2017 09:50:38 +0000 (09:50 +0000)]
[X86] Add a DAG combine to widen (i4 (bitcast (v4i1))) before type legalization sees the i4 and changes to load/store.
Same for v2i1 and i2.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321602
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Craig Topper [Sun, 31 Dec 2017 08:25:50 +0000 (08:25 +0000)]
[X86] Add a DAG combine to fix (v4i1 (bitcast (i4))) before type legalization sees the i4 and changes to load/store.
Same for i2 and v2i1.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321601
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George Rimar [Sun, 31 Dec 2017 07:41:02 +0000 (07:41 +0000)]
[MC] - Stop ignoring invalid meta data symbols.
Previously llvm-mc would silently accept code from testcase,
that contains invalid metadata symbol in section declaration.
Patch fixes the issue.
Differential revision: https://reviews.llvm.org/D41641
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321599
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Craig Topper [Sun, 31 Dec 2017 07:38:41 +0000 (07:38 +0000)]
[X86] Prevent combining (v8i1 (bitconvert (i8 load)))->(v8i1 load) if we don't have DQI.
We end up using an i8 load via an isel pattern from v8i1 anyway. This just makes it more explicit. This seems to improve codgen in some cases and I'd like to kill off some of the load patterns.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321598
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Craig Topper [Sun, 31 Dec 2017 07:38:36 +0000 (07:38 +0000)]
[X86] Remove patterns for load/store of vXi with bitcasts to/from integer.
This is better handled by a DAG combine if its not already being done. No lit tests fail from the removal of these patterns.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321597
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Craig Topper [Sun, 31 Dec 2017 07:38:33 +0000 (07:38 +0000)]
[X86] Remove AND32ri8 from pattern for v1i1 load.
I don't think anything would actually expect the other bits to be zero.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321596
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Craig Topper [Sun, 31 Dec 2017 07:38:30 +0000 (07:38 +0000)]
[X86] Fix a crash when returning a <1 x i1> value>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321595
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Craig Topper [Sun, 31 Dec 2017 07:38:26 +0000 (07:38 +0000)]
[X86] Cleanup store splitting in LowerTruncatingStore
Use getMemBasePlusOffset and calculate proper pointer info and alignment for the second store.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321594
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Philip Reames [Sun, 31 Dec 2017 03:34:36 +0000 (03:34 +0000)]
2nd attempt at "fixing" amdgpu tests after r321575
The test needs to be changed; it was exercising UB and that likely wasn't the intent of the test author. I simply removed the checks because I have absolutely no idea what this test was trying to accomplish. With multiple check patterns, no explanation, and no familiarity on my part with the ISA a true fix is going to have to come from someone familiar with the target.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321591
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Philip Reames [Sat, 30 Dec 2017 18:42:37 +0000 (18:42 +0000)]
Test fix after r321575
The test in question was checking for a particular intepretation of undefined behavior. Relax the test to check that we simply don't crash.
Sorry for the breakage, I don't generally build AMDGPU locally and just saw the failure this morning.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321589
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Serge Pavlov [Sat, 30 Dec 2017 15:37:46 +0000 (15:37 +0000)]
Added support for reading configuration files
Configuration file is read as a response file in which file names in
the nested constructs `@file` are resolved relative to the directory
where the including file resides. Lines in which the first non-whitespace
character is '#' are considered as comments and are skipped. Trailing
backslashes are used to concatenate lines in the same way as they
are used in shell scripts.
Differential Revision: https://reviews.llvm.org/D24926
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321586
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Benjamin Kramer [Sat, 30 Dec 2017 15:27:33 +0000 (15:27 +0000)]
Use phi ranges to simplify code. No functionality change intended.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321585
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Simon Pilgrim [Sat, 30 Dec 2017 11:51:45 +0000 (11:51 +0000)]
[X86][SSE] Add PR30780 test cases
Broadcast of sign/zero extended scalars resulting in unnecessary vector constants
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321584
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Simon Pilgrim [Sat, 30 Dec 2017 11:20:56 +0000 (11:20 +0000)]
[X86][SSE] Add test for (v2f32 uitofp(build_vector(i32, i32))) (PR35732)
To compare against (v2f32 build_vector(f32 uitofp(i32), f32 uitofp(i32)))
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321583
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Serge Pavlov [Sat, 30 Dec 2017 09:15:59 +0000 (09:15 +0000)]
Reverted 321580: Added support for reading configuration files
It caused buildbot fails.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321582
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Serge Pavlov [Sat, 30 Dec 2017 08:15:15 +0000 (08:15 +0000)]
Added support for reading configuration files
Configuration file is read as a response file in which file names in
the nested constructs `@file` are resolved relative to the directory
where the including file resides. Lines in which the first non-whitespace
character is '#' are considered as comments and are skipped. Trailing
backslashes are used to concatenate lines in the same way as they
are used in shell scripts.
Differential Revision: https://reviews.llvm.org/D24926
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321580
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Hiroshi Inoue [Sat, 30 Dec 2017 08:09:04 +0000 (08:09 +0000)]
[PowerPC] fix a bug in TCO eligibility check
If the callee and caller use different calling convensions, we cannot apply TCO if the callee requires arguments on stack; e.g. C calling convention and Fast CC use the same registers for parameter passing, but the stack offset is not necessarily same.
This patch also recommit r319218 "[PowerPC] Allow tail calls of fastcc functions from C CallingConv functions." by @sfertile since the problem reported in r320106 should be fixed.
Differential Revision: https://reviews.llvm.org/D40893
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321579
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Craig Topper [Sat, 30 Dec 2017 06:45:46 +0000 (06:45 +0000)]
[X86] Remove isel patterns for kshifts with types that don't support kshift natively.
We should only be creating natively supported kshifts now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321577
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Craig Topper [Sat, 30 Dec 2017 06:45:43 +0000 (06:45 +0000)]
[X86] Custom legalize vXi1 extract_subvector with KSHIFTR.
This allows us to remove some isel patterns.
This is mostly NFC, but we now use KSHIFTB instead of KSHIFTW with DQI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321576
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Philip Reames [Sat, 30 Dec 2017 05:54:22 +0000 (05:54 +0000)]
[instsimplify] consistently handle undef and out of bound indices for insertelement and extractelement
In one case, we were handling out of bounds, but not undef indices. In the other, we were handling undef (with the comment making the analogy to out of bounds), but not out of bounds. Be consistent and treat both undef and constant out of bounds indices as producing undefined results.
As a side effect, this also protects instcombine from having to handle large constant indices as we always simplify first.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321575
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Philip Reames [Sat, 30 Dec 2017 04:10:48 +0000 (04:10 +0000)]
Add another test case for r321489
Went to reduce another fuzzer failure to find it's already been fixed, but the test case is slightly different so it's worth adding anyways.
Reduced from oss-fuzz #4768 test case
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321573
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Philip Reames [Sat, 30 Dec 2017 03:13:00 +0000 (03:13 +0000)]
Move tests associated with transforms moved in r321467
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321572
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Geoff Berry [Fri, 29 Dec 2017 21:01:09 +0000 (21:01 +0000)]
[MachineOperand] Fix LiveDebugVariables code after isRenamable change.
Fix code in LiveDebugVariables that was changing def MachineOperands to
uses, which will hit an assert for dead operands after the change to add
the renamable bit to MachineOperands. Avoid the assert by clearing the
dead bit before changing the operand to a use.
Fixes issue reported in out of tree target by Jesper Antonsson at Ericsson.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321571
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Matt Arsenault [Fri, 29 Dec 2017 19:25:57 +0000 (19:25 +0000)]
StructurizeCFG: Use phi iterator range
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321568
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Matt Arsenault [Fri, 29 Dec 2017 19:25:53 +0000 (19:25 +0000)]
IR: Fix BasicBlock::phis for empty blocks
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321567
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Simon Atanasyan [Fri, 29 Dec 2017 19:18:30 +0000 (19:18 +0000)]
[mips] Provide correct descriptions of asm constraints in the comments. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321566
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Simon Atanasyan [Fri, 29 Dec 2017 19:18:24 +0000 (19:18 +0000)]
[mips] Replace assert by an error message
Initially, if the `c` constraint applied to the wrong data type that
causes LLVM to assert. This commit replaces the assert by an error
message.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321565
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Matt Arsenault [Fri, 29 Dec 2017 17:18:21 +0000 (17:18 +0000)]
AMDGPU: Use unique PSVs for buffer resources
Also fixes using the wrong memory type for some
intrinsics when custom lowering them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321557
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Matt Arsenault [Fri, 29 Dec 2017 17:18:18 +0000 (17:18 +0000)]
AMDGPU: Remove mayLoad/hasSideEffects from MIMG stores
Atomics still have hasSideEffects set on them because
of the mess that is the memory properties.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321556
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Matt Arsenault [Fri, 29 Dec 2017 17:18:14 +0000 (17:18 +0000)]
AMDGPU: Implement getTgtMemIntrinsic for images
Currently all images are lowered to have a single
image PseudoSourceValue. Image stores happen to have
overly strict mayLoad/mayStore/hasSideEffects flags
set on them, so this happens to work. When these
are fixed to be correct, the scheduler breaks
this because the identical PSVs are assumed to
be the same address. These need to be unique
to the image resource value.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321555
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Simon Pilgrim [Fri, 29 Dec 2017 14:41:50 +0000 (14:41 +0000)]
[X86][SSE] Match PSHUFLW/PSHUFHW + PSHUFD vXi16 shuffle patterns (PR34686)
As noted in PR34686, we are relying on a PSHUFD+PSHUFLW+PSHUFHW shuffle chain for most general vXi16 unary shuffles.
This patch checks for simpler PSHUFLW+PSHUFD and PSHUFHW+PSHUFD cases beforehand, building on some existing code that just handled splat shuffles.
By doing so we also prevent premature use of PSHUFB shuffles which can be slower and require the creation/loading of constant shuffle masks.
We now have the 'fast-variable-shuffle' option for hardware that prefers combining 2 or more shuffles to VPSHUFB etc.
Differential Revision: https://reviews.llvm.org/D38318
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321553
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Dmitry Preobrazhensky [Fri, 29 Dec 2017 13:55:11 +0000 (13:55 +0000)]
[AMDGPU][MC] Incorrect parsing of flat/global atomic modifiers
See bug 35730: https://bugs.llvm.org/show_bug.cgi?id=35730
Differential Revision: https://reviews.llvm.org/D41598
Reviewers: vpykhtin, artem.tamazov, arsenm
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321552
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Nemanja Ivanovic [Fri, 29 Dec 2017 12:22:27 +0000 (12:22 +0000)]
[PowerPC] Fix for PR35688 - handle out-of-range values for r+r to r+i conversion
Revision 320791 introduced a pass that transforms reg+reg instructions to
reg+imm if they're fed by "load immediate". However, it didn't
handle out-of-range shifts correctly as reported in PR35688.
This patch fixes that and therefore the PR.
Furthermore, there was undefined behaviour in the patch where the RHS of an
initialization expression was 32 bits and constant `1` was shifted left 32
bits. This was fixed by ensuring the RHS is 64 bits just like the LHS.
Differential Revision: https://reviews.llvm.org/D41369
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321551
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Max Kazantsev [Fri, 29 Dec 2017 08:44:32 +0000 (08:44 +0000)]
[SCEV] Missing depth propagation in recursive call
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321550
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Andrew V. Tischenko [Fri, 29 Dec 2017 08:31:01 +0000 (08:31 +0000)]
Fix incorrect operand sizes for some MMX instructions: punpcklwd, punpcklbw and punpckldq.
Differential Revision: https://reviews.llvm.org/D41595
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321549
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Fedor Sergeev [Fri, 29 Dec 2017 08:16:06 +0000 (08:16 +0000)]
[PM] pass -debug-pass-manager flag into FunctionToLoopPassAdaptor's canonicalization PM
Summary:
New pass manager driver passes DebugPM (-debug-pass-manager) flag into
individual PassManager constructors in order to enable debug logging.
FunctionToLoopPassAdaptor has its own internal LoopCanonicalizationPM
which never gets its debug logging enabled and that means canonicalization
passes like LoopSimplify are never present in -debug-pass-manager output.
Extending FunctionToLoopPassAdaptor's constructor and
createFunctionToLoopPassAdaptor wrapper with an optional
boolean DebugLogging argument.
Passing debug-logging flags there as appropriate.
Reviewers: chandlerc, davide
Reviewed By: davide
Subscribers: mehdi_amini, eraman, llvm-commits, JDevlieghere
Differential Revision: https://reviews.llvm.org/D41586
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321548
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Dimitry Andric [Thu, 28 Dec 2017 23:42:44 +0000 (23:42 +0000)]
Avoid modifying DbgInfo while looping in salvageDebuginfo
Summary:
I have been getting rather difficult to reproduce SIGBUS crashes when
compiling certain FreeBSD sources, and their stack traces pointed
squarely at `SelectionDAG::salvageDebugInfo()`:
```
Core was generated by `/usr/obj/share/dim/src/freebsd/clang600-import/amd64.amd64/tmp/usr/bin/cc -cc1 -'.
Program terminated with signal SIGBUS, Bus error.
#0 isInvalidated () at /share/dim/src/freebsd/clang600-import/contrib/llvm/lib/CodeGen/SelectionDAG/SDNodeDbgValue.h:115
115 bool isInvalidated() const { return Invalid; }
(gdb) bt
#0 isInvalidated () at /share/dim/src/freebsd/clang600-import/contrib/llvm/lib/CodeGen/SelectionDAG/SDNodeDbgValue.h:115
#1 salvageDebugInfo () at /share/dim/src/freebsd/clang600-import/contrib/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp:7116
#2 0x00000000033b2516 in operator() () at /share/dim/src/freebsd/clang600-import/contrib/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:3595
#3 __invoke<(lambda at /share/dim/src/freebsd/clang600-import/contrib/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:3593:59) &, llvm::SDNode *, llvm::SDNode *> () at /usr/include/c++/v1/type_traits:4323
#4 __call<(lambda at /share/dim/src/freebsd/clang600-import/contrib/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:3593:59) &, llvm::SDNode *, llvm::SDNode *> () at /usr/include/c++/v1/__functional_base:349
#5 operator() () at /usr/include/c++/v1/functional:1562
#6 0x00000000033b0817 in operator() () at /usr/include/c++/v1/functional:1916
#7 NodeDeleted () at /share/dim/src/freebsd/clang600-import/contrib/llvm/include/llvm/CodeGen/SelectionDAG.h:293
#8 0x0000000003529dde in RemoveDeadNodes () at /share/dim/src/freebsd/clang600-import/contrib/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp:610
#9 0x00000000035556df in MorphNodeTo () at /share/dim/src/freebsd/clang600-import/contrib/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp:6794
#10 0x00000000033a9acc in MorphNode () at /share/dim/src/freebsd/clang600-import/contrib/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:2594
#11 0x00000000033ac80b in SelectCodeCommon () at /share/dim/src/freebsd/clang600-import/contrib/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:3601
#12 0x00000000023d464b in SelectCode () at /usr/obj/share/dim/src/freebsd/clang600-import/amd64.amd64/tmp/obj-tools/lib/clang/libllvm/X86GenDAGISel.inc:282902
#13 Select () at /share/dim/src/freebsd/clang600-import/contrib/llvm/lib/Target/X86/X86ISelDAGToDAG.cpp:3072
#14 0x00000000033a5afa in DoInstructionSelection () at /share/dim/src/freebsd/clang600-import/contrib/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:988
#15 0x00000000033a4e1a in CodeGenAndEmitDAG () at /share/dim/src/freebsd/clang600-import/contrib/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:868
#16 0x00000000033a2643 in SelectAllBasicBlocks () at /share/dim/src/freebsd/clang600-import/contrib/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1624
#17 0x000000000339f158 in runOnMachineFunction () at /share/dim/src/freebsd/clang600-import/contrib/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:466
#18 0x00000000023d03c4 in runOnMachineFunction () at /share/dim/src/freebsd/clang600-import/contrib/llvm/lib/Target/X86/X86ISelDAGToDAG.cpp:175
#19 0x00000000035cc8c2 in runOnFunction () at /share/dim/src/freebsd/clang600-import/contrib/llvm/lib/CodeGen/MachineFunctionPass.cpp:62
#20 0x00000000030dca9a in runOnFunction () at /share/dim/src/freebsd/clang600-import/contrib/llvm/lib/IR/LegacyPassManager.cpp:1520
#21 0x00000000030dccf3 in runOnModule () at /share/dim/src/freebsd/clang600-import/contrib/llvm/lib/IR/LegacyPassManager.cpp:1541
#22 0x00000000030dd228 in runOnModule () at /share/dim/src/freebsd/clang600-import/contrib/llvm/lib/IR/LegacyPassManager.cpp:1597
#23 run () at /share/dim/src/freebsd/clang600-import/contrib/llvm/lib/IR/LegacyPassManager.cpp:1700
#24 0x00000000014db578 in EmitAssembly () at /share/dim/src/freebsd/clang600-import/contrib/llvm/tools/clang/lib/CodeGen/BackendUtil.cpp:815
#25 EmitBackendOutput () at /share/dim/src/freebsd/clang600-import/contrib/llvm/tools/clang/lib/CodeGen/BackendUtil.cpp:1181
#26 0x00000000014d5b26 in HandleTranslationUnit () at /share/dim/src/freebsd/clang600-import/contrib/llvm/tools/clang/lib/CodeGen/CodeGenAction.cpp:292
#27 0x0000000001c4c332 in ParseAST () at /share/dim/src/freebsd/clang600-import/contrib/llvm/tools/clang/lib/Parse/ParseAST.cpp:159
#28 0x00000000015d546c in Execute () at /share/dim/src/freebsd/clang600-import/contrib/llvm/tools/clang/lib/Frontend/FrontendAction.cpp:897
#29 0x0000000001cec311 in ExecuteAction () at /share/dim/src/freebsd/clang600-import/contrib/llvm/tools/clang/lib/Frontend/CompilerInstance.cpp:991
#30 0x00000000014b4f81 in ExecuteCompilerInvocation () at /share/dim/src/freebsd/clang600-import/contrib/llvm/tools/clang/lib/FrontendTool/ExecuteCompilerInvocation.cpp:252
#31 0x00000000014aa73f in cc1_main () at /share/dim/src/freebsd/clang600-import/contrib/llvm/tools/clang/tools/driver/cc1_main.cpp:221
#32 0x00000000014b2928 in ExecuteCC1Tool () at /share/dim/src/freebsd/clang600-import/contrib/llvm/tools/clang/tools/driver/driver.cpp:309
#33 main () at /share/dim/src/freebsd/clang600-import/contrib/llvm/tools/clang/tools/driver/driver.cpp:388
(gdb) frame 1
#1 salvageDebugInfo () at /share/dim/src/freebsd/clang600-import/contrib/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp:7116
7116 if (DV->isInvalidated())
(gdb) disassemble
Dump of assembler code for function salvageDebugInfo():
[...]
0x0000000003557348 <+744>: nopl 0x0(%rax,%rax,1)
0x0000000003557350 <+752>: mov (%r12),%r13
=> 0x0000000003557354 <+756>: cmpb $0x0,0x31(%r13)
0x0000000003557359 <+761>: jne 0x35573b0 <salvageDebugInfo()+848>
(gdb) info registers
[...]
r13 0x5a5a5a5a5a5a5a5a
6510615555426900570
```
The `0x5a5a5a5a5a5a5a5a` value in `r13` indicates the memory was either
uninitialized, or already freed.
Unfortunately I do not have a simple self-contained test case for this.
However, it seems pretty clear that the call to `AddDbgValue()` in
`salvageDebugInfo()` causes the problems, since it modifies
`SelectionDag::DbgInfo` while looping through one of its DenseMaps:
```
void SelectionDAG::salvageDebugInfo(SDNode &N) {
[...]
for (auto DV : GetDbgValues(&N)) {
if (DV->isInvalidated())
continue;
[...]
AddDbgValue(Clone, N0.getNode(), false);
[...]
}
}
```
At least, if I comment out the `AddDbgValue()` call, the crashes go
away. I propose to change this function slightly, similar to the
`SelectionDAG::transferDbgValues()` function just above it, to save the
cloned SDDbgValues in a separate SmallVector, and only call
AddDbgValue() on them after the for loop is done.
Reviewers: aprantl, bogner, bkramer, davide
Reviewed By: davide
Subscribers: davide, krytarowski, JDevlieghere, emaste, llvm-commits
Differential Revision: https://reviews.llvm.org/D41589
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321545
91177308-0d34-0410-b5e6-
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Sanjay Patel [Thu, 28 Dec 2017 22:07:47 +0000 (22:07 +0000)]
[x86] add tests for potential memcmp expansion (PR33325); NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321542
91177308-0d34-0410-b5e6-
96231b3b80d8
Benjamin Kramer [Thu, 28 Dec 2017 21:36:10 +0000 (21:36 +0000)]
Unbreak test relying on debug output after r321540.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321541
91177308-0d34-0410-b5e6-
96231b3b80d8
Craig Topper [Thu, 28 Dec 2017 19:46:16 +0000 (19:46 +0000)]
[SelectionDAG] Add creating new node debug messages for load, store, gather, and scatter.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321540
91177308-0d34-0410-b5e6-
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Craig Topper [Thu, 28 Dec 2017 19:46:14 +0000 (19:46 +0000)]
[KnownBits] Remove asserts from KnownBits::makeNegative/makeNonNegative
Many of the callers don't guarantee there is no conflict before calling these and instead check for conflicts later.
The makeNegative/makeNonNegative methods replaced Known.One.setSignBit() and Known.Zero.setSignBit() calls that didn't have asserts originally. So removing the asserts is no worse than the original code.
Fixes PR35769
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321539
91177308-0d34-0410-b5e6-
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Craig Topper [Thu, 28 Dec 2017 19:46:11 +0000 (19:46 +0000)]
[X86] When lowering extending loads from v2i1/v4i1, if we have VLX, use a narrower extend.
Previously we used an extend from v8i1 to v8i32/v8i64. Then extracted to the final width. But if we have VLX we should extract first. This way we don't end up with an overly large extend.
This allows us to use vcmpeq to make all ones for the sign extend when DQI isn't available. Otherwise we get a VPTERNLOG.
If we make v2i1/v4i1 legal like proposed in D41560, we could always do this and rely on the lowering of the extend to widen when necessary.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321538
91177308-0d34-0410-b5e6-
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Craig Topper [Thu, 28 Dec 2017 19:46:06 +0000 (19:46 +0000)]
[X86] Use ISD::CONCAT_VECTORS when splitting 256-bit loads in combineLoad.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321537
91177308-0d34-0410-b5e6-
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Craig Topper [Thu, 28 Dec 2017 19:46:03 +0000 (19:46 +0000)]
[X86] Fix inconsistencies in different places where we split loads/stores.
-Use MinAlign instead of std::min.
-Use SelectionDAG::getMemBasePlusOffset.
-Apply offset to the pointer info for the second load/store created.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321536
91177308-0d34-0410-b5e6-
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Craig Topper [Thu, 28 Dec 2017 19:46:01 +0000 (19:46 +0000)]
[SelectionDAG] Add some debug print messages to LegalizeVectorOps.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321535
91177308-0d34-0410-b5e6-
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Craig Topper [Thu, 28 Dec 2017 19:45:58 +0000 (19:45 +0000)]
[X86] Emit ISD::TRUNCATE instead of X86ISD::VTRUNC from LowerZERO_EXTEND_Mask/LowerSIGN_EXTEND_Mask.
The truncate will be lowered X86ISD::VTRUNC later.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321534
91177308-0d34-0410-b5e6-
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Craig Topper [Thu, 28 Dec 2017 19:45:55 +0000 (19:45 +0000)]
[X86] Remove unnecessary patterns for sign extending vXi1 without VLX.
The custom lowering already widens the result type to 512-bits if VLX isn't supported.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321533
91177308-0d34-0410-b5e6-
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Reid Kleckner [Thu, 28 Dec 2017 18:41:31 +0000 (18:41 +0000)]
[WinEH] Don't emit state stores or EH thunks for available_externally functions
The exception handler thunk needs to reference the LSDA of the parent
function, which won't be emitted if it's available_externally.
Fixes PR35736. ThinLTO ends up producing available_externally functions
that use _CxxFrameHandler3.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321532
91177308-0d34-0410-b5e6-
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Benjamin Kramer [Thu, 28 Dec 2017 18:31:19 +0000 (18:31 +0000)]
[LTO] Simplify code. No functionality change intended.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321531
91177308-0d34-0410-b5e6-
96231b3b80d8
Benjamin Kramer [Thu, 28 Dec 2017 18:10:41 +0000 (18:10 +0000)]
Remove superfluous copies in sample profiling.
No functionliaty change intended.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321530
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Guozhi Wei [Thu, 28 Dec 2017 17:02:34 +0000 (17:02 +0000)]
Revert r321377, it causes regression to https://reviews.llvm.org/P8055.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321528
91177308-0d34-0410-b5e6-
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Benjamin Kramer [Thu, 28 Dec 2017 17:00:37 +0000 (17:00 +0000)]
Fix tests after move to utohexstr.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321527
91177308-0d34-0410-b5e6-
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Benjamin Kramer [Thu, 28 Dec 2017 16:58:54 +0000 (16:58 +0000)]
Avoid int to string conversion in Twine or raw_ostream contexts.
Some output changes from uppercase hex to lowercase hex, no other functionality change intended.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321526
91177308-0d34-0410-b5e6-
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Gadi Haber [Thu, 28 Dec 2017 15:00:41 +0000 (15:00 +0000)]
[X86][PREFETCH]: Adding full coverage of MC encoding for the PREFETCH isa sets.<NFC>
NFC.
Adding MC regressions tests to cover the PREFETCH isa sets for both 32 and 64 bit.
This patch is part of a larger task to cover MC encoding of all X86 ISA Sets started in revision: https://reviews.llvm.org/D39952
Reviewers: zvi, craig.topper, RKSimon, AndreiGrischenko
Differential Revision: https://reviews.llvm.org/D41161
Change-Id: Icdc8c5fb68c414de7d2cfdb50da1cc6763d9932a
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321524
91177308-0d34-0410-b5e6-
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Jonas Devlieghere [Thu, 28 Dec 2017 14:05:49 +0000 (14:05 +0000)]
[dsymutil][NFC] Replace calls to CoreFoundation with LLVM equivalent.
This patch replaces a block of logic that was implemented using
CoreFoundations calls with functionally equivalent logic that makes use
of LLVM libraries.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321522
91177308-0d34-0410-b5e6-
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Max Kazantsev [Thu, 28 Dec 2017 12:03:12 +0000 (12:03 +0000)]
[RewriteStatepoints] Fix incorrect assertion
`RewriteStatepointsForGC` iterates over function blocks and their predecessors
in order of declaration. One of outcomes of this is that callsites are placed in
arbitrary order which has nothing to do with travelsar order.
On the other hand, function `recomputeLiveInValues` asserts that bases are
added to `Info.PointerToBase` before their deried pointers are updated. But
if call sites are processed in order different from RPOT, this is not necessarily
true. We cannot guarantee that the base was placed there before every
pointer derived from it. All we can guarantee is that this base was marked as
known base by this point.
This patch replaces the fact that we assert from checking that the base was
added to the map with assert that the base was marked as known base.
Differential Revision: https://reviews.llvm.org/D41593
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321517
91177308-0d34-0410-b5e6-
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Simon Pilgrim [Thu, 28 Dec 2017 10:05:49 +0000 (10:05 +0000)]
[X86][SSE] Use PMADDWD for v4i32 multiplies with 17 or more leading zeros
If there are 17 or more leading zeros to the v4i32 elements, then we can use PMADD for the integer multiply when PMULLD is unavailable or slow.
The 17 bits need to be zero as the PMADDWD performs a v8i16 signed-mul-extend + pairwise-add - the upper 16 so we're adding a zero pair and the 17th bit so we don't incorrectly sign extend.
Differential Revision: https://reviews.llvm.org/D41484
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321516
91177308-0d34-0410-b5e6-
96231b3b80d8
Simon Pilgrim [Thu, 28 Dec 2017 09:35:35 +0000 (09:35 +0000)]
[InstCombine] Check for isa<Instruction> before using cast<>
Protects against casts from constexpr etc.
Reduced from oss-fuzz #4788 test case
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321515
91177308-0d34-0410-b5e6-
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Reid Kleckner [Thu, 28 Dec 2017 05:10:33 +0000 (05:10 +0000)]
Revert "[memcpyopt] Teach memcpyopt to optimize across basic blocks"
This reverts r321138. It seems there are still underlying issues with
memdep. PR35519 seems to still be present if debug info is enabled. We
end up losing a memcpy. Somehow during store to memset merging, we
insert the memset after the memcpy or fail to update the memdep analysis
to account for the newly inserted memset of a pair.
Reduced test case:
#include <assert.h>
#include <stdio.h>
#include <string>
#include <utility>
#include <vector>
void do_push_back(
std::vector<std::pair<std::string, std::vector<std::string>>>* crls) {
crls->push_back(std::make_pair(std::string(), std::vector<std::string>()));
}
int __attribute__((optnone)) main() {
// Put some data in the vector and then remove it so we take the push_back
// fast path.
std::vector<std::pair<std::string, std::vector<std::string>>> crl_set;
crl_set.push_back({"asdf", {}});
crl_set.pop_back();
printf("first word in vector storage: %p\n", *(void**)crl_set.data());
// Do the push_back which may fail to initialize the data.
do_push_back(&crl_set);
auto* first = &crl_set.back().first;
printf("first word in vector storage (should be zero): %p\n",
*(void**)crl_set.data());
assert(first->empty());
puts("ok");
}
Compile with libc++, enable optimizations, and enable debug info:
$ clang++ -stdlib=libc++ -g -O2 t.cpp -o t.exe -Wl,-rpath=llvm/build/lib
This program will assert with this change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321510
91177308-0d34-0410-b5e6-
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Andrew Wilkins [Thu, 28 Dec 2017 04:10:09 +0000 (04:10 +0000)]
[bindings/go] fix vet errors
Fix "go vet" errors, which will be
run automatically with "go test" as
of Go 1.10.
Patch by Karsten Weiss!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321509
91177308-0d34-0410-b5e6-
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Matt Arsenault [Thu, 28 Dec 2017 00:26:14 +0000 (00:26 +0000)]
AMDGPU: Add MMO to atomic_inc/dec
This doesn't really change anything because these
already had custom node wrappers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321508
91177308-0d34-0410-b5e6-
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Craig Topper [Wed, 27 Dec 2017 22:04:04 +0000 (22:04 +0000)]
[X86] Add CLWB to icelake.
Per Table 1-1 in October 2017 edition of Intel® Architecture Instruction Set Extensions and Future Features
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321501
91177308-0d34-0410-b5e6-
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Sanjay Patel [Wed, 27 Dec 2017 21:55:06 +0000 (21:55 +0000)]
[InstCombine] add tests for min/max folds (PR35717); NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321500
91177308-0d34-0410-b5e6-
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Petr Hosek [Wed, 27 Dec 2017 19:59:56 +0000 (19:59 +0000)]
[llvm-readobj] Support -needed-libs option for COFF files
This implements the -needed-libs option in the COFF dumper.
Differential Revision: https://reviews.llvm.org/D41529
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321498
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Andrew V. Tischenko [Wed, 27 Dec 2017 19:25:21 +0000 (19:25 +0000)]
A special test to demonstrate debug logging for asm matcher.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321497
91177308-0d34-0410-b5e6-
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Craig Topper [Wed, 27 Dec 2017 19:09:40 +0000 (19:09 +0000)]
[X86] Reimplement r321437 using custom lowering instead of as a DAG combine.
My original implementation ran as a DAG combine post type legalization, but it turns out we don't run that DAG combine step if type legalization didn't change anything. Attempts to make the combine run before type legalization as well hit other issues.
So just do it in LowerMUL where we can catch more cases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321496
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Matthew Simpson [Wed, 27 Dec 2017 15:25:01 +0000 (15:25 +0000)]
[AArch64] Change order of candidate FMLS patterns
r319980 added new patterns to the machine combiner for transforming (fsub (fmul
x y) z) into (fmla (fneg z) x y). That is, fsub's where the first source
operand is an fmul are transformed. We previously only matched the case where
the second source operand of an fsub was an fmul, transforming (fsub z (fmul x
y)) into (fmls z x y). Now, if we have an fsub where both source operands are
fmuls, both of the above patterns are applicable.
However, the order in which we add the patterns to the list of candidates
determines the transformation that takes place, since only the first pattern
that matches will be used. This patch changes the order these two patterns are
added to the list of candidates such that we prefer the case where the second
source operand is an fmul (the fmls case), rather than the other one (the
fmla/fneg case). When both source operands are fmuls, this ordering results in
fewer instructions.
Differential Revision: https://reviews.llvm.org/D41587
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321491
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Benjamin Kramer [Wed, 27 Dec 2017 13:31:50 +0000 (13:31 +0000)]
[X86] Fix vmul combine for AVX1 targets.
v8i32 is legal von AVX1, but it doesn't have pmuludq for it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321490
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Simon Pilgrim [Wed, 27 Dec 2017 12:00:18 +0000 (12:00 +0000)]
[InstCombine] Gracefully handle out of range extractelement indices
InstSimplify is responsible for handling these, but we shouldn't just assert here.
Reduced from oss-fuzz #4808 test case
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321489
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Simon Pilgrim [Wed, 27 Dec 2017 11:36:18 +0000 (11:36 +0000)]
[DAGCombine] foldBinOpIntoSelect can fail to constant fold in some cases.
For example, float operations may fail to constant fold under certain circumstances (inf/nan/denormal creation etc.)
Reduced from oss-fuzz #4802 test case
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321488
91177308-0d34-0410-b5e6-
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Rui Ueyama [Wed, 27 Dec 2017 08:59:52 +0000 (08:59 +0000)]
Improve performance TokenizeWindowsCommandLine
Patcy by Takuto Ikuta.
This patch reduces lld link time of chromium's blink_core.dll in
component build.
Total size of input argument in .directives become nearly 300MB in the
build and calling many strchr and assert becomes bottleneck.
On my desktop machine, 4 times stats of the link time are like below.
Improved around 10%.
This patch
TotalSeconds : 13.
4918885
TotalSeconds : 13.
9474257
TotalSeconds : 13.
4941082
TotalSeconds : 13.
6077962
Avg : 13.
63530465
master
TotalSeconds : 15.
6938531
TotalSeconds : 15.
7022508
TotalSeconds : 15.
9567202
TotalSeconds : 14.
5851505
Avg : 15.
48449365
Differential Revision: https://reviews.llvm.org/D41590
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321479
91177308-0d34-0410-b5e6-
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Mikael Holmen [Wed, 27 Dec 2017 08:48:33 +0000 (08:48 +0000)]
[Lint] Don't warn about noalias argument aliasing if other argument is byval
Summary:
When using byval, the data is effectively copied as part of the call
anyway, so we aren't actually passing the pointer and thus there is no
reason to issue a warning.
Reviewers: rnk
Reviewed By: rnk
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D40118
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321478
91177308-0d34-0410-b5e6-
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Gadi Haber [Wed, 27 Dec 2017 08:35:57 +0000 (08:35 +0000)]
[X86][RD]: Adding full coverage of MC encoding for RD isa sets.<NFC>
NFC.
Adding MC regressions tests to cover RDPMC, RDRAND, RDRAND, RDSEED, RDTSCP, DWRFSGS isa sets.
This patch is part of a larger task to cover MC encoding of all X86 isa sets started in revision: https://reviews.llvm.org/D39952
Reviewers: zvi, craig.topper, RKSimon, AndreiGrischenk
Differential Revision: https://reviews.llvm.org/D41328
Change-Id: Ie97b397546e6b1ed180c6abd7b41fccb136d2b82
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321476
91177308-0d34-0410-b5e6-
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Serguei Katkov [Wed, 27 Dec 2017 08:26:22 +0000 (08:26 +0000)]
[SCEV] Be careful with nuw/nsw/exact in InsertBinop
InsertBinop tries to find an appropriate instruction instead of
creating a new instruction. When it checks whether instruction is
the same as we need to create it ignores nuw/nsw/exact flags.
It leads to invalid behavior when poison instruction can be used
when it was not expected. Specifically, for example Expander
expands the SCEV built for instruction
%a = add i32 %v, 1
It is possible that InsertBinop can find an instruction
% b = add nuw nsw i32 %v, 1
and will use it instead of version w/o nuw nsw.
It is incorrect.
The patch conservatively ignores all instructions with any of
poison flags installed.
Reviewers: sanjoy, mkazantsev, sebpop, jbhateja
Reviewed By: sanjoy
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D41576
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321475
91177308-0d34-0410-b5e6-
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Serguei Katkov [Wed, 27 Dec 2017 07:15:23 +0000 (07:15 +0000)]
[SCEV] Do not insert if it is already in cache
This is fix for the crash caused by ScalarEvolution::getTruncateExpr.
It expects that if it checked the condition that SCEV is not in UniqueSCEVs cache in
the beginning that it will not be there inside this method.
However during recursion and transformation/simplification for sub expression,
it is possible that these modifications will end up with the same SCEV as we started from.
So we must always check whether SCEV is in cache and do not insert item if it is already there.
Reviewers: sanjoy, mkazantsev, craig.topper
Reviewed By: sanjoy
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D41380
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321472
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Philip Reames [Wed, 27 Dec 2017 01:30:12 +0000 (01:30 +0000)]
[instcombine] add powi(x, 2) -> x * x
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321468
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Philip Reames [Wed, 27 Dec 2017 01:14:30 +0000 (01:14 +0000)]
Sink a couple of transforms from instcombine into instsimplify.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321467
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Philip Reames [Wed, 27 Dec 2017 00:16:12 +0000 (00:16 +0000)]
[NFC] Extract out a helper function for SimplifyCall(CS, Q)
This simplifies code, but the real motivation is that it lets me clean up some downstream code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321466
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Zhaoshi Zheng [Tue, 26 Dec 2017 23:31:21 +0000 (23:31 +0000)]
[Unroll][DebugInfo] Propagate loop body's debug location to epilog preheader
NewExit and epilog PreHeader should has the same debug loc as the original loop
body, instead of original loop exit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321465
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Simon Pilgrim [Tue, 26 Dec 2017 23:27:44 +0000 (23:27 +0000)]
[DAGCombine] visitANDLike - ensure APInt is is in range for getSExtValue/getZExtValue
Reduced from oss-fuzz #4782 test case
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321464
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Craig Topper [Tue, 26 Dec 2017 22:22:58 +0000 (22:22 +0000)]
[X86] Return SDValue(N, 0) instead of an SDValue() after a successful combine.
Returning SDValue() means nothing changed, SDValue(N,0) means there was a change but the worklist management was taken care of.
I don't know if this has a real effect other than making sure the combine counter in the DAG combiner gets updated, but it is the correct thing to do.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321463
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Craig Topper [Tue, 26 Dec 2017 22:22:57 +0000 (22:22 +0000)]
[X86] Regenerate test using update_llc_test_checks.py.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321462
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Sanjay Patel [Tue, 26 Dec 2017 22:12:20 +0000 (22:12 +0000)]
[InstCombine] fix miscompile of frem with 0.0 operand (PR34870)
We might want to select NAN here or do this transform with fast-math,
but this should at least fix the miscompile.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321461
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Sanjay Patel [Tue, 26 Dec 2017 22:06:57 +0000 (22:06 +0000)]
[InstCombine] add test for frem with 0.0 (PR34870); NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321460
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Andrew V. Tischenko [Tue, 26 Dec 2017 18:29:52 +0000 (18:29 +0000)]
It's a fix for Bug 35741 - can't use comments after x86 prefixes.
Differential Revision: https://reviews.llvm.org/D41579
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321459
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Sanjay Patel [Tue, 26 Dec 2017 15:09:19 +0000 (15:09 +0000)]
[ValueTracking] ignore FP signed-zero when detecting a casted-to-integer fmin/fmax pattern
This is a preliminary step for the patch discussed in D41136 (and denoted here with the FIXME comment).
When we match an FP min/max that is cast to integer, any intermediate difference between +0.0 or -0.0
should be muted in the result by the conversion (either fptosi or fptoui) of the result. Thus, we can
enable 'nsz' for the purpose of matching fmin/fmax.
Note that there's probably room to generalize this more, possibly by fixing the current calls to the
weak version of isKnownNonZero() in matchSelectPattern() to the more powerful recursive version.
Differential Revision: https://reviews.llvm.org/D41333
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321456
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Simon Pilgrim [Tue, 26 Dec 2017 14:48:28 +0000 (14:48 +0000)]
[DAGCombine] Don't combine (and (setne X, 0), (setne X, -1)) --> (setuge (add X, 1), 2) for i1
Reduced from oss-fuzz #4773 test case
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321455
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Simon Pilgrim [Tue, 26 Dec 2017 11:42:39 +0000 (11:42 +0000)]
[InstSimplify] Check for in range extraction index before calling APInt::getZExtValue()
Reduced from oss-fuzz #4768 test case
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321454
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Craig Topper [Tue, 26 Dec 2017 05:43:05 +0000 (05:43 +0000)]
[X86] Pass itins.rr/itins.rm through properly for some instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321452
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Craig Topper [Tue, 26 Dec 2017 05:43:04 +0000 (05:43 +0000)]
[X86] Use SSE_INTMUL_ITINS_P for the AVX-512 MUL instructions to match their SSE/AVX counterparts.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321451
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