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Arnd Bergmann [Fri, 22 May 2015 15:17:17 +0000 (17:17 +0200)]
Merge tag 'at91-dt3' of git://git./linux/kernel/git/nferre/linux-at91 into next/dt
Merge "Third batch of DT changes for 4.2" from Nicolas Ferre:
- USB host clock refine following changes in drivers
- one little fix for usart pinctrl
* tag 'at91-dt3' of git://git.kernel.org/pub/scm/linux/kernel/git/nferre/linux-at91:
ARM: at91/dt: remove useless usb clock
ARM: at91/dt: remove useless uhpck clock references from ehci defintions
USB: atmel: update DT bindings documentation
ARM: at91/dt: at91sam9x5: fix usart1 sck pin definition
Arnd Bergmann [Fri, 22 May 2015 15:16:20 +0000 (17:16 +0200)]
Merge tag 'v4.2-rockchip-dts2' of git://git./linux/kernel/git/mmind/linux-rockchip into next/dt
Merge "ARM: rockchip: dts relicensing for 4.2" from Heiko Stuebner:
Relicense all Rockchip-related devicetree files to the GPL2/X11 combo.
I've now finally aquired necessary Acks from all contributors.
* tag 'v4.2-rockchip-dts2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
ARM: dts: rockchip: relicense rk3288-evb* under GPLv2/X11
ARM: dts: rockchip: relicense rk3288.dtsi under GPLv2/X11
ARM: dts: rockchip: relicense rk3188-radxarock.dts under GPLv2/X11
ARM: dts: rockchip: relicense rk3066a-bqcurie2.dts under GPLv2/X11
ARM: dts: rockchip: relicense rk3288-thermal.dtsi under GPLv2/X11
ARM: dts: rockchip: relicense rk3188.dtsi under GPLv2/X11
ARM: dts: rockchip: relicense rk3066a.dtsi under GPLv2/X11
ARM: dts: rockchip: relicense rk3xxx.dtsi under GPLv2/X11
Boris Brezillon [Tue, 17 Mar 2015 16:15:50 +0000 (17:15 +0100)]
ARM: at91/dt: remove useless usb clock
The ohci driver now calls clk_set_rate on the uhpck clock (which forwards
set_rate requests to its parent: the usb clock).
Remove useless references to usb clocks from ohci definitions.
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Boris Brezillon [Tue, 17 Mar 2015 16:15:49 +0000 (17:15 +0100)]
ARM: at91/dt: remove useless uhpck clock references from ehci defintions
The uhpck is useless for High-Speed communications, remove the reference
to this clock in all ehci definitions.
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Boris Brezillon [Tue, 17 Mar 2015 16:15:48 +0000 (17:15 +0100)]
USB: atmel: update DT bindings documentation
Add documentation for the missing clocks, clock-names, reg and interrupts
properties.
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Stefan Agner [Tue, 19 May 2015 22:05:18 +0000 (00:05 +0200)]
ARM: dts: add support for Vybrid running on Cortex-M4
This adds an initial device tree to run Linux on the Cortex-M4 on
the Vybrid based Colibri VF61 module.
Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Wed, 20 May 2015 21:03:25 +0000 (23:03 +0200)]
Merge tag 'berlin-dt-4.2-1' of git://git.infradead.org/users/hesselba/linux-berlin into next/dt
Merge "Berlin DT changes for v4.2" from Sebastian Hesselbarth:
- GPLv2/X11 dual licensing
- Mark Berlin DT bindings as unstable
- Updated binding documentation for reworked
chip/system ctrl nodes
* tag 'berlin-dt-4.2-1' of git://git.infradead.org/users/hesselba/linux-berlin:
Documentation: bindings: update the berlin chip and system ctrl doc
Documentation: bindings: move the Berlin clock documentation
Documentation: bindings: move the Berlin pinctrl documentation
Documentation: bindings: move the Berlin reset documentation
Documentation: bindings: update the Berlin controllers documentation
Documentation: bindings: berlin: consider our dt bindings as unstable
ARM: dts: berlin: relicense the BG2CD Google Chromecast dts under GPLv2/X11
ARM: dts: berlin: relicense the berlin2cd dtsi under GPLv2/X11
ARM: dts: berlin: relicense the BG2 Sony NSZ-GS7 dts under GPLv2/X11
ARM: dts: berlin: relicense the berlin2 dtsi under GPLv2/X11
ARM: dts: berlin: relicense the BG2Q Marvell DMP dts under GPLv2/X11
ARM: dts: berlin: relicense the berlin2q dtsi under GPLv2/X11
Arnd Bergmann [Wed, 20 May 2015 15:38:02 +0000 (17:38 +0200)]
Merge tag 'at91-dt2' of git://git./linux/kernel/git/nferre/linux-at91 into next/dt
Merge "Second batch of DT changes for 4.2:" from Nicolas Ferre:
- sama5d4: more peripherals: usarts, uarts, spi, pioD access
- sama5d3: phy address for gmac
- change NFC register map
- regulator additions for the sd/mmc
* tag 'at91-dt2' of git://git.kernel.org/pub/scm/linux/kernel/git/nferre/linux-at91:
ARM: at91/dt: sama5d4 xplained: add regulators for v(q)mmc1 supplies
ARM: at91/dt: sama5d3 xplained: add fixed regulator for vmmc0
ARM: at91/dt: sama5d3 xplained: add mmc0 vqmmc entry
ARM: at91/dt: sama5d3 xplained: fill in mmc1 and set it to disabled
ARM: at91/dt: sama5: reduce the NFC command register map
ARM: at91/dt: sama5d4: update pinctrl ranges
ARM: at91/dt: sama5d3 xplained: add phy address for macb0
ARM: at91/dt: sama5d4 xplained: add spi1 on j14 connector
ARM: at91/dt: sama5d4: add spi1, spi2 dt nodes
ARM: at91/dt: sama5d4: add uart0, uart1 dt nodes
ARM: at91/dt: sama5d4: add usart0, usart1 dt nodes
Nicolas Ferre [Wed, 20 May 2015 12:31:49 +0000 (14:31 +0200)]
ARM: at91/dt: at91sam9x5: fix usart1 sck pin definition
SCK1 pin is pioC 29. Comment was okay.
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Ludovic Desroches [Mon, 27 Apr 2015 13:27:52 +0000 (15:27 +0200)]
ARM: at91/dt: sama5d4 xplained: add regulators for v(q)mmc1 supplies
Add vcc_mmc1 fixed regulator to remove the 'no vmmc regulator found' warning
when probing the mmc1 device.
Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Ben Dooks [Mon, 27 Apr 2015 13:19:12 +0000 (15:19 +0200)]
ARM: at91/dt: sama5d3 xplained: add fixed regulator for vmmc0
Add fixed regulator for vmmc0 and attach the vmmc for it to the mmc0
node on the SAM5D3 Xplained board. This will remove the following
warning from the kernel:
atmel_mci
f0000000.mmc: No vmmc regulator found
Note, atmel_defconfig will need fixed regulator support enabled if this
is to be used properly.
Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
[use a fixed regulator instead of gpio one]
Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Ben Dooks [Mon, 27 Apr 2015 13:19:11 +0000 (15:19 +0200)]
ARM: at91/dt: sama5d3 xplained: add mmc0 vqmmc entry
The SAM5D3 Xplained device tree is missing the vqmmc node which is
tied to 3.3V on the board. Add this to avoid the kernel warning that
there is no vqmmc node.
atmel_mci
f0000000.mmc: No vqmmc regulator found
Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Ben Dooks [Mon, 27 Apr 2015 13:19:10 +0000 (15:19 +0200)]
ARM: at91/dt: sama5d3 xplained: fill in mmc1 and set it to disabled
The mmc1 channel is not populated on the SAM5D3 Xplained board, however
it is enabled and therefore the driver is attaching to it.
The node configuration for mmc1 is missing, so add an mmc1 node in the
device tree and set its status to disabled. Also add the vmmc and the
necessary slot configuration if this node were enabled to avoid the following
warnings from the driver:
atmel_mci
f8000000.mmc: No vmmc regulator found
atmel_mci
f8000000.mmc: No vqmmc regulator found
Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Josh Wu [Thu, 2 Apr 2015 06:17:56 +0000 (14:17 +0800)]
ARM: at91/dt: sama5: reduce the NFC command register map
commit
111573ccd89b ("mtd: atmel_nand: check NFC busy flag by HSMC_SR
instead of NFC cmd regs")
check NFC busy by nfc SR instead of NFC cmd regs. So we don't need to
map NFC cmd registers to include NFCBUSY bit.
That means we only need map 0x08000000 instead of 0x10000000 for NFC
cmd regs.
This patch reduce the NFC cmd regs map for sama5d3 & sama5d4.
Signed-off-by: Josh Wu <josh.wu@atmel.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Ludovic Desroches [Mon, 27 Apr 2015 09:15:06 +0000 (11:15 +0200)]
ARM: at91/dt: sama5d4: update pinctrl ranges
Update the pinctrl ranges property to support pioD controller whose
mapping is not contiguous with other pio controllers. Without this
update, getting resource will fail, then pinctrl probe will fail too
because there is a missing pio controller.
Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Nicolas Ferre [Tue, 31 Mar 2015 09:01:12 +0000 (11:01 +0200)]
ARM: at91/dt: sama5d3 xplained: add phy address for macb0
Specify the phy address on macb0 node aka GEM.
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Nicolas Ferre [Mon, 18 May 2015 10:18:03 +0000 (12:18 +0200)]
ARM: at91/dt: sama5d4 xplained: add spi1 on j14 connector
Route SPI1 on the Arduino "in the middle" spi connector.
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Suchang Ko [Tue, 12 May 2015 06:34:43 +0000 (15:34 +0900)]
ARM: at91/dt: sama5d4: add spi1, spi2 dt nodes
Add sama5d4 spi1, spi2 dt nodes & pinctrl.
Signed-off-by: Suchang Ko <suchangko@samul.kr>
[nicolas.ferre@atmel.com: split patch, reorder & whitespace fixes]
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Antoine Tenart [Tue, 7 Apr 2015 14:45:06 +0000 (16:45 +0200)]
Documentation: bindings: update the berlin chip and system ctrl doc
Now that the rework to have one sub-node per device in the chip and
system controllers is done, their dedicated compatible can be removed.
Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com>
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Antoine Tenart [Tue, 7 Apr 2015 14:45:02 +0000 (16:45 +0200)]
Documentation: bindings: move the Berlin clock documentation
The Berlin clock documentation was part of the Marvell Berlin SoC
documentation because the Berlin clock configuration was inside the
chip controller. With the recent rework of the chip and system
controller handling (now all sub-devices of the soc and system
controller nodes are registred with simple-mfd, and each device has its
own sub-node), the documentation of the Berlin clock driver can be moved
to the generic clock documentation directory.
Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com>
Acked-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Antoine Tenart [Mon, 27 Apr 2015 19:39:48 +0000 (21:39 +0200)]
Documentation: bindings: move the Berlin pinctrl documentation
The Berlin pinctrl documentation was part of the Marvell Berlin SoC
documentation because the Berlin pinctrl configuration was inside the
chip and the system controllers. With the recent rework of the chip and
system controller handling (now an MFD driver registers all sub-devices
of the two soc and system controller nodes and each device has its own
sub-node), the documentation of the Berlin pinctrl driver can be moved
to the generic pinctrl documentation directory.
Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com>
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Antoine Tenart [Mon, 27 Apr 2015 19:39:48 +0000 (21:39 +0200)]
Documentation: bindings: move the Berlin reset documentation
The Berlin reset documentation was part of the Marvell Berlin SoC
documentation because the Berlin reset configuration was inside the chip
controller. With the recent rework of the chip and system controller
handling (now an MFD driver registers all sub-devices of the two soc and
system controller nodes and each device has its own sub-node), the
documentation of the Berlin reset driver can be moved to the generic
reset documentation directory.
Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com>
Acked-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Antoine Tenart [Mon, 27 Apr 2015 19:39:48 +0000 (21:39 +0200)]
Documentation: bindings: update the Berlin controllers documentation
We're moving from a single node for multiple devices to a node with one
sub-node per sub-device, registered by simple-mfd. Update the
documentation to reflect the changes.
Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com>
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Antoine Tenart [Mon, 27 Apr 2015 19:39:47 +0000 (21:39 +0200)]
Documentation: bindings: berlin: consider our dt bindings as unstable
Because the support of Marvell Berlin SoCs is still a work in progress,
add a statement to explicitly consider our device tree files and
bindings as unstable.
Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com>
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Antoine Tenart [Mon, 27 Apr 2015 19:39:47 +0000 (21:39 +0200)]
ARM: dts: berlin: relicense the BG2CD Google Chromecast dts under GPLv2/X11
The current GPLv2 only licensing on this dts makes it very impractical
for other software components licensed under another license.
In order to make it easier for them to reuse our device trees, relicense
this dts under a GPLv2/X11 dual-license.
Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com>
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Antoine Tenart [Mon, 27 Apr 2015 19:39:47 +0000 (21:39 +0200)]
ARM: dts: berlin: relicense the berlin2cd dtsi under GPLv2/X11
The current GPLv2 only licensing on this dtsi makes it very impractical
for other software components licensed under another license.
In order to make it easier for them to reuse our device trees, relicense
this dtsi under a GPLv2/X11 dual-license.
Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com>
Acked-by: Jisheng Zhang <jszhang@marvell.com>
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Antoine Tenart [Mon, 27 Apr 2015 19:39:47 +0000 (21:39 +0200)]
ARM: dts: berlin: relicense the BG2 Sony NSZ-GS7 dts under GPLv2/X11
The current GPLv2 only licensing on this dts makes it very impractical
for other software components licensed under another license.
In order to make it easier for them to reuse our device trees, relicense
this dts under a GPLv2/X11 dual-license.
Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com>
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Antoine Tenart [Mon, 27 Apr 2015 19:39:47 +0000 (21:39 +0200)]
ARM: dts: berlin: relicense the berlin2 dtsi under GPLv2/X11
The current GPLv2 only licensing on this dtsi makes it very impractical
for other software components licensed under another license.
In order to make it easier for them to reuse our device trees, relicense
this dtsi under a GPLv2/X11 dual-license.
Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com>
Acked-by: Jisheng Zhang <jszhang@marvell.com>
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Antoine Tenart [Mon, 27 Apr 2015 19:39:46 +0000 (21:39 +0200)]
ARM: dts: berlin: relicense the BG2Q Marvell DMP dts under GPLv2/X11
The current GPLv2 only licensing on this dts makes it very impractical
for other software components licensed under another license.
In order to make it easier for them to reuse our device trees, relicense
this dts under a GPLv2/X11 dual-license.
Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com>
Acked-by: Jisheng Zhang <jszhang@marvell.com>
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Antoine Tenart [Mon, 27 Apr 2015 19:39:46 +0000 (21:39 +0200)]
ARM: dts: berlin: relicense the berlin2q dtsi under GPLv2/X11
The current GPLv2 only licensing on this dtsi makes it very impractical
for other software components licensed under another license.
In order to make it easier for them to reuse our device trees, relicense
this dtsi under a GPLv2/X11 dual-license.
Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com>
Acked-by: Jisheng Zhang <jszhang@marvell.com>
Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Ariel D'Alessandro [Mon, 11 May 2015 22:00:52 +0000 (00:00 +0200)]
ARM: dts: Add DT for Hitex LPC4350 Evaluation Board
Add basic support for Hitex LPC4350 Evaluation Board. Board
features a LPC4350 Soc, 8 MB SDRAM, 8 MB SPI Flash, USB and
Ethernet.
More information can be found on:
http://www.hitex.com/index.php?id=3212
Signed-off-by: Ariel D'Alessandro <ariel.dalessandro@gmail.com>
Signed-off-by: Joachim Eastwood <manabian@gmail.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Joachim Eastwood [Mon, 11 May 2015 22:00:51 +0000 (00:00 +0200)]
ARM: dts: Add DT for Embedded Artists LPC4357 Developers Kit
Adds basic support for Embedded Artists' LPC4357 Developer's Kit. Board
features a LPC4357 Soc, 32 MB SDRAM, 128 MB NAND Flash, 16 MB SPI
Flash, USB and Ethernet.
More information can be found on:
http://www.embeddedartists.com/products/kits/lpc4357_kit.php
Signed-off-by: Joachim Eastwood <manabian@gmail.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Joachim Eastwood [Mon, 11 May 2015 22:00:50 +0000 (00:00 +0200)]
ARM: dts: Add base DT for NXP LPC18xx
NXP LPC18xx/43xx SoCs are very similar devices and should be able to
share a common base (lpc18xx.dtsi). Diffences between the devices are
put in a dtsi which is specific to that device.
Signed-off-by: Joachim Eastwood <manabian@gmail.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Maxime Coquelin [Sat, 9 May 2015 07:53:55 +0000 (09:53 +0200)]
ARM: dts: Add ARM System timer as clocksource in armv7m
Tested-by: Chanwoo Choi <cw00.choi@samsung.com>
Signed-off-by: Maxime Coquelin <mcoquelin.stm32@gmail.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Fri, 15 May 2015 15:27:55 +0000 (17:27 +0200)]
Merge tag 'mvebu-dt-4.2' of git://git.infradead.org/linux-mvebu into next/dt
Merge "mvebu dt changes for v4.2 (part #1)" from Gregory CLEMENT:
- A series adding support for the Compulab CM-A510
- Add alias for mdio on Armada 38x
* tag 'mvebu-dt-4.2' of git://git.infradead.org/linux-mvebu:
ARM: mvebu: add alias for mdio on Armada 38x
ARM: dts: dove: Add Compulab SBC-A510 to Makefile
ARM: dts: dove: Add proper support for Compulab CM-A510/SBC-A510
ARM: dts: dove: Remove Compulab CM-A510 from Makefile
ARM: dts: dove: Add internal i2c multiplexer node
Arnd Bergmann [Fri, 15 May 2015 15:26:31 +0000 (17:26 +0200)]
Merge tag 'sti-dt-for-v4.2-2' of git://git./linux/kernel/git/mcoquelin/sti into next/dt
Merge "STi DT updates for v4.2, round 2." from Maxime Coquelin:
Highlights:
-----------
- Add USB3 support to STiH410 & STiH418
- Add PWM support to STiH416 & STiH407 family
- Add restart support to STiH416 & STiH407 family
- Add PMU support to STiH416 & STiH407 family
- Reorder includes in STiH407 DT files
* tag 'sti-dt-for-v4.2-2' of git://git.kernel.org/pub/scm/linux/kernel/git/mcoquelin/sti:
ARM: STi: DT: STih407: Re-order #include <*.dtsi> files
ARM: STi: Ensure requested STi's SysCfg Controlled IRQs are enabled at boot
ARM: STi: STiH407: Enable PMU IRQs
ARM: STi: STiH407: Enable Cortex-A9 PMU support
ARM: STi: STiH416: Enable PMU IRQs
ARM: STi: STiH416: Enable Cortex-A9 PMU support
ARM: STi: STiH416: Add Restart support for STiH416
ARM: STi: STiH407: Add Restart support for STiH407
ARM: STi: STiH416-b2020e: Enable PWM on the B2020 Rev-E
ARM: STi: STiH416: Add DT nodes for PWM
ARM: STi: STiH416: Add Pinctrl settings for PWM
ARM: STi: STiH407: Add DT nodes for for PWM
ARM: DT: STi: STiH418: Enable USB3 port on stih418-b2199.
ARM: DT: STi: STiH418: Add miphy28lp optional oscillator clock properties
ARM: DT: STi: stihxxx-b2120: Enable USB3 port on stih407-b2120 and stih410-b2120
ARM: DT: STi: STiH407: Add dwc3 usb3 DT node.
ARM: DT: STi: STiH407: Update picophyreset for the usb3 controllers usb2 phy
Arnd Bergmann [Fri, 15 May 2015 15:23:29 +0000 (17:23 +0200)]
Merge tag 'rpi-dt-for-armsoc-v4.2' of git://git./linux/kernel/git/rpi/linux-rpi into next/dt
Merge "RaspberryPi Device Tree changes due for v4.2" from Lee Jones:
* tag 'rpi-dt-for-armsoc-v4.2' of git://git.kernel.org/pub/scm/linux/kernel/git/rpi/linux-rpi:
ARM: bcm2835: dt: Use 0x4 prefix for DMA bus addresses to SDRAM.
ARM: bcm2835: dt: Add the mailbox to the device tree
ARM: bcm2835: dt: Fix i2c0 node name
ARM: bcm2835: dt: Use pinctrl header
ARM: bcm2835: dt: Add header file for pinctrl constants
ARM: bcm2835: dt: Add root properties for Raspberry Pi
ARM: bcm2835: dt: Add vendor prefix for Raspberry Pi
Linus Walleij [Thu, 14 May 2015 09:22:34 +0000 (11:22 +0200)]
ARM: ux500: add SCU and WD to device tree
The Ux500 like other Cortex-A9 SoC's has a Snoop Control
Unit (SCU) and a Watchdog in the same address range as
the local timers. Add these to the SoC device tree.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Fri, 15 May 2015 15:21:10 +0000 (17:21 +0200)]
Merge tag 'renesas-dt-for-v4.2' of git://git./linux/kernel/git/horms/renesas into next/dt
Merge "Renesas ARM Based SoC DT Updates for v4.2" from Simon Horman:
* Enable DMA for HSUSB on r8a7790 and r8a7791 SoCs
* Configure the HOME key as wake-up source on kzm9g board
* Use generic names for device nodes on SH Mobile SoCs and boards
* Add "nor-jedec" compatible value to SH Mobile boards
* Add IRQC clock to r8a73a4, r8a779* SoCs
* Remove MSIOF address from r8a7790 and r8a7791 SoCs
* tag 'renesas-dt-for-v4.2' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (31 commits)
ARM: shmobile: r8a7791: Enable DMA for HSUSB
ARM: shmobile: r8a7791: add USB-DMAC device nodes
ARM: shmobile: r8a7790: Enable DMA for HSUSB
ARM: shmobile: r8a7790: add USB-DMAC device nodes
ARM: shmobile: kzm9g dts: Configure the HOME key as wake-up source
ARM: shmobile: koelsch dts: Use generic names for device nodes
ARM: shmobile: lager dts: Use generic names for device nodes
ARM: shmobile: bockw dts: Use generic names for device nodes
ARM: shmobile: koelsch dts: Add "nor-jedec" compatible value
ARM: shmobile: bockw dts: Add "nor-jedec" compatible value
ARM: shmobile: lager dts: Add "nor-jedec" compatible value
ARM: shmobile: bockw-reference dts: Add "nor-jedec" compatible value
ARM: shmobile: henninger dts: Add "nor-jedec" compatible value
ARM: shmobile: armadillo800eva dts: Use generic names for device nodes
ARM: shmobile: marzen dts: Use generic names for device nodes
ARM: shmobile: kzm9d dts: Use generic names for device nodes
ARM: shmobile: ape6evm dts: Use generic names for device nodes
ARM: shmobile: sh73a0 dtsi: Use generic names for device nodes
ARM: shmobile: r8a7791 dtsi: Use generic names for device nodes
ARM: shmobile: r8a7790 dtsi: Use generic names for device nodes
...
Arnd Bergmann [Fri, 15 May 2015 15:18:57 +0000 (17:18 +0200)]
Merge tag 'pxa-dt-4.2' of https://github.com/rjarzmik/linux into next/dt
Merge "device-tree pxa update" from Robert Jarzmik:
- clocks descriptions (pxa27x, pxa3xx)
- timer descriptions (pxa27x, pxa3xx)
- IPs which are embedded on the SoC
- keypad
- udc (USB client)
- power I2C
These are amongst the building blocks for future pxa device-tree board
description.
* tag 'pxa-dt-4.2' of https://github.com/rjarzmik/linux:
ARM: dts: pxa: add pxa-timer to pxa27x and pxa3xx
ARM: dts: pxa: add pxa27x-keypad to pxa27x
ARM: dts: pxa: add pxa27x-udc to pxa27x
ARM: dts: pxa: add clocks
ARM: dts: pxa: add pwri2c to pxa device-tree
Arnd Bergmann [Fri, 15 May 2015 15:17:24 +0000 (17:17 +0200)]
Merge tag 'arm-soc/for-4.2/dts' of github.com/broadcom/stblinux into next/dt
Merge "Device Tree changes" from Florian Fainelli:
New devices:
- Felix adds support for the Buffalo WXR-1900DHP and adds the USB led on Buffalo
WZR-1750DHP
- Rafal adds support for the SmartRG SR400ac, Asus RT-AC68U and RT-AC56U
New peripheral support:
- Brian adds Device Tree nodes for the Broadcom NAND controller found on
BCM7xxx, BCM63138 and Cygnus SoCs
- Brian adds Device Tree nodes for the SATA AHCI and PHY controller found on
BCM7xxx
- I add the Device Tree nodes and bindings documents for bringing-up secondary
CPUs and timer/syscon-reboot on BCM63138
* tag 'arm-soc/for-4.2/dts' of http://github.com/broadcom/stblinux:
ARM: BCM5301X: Add DT for Asus RT-AC56U
ARM: BCM5301X: Add DT for Asus RT-AC68U
ARM: dts: BCM63xx: Add timer and syscon-reboot nodes
dt-bindings: Add documentation for the BCM63138 timer and syscon-reboot
ARM: dts: brcmstb: add nodes for SATA controller and PHY
ARM: dts: cygnus: Enable NAND support for Cygnus
ARM: bcm63138: add NAND DT support
ARM: bcm7445: add NAND to DTS
ARM: BCM5301X: Add DT for SmartRG SR400ac
ARM: BCM5301X: Add DT for Buffalo WXR-1900DHP
ARM: BCM5301X: Add USB LED for Buffalo WZR-1750DHP
ARM: dts: BCM63xx: Add SMP nodes and required properties
Documentation: DT: Document SMP DT nodes and properties for BCM63138
ARM: dts: BCM63xx: Add PMB busses nodes
Documentation: DT: Add Broadcom BCM63138 PMB binding
Heiko Stuebner [Fri, 6 Mar 2015 18:04:06 +0000 (19:04 +0100)]
ARM: dts: rockchip: relicense rk3288-evb* under GPLv2/X11
GPLv2-only devicetrees make reuse difficult for software components licensed
under a different license.
The consensus is that a GPL/X11 dual-license should allow all necessary uses,
so relicense the rk3288-evb files to this combination.
CCs were aquired by git shortlog -sne so it should've hopefully catched
every contributor.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Doug Anderson <dianders@chromium.org>
Acked-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Caesar Wang <caesar.wang@rock-chips.com>
Acked-by: Romain Perier <romain.perier@gmail.com>
Acked-by: Chris Zhong<zyw@rock-chips.com>
Acked-by: Roger Chen <roger.chen@rock-chips.com>
Acked-by: Yunzhi Li <lyz@rock-chips.com>
on behalf of Rockchip
Acked-by: Eddie Cai <eddie.cai@rock-chips.com>
Heiko Stuebner [Fri, 6 Mar 2015 18:04:02 +0000 (19:04 +0100)]
ARM: dts: rockchip: relicense rk3288.dtsi under GPLv2/X11
GPLv2-only devicetrees make reuse difficult for software components licensed
under a different license.
The consensus is that a GPL/X11 dual-license should allow all necessary uses,
so relicense the rk3288.dtsi to this combination.
CCs were aquired by git shortlog -sne so it should've hopefully catched
every contributor.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Doug Anderson <dianders@chromium.org>
Acked-by: Sonny Rao <sonnyrao@chromium.org>
Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Acked-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Caesar Wang <caesar.wang@rock-chips.com>
Acked-by: Lin Huang <hl@rock-chips.com>
Acked-by: Chris Zhong <zyw@rock-chips.com>
Acked-by: Jianqun Xu<jay.xu@rock-chips.com>
Acked-by: Daniel Kurtz <djkurtz@chromium.org>
Acked-by: Roger Chen <roger.chen@rock-chips.com>
Acked-by: Yunzhi Li <lyz@rock-chips.com>
on behalf of Rockchip
Acked-by: Eddie Cai <eddie.cai@rock-chips.com>
Lee Jones [Mon, 11 May 2015 14:12:00 +0000 (16:12 +0200)]
ARM: STi: DT: STih407: Re-order #include <*.dtsi> files
This patch fixes a regression where serial is enabled by the first
(board) DTSI, then disabled by the second (SoC) file. To enable
serial and keep it enabled, we need to include the file which enables
it last.
Reported-by: LAVA [via Peter Griffin <peter.griffin@linaro.org>]
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
Eric Anholt [Tue, 5 May 2015 20:10:11 +0000 (13:10 -0700)]
ARM: bcm2835: dt: Use 0x4 prefix for DMA bus addresses to SDRAM.
There exists a tiny MMU, configurable only by the VC (running the
closed firmware), which maps from the ARM's physical addresses to bus
addresses. These bus addresses determine the caching behavior in the
VC's L1/L2 (note: separate from the ARM's L1/L2) according to the top
2 bits. The bits in the bus address mean:
From the VideoCore processor:
0x0... L1 and L2 cache allocating and coherent
0x4... L1 non-allocating, but coherent. L2 allocating and coherent
0x8... L1 non-allocating, but coherent. L2 non-allocating, but coherent
0xc... SDRAM alias. Cache is bypassed. Not L1 or L2 allocating or coherent
From the GPU peripherals (note: all peripherals bypass the L1
cache. The ARM will see this view once through the VC MMU):
0x0... Do not use
0x4... L1 non-allocating, and incoherent. L2 allocating and coherent.
0x8... L1 non-allocating, and incoherent. L2 non-allocating, but coherent
0xc... SDRAM alias. Cache is bypassed. Not L1 or L2 allocating or coherent
The 2835 firmware always configures the MMU to turn ARM physical
addresses with 0x0 top bits to 0x4, meaning present in L2 but
incoherent with L1. However, any bus addresses we were generating in
the kernel to be passed to a device had 0x0 bits. That would be a
reserved (possibly totally incoherent) value if sent to a GPU
peripheral like USB, or L1 allocating if sent to the VC (like a
firmware property request). By setting dma-ranges, all of the devices
below it get a dev->dma_pfn_offset, so that dma_alloc_coherent() and
friends return addresses with 0x4 bits and avoid cache incoherency.
This matches the behavior in the downstream 2708 kernel (see
BUS_OFFSET in arch/arm/mach-bcm2708/include/mach/memory.h).
Signed-off-by: Eric Anholt <eric@anholt.net>
Tested-by: Noralf Trønnes <noralf@tronnes.org>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Eric Anholt [Tue, 5 May 2015 20:27:46 +0000 (13:27 -0700)]
ARM: bcm2835: dt: Add the mailbox to the device tree
Signed-off-by: Eric Anholt <eric@anholt.net>
Acked-by: Lee Jones <lee.jones@linaro.org>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Baruch Siach [Wed, 18 Mar 2015 09:00:22 +0000 (11:00 +0200)]
ARM: bcm2835: dt: Fix i2c0 node name
Device tree node names should contain the node's reg property address value.
The i2c0 node was apparently forgotten in commit
25b2f1bd0b7e0 (ARM: bcm2835:
node name unit address cleanup).
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Stefan Wahren [Thu, 29 Jan 2015 18:10:50 +0000 (18:10 +0000)]
ARM: bcm2835: dt: Use pinctrl header
This patch converts all bcm2835 dts and dtsi files to use the pinctrl
header file.
Reviewed-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Stefan Wahren [Thu, 29 Jan 2015 18:10:49 +0000 (18:10 +0000)]
ARM: bcm2835: dt: Add header file for pinctrl constants
This new header file defines pincontrol constants to use
from bcm2835 DTS files for pincontrol properties option.
Reviewed-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Stefan Wahren [Thu, 29 Jan 2015 18:10:48 +0000 (18:10 +0000)]
ARM: bcm2835: dt: Add root properties for Raspberry Pi
This patch adds root compatible properties for the following boards:
- Raspberry Pi Model A
- Raspberry Pi Model A+
- Raspberry Pi Model B
- Raspberry Pi Model B (no P5)
- Raspberry Pi Model B rev2
- Raspberry Pi Model B+
- Raspberry Pi Compute Module
Reviewed-by: Stephen Warren <swarren@wwwdotorg.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Stefan Wahren [Thu, 29 Jan 2015 18:10:47 +0000 (18:10 +0000)]
ARM: bcm2835: dt: Add vendor prefix for Raspberry Pi
Since the prefix is already in use, we need to add it in the
vendor list.
Reviewed-by: Stephen Warren <swarren@wwwdotorg.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Heiko Stuebner [Fri, 6 Mar 2015 18:04:05 +0000 (19:04 +0100)]
ARM: dts: rockchip: relicense rk3188-radxarock.dts under GPLv2/X11
GPLv2-only devicetrees make reuse difficult for software components licensed
under a different license.
The consensus is that a GPL/X11 dual-license should allow all necessary uses,
so relicense the rk3188-radxarock.dts to this combination.
CCs were aquired by git shortlog -sne so it should've hopefully catched
every contributor.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Beniamino Galvani <b.galvani@gmail.com>
Acked-by: Romain Perier <romain.perier@gmail.com>
Acked-by: Jaehoon Chung <jh80.chung@samsung.com>
Acked-by: Julien Chauveau <chauveau.julien@gmail.com>
Heiko Stuebner [Fri, 6 Mar 2015 18:04:04 +0000 (19:04 +0100)]
ARM: dts: rockchip: relicense rk3066a-bqcurie2.dts under GPLv2/X11
GPLv2-only devicetrees make reuse difficult for software components licensed
under a different license.
The consensus is that a GPL/X11 dual-license should allow all necessary uses,
so relicense the rk3066a-bqcurie2.dts to this combination.
CCs were aquired by git shortlog -sne so it should've hopefully catched
every contributor.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Beniamino Galvani <b.galvani@gmail.com>
Acked-by: Jaehoon Chung <jh80.chung@samsung.com>
Heiko Stuebner [Fri, 6 Mar 2015 18:04:03 +0000 (19:04 +0100)]
ARM: dts: rockchip: relicense rk3288-thermal.dtsi under GPLv2/X11
GPLv2-only devicetrees make reuse difficult for software components licensed
under a different license.
The consensus is that a GPL/X11 dual-license should allow all necessary uses,
so relicense the rk3288-thermal.dtsi to this combination.
CCs were aquired by git shortlog -sne so it should've hopefully catched
every contributor.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Caesar Wang <caesar.wang@rock-chips.com>
Heiko Stuebner [Fri, 6 Mar 2015 18:04:01 +0000 (19:04 +0100)]
ARM: dts: rockchip: relicense rk3188.dtsi under GPLv2/X11
GPLv2-only devicetrees make reuse difficult for software components licensed
under a different license.
The consensus is that a GPL/X11 dual-license should allow all necessary uses,
so relicense the rk3188.dtsi to this combination.
CCs were aquired by git shortlog -sne so it should've hopefully catched
every contributor.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Beniamino Galvani <b.galvani@gmail.com>
Acked-by: Romain Perier <romain.perier@gmail.com>
Acked-by: Julien Chauveau <chauveau.julien@gmail.com>
Acked-by: Max Schwarz <max.schwarz@online.de>
Heiko Stuebner [Fri, 6 Mar 2015 18:04:00 +0000 (19:04 +0100)]
ARM: dts: rockchip: relicense rk3066a.dtsi under GPLv2/X11
GPLv2-only devicetrees make reuse difficult for software components licensed
under a different license.
The consensus is that a GPL/X11 dual-license should allow all necessary uses,
so relicense the rk3066a.dtsi to this combination.
CCs were aquired by git shortlog -sne so it should've hopefully catched
every contributor.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Beniamino Galvani <b.galvani@gmail.com>
Acked-by: Romain Perier <romain.perier@gmail.com>
Acked-by: Julien Chauveau <chauveau.julien@gmail.com>
Heiko Stuebner [Fri, 6 Mar 2015 18:03:59 +0000 (19:03 +0100)]
ARM: dts: rockchip: relicense rk3xxx.dtsi under GPLv2/X11
GPLv2-only devicetrees make reuse difficult for software components licensed
under a different license.
The consensus is that a GPL/X11 dual-license should allow all necessary uses,
so relicense the rk3xxx.dtsi to this combination.
CCs were aquired by git shortlog -sne so it should've hopefully catched
every contributor.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Beniamino Galvani <b.galvani@gmail.com>
Acked-by: Romain Perier <romain.perier@gmail.com>
Acked-by: Julien Chauveau <chauveau.julien@gmail.com>
Rafał Miłecki [Tue, 31 Mar 2015 15:29:18 +0000 (17:29 +0200)]
ARM: BCM5301X: Add DT for Asus RT-AC56U
Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Rafał Miłecki [Sat, 28 Mar 2015 14:01:38 +0000 (15:01 +0100)]
ARM: BCM5301X: Add DT for Asus RT-AC68U
Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Florian Fainelli [Thu, 23 Apr 2015 22:57:21 +0000 (15:57 -0700)]
ARM: dts: BCM63xx: Add timer and syscon-reboot nodes
Add a "brcm,bcm6328-timer" and "syscon-reboot" nodes to allow the
generic syscon-reboot driver to reset a BCM63138 SoC.
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Florian Fainelli [Thu, 23 Apr 2015 22:55:00 +0000 (15:55 -0700)]
dt-bindings: Add documentation for the BCM63138 timer and syscon-reboot
A timer node and a syscon-reboot node are required for software reboot
to work on BCM63138, document these two nodes in the platform binding.
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Brian Norris [Tue, 12 May 2015 23:28:23 +0000 (16:28 -0700)]
ARM: dts: brcmstb: add nodes for SATA controller and PHY
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Ray Jui [Wed, 13 May 2015 00:53:43 +0000 (17:53 -0700)]
ARM: dts: cygnus: Enable NAND support for Cygnus
Enable NAND support for Broadcom Cygnus SoC
Signed-off-by: Ray Jui <rjui@broadcom.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Brian Norris [Wed, 13 May 2015 00:53:42 +0000 (17:53 -0700)]
ARM: bcm63138: add NAND DT support
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Tested-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Brian Norris [Wed, 13 May 2015 00:53:37 +0000 (17:53 -0700)]
ARM: bcm7445: add NAND to DTS
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Rafał Miłecki [Wed, 13 May 2015 07:10:53 +0000 (09:10 +0200)]
ARM: BCM5301X: Add DT for SmartRG SR400ac
Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Felix Fietkau [Wed, 13 May 2015 07:10:52 +0000 (09:10 +0200)]
ARM: BCM5301X: Add DT for Buffalo WXR-1900DHP
Signed-off-by: Felix Fietkau <nbd@openwrt.org>
Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Felix Fietkau [Wed, 13 May 2015 07:10:51 +0000 (09:10 +0200)]
ARM: BCM5301X: Add USB LED for Buffalo WZR-1750DHP
Signed-off-by: Felix Fietkau <nbd@openwrt.org>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Florian Fainelli [Fri, 17 Apr 2015 18:27:51 +0000 (11:27 -0700)]
ARM: dts: BCM63xx: Add SMP nodes and required properties
Update bcm63138.dtsi with the following:
- enable-method for both CPU nodes
- brcm,bcm63138-bootlut node
- resets properties to point to the correct PMB controller to release
the secondary CPU from reset
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Florian Fainelli [Fri, 17 Apr 2015 18:21:39 +0000 (11:21 -0700)]
Documentation: DT: Document SMP DT nodes and properties for BCM63138
Add binding documentation for the additional nodes and properties
required to get the secondary CPU online on the BCM63138 SoC.
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Florian Fainelli [Thu, 16 Apr 2015 18:37:51 +0000 (11:37 -0700)]
ARM: dts: BCM63xx: Add PMB busses nodes
Add the two BCM63138 PMB busses nodes found on this System-on-a-Chip as
described in their corresponding binding document.
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Florian Fainelli [Fri, 17 Apr 2015 17:48:46 +0000 (10:48 -0700)]
Documentation: DT: Add Broadcom BCM63138 PMB binding
Add a Device Tree binding for the Broadcom BCM63138 Processor Monitor
Bus, which is an internal bus used to access different power and reset
signals within a BCM63138 System-on-a-Chip.
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Arnd Bergmann [Wed, 13 May 2015 16:02:49 +0000 (18:02 +0200)]
Merge tag 'tegra-for-4.2-dt' of git://git./linux/kernel/git/tegra/linux into next/dt
Merge "ARM: tegra: Devicetree changes for v4.2-rc1" from Thierry Reding:
Contains a couple of fixes and additions to device tree files. The most
notable change is a fix for a misapplied patch that was only exposed by
a recent change in the regulator subsystem that caused USB to break on
Tegra124 recently.
Other than that there are a more or less random assortment of additions
to enable various features on a couple of boards.
* tag 'tegra-for-4.2-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
ARM: tegra: Fix hda2codec_2x clock and reset names
ARM: tegra: Add Tegra30 HDA support
ARM: tegra: Cardhu device-tree comment spelling fix
ARM: tegra: venice2: Set min-/max-microvolt for VDD_LED supply
ARM: tegra: venice2: Mark eMMC as non-removable
ARM: tegra: jetson-tk1: Enable HDA support
ARM: tegra: Add missing HDMI +5V regulator
ARM: tegra: cardhu: Add power and volume keys
ARM: tegra: Correct which USB controller has the UTMI pad registers
Arnd Bergmann [Wed, 13 May 2015 15:47:47 +0000 (17:47 +0200)]
Merge tag 'socfpga_dts_for_v4.2_part_2' of git://git./linux/kernel/git/dinguyen/linux into next/dt
Merge "SoCFPGA update for v4.2 part 2" from Dinh Nguyen:
- Add a DTS node for the A9 SCU
* tag 'socfpga_dts_for_v4.2_part_2' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux:
ARM: socfpga: dts: add the a9-scu node
Arnd Bergmann [Wed, 13 May 2015 15:41:54 +0000 (17:41 +0200)]
Merge tag 'v4.2-rockchip-dts1' of git://git./linux/kernel/git/mmind/linux-rockchip into next/dt
Merge "ARM: rockchip: dts changes for 4.2" from Heiko Stuebner:
Some misc improvements defining additional supply regulators, enabling
the Cortex-A12 HW PMU on the rk3288 and the tsadc on some more rk3288
boards, as well as some usb properties and marking the radxarock pmic
as system-power-controller.
* tag 'v4.2-rockchip-dts1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
ARM: dts: rockchip: add system-power-controller to act8846 on radxarock
ARM: dts: rockchip: add properties for dwc2 usb otg controller
ARM: dts: rockchip: enable tsadc on rk3288 boards
ARM: dts: rockchip: add act8846 supplies on rk3288-firefly
ARM: dts: rockchip: Specify VMMC and VQMMC on rk3288-evb
ARM: dts: rockchip: Enable Cortex-A12 HW PMU events on rk3288
Dinh Nguyen [Tue, 12 May 2015 20:48:13 +0000 (15:48 -0500)]
ARM: socfpga: dts: add the a9-scu node
Add the dts node for the A9 SCU.
Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
Arnd Bergmann [Wed, 13 May 2015 11:37:26 +0000 (13:37 +0200)]
Merge tag 'ux500-v4.2-dt' of git://git./linux/kernel/git/linusw/linux-stericsson into next/dt
Merge "Ux500 Device Tree changes for the v4.2 series" form Linus Walleij:
Define CPU topology, connect that with CoreSight blocks,
add sensor information to DT boards.
* tag 'ux500-v4.2-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson:
ARM: ux500: add the sensors to the STUIB board
ARM: ux500: assign the sensor trigger IRQs
ARM: ux500: fix lsm303dlh magnetometer compat string
ARM: ux500: add CoreSight blocks to DTS file
ARM: ux500: define CPU topology
Linus Walleij [Wed, 23 Apr 2014 08:40:10 +0000 (10:40 +0200)]
ARM: ux500: add the sensors to the STUIB board
This adds the device tree data for the LIS331DL and the
AK8974 magnetometer to the STUIB board device tree include
file.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Linus Walleij [Mon, 27 Apr 2015 09:28:33 +0000 (11:28 +0200)]
ARM: ux500: assign the sensor trigger IRQs
The ST sensors on the Ux500 boards were not utilizing the IRQs
for data ready sample triggers. Enable this by assigning the
right GPIO lines and interrupt lines (when the GPIO lines are
used for IRQs) to the accelerometer, gyro and magnetometer
sensors.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Linus Walleij [Wed, 29 Apr 2015 12:08:38 +0000 (14:08 +0200)]
ARM: ux500: fix lsm303dlh magnetometer compat string
The magnetometer found on the Ux500 TVK and Snowball boards
is a LSM303DLH not a LSM303DLM, small differences but still
different. Put in the right compatible strings and things start
working smoothly.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Linus Walleij [Thu, 16 Apr 2015 07:08:15 +0000 (09:08 +0200)]
ARM: ux500: add CoreSight blocks to DTS file
This registers all the CoreSight blocks on the DB8500 SoC:
each core has a PTM (v1.0, r1p0-00rel0) connected, both connected
to a funnel (DK-TM908-r0p1-00rel0) which in turn connects to a
replicator (DM-TM909-r0p1-00rel0). The replicator has two outputs,
port 0 to a TPIU interface and port 1 to an ETB
(DK-TM907-r0p3-00rel0). The CoreSight blocks are all clocked by
the APEATCLK from the PRCMU and their AHB interconnect is clocked
from a separate clock called APETRACECLK.
The SoC also has a CTI/CTM block which can be added later as we
have upstream support in the CoreSight subsystem.
Acked-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Lee Jones [Tue, 12 May 2015 12:51:00 +0000 (14:51 +0200)]
ARM: STi: Ensure requested STi's SysCfg Controlled IRQs are enabled at boot
This driver is used to enable System Configuration Register controlled
External, CTI (Core Sight), PMU (Performance Management), and PL310 L2
Cache IRQs prior to use.
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
Lee Jones [Tue, 12 May 2015 12:51:00 +0000 (14:51 +0200)]
ARM: STi: STiH407: Enable PMU IRQs
This driver is used to enable System Configuration Register controlled
External, CTI (Core Sight), PMU (Performance Management), and PL310 L2
Cache IRQs prior to use.
Here we are enabling PMU IRQs on both channels.
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
Lee Jones [Tue, 12 May 2015 12:51:00 +0000 (14:51 +0200)]
ARM: STi: STiH407: Enable Cortex-A9 PMU support
This is ARM's generic Performance Monitoring Unit.
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
Lee Jones [Tue, 12 May 2015 12:51:00 +0000 (14:51 +0200)]
ARM: STi: STiH416: Enable PMU IRQs
This driver is used to enable System Configuration Register controlled
External, CTI (Core Sight), PMU (Performance Management), and PL310 L2
Cache IRQs prior to use.
Here we are enabling PMU IRQs on both channels.
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
Lee Jones [Tue, 12 May 2015 12:51:00 +0000 (14:51 +0200)]
ARM: STi: STiH416: Enable Cortex-A9 PMU support
This is ARM's generic Performance Monitoring Unit.
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
Lee Jones [Tue, 12 May 2015 12:51:00 +0000 (14:51 +0200)]
ARM: STi: STiH416: Add Restart support for STiH416
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
Lee Jones [Tue, 12 May 2015 12:51:00 +0000 (14:51 +0200)]
ARM: STi: STiH407: Add Restart support for STiH407
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
Lee Jones [Tue, 12 May 2015 12:51:00 +0000 (14:51 +0200)]
ARM: STi: STiH416-b2020e: Enable PWM on the B2020 Rev-E
All the infrastructure is now in place for ST's PWM controller. This
patch takes the final step and enables the IP on the 2020 Rev-E
development platform.
Signed-off-by: Ajit Pal Singh <ajitpal.singh@st.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
Lee Jones [Tue, 12 May 2015 12:51:00 +0000 (14:51 +0200)]
ARM: STi: STiH416: Add DT nodes for PWM
Supply top level nodes for the STiH416 based development boards.
The Pinctrl configuration has already been applied, so the only
missing piece of the DT puzzle is for a board's DTB to enable
the nodes.
Signed-off-by: Ajit Pal Singh <ajitpal.singh@st.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
Lee Jones [Tue, 12 May 2015 12:51:00 +0000 (14:51 +0200)]
ARM: STi: STiH416: Add Pinctrl settings for PWM
Supply the Pinctrl configuration to enable PWM{0,1} lines on STiH416
based development boards.
Signed-off-by: Ajit Pal Singh <ajitpal.singh@st.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
Lee Jones [Tue, 12 May 2015 12:51:00 +0000 (14:51 +0200)]
ARM: STi: STiH407: Add DT nodes for for PWM
Supply top level nodes for the STiH407 based development boards.
The Pinctrl configuration has already been applied, so the only
missing piece of the DT puzzle is for a board's DTB to enable
the nodes.
Signed-off-by: Ajit Pal Singh <ajitpal.singh@st.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
Robert Jarzmik [Sun, 12 Oct 2014 20:11:08 +0000 (22:11 +0200)]
ARM: dts: pxa: add pxa-timer to pxa27x and pxa3xx
Each pxa has an embedded OS Timers IP. The kernel cannot work without a
valid clocksource, and this adds the OS Timers to the pxa device-tree
description.
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Robert Jarzmik [Sat, 7 Feb 2015 12:19:38 +0000 (13:19 +0100)]
ARM: dts: pxa: add pxa27x-keypad to pxa27x
Each pxa27x has an embedded keypad controller. Add it in the pxa27x
device-tree description.
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Robert Jarzmik [Sat, 7 Feb 2015 12:27:55 +0000 (13:27 +0100)]
ARM: dts: pxa: add pxa27x-udc to pxa27x
Each pxa27x has an embedded usb udc controller. Add it in the pxa27x
device-tree description.
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Robert Jarzmik [Sat, 7 Feb 2015 12:13:24 +0000 (13:13 +0100)]
ARM: dts: pxa: add clocks
Add clocks to the IPs already described in the pxa device-tree
files. There are more clocks in the clock tree than IPs described in the
current pxa device-tree.
This patch ensures that :
- the current description is correct
- the clocks are actually claimed, so that clock framework doesn't
disable them automatically (unused clocks shutdown)
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Robert Jarzmik [Sat, 7 Feb 2015 12:26:09 +0000 (13:26 +0100)]
ARM: dts: pxa: add pwri2c to pxa device-tree
pxa27x variant has 2 I2C busses on the SoC :
- the casual I2C
- the power I2C, normally driving power regulators, and capable of
receiving orders on core frequency modifications
Add the missing pwri2c to pxa27x description.
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Michael Niewöhner [Mon, 11 May 2015 20:57:21 +0000 (22:57 +0200)]
ARM: dts: rockchip: add system-power-controller to act8846 on radxarock
The act8846 is the main pmic and system-power-controller on radxarock boards,
so add the necessary property.
Signed-off-by: Michael Niewoehner <mniewoeh@stud.hs-offenburg.de>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Arnd Bergmann [Tue, 12 May 2015 15:23:34 +0000 (17:23 +0200)]
Merge tag 'sunxi-dt-for-4.2' of https://git./linux/kernel/git/mripard/linux into next/dt
Pull "Allwinner DT additions for 4.1, take 1" from Maxime Ripard:
All the device tree related changes for the 4.1 merge window.
It has a rather big diffstat, because of a lot of mechanical and harmless
changes, as described below.
There is mostly:
- The end of the DT relicensing. All our DT should now be under the dual
X11/GPL license.
- Convertion of all the DT to a label based syntax, instead of
duplicating the tree like was done before.
- Rework of the A10s and A13 DTSI to share the common devices
- A few drivers enablings: A80 USB, the A31 PMIC, A31 and A23 arch
timers, etc
- Fix the checkpatch warnings
- A few new boards : cubieboard4, mele i7, utoo p66, auxtex t004,
pcduino3 nano, gemei G9, mk808c, jesurun q5, orange pi, orange pi mini
* tag 'sunxi-dt-for-4.2' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux: (84 commits)
ARM: sunxi: dt: Split the SPI pinctrl groups
ARM: sunxi: dt: Fix whitespace errors
ARM: sunxi: DT: Fix lines over 80 characters
ARM: sunxi: dt: Remove the FSF address
ARM: sunxi: dts: split IR pins for A10 and A20
ARM: sun7i: dt: Add new MK808C device
ARM: dts: sun6i: Set PLL6 as parent to AHB1 clock in AHB1 clock node
ARM: dts: sunxi: Update ahb clocks for sun5i and sun7i
ARM: dts: sun7i: Add dts file for the Jesurun Q5 top set box
ARM: dts: sun5i: Enable touchscreen on Utoo P66
ARM: dts: sun7i: Add dts file for the Orangepi mini SBC
ARM: dts: sun7i: Add dts file for the Orangepi SBC
ARM: dts: sun7i: Add A20 SRAM and SRAM controller
ARM: dts: sun5i: Add A13 and A10s SRAM and SRAM controller
ARM: dts: sun4i: Add A10 SRAM and SRAM controller
ARM: dts: sun5i: Add broken-hpi property for Utoo-P66 eMMC
ARM: sun8i: dt: Enable A23 SMP support
ARM: dts: sun6i: Add cpu thermal zones to dtsi
ARM: dts: sun6i: Add cpu clock reference and operating points to dtsi
ARM: sunxi: DT: Add stdout-path property
...
Arnd Bergmann [Tue, 12 May 2015 15:22:11 +0000 (17:22 +0200)]
Merge tag 'socfpga_dts_for_v4.2' of git://git./linux/kernel/git/dinguyen/linux into next/dt
Pull "SoCFPGA DTS updates for v4.2" from Dinh Nguyen:
- Add accelerometer to sockit
- Update and clean up support for the Arria10 platform
- Add sdmmc_clk/4 clock node SoCFPGA Cyclone5/Arria5
- Update ethernet nodes with multicast/unicast/fifo-depth properties
- Add clocks for Arria10 platform
* tag 'socfpga_dts_for_v4.2' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux:
ARM: socfpga: dts: add clocks to the Arria10 platform
ARM: socfpga: dts: Add tx-fifo-depth and rx-fifo-depth properties
ARM: socfpga: dts: Add multicast bins and unicast filter entries
ARM: socfpga: dts: Add a clock node for sdmmc CIU
ARM: socfpga: dts: rename socdk board file to socdk_sdmmc
ARM: socfpga: dts: enable UART1 for the debug uart
ARM: socfpga: dts: disable the sdmmc, and uart nodes in the base arria10
ARM: socfpga: dts: add cpu1-start-addr for Arria 10
ARM: socfpga: dts: Add adxl34x