OSDN Git Service
Simon Pilgrim [Fri, 31 May 2019 15:06:14 +0000 (15:06 +0000)]
[AMDGPU] Regenerate CTLZ tests for an upcoming patch
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362229
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Simon Pilgrim [Fri, 31 May 2019 15:05:06 +0000 (15:05 +0000)]
[UpdateTestChecks] Add support for -march=r600 to match existing -march=amdgcn support
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362228
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Cameron McInally [Fri, 31 May 2019 14:49:31 +0000 (14:49 +0000)]
[NFC][InstCombine] Add unary FNeg tests to fma.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362227
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George Rimar [Fri, 31 May 2019 13:16:21 +0000 (13:16 +0000)]
[llvm-readobj] - Remove excessive `dynamic.test`
dynamic.test is a test that checks dumping of
dynamic tags. It uses precompiled objects as inputs
and it is completely excessive nowadays:
Now we have elf-dynamic-tags-machine-specific.test
and elf-dynamic-tags.test.
(https://github.com/llvm-mirror/llvm/blob/master/test/tools/llvm-readobj/elf-dynamic-tags-machine-specific.test)
(https://github.com/llvm-mirror/llvm/blob/master/test/tools/llvm-readobj/elf-dynamic-tags.test)
First is used to check target specific tags and second tests the common flags.
These tests use YAML, which is much better than using precompiled binaries.
Note that new reviews tend to update the YAML based
tests to add new tags, e.g. see D62596.
With this patch it became possible to remove
dynamic-table-so.aarch64 binary from the inputs folder.
(other binaries are still used in other tests).
Differential revision: https://reviews.llvm.org/D62728
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362224
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Nico Weber [Fri, 31 May 2019 12:07:05 +0000 (12:07 +0000)]
gn build: Merge r362160
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362223
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Nico Weber [Fri, 31 May 2019 11:52:59 +0000 (11:52 +0000)]
gn build: Merge r362196
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362222
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Nico Weber [Fri, 31 May 2019 11:51:42 +0000 (11:51 +0000)]
gn build: Merge r362190
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362221
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Russell Gallop [Fri, 31 May 2019 10:14:04 +0000 (10:14 +0000)]
ftime-trace: Trace loop passes
These can take a significant amount of time in some builds.
Suggested by Andrea Di Biagio.
Differential Revision: https://reviews.llvm.org/D62666
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362219
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Roman Lebedev [Fri, 31 May 2019 09:47:16 +0000 (09:47 +0000)]
[InstCombine] 'C-(C2-X) --> X+(C-C2)' constant-fold
It looks this fold was already partially happening, indirectly
via some other folds, but with one-use limitation.
No other fold here has that restriction.
https://rise4fun.com/Alive/ftR
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362217
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Roman Lebedev [Fri, 31 May 2019 09:47:04 +0000 (09:47 +0000)]
[InstCombine] 'add (sub C1, X), C2 --> sub (add C1, C2), X' constant-fold
https://rise4fun.com/Alive/qJQ
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362216
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Cullen Rhodes [Fri, 31 May 2019 09:13:55 +0000 (09:13 +0000)]
[AArch64][SVE2] Asm: support WHILE instructions
Summary:
Patch adds support for the following instructions:
* WHILEGE, WHILEGT, WHILEHS, WHILEHI, WHILEWR, WHILERW
The specification can be found here:
https://developer.arm.com/docs/ddi0602/latest
Reviewed By: chill
Differential Revision: https://reviews.llvm.org/D62601
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362215
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Cullen Rhodes [Fri, 31 May 2019 09:06:53 +0000 (09:06 +0000)]
[AArch64][SVE2] Asm: support TBL/TBX instructions
Summary:
A three sources variant of the TBL instruction is added to the existing
SVE instruction in SVE2. This is implemented with minor changes to the
existing TableGen class. TBX is a new instruction with its own
definition.
The specification can be found here:
https://developer.arm.com/docs/ddi0602/latest
Reviewed By: chill
Differential Revision: https://reviews.llvm.org/D62600
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362214
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Cullen Rhodes [Fri, 31 May 2019 08:59:40 +0000 (08:59 +0000)]
[AArch64][SVE2] Asm: support SVE2 store instructions
Summary:
Patch adds support for the following instructions:
* STNT1B, STNT1H, STNT1S, STNT1D
The specification can be found here:
https://developer.arm.com/docs/ddi0602/latest
Reviewed By: chill
Differential Revision: https://reviews.llvm.org/D62599
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362213
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Petar Avramovic [Fri, 31 May 2019 08:40:08 +0000 (08:40 +0000)]
[MIPS GlobalISel] Add detailed tests for lower call
Test different operand types of callee and their behavior whether
relocation model is pic or not.
Possible operand types are:
Register (function pointer),
External symbol (used for libcalls e.g. __udivdi3 or memcpy),
Global address.
Global address has different handling depending on relocation model
and linkage type. Register and external symbol do not.
Differential Revision: https://reviews.llvm.org/D62590
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362212
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Sjoerd Meijer [Fri, 31 May 2019 08:39:34 +0000 (08:39 +0000)]
Follow up and fix for rL362064
Fix the misleadingly indentation introduced in rL362064. This will get rid of
the compiler warning, and it was actually a bug. This change will be used and
tested in D62669.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362211
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Petar Avramovic [Fri, 31 May 2019 08:27:06 +0000 (08:27 +0000)]
[MIPS GlobalISel] Handle position independent code
Handle position independent code for MIPS32.
When callee is global address, lower call will emit callee
as G_GLOBAL_VALUE and add target flag if needed.
Support $gp in getRegBankFromRegClass().
Select G_GLOBAL_VALUE, specially handle case when
there are target flags attached by lowerCall.
Differential Revision: https://reviews.llvm.org/D62589
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362210
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Roman Lebedev [Fri, 31 May 2019 08:24:07 +0000 (08:24 +0000)]
[NFC][InstCombine] Copy add/sub constant-folding tests from codegen
Last three patterns are missed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362209
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Roman Lebedev [Fri, 31 May 2019 08:23:48 +0000 (08:23 +0000)]
[NFC][Codegen] Add/sub constant-folding: add scalar tests too
Just for completeness.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362208
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Petar Avramovic [Fri, 31 May 2019 08:15:28 +0000 (08:15 +0000)]
[mips] Move initGlobalBaseReg to MipsFunctionInfo. NFC
Move initGlobalBaseReg from MipsSEDAGToDAGISel to MipsFunctionInfo.
This way functions used for handling position independent code during
instruction selection, getGlobalBaseReg and initGlobalBaseReg,
end up in same class.
Differential Revision: https://reviews.llvm.org/D62586
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362206
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Craig Topper [Fri, 31 May 2019 08:10:23 +0000 (08:10 +0000)]
[InstructionSimplify] Add missing implementation of llvm::SimplifyUnOp. NFC
There are no callers currently, but the function is declared so we should at
least implement it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362205
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Petar Avramovic [Fri, 31 May 2019 08:06:17 +0000 (08:06 +0000)]
[MIPS GlobalISel] Lower call for callee that is register
Lower call for callee that is register for MIPS32.
Register should contain callee function address.
Differential Revision: https://reviews.llvm.org/D62585
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362204
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Craig Topper [Fri, 31 May 2019 07:38:26 +0000 (07:38 +0000)]
[X86] Remove patterns for X86VSintToFP/X86VUintToFP+loadv4f32 to v2f64.
These patterns can incorrectly narrow a volatile load from 128-bits to 64-bits.
Similar to PR42079.
Switch to using (v4i32 (bitcast (v2i64 (scalar_to_vector (loadi64))))) as the
load pattern used in the instructions.
This probably still has issues in 32-bit mode where loadi64 isn't legal. Maybe
we should use VZMOVL for widened loads even when we don't need the upper bits
as zeroes?
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362203
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Craig Topper [Fri, 31 May 2019 07:38:22 +0000 (07:38 +0000)]
[X86] Add test cases for failure to use 128-bit masked vcvtdq2pd when load starts as v2i32.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362202
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Craig Topper [Fri, 31 May 2019 07:38:18 +0000 (07:38 +0000)]
[X86] Add test cases for a volatile load shrinking bug involving cvtdq2pd. NFC
Similar to PR42079
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362201
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Craig Topper [Fri, 31 May 2019 07:38:14 +0000 (07:38 +0000)]
[X86] Copy a test case from avx512-cvt.ll to avx512-cvt-widen.ll. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362200
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Craig Topper [Fri, 31 May 2019 06:21:53 +0000 (06:21 +0000)]
[X86] Remove avx512 isel patterns for fpextend+load. Prefer to only match fp extloads instead.
DAG combine will usually fold fpextend+load to an fp extload anyway. So the
256 and 512 patterns were probably unnecessary. The 128 bit pattern was special
in that it looked for a v4f32 load, but then used it in an instruction that
only loads 64-bits. This is bad if the load happens to be volatile. We could
probably make the patterns volatile aware, but that's more work for something
that's probably rare. The peephole pass might kick in and save us anyway. We
might also be able to fix this with some additional DAG combines.
This also adds patterns for vselect+extload to enabled masked vcvtps2pd to be
used. Previously we looked for the unlikely vselect+fpextend+load.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362199
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Craig Topper [Fri, 31 May 2019 06:21:49 +0000 (06:21 +0000)]
[X86] Add test to show missed opportunity to use masked vcvtps2pd for vselect+extload.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362198
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Craig Topper [Fri, 31 May 2019 06:21:45 +0000 (06:21 +0000)]
[X86] Add test case for PR42079. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362197
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Puyan Lotfi [Fri, 31 May 2019 06:02:38 +0000 (06:02 +0000)]
[MIR-Canon] Skip the first N vreg names lazily.
This consolidates the vreg skip code into one function (SkipVRegs()).
SkipVRegs() now knows if it should skip as if it is the first initialization or
subsequent skips.
The first skip is also done the first time createVirtualRegister is called by
the cursor instead of by the cursor's constructor. This prevents verifier
errors on machine functions that have no vregs (where the verifier will
complain that there are vregs when the function uses none).
Differential Revision: https://reviews.llvm.org/D62717
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362195
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Craig Topper [Fri, 31 May 2019 05:20:27 +0000 (05:20 +0000)]
[X86] Correct the ins operand order for MASKPAIR16STORE to match other store instructions.
This makes the 5 address operands come first. And the data operand comes last.
This matches the operand order the instruction is created with. It's also the
expected order in X86MCInstLower. So everything appeared to work, but the
operands didn't match their declared type.
Fixes a -verify-machineinstrs failure.
Also remove the isel patterns from these instructions since they should only
be used for stack spills and reloads. I'm not even sure what types the patterns
were looking for to match.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362193
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Puyan Lotfi [Fri, 31 May 2019 04:49:58 +0000 (04:49 +0000)]
[MIR-Canon] Hardening propagateLocalCopies.
This is am almost NFC, it does the following:
- If there is no register class for a COPY's src or dst, bail.
- Fixes uses iterator invalidation bug.
Differential Revision: https://reviews.llvm.org/D62713
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362191
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Richard Trieu [Fri, 31 May 2019 03:45:11 +0000 (03:45 +0000)]
Fix bad go bindings test.
After r362128, the "byval" attribute has a stricter check and will cause an
assertion. Remove the "byval" test case for now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362189
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Pengfei Wang [Fri, 31 May 2019 02:50:41 +0000 (02:50 +0000)]
[X86] Add VP2INTERSECT instructions
Support Intel AVX512 VP2INTERSECT instructions in llvm
Patch by Xiang Zhang (xiangzhangllvm)
Differential Revision: https://reviews.llvm.org/D62366
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362188
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Petr Hosek [Fri, 31 May 2019 01:34:51 +0000 (01:34 +0000)]
[CMake] Provide an option to use relative paths in debug info
CMake always uses absolute file paths in the generated compiler
invocation which results in absolute file paths being embedded in debug
info. This is undesirable when building a toolchain e.g. on bots as the
debug info may embed the bot source checkout path which is meaningless
anywhere else.
This change introduces the LLVM_USE_RELATIVE_PATHS_IN_DEBUG_INFO which uses
-fdebug-prefix-map (where supported) options to rewrite paths embedded
into debug info with relative ones. Additionally, LLVM_SOURCE_PREFIX can
be used to override the path to source directory with a different one.
Differential Revision: https://reviews.llvm.org/D62622
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362185
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Sam Clegg [Fri, 31 May 2019 01:04:00 +0000 (01:04 +0000)]
Fix -DBUILD_SHARED_LIBS=ON build after rL362160
Differential Revision: https://reviews.llvm.org/D62709
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362180
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Craig Topper [Thu, 30 May 2019 23:35:24 +0000 (23:35 +0000)]
[X86] Remove result type constraints from the extloadv2f32/extloadv4f32/extloadv8f32 PatFrags. NFC
The result types aren't mentioned in the pattern name so really shouldn't be in the PatFrags.
The users of these either have their own type constraint or rely on the type constranit system to realize the only legal extend would be to f64.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362175
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Matt Arsenault [Thu, 30 May 2019 23:31:36 +0000 (23:31 +0000)]
MISched: Fix -misched-regpressure=0 if subreg liveness enabled
Test is waiting on fixing several more crashes in the AMDGPU scheduler
implementation with this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362174
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Craig Topper [Thu, 30 May 2019 22:29:06 +0000 (22:29 +0000)]
[X86] Remove code that unnecessarily sets EXTLOAD with src type of v2f32/v4f32/v8f32 as Legal for SSE2/AVX/AVX512 respectively. NFC
The LoadExt table defaults to all combinations being Legal. For
vector types, only src VTs with an i1 element type were ever changed.
So we don't need to mark them legal manually.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362170
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Chris Bieneman [Thu, 30 May 2019 22:25:48 +0000 (22:25 +0000)]
Support codesigning bundles and forcing
Summary:
Clangd's framework is assembled by copying binaries from the lib and bin directories into a bundle shape. This results in an invalid bundle code signature because the signature only applies to the binaries not the resources.
This patch adds two new options to `llvm_codesign` to enable re-signing the library and XPC service as bundles.
The `BUNDLE_PATH` option allow specifying an explicit path to codesign, which enables signing bundles which aren't generated using CMake's `FRAMEWORK` or `BUNDLE` target properties.
The `FORCE` option allows re-signing binaries that have already been signed. This is required for how clangd exposes the clangd library and tools as both XPC and non-XPC services using the same binary.
Reviewers: jkorous, bogner
Reviewed By: bogner
Subscribers: mgorny, ilya-biryukov, dexonsmith, arphaman, kadircet, cfe-commits, llvm-commits
Tags: #clang, #llvm
Differential Revision: https://reviews.llvm.org/D62693
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362169
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Douglas Yung [Thu, 30 May 2019 22:20:31 +0000 (22:20 +0000)]
Fix test to add missing '|' to regex.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362168
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Michael Trent [Thu, 30 May 2019 22:11:29 +0000 (22:11 +0000)]
Update the tests in r362121 / r362141 to allow for Windows-specific error
messages: "Is a directory" instead of "is a directory"
This should resolve the errors being reported on clang-x64-windows-msvc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362167
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Amy Huang [Thu, 30 May 2019 22:04:11 +0000 (22:04 +0000)]
Add enums as global variables in the IR metadata.
Summary:
Keeps track of the enums that were used by saving them as DIGlobalVariables,
since CodeView emits debug info for global constants.
Reviewers: rnk
Subscribers: aprantl, cfe-commits, llvm-commits
Tags: #clang, #llvm
Differential Revision: https://reviews.llvm.org/D62635
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362166
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Francis Visoiu Mistrih [Thu, 30 May 2019 22:01:56 +0000 (22:01 +0000)]
[Remarks] Fix usage of enum class
Breaks the build on some compilers:
http://lab.llvm.org:8011/builders/clang-cmake-x86_64-avx2-linux/builds/9720/steps/build%20stage%201/logs/stdio
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362165
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Francis Visoiu Mistrih [Thu, 30 May 2019 21:45:59 +0000 (21:45 +0000)]
[Remarks][NFC] Move the serialization to lib/Remarks
Separate the remark serialization to YAML from the LLVM Diagnostics.
This adds a new serialization abstraction: remarks::Serializer. It's
completely independent from lib/IR and it provides an easy way to
replace YAML by providing a new remarks::Serializer.
Differential Revision: https://reviews.llvm.org/D62632
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362160
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Roman Lebedev [Thu, 30 May 2019 21:41:21 +0000 (21:41 +0000)]
[NFC][ARM] Add a test that potentially causes endless combine loop with D62266
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362159
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Puyan Lotfi [Thu, 30 May 2019 21:37:25 +0000 (21:37 +0000)]
[MIR-Canon] Fixing case where MachineFunction is empty.
In cases where the machine function is empty: bail on the RPO traversal.
Differential Revision: https://reviews.llvm.org/D62617
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362158
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Roman Lebedev [Thu, 30 May 2019 21:10:37 +0000 (21:10 +0000)]
[DAGCombine] Limit 'hoist add/sub binop w/ constant op' to non-opaque consts
I don't have a test case for these, but there is a test case for D62266
where, even after all the constant-folding patches, we still end up
with endless combine loop. Which makes sense, since we don't constant
fold for opaque constants.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362156
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Nikita Popov [Thu, 30 May 2019 21:03:17 +0000 (21:03 +0000)]
[CVP] Add tests for non-overflowing saturating math; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362153
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Nikita Popov [Thu, 30 May 2019 21:03:10 +0000 (21:03 +0000)]
[CVP] Generalize willNotOverflow(); NFC
Change argument from WithOverflowInst to BinaryOpIntrinsic, so this
function can also be used for saturating math intrinsics.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362152
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Lang Hames [Thu, 30 May 2019 20:58:28 +0000 (20:58 +0000)]
[RuntimeDyld] Update reserveAllocationSpace to account for stub padding.
This should fix the buildbot failures caused by r362139.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362151
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Martin Storsjo [Thu, 30 May 2019 20:53:21 +0000 (20:53 +0000)]
[InstCombine] Avoid use after free in DenseMap, when built with GCC
Previously, this used a statement like this:
Map[A] = Map[B];
This is equivalent to the following:
const auto &Src = Map[B];
auto &Dest = Map[A];
Dest = Src;
The second statement, "auto &Dest = Map[A];" can insert a new
element into the DenseMap, which can potentially grow and reallocate
the DenseMap's internal storage, which will invalidate the existing
reference to the source. When doing the actual assignment,
the Src reference is dereferenced, accessing memory that was
freed when the DenseMap grew.
This issue hasn't shown up when LLVM was built with Clang, because
the right hand side ended up dereferenced before evaulating the
left hand side. (If the value type is a larger data type, Clang doesn't
do this but behaves like GCC.)
With GCC, a cast to Value* isn't enough to make it dereference the
right hand side reference before invoking operator[] (while that is
enough to make Clang/LLVM do the right thing for larger types), but
storing it in an intermediate variable in a separate statement works.
This fixes PR42065.
Differential Revision: https://reviews.llvm.org/D62624
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362150
91177308-0d34-0410-b5e6-
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Roman Lebedev [Thu, 30 May 2019 20:37:49 +0000 (20:37 +0000)]
[DAGCombiner][X86][AArch64] (x - C) + y -> (x + y) - C fold. Try 2
Summary:
Only vector tests are being affected here,
since subtraction by scalar constant is rewritten
as addition by negated constant.
No surprising test changes.
https://rise4fun.com/Alive/pbT
This is a recommit, originally committed in rL361852, but reverted
to investigate test-suite compile-time hangs.
Reviewers: RKSimon, craig.topper, spatel
Reviewed By: RKSimon
Subscribers: javed.absar, kristof.beyls, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D62257
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362146
91177308-0d34-0410-b5e6-
96231b3b80d8
Roman Lebedev [Thu, 30 May 2019 20:37:39 +0000 (20:37 +0000)]
[DAGCombine] (x - C) - y -> (x - y) - C fold. Try 3
Summary:
Again only vectors affected. Frustrating. Let me take a look into that..
https://rise4fun.com/Alive/AAq
This is a recommit, originally committed in rL361852, but reverted
to investigate test-suite compile-time hangs, and then reverted in
rL362109 to fix missing constant folds that were causing
endless combine loops.
Reviewers: RKSimon, craig.topper, spatel
Reviewed By: RKSimon
Subscribers: javed.absar, JDevlieghere, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D62294
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362145
91177308-0d34-0410-b5e6-
96231b3b80d8
Roman Lebedev [Thu, 30 May 2019 20:37:29 +0000 (20:37 +0000)]
[DAGCombine][X86][AArch64][AMDGPU] (x - y) + -1 -> add (xor y, -1), x fold. Try 3
Summary:
This prevents regressions in next patch,
and somewhat recovers from the regression to AMDGPU test in D62223.
It is indeed not great that we leave vector decrement,
don't transform it into vector add all-ones..
https://rise4fun.com/Alive/ZRl
This is a recommit, originally committed in rL361852, but reverted
to investigate test-suite compile-time hangs, and then reverted in
rL362109 to fix missing constant folds that were causing
endless combine loops.
Reviewers: RKSimon, craig.topper, spatel, arsenm
Reviewed By: RKSimon, arsenm
Subscribers: kzhuravl, jvesely, wdng, nhaehnle, yaxunl, javed.absar, dstuttard, tpr, t-tye, kristof.beyls, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D62263
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362144
91177308-0d34-0410-b5e6-
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Roman Lebedev [Thu, 30 May 2019 20:37:18 +0000 (20:37 +0000)]
[DAGCombiner][X86][AArch64][SPARC][SystemZ] y - (x + C) -> (y - x) - C fold. Try 3
Summary:
Direct sibling of D62223 patch.
While i don't have a direct motivational pattern for this,
it would seem to make sense to handle both patterns (or none),
for symmetry?
The aarch64 changes look neutral;
sparc and systemz look like improvement (one less instruction each);
x86 changes - 32bit case improves, 64bit case shows that LEA no longer
gets constructed, which may be because that whole test is `-mattr=+slow-lea,+slow-3ops-lea`
https://rise4fun.com/Alive/ffh
This is a recommit, originally committed in rL361852, but reverted
to investigate test-suite compile-time hangs, and then reverted in
rL362109 to fix missing constant folds that were causing
endless combine loops.
Reviewers: RKSimon, craig.topper, spatel, t.p.northover
Reviewed By: t.p.northover
Subscribers: t.p.northover, jyknight, javed.absar, kristof.beyls, fedor.sergeev, jrtc27, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D62252
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362143
91177308-0d34-0410-b5e6-
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Roman Lebedev [Thu, 30 May 2019 20:36:54 +0000 (20:36 +0000)]
[DAGCombiner][X86][AArch64][AMDGPU] (x + C) - y -> (x - y) + C fold. Try 3
Summary:
The main motivation is shown by all these `neg` instructions that are now created.
In particular, the `@reg32_lshr_by_negated_unfolded_sub_b` test.
AArch64 test changes all look good (`neg` created), or neutral.
X86 changes look neutral (vectors), or good (`neg` / `xor eax, eax` created).
I'm not sure about `X86/ragreedy-hoist-spill.ll`, it looks like the spill
is now hoisted into preheader (which should still be good?),
2 4-byte reloads become 1 8-byte reload, and are elsewhere,
but i'm not sure how that affects that loop.
I'm unable to interpret AMDGPU change, looks neutral-ish?
This is hopefully a step towards solving [[ https://bugs.llvm.org/show_bug.cgi?id=41952 | PR41952 ]].
https://rise4fun.com/Alive/pkdq (we are missing more patterns, i'll submit them later)
This is a recommit, originally committed in rL361852, but reverted
to investigate test-suite compile-time hangs, and then reverted in
rL362109 to fix missing constant folds that were causing
endless combine loops.
Reviewers: craig.topper, RKSimon, spatel, arsenm
Reviewed By: RKSimon
Subscribers: bjope, qcolombet, kzhuravl, jvesely, wdng, nhaehnle, yaxunl, javed.absar, dstuttard, tpr, t-tye, kristof.beyls, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D62223
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362142
91177308-0d34-0410-b5e6-
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Michael Trent [Thu, 30 May 2019 20:09:09 +0000 (20:09 +0000)]
Write new tests for r362121
Summary:
The tests for r362121 ran dsymutil against a test binary every time.
This caused problems on lld-x86_64-ubuntu-fast as dsymutil required
a lipo tool be available to process those binaries.
This change rewrites the new test cases in macho-disassemble-g-dsym
to use bespoke test binaries (exe and dwarf) simplifying the test's
runtime dependencies.
The changes to tools/llvm-objdump/MachODump.cpp are unchanged from
r362121
Reviewers: pete, lhames, JDevlieghere
Reviewed By: pete
Subscribers: smeenai, aprantl, rupprecht, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D62694
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362141
91177308-0d34-0410-b5e6-
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Lang Hames [Thu, 30 May 2019 19:59:20 +0000 (19:59 +0000)]
[RuntimeDyld] Apply padding and alignment bumps to all sections with stubs, and
increase the MachO/x86-64 stub alignment to 8.
Stub alignment should be guaranteed for any section containing RuntimeDyld
stubs/GOT-entries. To do this we should pad and align all sections containing
stubs, not just code sections.
This commit also bumps the MachO/x86-64 stub alignment to 8, so that GOT entries
will be aligned.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362139
91177308-0d34-0410-b5e6-
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Cameron McInally [Thu, 30 May 2019 19:42:25 +0000 (19:42 +0000)]
[NFC][InstCombine] Add unary FNeg tests to fmul.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362137
91177308-0d34-0410-b5e6-
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Matt Arsenault [Thu, 30 May 2019 19:33:18 +0000 (19:33 +0000)]
AMDGPU/GlobalISel: Add wave scratch offset argument
Avoids crashing in PEI in a future change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362136
91177308-0d34-0410-b5e6-
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Roman Lebedev [Thu, 30 May 2019 19:27:51 +0000 (19:27 +0000)]
[DAGCombine] ((c1-A)-c2) -> ((c1-c2)-A) constant-fold
Summary: https://rise4fun.com/Alive/B0A
Reviewers: t.p.northover, RKSimon, spatel, craig.topper
Reviewed By: RKSimon
Subscribers: javed.absar, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D62691
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362135
91177308-0d34-0410-b5e6-
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Roman Lebedev [Thu, 30 May 2019 19:27:42 +0000 (19:27 +0000)]
[DAGCombine] (A-C1)-C2 -> A-(C1+C2) constant-fold
Summary: https://rise4fun.com/Alive/Mb1M
Reviewers: RKSimon, craig.topper, spatel, t.p.northover
Reviewed By: t.p.northover
Subscribers: t.p.northover, javed.absar, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D62689
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362134
91177308-0d34-0410-b5e6-
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Roman Lebedev [Thu, 30 May 2019 19:27:32 +0000 (19:27 +0000)]
[DAGCombine] (A+C1)-C2 -> A+(C1-C2) constant-fold
Summary:
Direct sibling of D62662, the root cause of the endless combine loop in D62257
https://rise4fun.com/Alive/d3W
Reviewers: RKSimon, craig.topper, spatel, t.p.northover
Reviewed By: t.p.northover
Subscribers: t.p.northover, javed.absar, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D62664
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362133
91177308-0d34-0410-b5e6-
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Roman Lebedev [Thu, 30 May 2019 19:27:26 +0000 (19:27 +0000)]
[DAGCombine] Use FoldConstantArithmetic() to perform C2-(A+C1) -> (C2-C1)-A fold
Summary:
No tests change, and i'm not sure how to test this, but it's better safe than sorry.
Reviewers: spatel, RKSimon, craig.topper, t.p.northover
Reviewed By: craig.topper
Subscribers: llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D62663
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362132
91177308-0d34-0410-b5e6-
96231b3b80d8
Roman Lebedev [Thu, 30 May 2019 19:27:19 +0000 (19:27 +0000)]
[DAGCombine] ((A-c1)+c2) -> (A+(c2-c1)) constant-fold
Summary:
This was the root cause of the endless combine loop in D62257
https://rise4fun.com/Alive/d3W
Reviewers: RKSimon, spatel, craig.topper, t.p.northover
Reviewed By: t.p.northover
Subscribers: t.p.northover, javed.absar, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D62662
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362131
91177308-0d34-0410-b5e6-
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Roman Lebedev [Thu, 30 May 2019 19:27:10 +0000 (19:27 +0000)]
[DAGCombine] Use FoldConstantArithmetic() to perform ((c1-A)+c2) -> (c1+c2)-A fold
Summary: No tests change, and i'm not sure how to test this, but it's better safe than sorry.
Reviewers: spatel, RKSimon, craig.topper, t.p.northover
Reviewed By: craig.topper
Subscribers: llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D62661
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362130
91177308-0d34-0410-b5e6-
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Tim Northover [Thu, 30 May 2019 18:48:23 +0000 (18:48 +0000)]
Reapply: IR: add optional type to 'byval' function parameters
When we switch to opaque pointer types we will need some way to describe
how many bytes a 'byval' parameter should occupy on the stack. This adds
a (for now) optional extra type parameter.
If present, the type must match the pointee type of the argument.
The original commit did not remap byval types when linking modules, which broke
LTO. This version fixes that.
Note to front-end maintainers: if this causes test failures, it's probably
because the "byval" attribute is printed after attributes without any parameter
after this change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362128
91177308-0d34-0410-b5e6-
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Tim Renouf [Thu, 30 May 2019 18:46:34 +0000 (18:46 +0000)]
[AMDGPU] Added target-specific attribute amdgpu-max-memory-clause
With LLPC, previous investigation has suggested that si-scheduler
interacts badly with SiFormMemoryClauses on an XNACK target in some
games.
That needs further investigation in the future. In the meantime, this
commit adds a target-specific attribute to allow us to disable
SIFormMemoryClauses by setting it to 1 on a per-function basis for LLPC
to use.
Differential Revision: https://reviews.llvm.org/D62572
Change-Id: Ia0ca12ce79093cbbe86caded723ffb13384ede92
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362127
91177308-0d34-0410-b5e6-
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Florian Hahn [Thu, 30 May 2019 18:46:13 +0000 (18:46 +0000)]
[LV] Remove the redundant using LoopVectorizationPlanner:VPlanPtr
VPlan.h already contains the declaration of VPlanPtr type alias:
using VPlanPtr = std::unique_ptr<VPlan>;
The LoopVectorizationPlanner class also contains the same declaration
of VPlanPtr and therefore LoopVectorize requires a long wording when
its methods return VPlanPtr:
LoopVectorizationPlanner::VPlanPtr
LoopVectorizationPlanner::buildVPlanWithVPRecipes(...)
but LoopVectorize.cpp includes VPlan.h (via LoopVectorizationPlanner.h)
and can use VPlanPtr from that header.
Patch by Pavel Samolysov.
Reviewers: hsaito, rengolin, fhahn
Reviewed By: fhahn
Differential Revision: https://reviews.llvm.org/D62576
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362126
91177308-0d34-0410-b5e6-
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Craig Topper [Thu, 30 May 2019 18:19:35 +0000 (18:19 +0000)]
[LoopVectorize] Add FNeg instruction support
Differential Revision: https://reviews.llvm.org/D62510
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362124
91177308-0d34-0410-b5e6-
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Michael Trent [Thu, 30 May 2019 18:17:10 +0000 (18:17 +0000)]
Reverting change r362121 due to lld-x86_64-ubuntu-fast test failures
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362123
91177308-0d34-0410-b5e6-
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Puyan Lotfi [Thu, 30 May 2019 18:06:28 +0000 (18:06 +0000)]
[MIR-Canon] Add support for rewriting VRegs that are typed but don't have an RC.
There were crashes (addrspace-memoperands.mir was only one of them) in MIR that
had operands that came from before register classes were set. With these
operands, creating a replacement vreg (for MIR-Canon's renaming) needs to use
the vreg type rather than the RegisterClass which is not present.
Differential Revision: https://reviews.llvm.org/D62543
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362122
91177308-0d34-0410-b5e6-
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Michael Trent [Thu, 30 May 2019 17:56:05 +0000 (17:56 +0000)]
Support Universal dSYM files in llvm-objdump
Summary:
Commonly programmers use llvm-objdump to disassemble Mach-O target
binaries with Mach-O dSYMS. While llvm-objdump allows programmers to
disassemble Universal binaries, it previously did not recognize
Universal dSYM files. This change updates llvm-objdump to support
passing in Universal files via the -dsym option. Now, when
disassembling a Mach-O file either as a stand alone file or as an entry
in a Universal binariy, llvm-objdump will search through a Universal
dSYM for a Mach-O matching the architecture flag of the file being
disassembled.
Reviewers: pete, lhames
Reviewed By: pete
Subscribers: rupprecht, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D62642
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362121
91177308-0d34-0410-b5e6-
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Jan Korous [Thu, 30 May 2019 17:54:26 +0000 (17:54 +0000)]
[NFC] Fix SmallVector::append comments
Fix the copy-pasted comment.
Remove low-value comments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362120
91177308-0d34-0410-b5e6-
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Kevin P. Neal [Thu, 30 May 2019 17:21:45 +0000 (17:21 +0000)]
Correct error in revert of r362112.
Differential Revision: http://reviews.llvm.org/D62546
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362118
91177308-0d34-0410-b5e6-
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Kevin P. Neal [Thu, 30 May 2019 17:10:21 +0000 (17:10 +0000)]
Revert r362112, it broke the bots with the message "Unsupported vector argument or return type"
Differential Revision: http://reviews.llvm.org/D62546
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362117
91177308-0d34-0410-b5e6-
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Roman Lebedev [Thu, 30 May 2019 16:50:43 +0000 (16:50 +0000)]
[NFC][Codegen] Potential add/sub constant folding: fixup non-splat tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362114
91177308-0d34-0410-b5e6-
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J. Ryan Stinnett [Thu, 30 May 2019 16:46:22 +0000 (16:46 +0000)]
[Docs] Modernize references to macOS
Summary:
This updates all places in documentation that refer to "Mac OS X", "OS X", etc.
to instead use the modern name "macOS" when no specific version number is
mentioned.
If a specific version is mentioned, this attempts to use the OS name at the time
of that version:
* Mac OS X for 10.0 - 10.7
* OS X for 10.8 - 10.11
* macOS for 10.12 - present
Reviewers: JDevlieghere
Subscribers: mgorny, christof, arphaman, cfe-commits, lldb-commits, libcxx-commits, llvm-commits
Tags: #clang, #lldb, #libc, #llvm
Differential Revision: https://reviews.llvm.org/D62654
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362113
91177308-0d34-0410-b5e6-
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Kevin P. Neal [Thu, 30 May 2019 16:44:47 +0000 (16:44 +0000)]
[FPEnv] Added a special UnrollVectorOp method to deal with the chain on StrictFP opcodes
This change creates UnrollVectorOp_StrictFP. The purpose of this is to address a failure that consistently occurs when calling StrictFP functions on vectors whose number of elements is 3 + 2n on most platforms, such as PowerPC or SystemZ. The old UnrollVectorOp method does not expect that the vector that it will unroll will have a chain, so it has an assert that prevents it from running if this is the case. This new StrictFP version of the method deals with the chain while unrolling the vector. With this new function in place during vector widending, llc can run vector-constrained-fp-intrinsics.ll for SystemZ successfully.
Submitted by: Drew Wock <drew.wock@sas.com>
Reviewed by: Cameron McInally, Kevin P. Neal
Approved by: Cameron McInally
Differential Revision: http://reviews.llvm.org/D62546
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362112
91177308-0d34-0410-b5e6-
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Roman Lebedev [Thu, 30 May 2019 16:07:19 +0000 (16:07 +0000)]
[NFC][Codegen] Add better test coverage for potential add/sub constant folding
This adds hopefully-full test coverage for all the possible permutations:
First op is one of:
* x + c1
* x - c1
* c1 - x
Second op is one of:
* + c2
* - c2
* c2 -
And thus 3*3=9 patterns.
Some of them show missed constant-folds.
Without previous patch (the revert), these tests were causing endless
dagcombine loop. I really should have thought about this first :S
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362110
91177308-0d34-0410-b5e6-
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Roman Lebedev [Thu, 30 May 2019 16:07:11 +0000 (16:07 +0000)]
[DAGCombine] Revert of recommit of "binop-with-const hoisting" patches
I was looking into an endless combine loop the uncommitted follow-up patch
was causing, and it appears even these patches can exibit such an
endless loop. The root cause is that we try to hoist one binop (add/sub) with
constant operand, and if we get two such binops both of which are
eligible for this hoisting, we get stuck.
Some cases may highlight missing constant-folds.
Reverts r361871,r361872,r361873,r361874.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362109
91177308-0d34-0410-b5e6-
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Sam Parker [Thu, 30 May 2019 15:26:37 +0000 (15:26 +0000)]
[NFC][ARM][ParallelDSP] Refactor narrow sequence
Most of the code used for finding a 'narrow' sequence is not used,
so I've removed it and simplified the calls from the smlad matcher.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362104
91177308-0d34-0410-b5e6-
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Sjoerd Meijer [Thu, 30 May 2019 14:34:29 +0000 (14:34 +0000)]
[ARM] Change the MC names for VMAXNM/VMINNM
Now the NEON ones have a prefix "NEON_", and the VFP ones have a
prefix "VFP_". This is so that the regex in ARMScheduleA57.td can be
made to match both of _those_ classes of VMAXNM without also matching
the MVE ones that are going to be introduced soon. NFCI.
Patch by Simon Tatham.
Differential Revision: https://reviews.llvm.org/D60700
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362097
91177308-0d34-0410-b5e6-
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Simon Pilgrim [Thu, 30 May 2019 14:01:24 +0000 (14:01 +0000)]
[ARM] LowerVECTOR_SHUFFLE - fix uninitialized variable warnings. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362094
91177308-0d34-0410-b5e6-
96231b3b80d8
Roman Lebedev [Thu, 30 May 2019 13:02:11 +0000 (13:02 +0000)]
[NFC][Codegen] Add add+sub/sub+add constant-fold tests for from D62257
add+sub/sub+add when second operands are constants should be folded
into a single add, just like with add+add.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362093
91177308-0d34-0410-b5e6-
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Roman Lebedev [Thu, 30 May 2019 13:02:06 +0000 (13:02 +0000)]
[LoopIdiom] Basic OptimizationRemarkEmitter handling
Summary:
I'm adding ORE to memset/memcpy formation, with tests,
but mainly this is split off from D61144.
Reviewers: reames, anemet, thegameg, craig.topper
Reviewed By: thegameg
Subscribers: llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D62631
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362092
91177308-0d34-0410-b5e6-
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Roman Lebedev [Thu, 30 May 2019 13:01:53 +0000 (13:01 +0000)]
[LoopIdiomRecognize][NFC] Sort includes
Split off from D61144
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362091
91177308-0d34-0410-b5e6-
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Sjoerd Meijer [Thu, 30 May 2019 12:57:04 +0000 (12:57 +0000)]
[ARM] add target arch definitions for 8.1-M and MVE
This adds:
- LLVM subtarget features to make all the new instructions conditional on,
- CPU and FPU names for use on clang's command line, with default FPUs set
so that "armv8.1-m.main+fp" and "armv8.1-m.main+fp.dp" will select the right
FPU features,
- architecture extension names "mve" and "mve.fp",
- ABI build attribute support for v8.1-M (a new value for Tag_CPU_arch) and MVE
(a new actual tag).
Patch mostly by Simon Tatham.
Differential Revision: https://reviews.llvm.org/D60698
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362090
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George Rimar [Thu, 30 May 2019 12:39:05 +0000 (12:39 +0000)]
[llvm-readobj] - Rewrite reloc-types.test to use YAML. NFCI.
This change rewrites and splits reloc-types.test
to use yaml2obj instead of precompiled binaries.
That allowed to remove 7 precompiled objects from the inputs.
I took the existent objects, used obj2yaml on them, simplified the result and
used yaml2obj in the test case with the result.
Notes:
* I converted, but did not remove relocs.obj.elf-i386, relocs.obj.elf-x86_64 or relocs.obj.elf-mips objects
because found they are used in other tests.
* I was unable to convert relocs.obj.elf-ppc64, because obj2yaml hangs on this file for me.
* I was unable to convert relocs.obj.macho-arm, relocs.obj.macho-i386 and relocs.obj.macho-x86_64
because the output produced by obj2yaml does not seem to be correct.
* Because of the above I did not remove the script for creating all
of those objects: test\tools\llvm-readobj\Inputs\relocs.py
Differential revision: https://reviews.llvm.org/D62594
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362089
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Sjoerd Meijer [Thu, 30 May 2019 12:37:05 +0000 (12:37 +0000)]
[ARM] Introduce separate features for FP registers
The MVE extension in Arm v8.1-M permits the use of some move, load and
store isntructions which access the FP registers, even if there's no
actual FP support in the processor (in particular, if you have the
integer-only version of MVE).
Therefore, we need separate subtarget features to condition those
instructions on, which are implied by both FP and MVE but are not part
of either.
Patch mostly by Simon Tatham.
Differential Revision: https://reviews.llvm.org/D60694
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362088
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George Rimar [Thu, 30 May 2019 10:42:47 +0000 (10:42 +0000)]
[llvm-readobj] - An attemp to fix BB.
BB failed:
http://lab.llvm.org:8011/builders/clang-armv7-linux-build-cache/builds/15062/steps/build%20stage%201/logs/stdio
Error was:
/home/buildslave/buildslave/clang-armv7-linux-build-cache/llvm/tools/llvm-readobj/ELFDumper.cpp:3540:7:
error: non-constant-expression cannot be narrowed from type 'llvm::support::detail::packed_endian_specific_integral<unsigned long long,
llvm::support::endianness::little, 1>::value_type' (aka 'unsigned long long') to 'size_t' (aka 'unsigned int') in initializer list [-Wc++11-narrowing]
StrTabSec->sh_size};
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362084
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Simon Pilgrim [Thu, 30 May 2019 10:41:04 +0000 (10:41 +0000)]
[CostModel][X86] Add bool vector and/or/xor cost tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362083
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George Rimar [Thu, 30 May 2019 10:36:52 +0000 (10:36 +0000)]
[llvm-readobj/llvm-readelf] - Implement GNU style dumper of the SHT_GNU_verdef section.
It was not implemented yet, we had only LLVM style dumper implemented.
Section description is here: https://refspecs.linuxfoundation.org/LSB_5.0.0/LSB-Core-generic/LSB-Core-generic/symversion.html
Differential revision: https://reviews.llvm.org/D62520
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362082
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Simon Pilgrim [Thu, 30 May 2019 10:25:20 +0000 (10:25 +0000)]
[X86][SSE] Improve bool vector extload (PR26091)
We already have good codegen for (vXiY *ext(vXi1 bitcast(iX))) cases, this patch uses it for loads of vXi1 types as well - changing the load into a iX integer load, and bitcasting so that combineToExtendBoolVectorInReg can then use it.
Differential Revision: https://reviews.llvm.org/D62449
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362081
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George Rimar [Thu, 30 May 2019 10:14:41 +0000 (10:14 +0000)]
[llvm-readobj/llvm-readelf] - Implement GNU style dumper of the SHT_GNU_verneed section.
It was not implemented yet, we had only LLVM style dumper implemented.
Section description is here: https://refspecs.linuxfoundation.org/LSB_2.0.1/LSB-Core/LSB-Core/symverrqmts.html
Differential revision: https://reviews.llvm.org/D62516
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362080
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Simon Pilgrim [Thu, 30 May 2019 09:40:35 +0000 (09:40 +0000)]
Fix sphinx warning about missing footnote.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362077
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Eugene Leviant [Thu, 30 May 2019 09:09:01 +0000 (09:09 +0000)]
[llvm-objcopy] Remove %p format specifiers
On 32-bit machines %p expects 32 bit values, however
addresses in llvm-objcopy are always 64 bits.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362074
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Cullen Rhodes [Thu, 30 May 2019 08:51:39 +0000 (08:51 +0000)]
[AArch64][SVE2] Asm: support SVE2 vector splice (constructive)
Summary:
The specification can be found here:
https://developer.arm.com/docs/ddi0602/latest
Reviewed By: SjoerdMeijer
Differential Revision: https://reviews.llvm.org/D62530
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362073
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Cullen Rhodes [Thu, 30 May 2019 08:44:27 +0000 (08:44 +0000)]
[AArch64][SVE2] Asm: support SVE2 load instructions
Summary:
Patch adds support for the following instructions:
* LDNT1SB, LDNT1B, LDNT1SH, LDNT1H, LDNT1SW, LDNT1W, LDNT1D
The specification can be found here:
https://developer.arm.com/docs/ddi0602/latest
Reviewed By: SjoerdMeijer
Differential Revision: https://reviews.llvm.org/D62528
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362072
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Cullen Rhodes [Thu, 30 May 2019 08:35:12 +0000 (08:35 +0000)]
[AArch64][SVE2] Asm: support FCVTX/FLOGB instructions
Summary:
Patch completes SVE2 support for:
SVE Floating Point Unary Operations - Predicated Group
The specification can be found here:
https://developer.arm.com/docs/ddi0602/latest
Reviewed By: SjoerdMeijer
Differential Revision: https://reviews.llvm.org/D62526
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362071
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