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Simon Pilgrim [Mon, 10 Apr 2017 16:58:07 +0000 (16:58 +0000)]
[X86][MMX] Add fast-isel support for MMX non-temporal writes
Differential Revision: https://reviews.llvm.org/D31754
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299852
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Sanjay Patel [Mon, 10 Apr 2017 16:55:57 +0000 (16:55 +0000)]
[InstCombine] fix matching of or-of-icmps constants (PR32524)
Also, make the same change in and-of-icmps and remove a hack for detecting that case.
Finally, add some FIXME comments because the code duplication here is awful.
This should fix the remaining IR problem noted in:
https://bugs.llvm.org/show_bug.cgi?id=32524
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299851
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Adrian McCarthy [Mon, 10 Apr 2017 16:43:09 +0000 (16:43 +0000)]
Improves pretty printing of variable types in llvm-pdbdump
* Adds support for pointers to arrays, which was missing
* Adds some tests
* Improves consistency of const and volatile qualifiers
* Eliminates non-composable special case code for arrays and function by using
a more general recursive approach
* Has a hack for getting the calling convention into the right spot for
pointer-to-functions
Given the rapid changes happenning in llvm-pdbdump, this may be difficult to
merge.
Differential Revision: https://reviews.llvm.org/D31832
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299848
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Craig Topper [Mon, 10 Apr 2017 16:40:00 +0000 (16:40 +0000)]
[InstCombine] Support folding of add instructions with vector constants into select operations
We currently only fold scalar add of constants into selects. This improves this to support vectors too.
Differential Revision: https://reviews.llvm.org/D31683
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299847
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Sanjay Patel [Mon, 10 Apr 2017 16:28:08 +0000 (16:28 +0000)]
[InstCombine] add test for PR32524; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299846
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Diana Picus [Mon, 10 Apr 2017 09:27:39 +0000 (09:27 +0000)]
[ARM] GlobalISel: Support G_FPOW for float and double
Legalize to a libcall.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299841
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Craig Topper [Mon, 10 Apr 2017 07:13:40 +0000 (07:13 +0000)]
[InstCombine] Use commutable and/or/xor matchers to simplify some code
Summary:
This is my first time using the commutable matchers so wanted to make sure I was doing it right.
Are there any other matcher tricks to further shrink this? Can we commute the whole match so we don't have to LHS and RHS separately?
Reviewers: davide, spatel
Reviewed By: davide
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D31680
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299840
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Craig Topper [Mon, 10 Apr 2017 07:06:44 +0000 (07:06 +0000)]
[SelectionDAG] TargetLowering::SimplifyDemandedBits how to properly calculate KnownZero bits for ISD::SETCC and ISD::AssertZExt
Summary:
For SETCC we aren't calculating the KnownZero bits at all. I've copied the code from computeKnownZero over for this.
For AssertZExt we were only setting KnownZero for bits that were demanded. But the upper bits are zero whether they were demanded or not.
I'm interested in fixing this because my belief is the first part of the ISD::AND handling code in SimplifyDemandedBits largely exists because of these two bugs. In that code we go to computeKnownBits for the LHS and optimize a RHS constant. Because computeKnownBits handles SETCC and AssertZExt correctly we get better information sometimes than when we call SimplifyDemandedBits on the LHS later. With these two issues fixed in SimplifyDemandedBits I was able to remove that computeKnownBits call and still pass all X86 tests. I'll submit that change in a separate patch.
Reviewers: RKSimon, spatel
Reviewed By: RKSimon
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D31715
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299839
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Craig Topper [Mon, 10 Apr 2017 07:00:10 +0000 (07:00 +0000)]
[InstCombine] Make sure we preserve fast math flags when folding fp instructions into phi nodes
Summary: I noticed in the select folding code that we copied fast math flags, but did not do the same for the similar handling in phi nodes. This patch fixes that to do the same thing as select
Reviewers: spatel, davide, majnemer, hfinkel
Reviewed By: davide
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D31690
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299838
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Craig Topper [Mon, 10 Apr 2017 06:53:28 +0000 (06:53 +0000)]
[InstCombine] use m_c_And and m_c_Xor to handle commuted versions of a transform.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299837
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Craig Topper [Mon, 10 Apr 2017 06:53:25 +0000 (06:53 +0000)]
[InstCombine] Add test cases demonstrating missing handling for the commuted version of a transform. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299836
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Craig Topper [Mon, 10 Apr 2017 06:53:23 +0000 (06:53 +0000)]
[InstCombine] Remove unnecessary dyn_cast to BinaryOperator around some matcher checks in visitXor.
The matchers themselves should be enough.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299835
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Craig Topper [Mon, 10 Apr 2017 06:53:21 +0000 (06:53 +0000)]
[InstCombine] Make the (A|B)^B -> A & ~B transform code consistent with the very similar (A&B)^B -> ~A & B code. This should be NFC except for the addition of hasOneUse check.
I think this code is still overly complicated and should use matchers, but first I wanted to make it consistent.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299834
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Craig Topper [Mon, 10 Apr 2017 06:53:19 +0000 (06:53 +0000)]
[InstCombine] Use m_OneUse to shorten some code. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299833
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Zachary Turner [Mon, 10 Apr 2017 06:30:28 +0000 (06:30 +0000)]
Remove unused method.
This is causing build breaks, but it's unused anyway, so delete
it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299832
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Zachary Turner [Mon, 10 Apr 2017 06:14:09 +0000 (06:14 +0000)]
General usability improvements to generic PDB library.
1. Added some asserts to make sure concrete symbol types don't
get constructed with RawSymbols that have an incompatible
SymTag enum value.
2. Added new forwarding macros that auto-define an Id/Sym method
pair whenever there is a method that returns a SymIndexId.
Previously we would just provide one method that returned only
the SymIndexId and it was up to the caller to use the Session
object to get a pointer to the symbol. Now we automatically
get both the method that returns the Id, as well as a method
that returns the pointer directly with just one macro.
3. Added some methods for dumping straight to stdout that can
be used from inside the debugger for diagnostics during a
debug session.
4. Added a clone() method and a cast<T>() method to PDBSymbol
that can shorten some usage patterns.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299831
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Xin Tong [Mon, 10 Apr 2017 00:33:25 +0000 (00:33 +0000)]
[SCCP] Resolve indirect branch target when possible.
Summary:
Resolve indirect branch target when possible.
This potentially eliminates more basicblocks and result in better evaluation for phi and other things.
Reviewers: davide, efriedma, sanjoy
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D30322
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299830
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Sanjay Patel [Sun, 9 Apr 2017 21:51:34 +0000 (21:51 +0000)]
[InstCombine] remove dead cases from icmp pair switches; NFCI
"PredicatesFoldable" returns false for signed/unsigned mismatched pairs,
so these cases should never exist. We'll default to 'unreachable' on those
predicate combos instead.
Most of what's left in these switches belongs in InstSimplify (and may
already be there), so there's probably more that can be done to reduce
this code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299829
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Sanjay Patel [Sun, 9 Apr 2017 21:45:52 +0000 (21:45 +0000)]
[InstCombine] remove duplicate test; NFC
I moved this test to 'not.ll' in r299824 but accidentally added a copy here.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299828
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Davide Italiano [Sun, 9 Apr 2017 20:47:14 +0000 (20:47 +0000)]
[Mem2Reg] Remove AliasSetTracker updating logic from the pass.
No caller has been passing it for a long time.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299827
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Sanjay Patel [Sun, 9 Apr 2017 16:16:32 +0000 (16:16 +0000)]
[SimplifyCFG] auto-generate better checks; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299825
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Sanjay Patel [Sun, 9 Apr 2017 15:44:59 +0000 (15:44 +0000)]
[InstCombine] auto-generate better checks; NFC
Also, move a test next to its sibling to eliminate a file with just one test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299824
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Hal Finkel [Sun, 9 Apr 2017 12:57:50 +0000 (12:57 +0000)]
[MemorySSA] Fix use of pointsToConstantMemory in isUseTriviallyOptimizableToLiveOnEntry
In isUseTriviallyOptimizableToLiveOnEntry, pointsToConstantMemory needs to be
called on the load's pointer operand, not on the result of the load (which
might not even be a pointer).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299823
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Craig Topper [Sun, 9 Apr 2017 06:12:41 +0000 (06:12 +0000)]
[InstCombine] Extend some OR combines to support vectors.
This adds support for these combines for vectors
(X^C)|Y -> (X|Y)^C iff Y&C == 0
Y|(X^C) -> (X|Y)^C iff Y&C == 0
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299822
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Craig Topper [Sun, 9 Apr 2017 06:12:39 +0000 (06:12 +0000)]
[InstCombine] Extend a canonicalization check to apply to vector constants too.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299821
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Craig Topper [Sun, 9 Apr 2017 06:12:36 +0000 (06:12 +0000)]
[InstCombine] Add test cases to show missing support for vectors in an OR combine. Also add the commuted versions. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299820
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Craig Topper [Sun, 9 Apr 2017 06:12:34 +0000 (06:12 +0000)]
[InstCombine] Use the SubOne helper function to shorten some code. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299819
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Craig Topper [Sun, 9 Apr 2017 06:12:31 +0000 (06:12 +0000)]
[InstCombine] rename variable for easier reading; NFC
We usually give constants a 'C' somewhere in the name...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299818
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Peter Collingbourne [Sat, 8 Apr 2017 23:35:49 +0000 (23:35 +0000)]
MC: Remove unused virtual function MCObjectWriter::isWeak. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299817
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Matt Arsenault [Sat, 8 Apr 2017 21:28:38 +0000 (21:28 +0000)]
AMDGPU: Actually write nops for writeNopData
Before this was just writing 0s, which ends up looking like a
v_cndmask_b32 v0, s0, v0, vcc. Write out an encoded s_nop instead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299816
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Coby Tayree [Sat, 8 Apr 2017 20:29:03 +0000 (20:29 +0000)]
[AsmParser]Emit an error if a macro has two (or more) parameters sharing the same name
Introducing a new error to macro parameters' parsing:
currently, llvm-mc won't complain if a macro have two (or more) named params with the same name.
this behavior is false, as there's no merit in having some params sharing a name.
now, instead of tolerate such a phenomena - emit an appropriate error.
Differential Revision: https://reviews.llvm.org/D31674
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299815
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Mehdi Amini [Sat, 8 Apr 2017 19:20:30 +0000 (19:20 +0000)]
Reorganize libLTO C API header lto.h (NFC)
This just makes it easier to follow the Doxygen blocks
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299814
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Craig Topper [Sat, 8 Apr 2017 05:47:09 +0000 (05:47 +0000)]
[IR] Inline Type::getScalarType() by using isVectorTy() and getVectorElementType() that were already available inline.
Seems to have very little compiled code size impact. But might give a tiny performance boost.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299811
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Balaram Makam [Sat, 8 Apr 2017 03:30:15 +0000 (03:30 +0000)]
[AArch64] Refine Falkor Machine Model - Part 3
This concludes the refinements to Falkor Machine Model.
It includes SchedPredicates for immediate zero and LSL Fast.
Forwarding logic is also modeled for vector multiply and
accumulate only.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299810
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Gor Nishanov [Sat, 8 Apr 2017 00:49:46 +0000 (00:49 +0000)]
[coroutines] Make CoroSplit pass deterministic
coro-split-after-phi.ll test was flaky due to non-determinism in
the coroutine frame construction that was sorting the spill
vector using a pointer to a def as a part of the key.
The sorting was intended to make sure that spills for the same def
are kept together, however, we populate the vector by processing
defs in order, so the spill entires will end up together anyways.
This change removes spill sorting and restores the determinism
in the test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299809
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Gor Nishanov [Sat, 8 Apr 2017 00:16:58 +0000 (00:16 +0000)]
gitignore: Ignore .vs folder (VS2017 config files)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299808
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Evgeniy Stepanov [Fri, 7 Apr 2017 23:00:20 +0000 (23:00 +0000)]
[cfi] Take over existing __cfi_check in CrossDSOCFI.
https://reviews.llvm.org/D31796 will emit a dummy __cfi_check in the
frontend.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299805
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Eli Friedman [Fri, 7 Apr 2017 22:01:23 +0000 (22:01 +0000)]
[ARM] Prefer BIC over BFC in ARM mode.
BIC is generally faster, and it can put the output in a different
register from the input.
We already do this in Thumb2 mode; not sure why the equivalent fix
never got applied to ARM mode.
Differential Revision: https://reviews.llvm.org/D31797
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299803
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Aditya Nandakumar [Fri, 7 Apr 2017 21:49:30 +0000 (21:49 +0000)]
[GlobalISel]: Fix bug where we can report GISelFailure on erased instructions
The original instruction might get legalized and erased and expanded
into intermediate instructions and the intermediate instructions might
fail legalization. This end up in reporting GISelFailure on the erased
instruction.
Instead report GISelFailure on the intermediate instruction which failed
legalization.
Reviewed by: ab
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299802
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Craig Topper [Fri, 7 Apr 2017 21:36:32 +0000 (21:36 +0000)]
[ConstantFolding] Use Intrinsic::not_intrinsic instead of 0 for readability. NFCI
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299801
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Petr Hosek [Fri, 7 Apr 2017 20:41:58 +0000 (20:41 +0000)]
[AArch64] Allow global register asm("x18") or asm("w18") under -ffixed-x18
When using -ffixed-x18, the x18 (or w18) register can safely be used
with the "global register variable" GCC extension, but the backend
fails to recognize it.
Patch by Roland McGrath.
Differential Revision: https://reviews.llvm.org/D31793
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299799
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Daniel Berlin [Fri, 7 Apr 2017 18:38:09 +0000 (18:38 +0000)]
NewGVN: Make CongruenceClass a real class in preparation for splitting
NewGVN into analysis and eliminator.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299792
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Reid Kleckner [Fri, 7 Apr 2017 18:02:53 +0000 (18:02 +0000)]
De-flake a test that is failing due to coroutine spill insertion non-determinism
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299791
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Davide Italiano [Fri, 7 Apr 2017 17:34:37 +0000 (17:34 +0000)]
[Dominators] Simplify a member function. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299789
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Simon Dardis [Fri, 7 Apr 2017 17:25:05 +0000 (17:25 +0000)]
Revert "[SelectionDAG] Enable target specific vector scalarization of calls and returns"
This reverts commit r299766. This change appears to have broken the MIPS
buildbots. Reverting while I investigate.
Revert "[mips] Remove usage of debug only variable (NFC)"
This reverts commit r299769. Follow up commit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299788
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Stanislav Mekhanoshin [Fri, 7 Apr 2017 16:26:28 +0000 (16:26 +0000)]
[AMDGPU] Unroll more to eliminate phis and conditions
Increase threshold to unroll a loop which contains an "if" statement
whose condition defined by a PHI belonging to the loop. This may help
to eliminate if region and potentially even PHI itself, saving on
both divergence and registers used for the PHI.
Add a small bonus for each of such "if" statements.
Differential Revision: https://reviews.llvm.org/D31693
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299779
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Dehao Chen [Fri, 7 Apr 2017 15:41:52 +0000 (15:41 +0000)]
Use PMADDWD to expand reduction in a loop
Summary:
PMADDWD can help improve 8/16 bit integer mutliply-add operation performance for cases like:
for (int i = 0; i < count; i++)
a += x[i] * y[i];
Reviewers: wmi, davidxl, hfinkel, RKSimon, zvi, mkuper
Reviewed By: mkuper
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D31679
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299776
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Reid Kleckner [Fri, 7 Apr 2017 15:28:32 +0000 (15:28 +0000)]
[lit] Try using process pools by default again
Both pickling errors encountered on clang bots and Darwin compiler-rt
should now be fixed.
This has no impact on testing time on Linux, and on Windows goes from
88s to 63s for 'check'. The tests pass on Mac, but I haven't compared
execution time.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299775
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Igor Breger [Fri, 7 Apr 2017 14:41:59 +0000 (14:41 +0000)]
[GlobalISel] implement narrowing for G_CONSTANT.
Summary: [GlobalISel] implement narrowing for G_CONSTANT.
Reviewers: bogner, zvi, t.p.northover
Reviewed By: t.p.northover
Subscribers: llvm-commits, dberris, rovka, kristof.beyls
Differential Revision: https://reviews.llvm.org/D31744
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299772
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Gor Nishanov [Fri, 7 Apr 2017 14:16:49 +0000 (14:16 +0000)]
[coroutines] Insert spills of PHI instructions correctly
Summary:
Fix a bug where we were inserting a spill in between the PHIs in the beginning of the block.
Consider this fragment:
```
begin:
%phi1 = phi i32 [ 0, %entry ], [ 2, %alt ]
%phi2 = phi i32 [ 1, %entry ], [ 3, %alt ]
%sp1 = call i8 @llvm.coro.suspend(token none, i1 false)
switch i8 %sp1, label %suspend [i8 0, label %resume
i8 1, label %cleanup]
resume:
call i32 @print(i32 %phi1)
```
Unless we are spilling the argument or result of the invoke, we were always inserting the spill immediately following the instruction.
The fix adds a check that if the spilled instruction is a PHI Node, select an appropriate insert point with `getFirstInsertionPt()` that
skips all the PHI Nodes and EH pads.
Reviewers: majnemer, rnk
Reviewed By: rnk
Subscribers: qcolombet, EricWF, llvm-commits
Differential Revision: https://reviews.llvm.org/D31799
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299771
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Matthew Simpson [Fri, 7 Apr 2017 14:15:34 +0000 (14:15 +0000)]
Reapply r298620: [LV] Vectorize GEPs
This patch reapplies r298620. The original patch was reverted because of two
issues. First, the patch exposed a bug in InstCombine that caused the Chromium
builds to fail (PR32414). This issue was fixed in r299017. Second, the patch
introduced a bug in the vectorizer's scalars analysis that caused test suite
builds to fail on SystemZ. The scalars analysis was too aggressive and marked a
memory instruction scalar, even though it was going to be vectorized. This
issue has been fixed in the current patch and several new test cases for the
scalars analysis have been added.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299770
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Simon Dardis [Fri, 7 Apr 2017 13:49:12 +0000 (13:49 +0000)]
[mips] Remove usage of debug only variable (NFC)
Fix the lld-x86_64-darwin13 buildbot by removing the declaration of a
debug only variable and instead moving the value into the debug statement.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299769
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Petar Jovanovic [Fri, 7 Apr 2017 13:31:36 +0000 (13:31 +0000)]
[mips][msa] Fix generation of bm(n)zi and bins[lr]i instructions
We have two cases here, the first one being the following instruction
selection from the builtin function:
bm(n)zi builtin -> vselect node -> bins[lr]i machine instruction
In case of bm(n)zi having an immediate which has either its high or low bits
set, a bins[lr] instruction can be selected through the selectVSplatMask[LR]
function. The function counts the number of bits set, and that value is
being passed to the bins[lr]i instruction as its immediate, which in turn
copies immediate modulo the size of the element in bits plus 1 as per specs,
where we get the off-by-one-error.
The other case is:
bins[lr]i -> vselect node -> bsel.v
In this case, a bsel.v instruction gets selected with a mask having one bit
less set than required.
Patch by Stefan Maksimovic.
Differential Revision: https://reviews.llvm.org/D30579
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299768
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Dmitry Preobrazhensky [Fri, 7 Apr 2017 13:07:13 +0000 (13:07 +0000)]
[AMDGPU][MC] Fix for Bug 28211 + LIT tests
- corrected DS_GWS_* opcodes (see VI_Shader_Programming#16.pdf for detailed description)
- address operand is not used
- several opcodes have data operand
- all opcodes have offset modifier
- DS_AND_SRC2_B32: corrected typo in mnemo
- DS_WRAP_RTN_F32 replaced with DS_WRAP_RTN_B32
- added CI/VI opcodes:
- DS_CONDXCHG32_RTN_B64
- DS_GWS_SEMA_RELEASE_ALL
- added VI opcodes:
- DS_CONSUME
- DS_APPEND
- DS_ORDERED_COUNT
Differential Revision: https://reviews.llvm.org/D31707
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299767
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Simon Dardis [Fri, 7 Apr 2017 13:03:52 +0000 (13:03 +0000)]
[SelectionDAG] Enable target specific vector scalarization of calls and returns
By target hookifying getRegisterType, getNumRegisters, getVectorBreakdown,
backends can request that LLVM to scalarize vector types for calls
and returns.
The MIPS vector ABI requires that vector arguments and returns are passed in
integer registers. With SelectionDAG's new hooks, the MIPS backend can now
handle LLVM-IR with vector types in calls and returns. E.g.
'call @foo(<4 x i32> %4)'.
Previously these cases would be scalarized for the MIPS O32/N32/N64 ABI for
calls and returns if vector types were not legal. If vector types were legal,
a single 128bit vector argument would be assigned to a single 32 bit / 64 bit
integer register.
By teaching the MIPS backend to inspect the original types, it can now
implement the MIPS vector ABI which requires a particular method of
scalarizing vectors.
Previously, the MIPS backend relied on clang to scalarize types such as "call
@foo(<4 x float> %a) into "call @foo(i32 inreg %1, i32 inreg %2, i32 inreg %3,
i32 inreg %4)".
This patch enables the MIPS backend to take either form for vector types.
Reviewers: zoran.jovanovic, jaydeep, vkalintiris, slthakur
Differential Revision: https://reviews.llvm.org/D27845
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299766
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Jonas Paulsson [Fri, 7 Apr 2017 12:35:11 +0000 (12:35 +0000)]
[SystemZ] Check for presence of vector support in SystemZISelLowering
A test case was found with llvm-stress that caused DAGCombiner to crash
when compiling for an older subtarget without vector support.
SystemZTargetLowering::combineTruncateExtract() should do nothing for older
subtargets.
This check was placed in canTreatAsByteVector(), which also helps in a few
other places.
Review: Ulrich Weigand
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299763
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Jonas Paulsson [Fri, 7 Apr 2017 12:11:41 +0000 (12:11 +0000)]
[SystemZ] Remove confusing comment in combineEXTRACT_VECTOR_ELT()
It isn't just one-element vectors that can appear here.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299762
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Diana Picus [Fri, 7 Apr 2017 12:04:24 +0000 (12:04 +0000)]
[ARM] GlobalISel: Test hard float properly
It turns out -float-abi=hard doesn't set the hard float calling
convention for libcalls. We need to use a hard float triple instead
(e.g. gnueabihf).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299761
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Sam Kolton [Fri, 7 Apr 2017 10:53:12 +0000 (10:53 +0000)]
[AMDGPU] Move SiShrinkInstruction and SDWAPeephole to SSAOptimization passes
Summary:
Difference beetween PreRegAlloc() and MachineSSAOptimization() are that the former is run despite of -O0 optimization level. In my undestanding SiShrinkInstructions and SDWAPeephole shouldn't run when optimizations are disabled.
With this change order of passes will not change.
Reviewers: arsenm, vpykhtin, rampitec
Subscribers: qcolombet, kzhuravl, wdng, nhaehnle, yaxunl, dstuttard, tpr, t-tye
Differential Revision: https://reviews.llvm.org/D31705
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299757
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Diana Picus [Fri, 7 Apr 2017 10:50:02 +0000 (10:50 +0000)]
[ARM] GlobalISel: Support frem for 64-bit values
Legalize to a libcall.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299756
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Diana Picus [Fri, 7 Apr 2017 09:41:39 +0000 (09:41 +0000)]
[ARM] GlobalISel: Support frem for 32-bit values
Legalize to a libcall.
On this occasion, also start allowing soft float subtargets. For the
moment G_FREM is the only legal floating point operation for them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299753
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Craig Topper [Fri, 7 Apr 2017 07:32:00 +0000 (07:32 +0000)]
[InstCombine] Handle more commuted cases of ((A & B) | ~A) -> (~A | B)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299747
91177308-0d34-0410-b5e6-
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Craig Topper [Fri, 7 Apr 2017 07:31:55 +0000 (07:31 +0000)]
[InstCombine] Add additional tests with varied commuting to show missing combines. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299746
91177308-0d34-0410-b5e6-
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Craig Topper [Fri, 7 Apr 2017 05:57:51 +0000 (05:57 +0000)]
[InstSimplify] Use Instruction::BinaryOps instead of unsigned for a few function operands to remove some casts. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299745
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Daniel Berlin [Fri, 7 Apr 2017 01:28:36 +0000 (01:28 +0000)]
AliasAnalysis: Be less conservative about volatile than atomic.
Summary:
getModRefInfo is meant to answer the question "what impact does this
instruction have on a given memory location" (not even another
instruction).
Long debate on this on IRC comes to the conclusion the answer should be "nothing special".
That is, a noalias volatile store does not affect a memory location
just by being volatile. Note: DSE and GVN and memdep currently
believe this, because memdep just goes behind AA's back after it says
"modref" right now.
see line 635 of memdep. Prior to this patch we would get modref there, then check aliasing,
and if it said noalias, we would continue.
getModRefInfo *already* has this same AA check, it just wasn't being used because volatile was
lumped in with ordering.
(I am separately testing whether this code in memdep is now dead except for the invariant load case)
Reviewers: jyknight, chandlerc
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D31726
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299741
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Craig Topper [Fri, 7 Apr 2017 00:29:47 +0000 (00:29 +0000)]
[InstCombine] Add more commuted patterns to support folding ((~A & B) | A) -> (A | B).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299737
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Derek Schuff [Thu, 6 Apr 2017 23:52:01 +0000 (23:52 +0000)]
[WebAssembly] Fix -Wcovered-switch-default warning
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299736
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Zachary Turner [Thu, 6 Apr 2017 23:43:39 +0000 (23:43 +0000)]
Allow specification of what kinds of class members to dump.
Previously when dumping class definitions, there were only
two modes - on or off. But it's useful to sometimes get a
little more fine-grained. For example, you might only want
to see the record layout (for example to look for extraneous
padding). This patch adds a third mode, layout mode, which
does exactly that. Only this-relative data members are
displayed in this mode.
Differential Revision: https://reviews.llvm.org/D31794
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299733
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Zachary Turner [Thu, 6 Apr 2017 23:43:12 +0000 (23:43 +0000)]
[llvm-pdbdump] Allow pretty to only dump specific types of types.
Previously we just had the -types option, which would dump all
classes, typedefs, and enums. But this produces a lot of output
if you only want to view classes, for example. This patch breaks
this down into 3 additional options, -classes, -enums, and
-typedefs, and keeps the -types option around which implies all
3 more specific options.
Differential Revision: https://reviews.llvm.org/D31791
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299732
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Konstantin Zhuravlyov [Thu, 6 Apr 2017 23:02:33 +0000 (23:02 +0000)]
AMDGPU/GFX9: Fix shared and private aperture queries
Differential Revision: https://reviews.llvm.org/D31786
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299727
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Eric Christopher [Thu, 6 Apr 2017 23:01:30 +0000 (23:01 +0000)]
Remove the default subtarget from the Power port. It's unnecessary and harmful if used.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299726
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Craig Topper [Thu, 6 Apr 2017 23:00:22 +0000 (23:00 +0000)]
[InstCombine] Add a few cases for OR we fail to optimize due to missing commuted patterns checks.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299725
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Yi Kong [Thu, 6 Apr 2017 22:47:47 +0000 (22:47 +0000)]
Revert "Revert "[ARM] Add Kryo to available targets""
This reverts commit
dc9458d5a747a02a9a8f198b84c2b92a6939a8dd.
Added missing case for PreISelOperandLatencyAdjustment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299724
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Eli Friedman [Thu, 6 Apr 2017 22:42:18 +0000 (22:42 +0000)]
Turn on -addr-sink-using-gep by default.
The new codepath has been in the tree for years, and there isn't any
reason to use two codepaths here.
Differential Revision: https://reviews.llvm.org/D30596
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299723
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Michael Kuperstein [Thu, 6 Apr 2017 22:33:25 +0000 (22:33 +0000)]
[X86] Revert r299387 due to AVX legalization infinite loop.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299720
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Craig Topper [Thu, 6 Apr 2017 21:29:43 +0000 (21:29 +0000)]
[InstCombine] Remove testing assert I accidentally left in r299710.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299715
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Zachary Turner [Thu, 6 Apr 2017 21:28:29 +0000 (21:28 +0000)]
iwyu fixes for lldbCore.
This adjusts header file includes for headers and source files
in Core. In doing so, one dependency cycle is eliminated
because all the includes from Core to that project were dead
includes anyway. In places where some files in other projects
were only compiling due to a transitive include from another
header, fixups have been made so that those files also include
the header they need. Tested on Windows and Linux, and plan
to address failures on OSX and FreeBSD after watching the
bots.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299714
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Matt Arsenault [Thu, 6 Apr 2017 21:09:53 +0000 (21:09 +0000)]
AMDGPU: Diagnose illegal SGPR to VGPR copies
This is possible in ways that are not compiler bugs,
so stop asserting on them.
This emits an extra error when emitting objects when it
can't encode the new pseudo, but I'm not sure that matters.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299712
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Craig Topper [Thu, 6 Apr 2017 21:06:03 +0000 (21:06 +0000)]
[InstCombine] When checking to see if we can turn subtracts of 2^n - 1 into xor, we only need to call computeKnownBits on the RHS not the whole subtract. While there use isMask instead of isPowerOf2(C+1)
Calling computeKnownBits on the RHS should allows us to recurse one step further. isMask is equivalent to the isPowerOf2(C+1) except in the case where C is all ones. But that was already handled earlier by creating a not which is an Xor with all ones. So this should be fine.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299710
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Matt Arsenault [Thu, 6 Apr 2017 20:58:30 +0000 (20:58 +0000)]
AMDGPU: Replace fp16SrcZerosHighBits with a whitelist
FCOPYSIGN is lowered to bit operations which don't clear the high
bits.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299708
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Rong Xu [Thu, 6 Apr 2017 20:56:00 +0000 (20:56 +0000)]
[PGO] Preserve GlobalsAA in pgo-memop-opt pass.
Preserve GlobalsAA analysis in memory intrinsic calls optimization based on
profiled size.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299707
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Keno Fischer [Thu, 6 Apr 2017 20:51:40 +0000 (20:51 +0000)]
[llvm-extract] Add option for recursive extraction
Summary:
Particularly, with --delete, this can be very useful for testing
new optimizations on some hotspots, without having to run it on the whole
application. E.g. as such:
```
llvm-extract app.bc --recursive --rfunc .*hotspot.* > hotspot.bc
llvm-extract app.bc --recursive --delete --rfunc .*hotspot.* > residual.bc
llc -filetype=obj residual.bc > residual.o
llc -filetype=obj hotspot.bc > hotspot.o
cc -o app residual.o hotspot.o
```
Reviewed By: davide
Differential Revision: https://reviews.llvm.org/D31722
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299706
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Craig Topper [Thu, 6 Apr 2017 20:41:48 +0000 (20:41 +0000)]
[InstCombine] Remove redundant combine from visitAnd
This combine is fully handled by SimplifyDemandedInstructionBits as of r299658 where I fixed this code to ensure the Add/Sub had only a single user. Otherwise it would fire and create additional instructions. That fix resulted in an improvement to code generated for tsan which is why I committed it before deleting.
Differential Revision: https://reviews.llvm.org/D31543
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299704
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Davide Italiano [Thu, 6 Apr 2017 20:32:10 +0000 (20:32 +0000)]
[BFIterator] Remove an assertion that doesn't hold. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299703
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Mehdi Amini [Thu, 6 Apr 2017 20:23:57 +0000 (20:23 +0000)]
Revert "Turn some C-style vararg into variadic templates"
This reverts commit r299699, the examples needs to be updated.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299702
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Huihui Zhang [Thu, 6 Apr 2017 20:22:51 +0000 (20:22 +0000)]
[SelectionDAG] [ARM CodeGen] Fix chain information of LowerMUL
In LowerMUL, the chain information is not preserved for the new
created Load SDNode.
For example, if a Store alias with one of the operand of Mul.
The Load for that operand need to be scheduled before the Store.
The dependence is recorded in the chain of Store, in TokenFactor.
However, when lowering MUL, the SDNodes for the new Loads for
VMULL are not updated in the TokenFactor for the Store. Thus the
chain is not preserved for the lowered VMULL.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299701
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Mehdi Amini [Thu, 6 Apr 2017 20:09:31 +0000 (20:09 +0000)]
Turn some C-style vararg into variadic templates
Module::getOrInsertFunction is using C-style vararg instead of
variadic templates.
From a user prospective, it forces the use of an annoying nullptr
to mark the end of the vararg, and there's not type checking on the
arguments. The variadic template is an obvious solution to both
issues.
Patch by: Serge Guelton <serge.guelton@telecom-bretagne.eu>
Differential Revision: https://reviews.llvm.org/D31070
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299699
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Evgeniy Stepanov [Thu, 6 Apr 2017 19:55:17 +0000 (19:55 +0000)]
[asan] Fix dead stripping of globals on Linux.
Use a combination of !associated, comdat, @llvm.compiler.used and
custom sections to allow dead stripping of globals and their asan
metadata. Sometimes.
Currently this works on LLD, which supports SHF_LINK_ORDER with
sh_link pointing to the associated section.
This also works on BFD, which seems to treat comdats as
all-or-nothing with respect to linker GC. There is a weird quirk
where the "first" global in each link is never GC-ed because of the
section symbols.
At this moment it does not work on Gold (as in the globals are never
stripped).
This is a re-land of r298158 rebased on D31358. This time,
asan.module_ctor is put in a comdat as well to avoid quadratic
behavior in Gold.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299697
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Evgeniy Stepanov [Thu, 6 Apr 2017 19:55:13 +0000 (19:55 +0000)]
[asan] Put ctor/dtor in comdat.
When possible, put ASan ctor/dtor in comdat.
The only reason not to is global registration, which can be
TU-specific. This is not the case when there are no instrumented
globals. This is also limited to ELF targets, because MachO does
not have comdat, and COFF linkers may GC comdat constructors.
The benefit of this is a lot less __asan_init() calls: one per DSO
instead of one per TU. It's also necessary for the upcoming
gc-sections-for-globals change on Linux, where multiple references to
section start symbols trigger quadratic behaviour in gold linker.
This is a rebase of r298756.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299696
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Evgeniy Stepanov [Thu, 6 Apr 2017 19:55:09 +0000 (19:55 +0000)]
[asan] Delay creation of asan ctor.
Create the constructor in the module pass.
This in needed for the GC-friendly globals change, where the constructor can be
put in a comdat in some cases, but we don't know about that in the function
pass.
This is a rebase of r298731 which was reverted due to a false alarm.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299695
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Peter Collingbourne [Thu, 6 Apr 2017 19:39:24 +0000 (19:39 +0000)]
Bitcode: Do not create FNENTRYs for aliases of functions.
There doesn't seem to be any point in doing this.
Differential Revision: https://reviews.llvm.org/D31691
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299694
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Keno Fischer [Thu, 6 Apr 2017 19:26:22 +0000 (19:26 +0000)]
[StripDeadDebugInfo] Drop dead CUs entirely
Summary:
Prior to this while it would delete the dead DIGlobalVariables, it would
leave dead DICompileUnits and everything referenced therefrom. For a bit
bitcode file with thousands of compile units those dead nodes easily
outnumbered the real ones. Clean that up.
Reviewed By: aprantl
Differential Revision: https://reviews.llvm.org/D31720
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299692
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Yaxun Liu [Thu, 6 Apr 2017 19:17:32 +0000 (19:17 +0000)]
[AMDGPU] Temporarily change constant address space from 4 to 2
Our final address space mapping is to let constant address space to be 4 to match nvptx.
However for now we will make it 2 to avoid unnecessary work in FE/BE/devlib
about intrinsics returning constant pointers.
Differential Revision: https://reviews.llvm.org/D31770
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299690
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Yi Kong [Thu, 6 Apr 2017 19:16:14 +0000 (19:16 +0000)]
Revert "[ARM] Add Kryo to available targets"
This reverts commit
942d6e6f58bf7e63810dd7cbcbce1fdfa5ebc6d4.
Build breakage.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299689
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Nirav Dave [Thu, 6 Apr 2017 19:05:41 +0000 (19:05 +0000)]
[SDAG] Fix visitAND optimization to deal with vector extract case again.
Summary:
Fix case elided by rL298920.
Fixes PR32545.
Reviewers: eli.friedman, RKSimon
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D31759
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299688
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Craig Topper [Thu, 6 Apr 2017 18:59:08 +0000 (18:59 +0000)]
[InstSimplify] Remove unreachable default from SimplifyBinOp.
We have dedicated handlers for every opcode so nothing can get here anymore. The switch doesn't get detected as fully covered because Opcode is an unsigned. Casting to Instruction::BinaryOps still doesn't detect it because BinaryOpsEnd is in the enum and 1 past the last opcode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299687
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Daniel Berlin [Thu, 6 Apr 2017 18:52:58 +0000 (18:52 +0000)]
NewGVN: Rename some functions for consistency
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299685
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Daniel Berlin [Thu, 6 Apr 2017 18:52:55 +0000 (18:52 +0000)]
NewGVN: Fixup some small issues
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299684
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Daniel Berlin [Thu, 6 Apr 2017 18:52:53 +0000 (18:52 +0000)]
NewGVN: Fix a small formatting issue in performSymbolicLoadEvaluation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299683
91177308-0d34-0410-b5e6-
96231b3b80d8
Daniel Berlin [Thu, 6 Apr 2017 18:52:50 +0000 (18:52 +0000)]
NewGVN: This patch makes memory congruence work for all types of
memorydefs, not just stores. Along the way, we audit and fixup issues
about how we were tracking memory leaders, and improve the verifier
to notice more memory congruency issues.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299682
91177308-0d34-0410-b5e6-
96231b3b80d8