OSDN Git Service
Valery Pykhtin [Fri, 4 Mar 2016 10:59:50 +0000 (10:59 +0000)]
test commit
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262709
91177308-0d34-0410-b5e6-
96231b3b80d8
Benjamin Kramer [Fri, 4 Mar 2016 10:49:30 +0000 (10:49 +0000)]
Make headers self-contained again.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262702
91177308-0d34-0410-b5e6-
96231b3b80d8
Nikolay Haustov [Fri, 4 Mar 2016 10:39:50 +0000 (10:39 +0000)]
AMDGPU/SI: add llvm.amdgcn.image.atomic.* intrinsics
These correspond to IMAGE_ATOMIC_* and are going to be used by Mesa for the
GL_ARB_shader_image_load_store extension.
Initial change by Nicolai H.hnle
Differential Revision: http://reviews.llvm.org/D17401
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262701
91177308-0d34-0410-b5e6-
96231b3b80d8
Justin Bogner [Fri, 4 Mar 2016 01:52:47 +0000 (01:52 +0000)]
Annotate our undefined behaviour to sneak it past the sanitizers
We have known UB in some ilists where we static cast half nodes to
(larger) derived types and use the address. See llvm.org/PR26753.
This needs to be fixed, but in the meantime it'd be nice if running
ubsan didn't complain. This adds annotations in the two places where
ubsan complains while running check-all of a sanitized clang build.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262683
91177308-0d34-0410-b5e6-
96231b3b80d8
Easwaran Raman [Fri, 4 Mar 2016 01:18:40 +0000 (01:18 +0000)]
Fix a memory leak.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262682
91177308-0d34-0410-b5e6-
96231b3b80d8
Justin Bogner [Fri, 4 Mar 2016 00:58:39 +0000 (00:58 +0000)]
CodeGen: Tune the SmallVector size in LiveRange
The vast majority of LiveRanges (ie, 4/5) have exactly 1 segment and 1
value number, and a good chunk of the rest have 2 of each, so
allocating space for 4 is wasteful. This is especially noticeable when
dealing with a very large number of vregs, and I have an internal case
where dropping this to 2 shaves over 5% off of peak memory when
compiling a particularly large function.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262681
91177308-0d34-0410-b5e6-
96231b3b80d8
Easwaran Raman [Fri, 4 Mar 2016 00:44:01 +0000 (00:44 +0000)]
Fix a use-after-free bug introduced in r262636
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262679
91177308-0d34-0410-b5e6-
96231b3b80d8
Teresa Johnson [Fri, 4 Mar 2016 00:25:54 +0000 (00:25 +0000)]
Add hardware_concurrency interface to llvm::thread (NFC)
Part of D15390.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262677
91177308-0d34-0410-b5e6-
96231b3b80d8
Evgeniy Stepanov [Fri, 4 Mar 2016 00:23:29 +0000 (00:23 +0000)]
[gold] Handle modules that are not included in the link.
Gold has a newly added LDPT_GET_SYMBOLS_V3 callback that can
distinguish between a module that is not included in the link, and
one that is included but has its entire interface preempted by others.
Fixes PR26674.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262676
91177308-0d34-0410-b5e6-
96231b3b80d8
Easwaran Raman [Thu, 3 Mar 2016 23:55:41 +0000 (23:55 +0000)]
Fix memory leak in tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262674
91177308-0d34-0410-b5e6-
96231b3b80d8
Mike Aizatsky [Thu, 3 Mar 2016 23:45:29 +0000 (23:45 +0000)]
[libfuzzer] arbitrary function adapter.
The adapter automates converting sequence of bytes into arbitrary
arguments.
Differential Revision: http://reviews.llvm.org/D17829
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262673
91177308-0d34-0410-b5e6-
96231b3b80d8
Philip Reames [Thu, 3 Mar 2016 23:24:44 +0000 (23:24 +0000)]
[docs] Add a description of current problem areas to the statepoint docs
Triggered by a question on llvm-dev about status
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262671
91177308-0d34-0410-b5e6-
96231b3b80d8
Guozhi Wei [Thu, 3 Mar 2016 23:21:38 +0000 (23:21 +0000)]
[InstCombine] Combine A->B->A BitCast
This patch enhances InstCombine to handle following case:
A -> B bitcast
PHI
B -> A bitcast
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262670
91177308-0d34-0410-b5e6-
96231b3b80d8
NAKAMURA Takumi [Thu, 3 Mar 2016 22:38:39 +0000 (22:38 +0000)]
llvm/test/CodeGen/ARM/rem_crash.ll: Avoid unsupported targets to specify explicit triple.
We will see it for targeting win32;
LLVM ERROR: CPU: 'generic' does not support ARM mode execution!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262668
91177308-0d34-0410-b5e6-
96231b3b80d8
Kostya Serebryany [Thu, 3 Mar 2016 22:36:37 +0000 (22:36 +0000)]
[libFuzzer] when interrupted, call _Exit() instead of exit()
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262667
91177308-0d34-0410-b5e6-
96231b3b80d8
Simon Pilgrim [Thu, 3 Mar 2016 21:55:01 +0000 (21:55 +0000)]
[X86][AVX512BW] Fixed 512-bit PSHUFB shuffle mask decode and added combine test.
PSHUFB decoder was assuming that input was 128 or 256-bit vector only.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262661
91177308-0d34-0410-b5e6-
96231b3b80d8
Lang Hames [Thu, 3 Mar 2016 21:23:15 +0000 (21:23 +0000)]
[RuntimeDyld] Fix '_' stripping in RTDyldMemoryManager::getSymbolAddressInProcess.
The RTDyldMemoryManager::getSymbolAddressInProcess method accepts a
linker-mangled symbol name, but it calls through to dlsym to do the lookup (via
DynamicLibrary::SearchForAddressOfSymbol), and dlsym expects an unmangled
symbol name.
Historically we've attempted to "demangle" by removing leading '_'s on all
platforms, and fallen back to an extra search if that failed. That's broken, as
it can cause symbols to resolve incorrectly on platforms that don't do mangling
if you query '_foo' and the process also happens to contain a 'foo'.
Fix this by demangling conditionally based on the host platform. That's safe
here because this function is specifically for symbols in the host process, so
the usual cross-process JIT looking concerns don't apply.
M unittests/ExecutionEngine/ExecutionEngineTest.cpp
M lib/ExecutionEngine/RuntimeDyld/RTDyldMemoryManager.cpp
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262657
91177308-0d34-0410-b5e6-
96231b3b80d8
Philip Reames [Thu, 3 Mar 2016 19:50:32 +0000 (19:50 +0000)]
[ValueTracking] "constant fold" an experimental hidden option
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262648
91177308-0d34-0410-b5e6-
96231b3b80d8
Philip Reames [Thu, 3 Mar 2016 19:44:06 +0000 (19:44 +0000)]
[ValueTracking] Remove dead code from an old experiment
This experiment was originally about trying to use facts implied dominating conditions to infer more precise known bits. While the compile time was found to be acceptable on several large code bases, we never found sufficiently profitable examples to justify turning on the code by default. Given this, it's time to abandon the experiment.
Several folks have commented that they've found this useful for experimentation, but nothing has come of those experiments. Given how easy the patch is to apply, there's no reason to leave the code in tree.
For anyone interested in further investigation in this area, I recommend finding the summary email I sent on one of the original review threads. In particular, I now believe the use-list based approach is strictly worse than the dom-tree-walking approach.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262646
91177308-0d34-0410-b5e6-
96231b3b80d8
Sanjay Patel [Thu, 3 Mar 2016 19:19:04 +0000 (19:19 +0000)]
[InstCombine] transform bitcasted bitwise logic ops with constants (PR26702)
Given that we're not actually reducing the instruction count in the included
regression tests, I think we would call this a canonicalization step.
The motivation comes from the example in PR26702:
https://llvm.org/bugs/show_bug.cgi?id=26702
If we hoist the bitwise logic ahead of the bitcast, the previously unoptimizable
example of:
define <4 x i32> @is_negative(<4 x i32> %x) {
%lobit = ashr <4 x i32> %x, <i32 31, i32 31, i32 31, i32 31>
%not = xor <4 x i32> %lobit, <i32 -1, i32 -1, i32 -1, i32 -1>
%bc = bitcast <4 x i32> %not to <2 x i64>
%notnot = xor <2 x i64> %bc, <i64 -1, i64 -1>
%bc2 = bitcast <2 x i64> %notnot to <4 x i32>
ret <4 x i32> %bc2
}
Simplifies to the expected:
define <4 x i32> @is_negative(<4 x i32> %x) {
%lobit = ashr <4 x i32> %x, <i32 31, i32 31, i32 31, i32 31>
ret <4 x i32> %lobit
}
Differential Revision: http://reviews.llvm.org/D17583
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262645
91177308-0d34-0410-b5e6-
96231b3b80d8
Easwaran Raman [Thu, 3 Mar 2016 18:53:20 +0000 (18:53 +0000)]
Fix breakage caused by r262636.
Use LLVM_ATTRIBUTE_UNUSED instead of __attribute_((unused))
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262643
91177308-0d34-0410-b5e6-
96231b3b80d8
Sanjoy Das [Thu, 3 Mar 2016 18:31:33 +0000 (18:31 +0000)]
[ConstantRange] Rename test; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262640
91177308-0d34-0410-b5e6-
96231b3b80d8
Sanjoy Das [Thu, 3 Mar 2016 18:31:29 +0000 (18:31 +0000)]
[SCEV] Prove no-overflow via constant ranges
Exploit ScalarEvolution::getRange's newly acquired smartness (since
r262438) by using that to infer nsw and nuw when possible.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262639
91177308-0d34-0410-b5e6-
96231b3b80d8
Sanjoy Das [Thu, 3 Mar 2016 18:31:23 +0000 (18:31 +0000)]
[SCEV] Be less eager about demoting zexts to sexts
After r262438 we can have provably positive NSW SCEV expressions whose
zero extensions cannot be simplified (since r262438 makes SCEV better at
computing constant ranges). This means demoting sexts of positive add
recurrences eagerly can result in an unsimplified zero extension where
we could have had a simplified sign extension. This change fixes the
issue by teaching SCEV to demote sext of a positive SCEV expression to a
zext only if the sext could not be simplified.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262638
91177308-0d34-0410-b5e6-
96231b3b80d8
Sanjoy Das [Thu, 3 Mar 2016 18:31:16 +0000 (18:31 +0000)]
[ConstantRange] Generalize makeGuaranteedNoWrapRegion to work on ranges
This will be used in a later patch to ScalarEvolution. Right now only
the unit tests exercise the newly added code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262637
91177308-0d34-0410-b5e6-
96231b3b80d8
Easwaran Raman [Thu, 3 Mar 2016 18:26:33 +0000 (18:26 +0000)]
Infrastructure for PGO enhancements in inliner
This patch provides the following infrastructure for PGO enhancements in inliner:
Enable the use of block level profile information in inliner
Incremental update of block frequency information during inlining
Update the function entry counts of callees when they get inlined into callers.
Differential Revision: http://reviews.llvm.org/D16381
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262636
91177308-0d34-0410-b5e6-
96231b3b80d8
Simon Pilgrim [Thu, 3 Mar 2016 18:13:53 +0000 (18:13 +0000)]
[X86][AVX] Better support for the variable mask form of VPERMILPD/VPERMILPS
The variable mask form of VPERMILPD/VPERMILPS were only partially implemented, with much of it still performed as an intrinsic.
This patch properly defines the instructions in terms of X86ISD::VPERMILPV, permitting the opcode to be easily combined as a target shuffle.
Differential Revision: http://reviews.llvm.org/D17681
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262635
91177308-0d34-0410-b5e6-
96231b3b80d8
Dehao Chen [Thu, 3 Mar 2016 18:09:32 +0000 (18:09 +0000)]
Use LineLocation instead of CallsiteLocation to index callsite profile.
Summary: With discriminator, LineLocation can uniquely identify a callsite without the need to specifying callee name. Remove Callee function name from the key, and put it in the value (FunctionSamples).
Reviewers: davidxl, dnovillo
Subscribers: llvm-commits
Differential Revision: http://reviews.llvm.org/D17827
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262634
91177308-0d34-0410-b5e6-
96231b3b80d8
Simon Pilgrim [Thu, 3 Mar 2016 17:54:35 +0000 (17:54 +0000)]
[X86] Tidied up 256-bit -> 2 x 128-bit vector shift extraction.
lowerShift was manually splitting BUILD_VECTOR cases when it could just call Extract128BitVector which does this anyway.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262633
91177308-0d34-0410-b5e6-
96231b3b80d8
Simon Pilgrim [Thu, 3 Mar 2016 17:35:43 +0000 (17:35 +0000)]
[X86] Pulled out repeated code testing for constant vector shift amount. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262631
91177308-0d34-0410-b5e6-
96231b3b80d8
Amjad Aboud [Thu, 3 Mar 2016 17:17:54 +0000 (17:17 +0000)]
MCU target has its own ABI, however X86 interrupt handler calling convention overrides this ABI.
Fixed the ordering to check first for X86 interrupt handler then for MCU target.
Differential Revision: http://reviews.llvm.org/D17801
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262628
91177308-0d34-0410-b5e6-
96231b3b80d8
Ahmed Bougacha [Thu, 3 Mar 2016 16:53:50 +0000 (16:53 +0000)]
[X86] Don't assume that shuffle non-mask operands starts at #0.
That's not the case for VPERMV/VPERMV3, which cover all possible
combinations (the C intrinsics use a different order; the AVX vs
AVX512 intrinsics are different still).
Since:
r246981 AVX-512: Lowering for 512-bit vector shuffles.
VPERMV is recognized in getTargetShuffleMask.
This breaks assumptions in most callers, as they expect
the non-mask operands to start at index 0.
VPERMV has the mask as operand #0; VPERMV3 has it in the middle.
Instead of the faulty assumption, have getTargetShuffleMask return
its operands as well.
One alternative we considered was to change the operand order of
VPERMV, but we agreed to stick to the instruction order, as there
are more AVX512 weirdness to cover (vpermt2/vpermi2 in particular).
Differential Revision: http://reviews.llvm.org/D17041
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262627
91177308-0d34-0410-b5e6-
96231b3b80d8
Matthew Simpson [Thu, 3 Mar 2016 16:12:01 +0000 (16:12 +0000)]
[LoopUtils, LV] Fix PR26734
The vectorization of first-order recurrences (r261346) caused PR26734. When
detecting these recurrences, we need to ensure that the previous value is
actually defined inside the loop. This patch includes the fix and test case.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262624
91177308-0d34-0410-b5e6-
96231b3b80d8
Sanjay Patel [Thu, 3 Mar 2016 15:56:08 +0000 (15:56 +0000)]
[AArch64] fold 'isPositive' vector integer operations (PR26819)
This is one of the cases shown in:
https://llvm.org/bugs/show_bug.cgi?id=26819
Shift and negate is what InstCombine prefers to produce (and I tried to make it do more of that
in http://reviews.llvm.org/rL262424 ), so we should recognize that pattern as something that might
come from autovectorization even if it's unlikely to be produced from C NEON intrinsics.
The patch is based on the x86 equivalent:
http://reviews.llvm.org/rL262036
Differential Revision: http://reviews.llvm.org/D17834
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262623
91177308-0d34-0410-b5e6-
96231b3b80d8
Igor Breger [Thu, 3 Mar 2016 14:18:38 +0000 (14:18 +0000)]
AVX512: Combine AND + TESTM instructions .
Differential Revision: http://reviews.llvm.org/D17844
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262621
91177308-0d34-0410-b5e6-
96231b3b80d8
Renato Golin [Thu, 3 Mar 2016 14:01:10 +0000 (14:01 +0000)]
Making rem_crash.ll target-specific
This test failed in some ARM bots after a divmod change because it was
running on a native llc, instead of targeted one. This makes sure the test
is target-specific (as intended), and also copies to ARM and AArch64
directories. If it is also supposed to work on other architectures, I'll
leave as an exercise to the respective maintainers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262620
91177308-0d34-0410-b5e6-
96231b3b80d8
Dylan McKay [Thu, 3 Mar 2016 10:08:02 +0000 (10:08 +0000)]
[AVR] Add calling convention parser tokens
Summary: Adds the 'avr_intrcc' and 'avr_signalcc' IR calling convention tokens to the parser.
Reviewers: arsenm
Subscribers: dylanmckay, llvm-commits
Differential Revision: http://reviews.llvm.org/D16348
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262600
91177308-0d34-0410-b5e6-
96231b3b80d8
Simon Pilgrim [Thu, 3 Mar 2016 09:43:28 +0000 (09:43 +0000)]
[X86][SSE] Improve vector ZERO_EXTEND by combining to ZERO_EXTEND_VECTOR_INREG
Generalise the existing SIGN_EXTEND to SIGN_EXTEND_VECTOR_INREG combine to support zero extension as well and get rid of a lot of unnecessary ANY_EXTEND + mask patterns.
Differential Revision: http://reviews.llvm.org/D17691
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262599
91177308-0d34-0410-b5e6-
96231b3b80d8
Renato Golin [Thu, 3 Mar 2016 08:57:44 +0000 (08:57 +0000)]
Revert "[ARM] Merging 64-bit divmod lib calls into one"
This reverts commit r262507, which broke some ARM buildbots.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262594
91177308-0d34-0410-b5e6-
96231b3b80d8
Michael Zuckerman [Thu, 3 Mar 2016 08:54:05 +0000 (08:54 +0000)]
[LLVM][AVX512] PSRLWI Chnage imm8 to int
Differential Revision: http://reviews.llvm.org/D17753
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262592
91177308-0d34-0410-b5e6-
96231b3b80d8
Matt Arsenault [Thu, 3 Mar 2016 05:43:49 +0000 (05:43 +0000)]
TTI: Fix not using overload of getIntrinsicInstrCost
This was always calling the generic version, so the target
custom implementation was never called.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262585
91177308-0d34-0410-b5e6-
96231b3b80d8
Junmo Park [Thu, 3 Mar 2016 03:57:20 +0000 (03:57 +0000)]
[BranchFolding] Change function name related with merging MMOs. NFC
Summary:
Removing MMOs is not our prefer behavior any more.
Reviewers: mcrosier, reames
Differential Revision: http://reviews.llvm.org/D17668
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262580
91177308-0d34-0410-b5e6-
96231b3b80d8
Tom Stellard [Thu, 3 Mar 2016 03:53:29 +0000 (03:53 +0000)]
AMDGPU: Insert two S_NOP instructions for every high level source statement.
Patch by: Konstantin Zhuravlyov
Summary: Tools, such as debugger, need to pause execution based on user input (i.e. breakpoint). In order to do this, two S_NOP instructions are inserted for each high level source statement: one before first isa instruction of high level source statement, and one after last isa instruction of high level source statement. Further, debugger may replace S_NOP instructions with S_TRAP instructions based on user input.
Reviewers: tstellarAMD, arsenm
Subscribers: echristo, dblaikie, arsenm, llvm-commits
Differential Revision: http://reviews.llvm.org/D17454
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262579
91177308-0d34-0410-b5e6-
96231b3b80d8
Tom Stellard [Thu, 3 Mar 2016 03:45:09 +0000 (03:45 +0000)]
AMDGPU/SI: Don't try to move scratch wave offset when there are no free SGPRs
Summary:
When there were no free SGPRs, we were trying to move this value into
some of the reserved registers which was causing a segmentation fault.
Reviewers: arsenm
Subscribers: arsenm, llvm-commits
Differential Revision: http://reviews.llvm.org/D17590
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262577
91177308-0d34-0410-b5e6-
96231b3b80d8
Hans Wennborg [Thu, 3 Mar 2016 02:06:32 +0000 (02:06 +0000)]
[X86] Enable forwarding bool arguments in tail calls (PR26305)
The code was previously not able to track a boolean argument
at a call site back to the formal argument of the caller.
Differential Revision: http://reviews.llvm.org/D17786
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262575
91177308-0d34-0410-b5e6-
96231b3b80d8
Tim Shen [Thu, 3 Mar 2016 01:27:35 +0000 (01:27 +0000)]
[PPCVSXFMAMutate] Temporarily disable this pass
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262573
91177308-0d34-0410-b5e6-
96231b3b80d8
Philip Reames [Thu, 3 Mar 2016 00:58:43 +0000 (00:58 +0000)]
[MBP] Renaming a confusing variable and add clarifying comments
Was discussed as part of http://reviews.llvm.org/D17830
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262571
91177308-0d34-0410-b5e6-
96231b3b80d8
Jacques Pienaar [Thu, 3 Mar 2016 00:30:02 +0000 (00:30 +0000)]
[lanai] Fixing file path used in test
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262567
91177308-0d34-0410-b5e6-
96231b3b80d8
Matthias Braun [Thu, 3 Mar 2016 00:05:07 +0000 (00:05 +0000)]
TargetSchedule: Allow explicit Unsupported markers in InstRW
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262549
91177308-0d34-0410-b5e6-
96231b3b80d8
Matthias Braun [Thu, 3 Mar 2016 00:04:59 +0000 (00:04 +0000)]
TableGen: Accept itinerary data when checking for schedmodel completeness
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262548
91177308-0d34-0410-b5e6-
96231b3b80d8
Philip Reames [Thu, 3 Mar 2016 00:01:42 +0000 (00:01 +0000)]
[MBP] Avoid placing random blocks between loop preheader and header
If we have a loop with a rarely taken path, we will prune that from the blocks which get added as part of the loop chain. The problem is that we weren't then recognizing the loop chain as schedulable when considering the preheader when forming the function chain. We'd then fall to various non-predecessors before finally scheduling the loop chain (as if the CFG was unnatural.) The net result was that there could be lots of garbage between a loop preheader and the loop, even though we could have directly fallen into the loop. It also meant we separated hot code with regions of colder code.
The particular reason for the rejection of the loop chain was that we were scanning predecessor of the header, seeing the backedge, believing that was a globally more important predecessor (true), but forgetting to account for the fact the backedge precessor was already part of the existing loop chain (oops!.
Differential Revision: http://reviews.llvm.org/D17830
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262547
91177308-0d34-0410-b5e6-
96231b3b80d8
David Majnemer [Thu, 3 Mar 2016 00:01:25 +0000 (00:01 +0000)]
[X86] Don't give catch objects a displacement of zero
Catch objects with a displacement of zero do not initialize a catch
object. The displacement is relative to %rsp at the end of the
function's prologue for x86_64 targets.
If we place an object at the top-of-stack, we will end up wit a
displacement of zero resulting in our catch object remaining
uninitialized.
Address this by creating our catch objects as fixed objects. We will
ensure that the UnwindHelp object is created after the catch objects so
that no catch object will have a displacement of zero.
Differential Revision: http://reviews.llvm.org/D17823
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262546
91177308-0d34-0410-b5e6-
96231b3b80d8
Sanjay Patel [Wed, 2 Mar 2016 23:22:03 +0000 (23:22 +0000)]
[AArch64] add tests to demonstrate existing codegen for PR26819
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262540
91177308-0d34-0410-b5e6-
96231b3b80d8
Matt Arsenault [Wed, 2 Mar 2016 23:00:21 +0000 (23:00 +0000)]
AMDGPU: Simplify boolean conditional return statements
Patch by Richard Thomson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262536
91177308-0d34-0410-b5e6-
96231b3b80d8
Philip Reames [Wed, 2 Mar 2016 22:40:51 +0000 (22:40 +0000)]
[MBP] Remove overly verbose debug output
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262531
91177308-0d34-0410-b5e6-
96231b3b80d8
Amaury Sechet [Wed, 2 Mar 2016 22:36:45 +0000 (22:36 +0000)]
Explode store of arrays in instcombine
Summary: This is the last step toward supporting aggregate memory access in instcombine. This explodes stores of arrays into a serie of stores for each element, allowing them to be optimized.
Reviewers: joker.eph, reames, hfinkel, majnemer, mgrang
Subscribers: llvm-commits
Differential Revision: http://reviews.llvm.org/D17828
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262530
91177308-0d34-0410-b5e6-
96231b3b80d8
Davide Italiano [Wed, 2 Mar 2016 22:33:49 +0000 (22:33 +0000)]
[llvm-nm] Restore the previous behaviour (pre r262525).
It broke some buildbots.
Pointy-hat to: me
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262529
91177308-0d34-0410-b5e6-
96231b3b80d8
Davide Italiano [Wed, 2 Mar 2016 21:59:31 +0000 (21:59 +0000)]
[llvm-nm] Fix rendering of -s grouping with all the othe options.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262525
91177308-0d34-0410-b5e6-
96231b3b80d8
Philip Reames [Wed, 2 Mar 2016 21:45:13 +0000 (21:45 +0000)]
[MBP] Adjust debug output to be more focused and approachable
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262522
91177308-0d34-0410-b5e6-
96231b3b80d8
Amaury Sechet [Wed, 2 Mar 2016 21:28:30 +0000 (21:28 +0000)]
Unpack array of all sizes in InstCombine
Summary: This is another step toward improving fca support. This unpack load of array in a series of load to array's elements.
Reviewers: chandlerc, joker.eph, majnemer, reames, hfinkel
Subscribers: llvm-commits
Differential Revision: http://reviews.llvm.org/D15890
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262521
91177308-0d34-0410-b5e6-
96231b3b80d8
Daniel Berlin [Wed, 2 Mar 2016 21:16:28 +0000 (21:16 +0000)]
Really fix ASAN leak/etc issues with MemorySSA unittests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262519
91177308-0d34-0410-b5e6-
96231b3b80d8
Kostya Serebryany [Wed, 2 Mar 2016 21:08:16 +0000 (21:08 +0000)]
[libFuzzer] add -Werror for libFuzzer build rule
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262517
91177308-0d34-0410-b5e6-
96231b3b80d8
Daniel Berlin [Wed, 2 Mar 2016 20:36:22 +0000 (20:36 +0000)]
Revert "Fix ASAN detected errors in code and test" (it was not meant to be committed yet)
This reverts commit
890bbccd600ba1eb050353d06a29650ad0f2eb95.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262512
91177308-0d34-0410-b5e6-
96231b3b80d8
Daniel Berlin [Wed, 2 Mar 2016 20:27:29 +0000 (20:27 +0000)]
Fix ASAN detected errors in code and test
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262511
91177308-0d34-0410-b5e6-
96231b3b80d8
Bob Wilson [Wed, 2 Mar 2016 20:02:25 +0000 (20:02 +0000)]
Add another test for the GlobalOpt change in r212079.
This is a test that Akira Hatanaka wrote to test GlobalOpt's handling of
aliases with GEP operands. David Majnemer independently made the same
change to GlobalOpt in r212079. Akira's test is a useful addition, so I'm
pulling it over from the llvm repo for Swift on GitHub.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262510
91177308-0d34-0410-b5e6-
96231b3b80d8
Kostya Serebryany [Wed, 2 Mar 2016 19:45:10 +0000 (19:45 +0000)]
[libFuzzer] more trophies
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262509
91177308-0d34-0410-b5e6-
96231b3b80d8
Renato Golin [Wed, 2 Mar 2016 19:35:45 +0000 (19:35 +0000)]
[ARM] Merging 64-bit divmod lib calls into one
When div+rem calls on the same arguments are found, the ARM back-end merges the
two calls into one __aeabi_divmod call for up to 32-bits values. However,
for 64-bit values, which also have a lib call (__aeabi_ldivmod), it wasn't
merging the calls, and thus calling ldivmod twice and spilling the temporary
results, which generated pretty bad code.
This patch legalises 64-bit lib calls for divmod, so that now all the spilling
and the second call are gone. It also relaxes the DivRem combiner a bit on the
legal type check, since it was already checking for isLegalOrCustom on every
value, so the extra check for isTypeLegal was redundant.
This patch fixes PR17193 (and a long time FIXME in the tests).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262507
91177308-0d34-0410-b5e6-
96231b3b80d8
Reid Kleckner [Wed, 2 Mar 2016 19:20:59 +0000 (19:20 +0000)]
Revert "[X86] Elide references to _chkstk for dynamic allocas"
This reverts commit r262370.
It turns out there is code out there that does sequences of allocas
greater than 4K: http://crbug.com/591404
The goal of this change was to improve the code size of inalloca call
sequences, but we got tangled up in the mess of dynamic allocas.
Instead, we should come back later with a separate MI pass that uses
dominance to optimize the full sequence. This should also be able to
remove the often unneeded stacksave/stackrestore pairs around the call.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262505
91177308-0d34-0410-b5e6-
96231b3b80d8
Matthias Braun [Wed, 2 Mar 2016 19:20:00 +0000 (19:20 +0000)]
ARM: Introduce conservative load/store optimization mode
Most of the time ARM has the CCR.UNALIGN_TRP bit set to false which
means that unaligned loads/stores do not trap and even extensive testing
will not catch these bugs. However the multi/double variants are not
affected by this bit and will still trap. In effect a more aggressive
load/store optimization will break existing (bad) code.
These bugs do not necessarily manifest in the broken code where the
misaligned pointer is formed but often later in perfectly legal code
where it is accessed. This means recompiling system libraries (which
have no alignment bugs) with a newer compiler will break existing
applications (with alignment bugs) that worked before.
So (under protest) I implemented this safe mode which limits the
formation of multi/double operations to cases that are not affected by
user code (stack operations like spills/reloads) or cases where the
normal operations trap anyway (floating point load/stores). It is
disabled by default.
Differential Revision: http://reviews.llvm.org/D17015
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262504
91177308-0d34-0410-b5e6-
96231b3b80d8
Justin Bogner [Wed, 2 Mar 2016 19:01:11 +0000 (19:01 +0000)]
SelectionDAG: Use correctly sized allocation functions for SDNodes
The placement new calls here were all calling the allocation function
in RecyclingAllocator/Recycler for SDNode, instead of the function for
the specific subclass we were constructing.
Since this particular allocator always overallocates it more or less
worked, but would hide what we're actually doing from any memory
tools. Also, if you tried to change this allocator so something like a
BumpPtrAllocator or MallocAllocator, the compiler would crash horribly
all the time.
Part of llvm.org/PR26808.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262500
91177308-0d34-0410-b5e6-
96231b3b80d8
Geoff Berry [Wed, 2 Mar 2016 17:58:31 +0000 (17:58 +0000)]
[AArch64] Enable non-leaf frame pointer elimination.
Summary:
This change enables frame pointer elimination in non-leaf functions.
The -fomit-frame-pointer option still needs to be used when compiling
via clang (or an equivalent method of not setting the
'no-frame-pointer-elim*' function attributes if generating llvm IR via
some other method) to take advantage of this optimization.
This change should be NFC when compiling via clang without
-fomit-frame-pointer.
Reviewers: t.p.northover
Subscribers: aemerson, rengolin, tberghammer, qcolombet, llvm-commits, danalbert, mcrosier, srhines
Differential Revision: http://reviews.llvm.org/D17730
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262495
91177308-0d34-0410-b5e6-
96231b3b80d8
Chris Bieneman [Wed, 2 Mar 2016 17:56:30 +0000 (17:56 +0000)]
[CMake] Add test-depends target to build dependencies of check-all
This is just another convenience target for bots to use. It enables isolation of building and testing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262494
91177308-0d34-0410-b5e6-
96231b3b80d8
Reid Kleckner [Wed, 2 Mar 2016 16:42:56 +0000 (16:42 +0000)]
[cmake] Check the compiler version first
Otherwise users get messages from CheckAtomic about missing libatomic
instead of a sensible message that says "use GCC 4.7 or newer".
I structured the change along the lines of HandleLLVMStdlib.cmake, so
that the standalone build of Clang still gets the compiler version
check.
Reviewers: beanz
Differential Revision: http://reviews.llvm.org/D17789
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262491
91177308-0d34-0410-b5e6-
96231b3b80d8
Chandler Carruth [Wed, 2 Mar 2016 15:56:53 +0000 (15:56 +0000)]
[AA] Hoist the logic to reformulate various AA queries in terms of other
parts of the AA interface out of the base class of every single AA
result object.
Because this logic reformulates the query in terms of some other aspect
of the API, it would easily cause O(n^2) query patterns in alias
analysis. These could in turn be magnified further based on the number
of call arguments, and then further based on the number of AA queries
made for a particular call. This ended up causing problems for Rust that
were actually noticable enough to get a bug (PR26564) and probably other
places as well.
When originally re-working the AA infrastructure, the desire was to
regularize the pattern of refinement without losing any generality.
While I think it was successful, that is clearly proving to be too
costly. And the cost is needless: we gain no actual improvement for this
generality of making a direct query to tbaa actually be able to
re-use some other alias analysis's refinement logic for one of the other
APIs, or some such. In short, this is entirely wasted work.
To the extent possible, delegation to other API surfaces should be done
at the aggregation layer so that we can avoid re-walking the
aggregation. In fact, this significantly simplifies the logic as we no
longer need to smuggle the aggregation layer into each alias analysis
(or the TargetLibraryInfo into each alias analysis just so we can form
argument memory locations!).
However, we also have some delegation logic inside of BasicAA and some
of it even makes sense. When the delegation logic is baking in specific
knowledge of aliasing properties of the LLVM IR, as opposed to simply
reformulating the query to utilize a different alias analysis interface
entry point, it makes a lot of sense to restrict that logic to
a different layer such as BasicAA. So one aspect of the delegation that
was in every AA base class is that when we don't have operand bundles,
we re-use function AA results as a fallback for callsite alias results.
This relies on the IR properties of calls and functions w.r.t. aliasing,
and so seems a better fit to BasicAA. I've lifted the logic up to that
point where it seems to be a natural fit. This still does a bit of
redundant work (we query function attributes twice, once via the
callsite and once via the function AA query) but it is *exactly* twice
here, no more.
The end result is that all of the delegation logic is hoisted out of the
base class and into either the aggregation layer when it is a pure
retargeting to a different API surface, or into BasicAA when it relies
on the IR's aliasing properties. This should fix the quadratic query
pattern reported in PR26564, although I don't have a stand-alone test
case to reproduce it.
It also seems general goodness. Now the numerous AAs that don't need
target library info don't carry it around and depend on it. I think
I can even rip out the general access to the aggregation layer and only
expose that in BasicAA as it is the only place where we re-query in that
manner.
However, this is a non-trivial change to the AA infrastructure so I want
to get some additional eyes on this before it lands. Sadly, it can't
wait long because we should really cherry pick this into 3.8 if we're
going to go this route.
Differential Revision: http://reviews.llvm.org/D17329
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262490
91177308-0d34-0410-b5e6-
96231b3b80d8
Simon Pilgrim [Wed, 2 Mar 2016 14:16:50 +0000 (14:16 +0000)]
[X86][SSSE3] Added combine test for unary shuffle (pshufb) only referencing elements from one of the inputs of a binary shuffle (punpcklbw)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262486
91177308-0d34-0410-b5e6-
96231b3b80d8
Michael Zuckerman [Wed, 2 Mar 2016 12:05:07 +0000 (12:05 +0000)]
[LLVM][AVX512]PSRAWI Change imm8 to int.
Differential Revision: http://reviews.llvm.org/D17705
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262480
91177308-0d34-0410-b5e6-
96231b3b80d8
Simon Pilgrim [Wed, 2 Mar 2016 11:43:05 +0000 (11:43 +0000)]
[X86][SSE] Lower 128-bit MOVDDUP with existing VBROADCAST mechanisms
We have a number of useful lowering strategies for VBROADCAST instructions (both from memory and register element 0) which the 128-bit form of the MOVDDUP instruction can make use of.
This patch tweaks lowerVectorShuffleAsBroadcast to enable it to broadcast 2f64 args using MOVDDUP as well.
It does require a slight tweak to the lowerVectorShuffleAsBroadcast mechanism as the existing MOVDDUP lowering uses isShuffleEquivalent which can match binary shuffles that can lower to (unary) broadcasts.
Differential Revision: http://reviews.llvm.org/D17680
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262478
91177308-0d34-0410-b5e6-
96231b3b80d8
Nikolay Haustov [Wed, 2 Mar 2016 11:16:56 +0000 (11:16 +0000)]
Revert "[AMDGPU] table-driven parser/printer for amd_kernel_code_t structure fields"
Build failure with clang.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262477
91177308-0d34-0410-b5e6-
96231b3b80d8
Nikolay Haustov [Wed, 2 Mar 2016 10:54:21 +0000 (10:54 +0000)]
Revert "[AMDGPU] Using table-driven amd_kernel_code_t field parser in assembler."
Build failure with clang.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262475
91177308-0d34-0410-b5e6-
96231b3b80d8
Nikolay Haustov [Wed, 2 Mar 2016 10:36:30 +0000 (10:36 +0000)]
[AMDGPU] Using table-driven amd_kernel_code_t field parser in assembler.
complementary patch to table-driven amd_kernel_code_t field parser/printer utility. lit tests passed.
Patch by: Valery Pykhtin
Differential Revision: http://reviews.llvm.org/D17151
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262474
91177308-0d34-0410-b5e6-
96231b3b80d8
Nikolay Haustov [Wed, 2 Mar 2016 10:36:25 +0000 (10:36 +0000)]
[AMDGPU] table-driven parser/printer for amd_kernel_code_t structure fields
This is going to be used in .hsatext disassembler and can be used
in current assembler parser (lit tests passed on parsing).
Code using this helpers isn't included in this patch.
Benefits:
unified approach
fast field name lookup on parsing
Later I would like to enhance some of the field naming/syntax using this code.
Patch by: Valery Pykhtin
Differential Revision: http://reviews.llvm.org/D17150
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262473
91177308-0d34-0410-b5e6-
96231b3b80d8
Dmitry Vyukov [Wed, 2 Mar 2016 09:54:40 +0000 (09:54 +0000)]
libfuzzer: fix compiler warnings
- unused sigaction/setitimer result (used in assert)
- unchecked fscanf return value
- signed/unsigned comparison
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262472
91177308-0d34-0410-b5e6-
96231b3b80d8
Craig Topper [Wed, 2 Mar 2016 07:32:45 +0000 (07:32 +0000)]
[X86] Remove unnecessary call to isReg from emitter's DestMem handling for VEX prefix. The operand is always a register. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262468
91177308-0d34-0410-b5e6-
96231b3b80d8
Craig Topper [Wed, 2 Mar 2016 07:32:43 +0000 (07:32 +0000)]
[X86] Make X86MCCodeEmitter::DetermineREXPrefix locate operands more like how VEX prefix handling does.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262467
91177308-0d34-0410-b5e6-
96231b3b80d8
David Majnemer [Wed, 2 Mar 2016 06:46:52 +0000 (06:46 +0000)]
[X86] Permit reading of the FLAGS register without it being previously defined
We modeled the RDFLAGS{32,64} operations as "using" {E,R}FLAGS.
While technically correct, this is not be desirable for folks who want
to examine aspects of the FLAGS register which are not related to
computation like whether or not CPUID is a valid instruction.
Differential Revision: http://reviews.llvm.org/D17782
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262465
91177308-0d34-0410-b5e6-
96231b3b80d8
Craig Topper [Wed, 2 Mar 2016 06:35:22 +0000 (06:35 +0000)]
[X86] Remove assertion I accidentally left in.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262464
91177308-0d34-0410-b5e6-
96231b3b80d8
Craig Topper [Wed, 2 Mar 2016 06:06:18 +0000 (06:06 +0000)]
[X86] Be more structured about how we capture the register number when it is encoded in bits 7:4 of the immediate.
For some instructions the register is not the last operand and the immediate handling had to detect this and hardcode the index to find it. It also required CurOp to be pointing at the last operand handled in the Form switch whereas for any instruction it would be pointing at the next operand.
Now we just capture the value in the Form switch when we know exactly where it is and the CurOp pointer can behave normally.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262462
91177308-0d34-0410-b5e6-
96231b3b80d8
Sanjoy Das [Wed, 2 Mar 2016 04:52:22 +0000 (04:52 +0000)]
[SCEV] Minor naming, braces cleanup; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262459
91177308-0d34-0410-b5e6-
96231b3b80d8
Craig Topper [Wed, 2 Mar 2016 04:42:31 +0000 (04:42 +0000)]
[X86] Use MCPhysReg and uint16_t for static arrays of registers and opcodes respectively should reduce size tiny bit. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262458
91177308-0d34-0410-b5e6-
96231b3b80d8
Matt Arsenault [Wed, 2 Mar 2016 04:12:39 +0000 (04:12 +0000)]
AMDGPU: Fix bug 26659.
Fix checking the same instruction twice instead of the
second branch that uses vccz. I don't think this matters
currently because s_branch_vccnz is always used currently.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262457
91177308-0d34-0410-b5e6-
96231b3b80d8
Matt Arsenault [Wed, 2 Mar 2016 04:05:14 +0000 (04:05 +0000)]
AMDGPU: Cleanup suggested in bug 23960
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262456
91177308-0d34-0410-b5e6-
96231b3b80d8
Matt Arsenault [Wed, 2 Mar 2016 03:33:55 +0000 (03:33 +0000)]
Bug 20810: Use report_fatal_error instead of unreachable
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262455
91177308-0d34-0410-b5e6-
96231b3b80d8
Sanjoy Das [Wed, 2 Mar 2016 02:56:29 +0000 (02:56 +0000)]
Add a comment with a rational for the unusual code structure
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262454
91177308-0d34-0410-b5e6-
96231b3b80d8
Sanjoy Das [Wed, 2 Mar 2016 02:44:08 +0000 (02:44 +0000)]
Qualify getRangeForAffineAR with this-> for MSVC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262453
91177308-0d34-0410-b5e6-
96231b3b80d8
George Burgess IV [Wed, 2 Mar 2016 02:35:04 +0000 (02:35 +0000)]
Attempt to fix ASAN failure in a MemorySSA test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262452
91177308-0d34-0410-b5e6-
96231b3b80d8
Sanjoy Das [Wed, 2 Mar 2016 02:34:20 +0000 (02:34 +0000)]
Perturb code in an attempt to appease MSVC
For some reason MSVC seems to think I'm calling getConstant() from a
static context. Try to avoid this issue by explicitly specifying
'this->' (though I'm not confident that this will actually work).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262451
91177308-0d34-0410-b5e6-
96231b3b80d8
Sanjoy Das [Wed, 2 Mar 2016 02:15:42 +0000 (02:15 +0000)]
More code permutation to appease MSVC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262449
91177308-0d34-0410-b5e6-
96231b3b80d8
Sanjoy Das [Wed, 2 Mar 2016 01:59:37 +0000 (01:59 +0000)]
Remove "auto" to appease the MSVC bots
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262448
91177308-0d34-0410-b5e6-
96231b3b80d8
Matt Arsenault [Wed, 2 Mar 2016 01:36:51 +0000 (01:36 +0000)]
DAGCombiner: Make sure an integer is being truncated
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262446
91177308-0d34-0410-b5e6-
96231b3b80d8
Sanjay Patel [Wed, 2 Mar 2016 01:04:09 +0000 (01:04 +0000)]
revert r262424 because there's a *clang test* for AArch64 that checks -O3 asm output
that is broken by this change
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262440
91177308-0d34-0410-b5e6-
96231b3b80d8