OSDN Git Service
Nick Clifton [Tue, 2 May 2006 12:17:30 +0000 (12:17 +0000)]
* binutils-all/copy-2.d: Change the name of the section whose flags are
changed to "foo" so that the test will work with PE based targets.
Skip this test for AOUT based targeted.
* binutils-all/copytest.s: New file.
Thiemo Seufer [Tue, 2 May 2006 11:12:41 +0000 (11:12 +0000)]
* mips-dis.c (print_insn_args): Force mips16 to odd addresses.
(print_mips16_insn_arg): Force mips16 to odd addresses.
Ben Elliston [Tue, 2 May 2006 10:01:56 +0000 (10:01 +0000)]
* archive.c (bfd_generic_archive_p): Remove unused local variable
`fail'.
* dwarf2.c (decode_line_info): Remove unused local variable
`basic_block'.
* elfcode.h (elf_slurp_reloc_table_from_section): Remove unsed
local varibale `s'.
* tekhex.c (tekhex_write_object_contents): Remove unused local
variable `bytes_written'.
* aout-ns32k.c (MY_swap_std_reloc_out): Remove unused local
variable `r_addend'.
* elf32-dlx.c (dlx_rtype_to_howto): Remove breaks after returns.
* elfxx-mips.c (_bfd_elf_mips_mach): Remove breaks after returns.
(_bfd_ns32k_relocate_contents): Remove break after return.
* elf.c (bfd_section_from_shdr): Remove breaks after returns.
Nick Clifton [Tue, 2 May 2006 09:56:00 +0000 (09:56 +0000)]
Rename DEBUG to SYMBIAN_DEBUG to avoid conflicts with global DEBUG definition
Ben Elliston [Tue, 2 May 2006 04:21:39 +0000 (04:21 +0000)]
* config/obj-elf.h (ELF_TARGET_SYMBOL_FIELDS): Make single bit
field unsigned.
Ben Elliston [Tue, 2 May 2006 03:39:04 +0000 (03:39 +0000)]
* sb.h (sb_list_vector): Move to sb.c.
* sb.c (free_list): Use type of sb_list_vector directly.
(sb_build): Fix off-by-one error in assertion about `size'.
Alan Modra [Tue, 2 May 2006 01:41:20 +0000 (01:41 +0000)]
* dwarf2.c: Formatting.
* elf-eh-frame.c (_bfd_elf_discard_section_eh_frame): Simplify
output section check.
* elf32-i370.c: Warning fixes inside #ifdef DEBUG.
* elf32-m32c.c: Similarly.
* elf32-ppc.c: Similarly.
* elf32-v850.c: Similarly.
* nlm32-sparc.c: Similarly.
* elfcode.h: Similarly.
(elf_symbol_flags): Delete.
* elflink.c (elf_link_input_bfd): Comment typo.
DJ Delorie [Tue, 2 May 2006 00:58:33 +0000 (00:58 +0000)]
Fix typo.
DJ Delorie [Tue, 2 May 2006 00:16:50 +0000 (00:16 +0000)]
* configure.in: Restore CFLAGS if GM P isn't present.
* configure: Regenerate.
Alan Modra [Tue, 2 May 2006 00:00:39 +0000 (00:00 +0000)]
daily update
DJ Delorie [Mon, 1 May 2006 19:36:27 +0000 (19:36 +0000)]
* bfd-in.h (bfd_hash_table): Add count field.
* bfd-in2.h: Regenerate.
* hash.c (higher_prime_number): New.
(bfd_hash_table_inint_n): Init count field.
(bfd_hash_lookup): Grow table as needed.
H.J. Lu [Mon, 1 May 2006 14:09:35 +0000 (14:09 +0000)]
2006-05-01 H.J. Lu <hongjiu.lu@intel.com>
* binutils-all/objcopy.exp: Run "copy-1" for ELF only.
Ben Elliston [Mon, 1 May 2006 09:21:46 +0000 (09:21 +0000)]
* listing.c (listing_listing): Remove useless loop.
* macro.c (macro_expand): Remove is_positional local variable.
* read.c (s_comm_internal): Simplify `if' condition 1 || x -> 1
and simplify surrounding expressions, where possible.
(assign_symbol): Likewise.
(s_weakref): Likewise.
* symbols.c (colon): Likewise.
Alan Modra [Mon, 1 May 2006 05:41:40 +0000 (05:41 +0000)]
* subsegs.c (subseg_set_rest): Always set seginfp->frchainP if NULL.
Ben Elliston [Mon, 1 May 2006 04:01:25 +0000 (04:01 +0000)]
* binutils-all/objcopy.exp (objcopy_test_readelf): Remove stray ;
Alan Modra [Mon, 1 May 2006 00:00:06 +0000 (00:00 +0000)]
daily update
Thiemo Seufer [Sun, 30 Apr 2006 18:34:39 +0000 (18:34 +0000)]
[ gas/ChangeLog ]
2006-04-30 Thiemo Seufer <ths@mips.com>
David Ung <davidu@mips.com>
* config/tc-mips.c (validate_mips_insn): Handling of udi cases.
(mips_immed): New table that records various handling of udi
instruction patterns.
(mips_ip): Adds udi handling.
[ include/opcode/ChangeLog ]
2006-04-30 Thiemo Seufer <ths@mips.com>
David Ung <davidu@mips.com>
* mips.h: Defines udi bits and masks. Add description of
characters which may appear in the args field of udi
instructions.
[ opcodes/ChangeLog ]
2006-04-30 Thiemo Seufer <ths@mips.com>
David Ung <davidu@mips.com>
* mips-opc.c (mips_builtin_opcodes): Add udi instructions
"udi0" to "udi15".
* mips-dis.c (print_insn_args): Adds udi argument handling.
H.J. Lu [Sun, 30 Apr 2006 00:23:00 +0000 (00:23 +0000)]
2006-04-26 H.J. Lu <hongjiu.lu@intel.com>
* ld-elfvers/vers.exp: Xfail vers7a, vers7, vers23a, vers23b,
vers23c, vers23d, vers23, vers25a, vers25b1, vers25b2, vers27a,
vers27b, vers27c1, vers27c2, vers27d4 and vers27d5 if PIC is
required.
H.J. Lu [Sun, 30 Apr 2006 00:21:26 +0000 (00:21 +0000)]
2006-04-29 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/fp.d: New file.
* gas/i386/fp.s: Likewise.
* gas/i386/i386.exp: Run "fp".
Alan Modra [Sun, 30 Apr 2006 00:00:05 +0000 (00:00 +0000)]
daily update
H.J. Lu [Sat, 29 Apr 2006 16:54:51 +0000 (16:54 +0000)]
Move opcode ChangeLog entry to opcode/ChangeLog.
Jim Wilson [Sat, 29 Apr 2006 03:11:31 +0000 (03:11 +0000)]
Fix buglet noticed while looking at PR 1298.
* m68k-dis.c (match_insn_m68k): Restore fprintf_func before printing
error message.
Alan Modra [Sat, 29 Apr 2006 00:00:11 +0000 (00:00 +0000)]
daily update
Thiemo Seufer [Fri, 28 Apr 2006 13:38:49 +0000 (13:38 +0000)]
Don't mis-spell your boss' name...
Thiemo Seufer [Fri, 28 Apr 2006 13:17:00 +0000 (13:17 +0000)]
[ opcodes/ChangeLog ]
2006-04-28 Thiemo Seufer <ths@mips.com>
David Ung <davidu@mips.com>
Nigel Stevens <nigel@mips.com>
* mips-dis.c (mips_cp0sel_names_mips3264r2): Add MT register
names.
[ gas/testsuite/ChangeLog ]
2006-04-28 Thiemo Seufer <ths@mips.com>
David Ung <davidu@mips.com>
Nigel Stevens <nigel@mips.com>
* gas/mips/cp0sel-names-mips32r2.d,
gas/mips/cp0sel-names-mips64r2.d: Update for MT register names.
Thiemo Seufer [Fri, 28 Apr 2006 12:59:30 +0000 (12:59 +0000)]
* mips-dis.c (print_insn_args): Add mips_opcode argument.
(print_insn_mips): Adjust print_insn_args call.
Thiemo Seufer [Fri, 28 Apr 2006 12:19:31 +0000 (12:19 +0000)]
* mips-dis.c (print_insn_args): Print $fcc only for FP
instructions, use $cc elsewise.
Thiemo Seufer [Fri, 28 Apr 2006 11:42:28 +0000 (11:42 +0000)]
* opcodes/mips-dis.c (mips16_to_32_reg_map, mips16_reg_names):
Map MIPS16 registers to O32 names.
(print_mips16_insn_arg): Use mips16_reg_names.
Alan Modra [Fri, 28 Apr 2006 04:07:33 +0000 (04:07 +0000)]
* dwarf2dbg.c (get_line_subseg): Attach new struct line_seg to end
of list rather than beginning.
Alan Modra [Fri, 28 Apr 2006 00:00:36 +0000 (00:00 +0000)]
daily update
Kaz Kojima [Thu, 27 Apr 2006 05:57:09 +0000 (05:57 +0000)]
PR binutils/2584
* tekhex.c (getvalue): Change return type to bfd_boolean and
add the new parameter. Return false if the unexpected character
is found.
(getsym): Likewise.
(first_phase): Change return type to bfd_boolean and return
false if the unexpected character is found. Replace abort
with returning false.
(pass_over): Change return type to bfd_boolean and the type of
the second argument to bfd_boolean (*) (bfd *, int, char *).
Return false if FUNC returns false.
(tekhex_object_p): Return NULL if pass_over fails.
Alan Modra [Thu, 27 Apr 2006 01:19:35 +0000 (01:19 +0000)]
* coff-rs6000.c (xcoff_write_archive_contents_old): Warning fix.
Alan Modra [Thu, 27 Apr 2006 00:00:06 +0000 (00:00 +0000)]
daily update
Thiemo Seufer [Wed, 26 Apr 2006 18:19:15 +0000 (18:19 +0000)]
* mips.h: Improve comments describing the bitfield instruction
fields.
Julian Brown [Wed, 26 Apr 2006 16:03:02 +0000 (16:03 +0000)]
* gas/config/tc-arm.c (neon_is_quarter_float): Move, and rename to...
(is_quarter_float): Rename from above. Simplify slightly.
(parse_qfloat_immediate): Parse a "quarter precision" floating-point
number.
(parse_neon_mov): Parse floating-point constants.
(neon_qfloat_bits): Fix encoding.
(neon_cmode_for_move_imm): Tweak to use floating-point encoding in
preference to integer encoding when using the F32 type.
Julian Brown [Wed, 26 Apr 2006 16:02:40 +0000 (16:02 +0000)]
* gas/testsuite/gas/arm/neon-const.s: New testcase. Neon floating-point
constants.
* gas/testsuite/gas/arm/neon-const.d: Expected output of above.
* gas/testsuite/gas/arm/neon-cov.d: Expect floating-point disassembly
for VMOV.F32.
Julian Brown [Wed, 26 Apr 2006 16:02:07 +0000 (16:02 +0000)]
* arm-dis.c (print_insn_neon): Disassemble floating-point constant
VMOV.
Julian Brown [Wed, 26 Apr 2006 15:55:45 +0000 (15:55 +0000)]
* config/tc-arm.c (neon_el_type): Make NT_invtype be the zero (so
zero-initialising structures containing it will lead to invalid types).
(arm_it): Add vectype to each operand.
(NTA_HASTYPE, NTA_HASINDEX): Constants used in neon_typed_alias
defined field.
(neon_typed_alias): New structure. Extra information for typed
register aliases.
(reg_entry): Add neon type info field.
(arm_reg_parse): Remove RTYPE argument (revert to previous arguments).
Break out alternative syntax for coprocessor registers, etc. into...
(arm_reg_alt_syntax): New function. Alternate syntax handling broken
out from arm_reg_parse.
(parse_neon_type): Move. Return SUCCESS/FAIL.
(first_error): New function. Call to ensure first error which occurs is
reported.
(parse_neon_operand_type): Parse exactly one type.
(NEON_ALL_LANES, NEON_INTERLEAVE_LANES): Move.
(parse_typed_reg_or_scalar): New function. Handle core of both
arm_typed_reg_parse and parse_scalar.
(arm_typed_reg_parse): Parse a register with an optional type.
(NEON_SCALAR_REG, NEON_SCALAR_INDEX): Extract parts of parse_scalar
result.
(parse_scalar): Parse a Neon scalar with optional type.
(parse_reg_list): Use first_error.
(parse_vfp_reg_list): Use arm_typed_reg_parse instead of arm_reg_parse.
(neon_alias_types_same): New function. Return true if two (alias) types
are the same.
(parse_neon_el_struct_list): Use parse_typed_reg_or_scalar. Return type
of elements.
(insert_reg_alias): Return new reg_entry not void.
(insert_neon_reg_alias): New function. Insert type/index information as
well as register for alias.
(create_neon_reg_alias): New function. Parse .dn/.qn directives and
make typed register aliases accordingly.
(s_dn, s_qn): New functions. Handle incorrectly used .dn/.qn at start
of line.
(s_unreq): Delete type information if present.
(s_arm_unwind_save_mmxwr): Remove arg 3 from arm_reg_parse calls.
(s_arm_unwind_save_mmxwcg): Likewise.
(s_arm_unwind_movsp): Likewise.
(s_arm_unwind_setfp): Likewise.
(parse_shift): Likewise.
(parse_shifter_operand): Likewise.
(parse_address): Likewise.
(parse_tb): Likewise.
(tc_arm_regname_to_dw2regnum): Likewise.
(md_pseudo_table): Add dn, qn.
(parse_neon_mov): Handle typed operands.
(parse_operands): Likewise.
(neon_type_mask): Add N_SIZ.
(N_ALLMODS): New macro.
(neon_check_shape): Fix typo in NS_DDD_QQQ case. Use first_error.
(el_type_of_type_chk): Add some safeguards.
(modify_types_allowed): Fix logic bug.
(neon_check_type): Handle operands with types.
(neon_three_same): Remove redundant optional arg handling.
(do_neon_dyadic_i64_su, do_neon_shl_imm, do_neon_qshl_imm)
(do_neon_logic, do_neon_qdmulh, do_neon_fcmp_absolute)
(do_neon_step): Adjust accordingly.
(neon_cmode_for_logic_imm): Use first_error.
(do_neon_bitfield): Call neon_check_type.
(neon_dyadic): Rename to...
(neon_dyadic_misc): ...this. New name for neon_dyadic. Add bitfield
to allow modification of type of the destination.
(do_neon_dyadic_if_su, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
(do_neon_addsub_if_i, do_neon_mul): Adjust accordingly.
(do_neon_compare): Make destination be an untyped bitfield.
(neon_scalar_for_mul): Use NEON_SCALAR_REG, NEON_SCALAR_INDEX.
(neon_mul_mac): Return early in case of errors.
(neon_move_immediate): Use first_error.
(neon_mac_reg_scalar_long): Fix type to include scalar.
(do_neon_dup): Likewise.
(do_neon_mov): Likewise (in several places).
(do_neon_tbl_tbx): Fix type.
(do_neon_ld_st_interleave, neon_alignment_bit, do_neon_ld_st_lane)
(do_neon_ld_dup): Exit early in case of errors and/or use
first_error.
(opcode_lookup): Update for parse_neon_type returning SUCCESS/FAIL.
Handle .dn/.qn directives.
(REGDEF): Add zero for reg_entry neon field.
Julian Brown [Wed, 26 Apr 2006 15:55:17 +0000 (15:55 +0000)]
* gas/arm/neon-psyn.s: Basic test of programmers syntax.
* gas/arm/neon-psyn.d: Expected output of above.
Julian Brown [Wed, 26 Apr 2006 15:43:17 +0000 (15:43 +0000)]
* readelf.c (arm_attr_tag_VFP_arch): Add VFPv3.
Julian Brown [Wed, 26 Apr 2006 15:42:54 +0000 (15:42 +0000)]
* config/tc-arm.c (limits.h): Include.
(fpu_arch_vfp_v3, fpu_vfp_ext_v3, fpu_neon_ext_v1)
(fpu_vfp_v3_or_neon_ext): Declare constants.
(neon_el_type): New enumeration of types for Neon vector elements.
(neon_type_el): New struct. Define type and size of a vector element.
(NEON_MAX_TYPE_ELS): Define constant. The maximum number of types per
instruction.
(neon_type): Define struct. The type of an instruction.
(arm_it): Add 'vectype' for the current instruction.
(isscalar, immisalign, regisimm, isquad): New predicates for operands.
(vfp_sp_reg_pos): Rename to...
(vfp_reg_pos): ...this, and add VFP_REG_Dd, VFP_REG_Dm, VFP_REG_Dn
tags.
(arm_reg_type): Add REG_TYPE_NQ (Neon Q register) and REG_TYPE_NDQ
(Neon D or Q register).
(reg_expected_msgs): Sync with above. Allow VFD to mean VFP or Neon D
register.
(GE_OPT_PREFIX_BIG): Define constant, for use in...
(my_get_expression): Allow above constant as argument to accept
64-bit constants with optional prefix.
(arm_reg_parse): Add extra argument to return the specific type of
register in when either a D or Q register (REG_TYPE_NDQ) is
requested. Can be NULL.
(parse_scalar): New function. Parse Neon scalar (vector reg and index).
(parse_reg_list): Update for new arm_reg_parse args.
(parse_vfp_reg_list): Allow parsing of Neon D/Q register lists.
(parse_neon_el_struct_list): New function. Parse element/structure
register lists for VLD<n>/VST<n> instructions.
(s_arm_unwind_save_vfp): Update for new parse_vfp_reg_list args.
(s_arm_unwind_save_mmxwr): Likewise.
(s_arm_unwind_save_mmxwcg): Likewise.
(s_arm_unwind_movsp): Likewise.
(s_arm_unwind_setfp): Likewise.
(parse_big_immediate): New function. Parse an immediate, which may be
64 bits wide. Put results in inst.operands[i].
(parse_shift): Update for new arm_reg_parse args.
(parse_address): Likewise. Add parsing of alignment specifiers.
(parse_neon_mov): Parse the operands of a VMOV instruction.
(operand_parse_code): Add OP_RND, OP_RNQ, OP_RNDQ, OP_RNSC, OP_NRDLST,
OP_NSTRLST, OP_NILO, OP_RNDQ_I0, OP_RR_RNSC, OP_RNDQ_RNSC, OP_RND_RNSC,
OP_VMOV, OP_RNDQ_IMVNb, OP_RNDQ_I63b, OP_I0, OP_I16z, OP_I32z, OP_I64,
OP_I64z, OP_oI32b, OP_oRND, OP_oRNQ, OP_oRNDQ.
(parse_operands): Handle new codes above.
(encode_arm_vfp_sp_reg): Rename to...
(encode_arm_vfp_reg): ...this. Handle D regs (0-31) too. Complain if
selected VFP version only supports D0-D15.
(do_vfp_sp_monadic, do_vfp_sp_dyadic, do_vfp_sp_compare_z)
(do_vfp_dp_sp_cvt, do_vfp_reg_from_sp, do_vfp_reg2_from_sp2)
(do_vfp_sp_from_reg, do_vfp_sp2_from_reg2, do_vfp_sp_ldst)
(do_vfp_dp_ldst, vfp_sp_ldstm, vfp_dp_ldstm): Update for new
encode_arm_vfp_reg name, and allow 32 D regs.
(do_vfp_dp_rd_rm, do_vfp_dp_rn_rd, do_vfp_dp_rd_rn, do_vfp_dp_rd_rn_rm)
(do_vfp_rm_rd_rn): New functions to encode VFP insns allowing 32 D
regs.
(do_vfp_sp_const, do_vfp_dp_const, vfp_conv, do_vfp_sp_conv_16)
(do_vfp_dp_conv_16, do_vfp_sp_conv_32, do_vfp_dp_conv_32): Handle
constant-load and conversion insns introduced with VFPv3.
(neon_tab_entry): New struct.
(NEON_ENC_TAB): Bit patterns for overloaded Neon instructions, and
those which are the targets of pseudo-instructions.
(neon_opc): Enumerate opcodes, use as indices into...
(neon_enc_tab): ...this. Hold data from NEON_ENC_TAB.
(NEON_ENC_INTEGER, NEON_ENC_ARMREG, NEON_ENC_POLY, NEON_ENC_FLOAT)
(NEON_ENC_SCALAR, NEON_ENC_IMMED, NEON_ENC_INTERLV, NEON_ENC_LANE)
(NEON_ENC_DUP): Define meaningful helper macros to look up values in
neon_enc_tab.
(neon_shape): Enumerate shapes (permitted register widths, etc.) for
Neon instructions.
(neon_type_mask): New. Compact type representation for type checking.
(N_SU_ALL, N_SU_32, N_SU_16_64, N_SUF_32, N_I_ALL, N_IF_32): Common
permitted type combinations.
(N_IGNORE_TYPE): New macro.
(neon_check_shape): New function. Check an instruction shape for
multiple alternatives. Return the specific shape for the current
instruction.
(neon_modify_type_size): New function. Modify a vector type and size,
depending on the bit mask in argument 1.
(neon_type_promote): New function. Convert a given "key" type (of an
operand) into the correct type for a different operand, based on a bit
mask.
(type_chk_of_el_type): New function. Convert a type and size into the
compact representation used for type checking.
(el_type_of_type_ckh): New function. Reverse of above (only when a
single bit is set in the bit mask).
(modify_types_allowed): New function. Alter a mask of allowed types
based on a bit mask of modifications.
(neon_check_type): New function. Check the type of the current
instruction against the variable argument list. The "key" type of the
instruction is returned.
(neon_dp_fixup): New function. Fill in and modify instruction bits for
a Neon data-processing instruction depending on whether we're in ARM
mode or Thumb-2 mode.
(neon_logbits): New function.
(neon_three_same, neon_two_same, do_neon_dyadic_i_su)
(do_neon_dyadic_i64_su, neon_imm_shift, do_neon_shl_imm)
(do_neon_qshl_imm, neon_cmode_for_logic_imm, neon_bits_same_in_bytes)
(neon_squash_bits, neon_is_quarter_float, neon_qfloat_bits)
(neon_cmode_for_move_imm, neon_write_immbits, neon_invert_size)
(do_neon_logic, do_neon_bitfield, neon_dyadic, do_neon_dyadic_if_su)
(do_neon_dyadic_if_su_d, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
(do_neon_addsub_if_i, neon_exchange_operands, neon_compare)
(do_neon_cmp, do_neon_cmp_inv, do_neon_ceq, neon_scalar_for_mul)
(neon_mul_mac, do_neon_mac_maybe_scalar, do_neon_tst, do_neon_mul)
(do_neon_qdmulh, do_neon_fcmp_absolute, do_neon_fcmp_absolute_inv)
(do_neon_step, do_neon_abs_neg, do_neon_sli, do_neon_sri)
(do_neon_qshlu_imm, do_neon_qmovn, do_neon_qmovun)
(do_neon_rshift_sat_narrow, do_neon_rshift_sat_narrow_u, do_neon_movn)
(do_neon_rshift_narrow, do_neon_shll, neon_cvt_flavour, do_neon_cvt)
(neon_move_immediate, do_neon_mvn, neon_mixed_length)
(do_neon_dyadic_long, do_neon_abal, neon_mac_reg_scalar_long)
(do_neon_mac_maybe_scalar_long, do_neon_dyadic_wide, do_neon_vmull)
(do_neon_ext, do_neon_rev, do_neon_dup, do_neon_mov)
(do_neon_rshift_round_imm, do_neon_movl, do_neon_trn, do_neon_zip_uzp)
(do_neon_sat_abs_neg, do_neon_pair_long, do_neon_recip_est)
(do_neon_cls, do_neon_clz, do_neon_cnt, do_neon_swp, do_neon_tbl_tbx)
(do_neon_ldm_stm, do_neon_ldr_str, do_neon_ld_st_interleave)
(neon_alignment_bit, do_neon_ld_st_lane, do_neon_ld_dup)
(do_neon_ldx_stx): New functions. Neon bit encoding and encoding
helpers.
(parse_neon_type): New function. Parse Neon type specifier.
(opcode_lookup): Allow parsing of Neon type specifiers.
(REGNUM2, REGSETH, REGSET2): New macros.
(reg_names): Add new VFPv3 and Neon registers.
(NUF, nUF, NCE, nCE): New macros for opcode table.
(insns): More VFP registers allowed in fcpyd, fmdhr, fmdlr, fmrdh,
fmrdl, fabsd, fnegd, fsqrtd, faddd, fsubd, fmuld, fdivd, fmacd, fmscd,
fnmuld, fnmacd, fnmscd, fcmpd, fcmpzd, fcmped, fcmpezd, fmdrr, fmrrd.
Add Neon instructions vaba, vhadd, vrhadd, vhsub, vqadd, vqsub, vrshl,
vqrshl, vshl, vqshl{u}, vand, vbic, vorr, vorn, veor, vbsl, vbit, vbif,
vabd, vmax, vmin, vcge, vcgt, vclt, vcle, vceq, vpmax, vpmin, vmla,
vmls, vpadd, vadd, vsub, vtst, vmul, vqdmulh, vqrdmulh, vacge, vacgt,
vaclt, vacle, vrecps, vrsqrts, vabs, vneg, v{r}shr, v{r}sra, vsli,
vsri, vqshrn, vq{r}shr{u}n, v{r}shrn, vshll, vcvt, vmov, vmvn, vabal,
vabdl, vaddl, vsubl, vmlal, vmlsl, vaddw, vsubw, v{r}addhn, v{r}subhn,
vqdmlal, vqdmlsl, vqdmull, vmull, vext, vrev64, vrev32, vrev16, vdup,
vmovl, v{q}movn, vzip, vuzp, vqabs, vqneg, vpadal, vpaddl, vrecpe,
vrsqrte, vcls, vclz, vcnt, vswp, vtrn, vtbl, vtbx, vldm, vstm, vldr,
vstr, vld[1234], vst[1234], fconst[sd], f[us][lh]to[sd],
fto[us][lh][sd].
(tc_arm_regname_to_dw2regnum): Update for arm_reg_parse args.
(arm_cpu_option_table): Add Neon and VFPv3 to Cortex-A8.
(arm_option_cpu_value): Add vfp3 and neon.
(aeabi_set_public_attributes): Support VFPv3 and NEON attributes. Fix
VFPv1 attribute.
Julian Brown [Wed, 26 Apr 2006 15:42:17 +0000 (15:42 +0000)]
* gas/arm/copro.s: Avoid ldcl which encodes as a bad Neon instruction.
* gas/arm/copro.d: Update accordingly.
* gas/arm/neon-cond.s: New test. Conditional Neon opcodes in ARM mode.
* gas/arm/neon-cond.d: Expected results of above.
* gas/arm/neon-cov.s: New test. Coverage of Neon instructions.
* gas/arm/neon-cov.d: Expected results of above.
* gas/arm/neon-ldst-es.s: New test. Element and structure loads and
stores.
* gas/arm/neon-ldst-es.d: Expected results of above.
* gas/arm/neon-ldst-rm.s: New test. Single and multiple register loads
and stores.
* gas/arm/neon-ldst-rm.d: Expected results of above.
* gas/arm/neon-omit.s: New test. Omission of optional operands.
* gas/arm/neon-omit.d: Expected results of above.
* gas/arm/vfp1.d: Expect Neon syntax for some VFP instructions.
* gas/arm/vfp1_t2.d: Likewise.
* gas/arm/vfp1xD.d: Likewise.
* gas/arm/vfp1xD_t2.d: Likewise.
* gas/arm/vfp2.d: Likewise.
* gas/arm/vfp2_t2.d: Likewise.
* gas/arm/vfp3-32drs.s: New test. Extended D register range for VFP
instructions.
* gas/arm/vfp3-32drs.d: Expected results of above.
* gas/arm/vfp3-const-conv.s: New test. VFPv3 constant-load and
conversion instructions.
* gas/arm/vfp3-const-conv.d: Expected results of above.
Julian Brown [Wed, 26 Apr 2006 15:41:16 +0000 (15:41 +0000)]
* opcode/arm.h (FPU_VFP_EXT_V3): Define constant.
(FPU_NEON_EXT_V1): Likewise.
(FPU_VFP_HARD): Update.
(FPU_VFP_V3): Define macro.
(FPU_ARCH_VFP_V3, FPU_ARCH_VFP_V3_PLUS_NEON_V1): Define macros.
Julian Brown [Wed, 26 Apr 2006 15:40:55 +0000 (15:40 +0000)]
* opcodes/arm-dis.c (coprocessor_opcodes): Add %A, %B, %k, convert
%<code>[zy] into %[zy]<code>. Expand meaning of %<bitfield>['`?].
Add unified load/store instruction names.
(neon_opcode_table): New.
(arm_opcodes): Expand meaning of %<bitfield>['`?].
(arm_decode_bitfield): New.
(print_insn_coprocessor): Add pc argument. Add %A & %B specifiers.
Use arm_decode_bitfield and adjust numeric specifiers. Adjust %z & %y.
(print_insn_neon): New.
(print_insn_arm): Adjust print_insn_coprocessor call. Call
print_insn_neon. Use arm_decode_bitfield and adjust numeric specifiers.
(print_insn_thumb32): Likewise.
H.J. Lu [Wed, 26 Apr 2006 13:37:05 +0000 (13:37 +0000)]
2006-04-26 H.J. Lu <hongjiu.lu@intel.com>
PR binutils/2593
* binutils-all/copy-1.d: New file.
* binutils-all/copy-1.s: Likewise.
* binutils-all/copy-2.d: Likewise.
* binutils-all/objcopy.exp: Add run_dump_test "copy-1" and
run_dump_test "copy-2".
* lib/utils-lib.exp (run_dump_test): New.
(slurp_options): Likewise.
(regexp_diff): Likewise.
(file_contents): Likewise.
(verbose_eval): Likewise.
H.J. Lu [Wed, 26 Apr 2006 13:32:26 +0000 (13:32 +0000)]
2006-04-26 H.J. Lu <hongjiu.lu@intel.com>
PR binutils/2593
* elf.c (_bfd_elf_new_section_hook): Don't set section ELF type
and flags if its BFD flags have been set.
(_bfd_elf_init_private_section_data): Don't copy the output ELF
section type from input if it has been set to something
different.
Andreas Jaeger [Wed, 26 Apr 2006 09:24:07 +0000 (09:24 +0000)]
Add missing changelog entry
Alan Modra [Wed, 26 Apr 2006 00:00:05 +0000 (00:00 +0000)]
daily update
H.J. Lu [Tue, 25 Apr 2006 22:05:15 +0000 (22:05 +0000)]
2006-04-25 H.J. Lu <hongjiu.lu@intel.com>
* ld-alpha/tlsbin.rd: Updated for readelf change.
* ld-alpha/tlsbinr.rd: Likewise.
* ld-alpha/tlspic.rd: Likewise.
H.J. Lu [Tue, 25 Apr 2006 19:09:58 +0000 (19:09 +0000)]
Regenerate libbfd.h.
H.J. Lu [Tue, 25 Apr 2006 17:46:15 +0000 (17:46 +0000)]
2006-04-25 H.J. Lu <hongjiu.lu@intel.com>
PR binutils/2467
* elf.c (_bfd_elf_close_and_cleanup): Check elf_tdata (abfd)
is NULL first.
* elf32-arm.c (elf32_arm_close_and_cleanup): Check if
abfd->sections is NULL.
(elf32_arm_bfd_free_cached_info): New.
(bfd_elf32_bfd_free_cached_info): Defined.
* elfxx-target.h (bfd_elfNN_bfd_free_cached_info): Default it
to _bfd_free_cached_info.
* libbfd-in.h (_bfd_free_cached_info): New.
* libbfd: Regenerated.
* opncls.c (_bfd_delete_bfd): Check if abfd->memory is NULL.
(_bfd_free_cached_info): New.
Bob Wilson [Tue, 25 Apr 2006 17:11:10 +0000 (17:11 +0000)]
* config/xtensa-relax.c (widen_spec_list): Use new "WIDE.<opcode>"
syntax instead of hardcoded opcodes with ".w18" suffixes.
(wide_branch_opcode): New.
(build_transition): Use it to check for wide branch opcodes with
either ".w18" or ".w15" suffixes.
Bob Wilson [Tue, 25 Apr 2006 16:32:56 +0000 (16:32 +0000)]
* config/tc-xtensa.c (xtensa_create_literal_symbol,
xg_assemble_literal, xg_assemble_literal_space): Do not set the
frag's is_literal flag.
Nick Clifton [Tue, 25 Apr 2006 16:20:47 +0000 (16:20 +0000)]
PR 2587
* Makefile.am: Add empty rule for .m -> .o build in order to work around bug
in gmake shipped by Apple.
* Makefile.in: Regenerate.
Bob Wilson [Tue, 25 Apr 2006 15:41:16 +0000 (15:41 +0000)]
* config/xtensa-relax.c (XCHAL_HAVE_WIDE_BRANCHES): Provide default.
H.J. Lu [Tue, 25 Apr 2006 14:06:10 +0000 (14:06 +0000)]
2006-04-25 H.J. Lu <hongjiu.lu@intel.com>
PR binutils/2467
* binutils-all/objcopy.exp (strip_test): Also test "strip -g"
on archive.
Alan Modra [Tue, 25 Apr 2006 00:00:06 +0000 (00:00 +0000)]
daily update
Julian Brown [Mon, 24 Apr 2006 21:34:41 +0000 (21:34 +0000)]
* floatformat.c (floatformat_to_double): Fix (biased) exponent=0 case.
Alan Modra [Mon, 24 Apr 2006 00:00:05 +0000 (00:00 +0000)]
daily update
Kazu Hirata [Sun, 23 Apr 2006 22:12:43 +0000 (22:12 +0000)]
* config/obj-coff.c, config/tc-arm.c, config/tc-bfin.c,
config/tc-cris.c, config/tc-crx.c, config/tc-i386.c,
config/tc-ia64.c, config/tc-maxq.c, config/tc-maxq.h,
config/tc-mips.c, config/tc-msp430.c, config/tc-sh.c,
config/tc-tic4x.c, config/tc-xtensa.c: Fix comment typos.
Alan Modra [Sun, 23 Apr 2006 00:00:05 +0000 (00:00 +0000)]
daily update
Alan Modra [Sat, 22 Apr 2006 00:00:05 +0000 (00:00 +0000)]
daily update
Alan Modra [Fri, 21 Apr 2006 07:26:09 +0000 (07:26 +0000)]
* elf.c (assign_file_positions_except_relocs): Move code setting
file position of non-loaded sections..
(assign_file_positions_for_segments): ..to here.
H.J. Lu [Fri, 21 Apr 2006 03:42:47 +0000 (03:42 +0000)]
2006-04-20 H.J. Lu <hongjiu.lu@intel.com>
PR ld/2537
* elf.c (bfd_section_from_shdr): Allow sections reserved for
applications. Issue an error on sections we don't know how
to handle.
Alan Modra [Fri, 21 Apr 2006 00:00:06 +0000 (00:00 +0000)]
daily update
Paul Brook [Thu, 20 Apr 2006 12:39:51 +0000 (12:39 +0000)]
2005-04-20 Paul Brook <paul@codesourcery.com>
gas/
* config/tc-arm.c (s_arm_arch, s_arm_cpu, s_arm_fpu): Enable for
all targets.
(md_pseudo_table): Enable .arch, .cpu and .fpu for all targets.
gas/testsuite/
* gas/arm/arch7.d: Remove skip.
* gas/arm/svc.d: Ditto.
* gas/arm/thumb2_bcond.d: Ditto.
* gas/arm/thumb2_it_bad.d: Ditto.
Alan Modra [Thu, 20 Apr 2006 00:00:07 +0000 (00:00 +0000)]
daily update
Alan Modra [Wed, 19 Apr 2006 12:10:46 +0000 (12:10 +0000)]
* Makefile.am (CPU_TYPES): Add maxq and mt. Sort.
(CPU_OBJ_VALID): Change sense of COFF test to default to invalid.
Make some cpus unsupported on ELF. Run "make dep-am".
* Makefile.in: Regenerate.
Alan Modra [Wed, 19 Apr 2006 12:10:21 +0000 (12:10 +0000)]
* Makefile.am: Run "make dep-am".
* Makefile.in: Regenerate.
Alan Modra [Wed, 19 Apr 2006 02:15:05 +0000 (02:15 +0000)]
* avr-dis.c (avr_operand): Warning fix.
Alan Modra [Wed, 19 Apr 2006 02:10:43 +0000 (02:10 +0000)]
* ldlang.c (wild): Tidy default_common_section loop.
(print_input_section): Format.
Alan Modra [Wed, 19 Apr 2006 02:06:15 +0000 (02:06 +0000)]
bfd/
* warning.m4 (--enable-werror, -build-warnings): Format help messages.
* configure: Regenerate.
binutils/
* configure: Regenerate.
gas/
* configure.in (--enable-targets): Indent help message.
* configure: Regenerate.
gprof/
* configure: Regenerate.
ld/
* configure: Regenerate.
opcodes/
* configure: Regenerate.
DJ Delorie [Wed, 19 Apr 2006 00:57:59 +0000 (00:57 +0000)]
* configure.in (m32c): Build libstdc++-v3. Pass flags to
reference libgloss so that libssp can be built in a combined
tree.
* configure: Regenerate.
Alan Modra [Wed, 19 Apr 2006 00:00:05 +0000 (00:00 +0000)]
daily update
H.J. Lu [Tue, 18 Apr 2006 17:52:37 +0000 (17:52 +0000)]
gas/
2006-04-18 H.J. Lu <hongjiu.lu@intel.com>
PR gas/2533
* config/tc-i386.c (i386_immediate): Check illegal immediate
register operand.
gas/testsuite/
2006-04-18 H.J. Lu <hongjiu.lu@intel.com>
PR gas/2533
* gas/i386/inval.s: Add test for illegal immediate register
operand.
* gas/i386/inval.l: Updated.
Alan Modra [Tue, 18 Apr 2006 10:11:09 +0000 (10:11 +0000)]
* config/tc-i386.c: Formatting.
(output_disp, output_imm): ISO C90 params.
Alan Modra [Tue, 18 Apr 2006 09:58:26 +0000 (09:58 +0000)]
* frags.c (frag_offset_fixed_p): Constify args.
* frags.h (frag_offset_fixed_p): Ditto.
Alan Modra [Tue, 18 Apr 2006 09:55:27 +0000 (09:55 +0000)]
* config/tc-dlx.h (tc_coff_symbol_emit_hook): Delete.
(COFF_MAGIC): Delete.
Alan Modra [Tue, 18 Apr 2006 09:50:08 +0000 (09:50 +0000)]
* config/tc-xc16x.h (TC_LINKRELAX_FIXUP): Delete.
Nick Clifton [Tue, 18 Apr 2006 09:41:36 +0000 (09:41 +0000)]
PR 2257
* elfcode.h (elf_object_p): Allow files with corrupt e_shstrndx fields to
still be handled as ELF files.
* readelf.c (SECTION_NAME): Cope with a missing string table.
(process_file_header): Cope with a corrupt e_shstrndx field.
(process_section_headers): Correctly handle an e_shstrndx value of SHF_UNDEF.
Alan Modra [Tue, 18 Apr 2006 00:00:05 +0000 (00:00 +0000)]
daily update
Alan Modra [Mon, 17 Apr 2006 00:00:07 +0000 (00:00 +0000)]
daily update
Daniel Jacobowitz [Sun, 16 Apr 2006 18:36:47 +0000 (18:36 +0000)]
file zh_CN.gmo was initially added on branch binutils-2_17-branch.
Daniel Jacobowitz [Sun, 16 Apr 2006 18:36:47 +0000 (18:36 +0000)]
file vi.gmo was initially added on branch binutils-2_17-branch.
Daniel Jacobowitz [Sun, 16 Apr 2006 18:36:47 +0000 (18:36 +0000)]
file ga.gmo was initially added on branch binutils-2_17-branch.
Daniel Jacobowitz [Sun, 16 Apr 2006 18:36:47 +0000 (18:36 +0000)]
file fi.gmo was initially added on branch binutils-2_17-branch.
Daniel Jacobowitz [Sun, 16 Apr 2006 18:36:45 +0000 (18:36 +0000)]
file rw.gmo was initially added on branch binutils-2_17-branch.
Daniel Jacobowitz [Sun, 16 Apr 2006 18:36:45 +0000 (18:36 +0000)]
file config.texi was initially added on branch binutils-2_17-branch.
Daniel Jacobowitz [Sun, 16 Apr 2006 18:36:44 +0000 (18:36 +0000)]
file asconfig.texi was initially added on branch binutils-2_17-branch.
Daniel Jacobowitz [Sun, 16 Apr 2006 18:36:43 +0000 (18:36 +0000)]
file bfin-parse.h was initially added on branch binutils-2_17-branch.
Daniel Jacobowitz [Sun, 16 Apr 2006 18:36:43 +0000 (18:36 +0000)]
file bfin-parse.c was initially added on branch binutils-2_17-branch.
Daniel Jacobowitz [Sun, 16 Apr 2006 18:36:43 +0000 (18:36 +0000)]
file bfin-lex.c was initially added on branch binutils-2_17-branch.
Daniel Jacobowitz [Sun, 16 Apr 2006 18:36:42 +0000 (18:36 +0000)]
file zh_TW.gmo was initially added on branch binutils-2_17-branch.
Daniel Jacobowitz [Sun, 16 Apr 2006 18:25:11 +0000 (18:25 +0000)]
Update POTFILES.in.
Daniel Jacobowitz [Sun, 16 Apr 2006 18:20:09 +0000 (18:20 +0000)]
* config.in: Regenerated.
Mark Mitchell [Sun, 16 Apr 2006 18:15:55 +0000 (18:15 +0000)]
* doc/as.texinfo: Mention that some .type syntaxes are not
supported on all architectures.
Daniel Jacobowitz [Sun, 16 Apr 2006 18:01:02 +0000 (18:01 +0000)]
* configure.in: Update version to 2.17.50.
* configure: Regenerated.
Nick Clifton [Sun, 16 Apr 2006 11:53:00 +0000 (11:53 +0000)]
Skip ELF specific tests on non-ELF ARM targets
Alan Modra [Sun, 16 Apr 2006 00:00:05 +0000 (00:00 +0000)]
daily update
Bob Wilson [Sat, 15 Apr 2006 00:04:15 +0000 (00:04 +0000)]
* config/tc-xtensa.c (emit_single_op): Do not relax MOVI
instructions when such transformations have been disabled.