OSDN Git Service
Zou Wei [Thu, 30 Apr 2020 03:14:50 +0000 (11:14 +0800)]
KVM: MIPS/VZ: Remove unneeded semicolon
Fixes coccicheck warnings:
arch/mips/kvm/vz.c:1186:4-5: Unneeded semicolon
arch/mips/kvm/vz.c:1195:3-4: Unneeded semicolon
arch/mips/kvm/vz.c:1949:3-4: Unneeded semicolon
arch/mips/kvm/vz.c:1121:2-3: Unneeded semicolon
arch/mips/kvm/vz.c:2188:3-4: Unneeded semicolon
Reported-by: Hulk Robot <hulkci@huawei.com>
Signed-off-by: Zou Wei <zou_wei@huawei.com>
Reviewed-by: Huacai Chen <chenhc@lemote.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Jason Yan [Tue, 28 Apr 2020 06:32:45 +0000 (14:32 +0800)]
KVM: MIPS/TLB: Remove Unneeded semicolon in tlb.c
Fix the following coccicheck warning:
arch/mips/kvm/tlb.c:472:2-3: Unneeded semicolon
arch/mips/kvm/tlb.c:489:2-3: Unneeded semicolon
Signed-off-by: Jason Yan <yanaijie@huawei.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Jason Yan [Wed, 29 Apr 2020 14:09:35 +0000 (22:09 +0800)]
KVM: MIPS: use true,false for bool variable
Fix the following coccicheck warning:
arch/mips/kvm/mips.c:82:1-28: WARNING: Assignment of 0/1 to bool
variable
arch/mips/kvm/mips.c:88:1-28: WARNING: Assignment of 0/1 to bool
variable
Signed-off-by: Jason Yan <yanaijie@huawei.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Lars Povlsen [Wed, 13 May 2020 13:23:47 +0000 (15:23 +0200)]
MIPS: dts: mscc: Updated changed name for miim pinctrl function
This is an add-on patch to the main SoC Sparx5 series
(Message-ID: <
20200513125532.24585-1-lars.povlsen@microchip.com>).
This changes the miim pinctrl function name from "miim1" to "miim" due
to refactoring in the driver, obsoleting the instance number.
The change in the driver was to better fit new platforms, as the
instance number is redundant information. Specifically, support for
the Microchip Sparx5 SoC is being submitted, where this change became
necessary.
Reviewed-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Signed-off-by: Lars Povlsen <lars.povlsen@microchip.com>
Acked-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Huacai Chen [Wed, 13 May 2020 08:38:41 +0000 (16:38 +0800)]
MIPS: Fix "make clean" error due to recent changes
Commit
26bff9eb49201aeb ("MIPS: Only include the platformfile needed")
moves platform-(CONFIG_XYZ) from arch/mips/xyz/Platform to arch/mips/
Kbuild.platforms. This change causes an error when "make clean":
./scripts/Makefile.clean:15: arch/mips/vr41xx/Makefile: No such file or directory
make[3]: *** No rule to make target `arch/mips/vr41xx/Makefile'. Stop.
make[2]: *** [arch/mips/vr41xx] Error 2
make[1]: *** [_clean_arch/mips] Error 2
make: *** [sub-make] Error 2
Clean-files are defined in arch/mips/Kbuild:
obj- := $(platform-)
Due to the movement of platform-(CONFIG_XYZ), "make clean" will enter
arch/mips/vr41xx/ whether CONFIG_MACH_VR41XX is defined or not. Because
there is no Makefile in arch/mips/vr41xx/, "make clean" fails. I don't
know what is the best way to fix it, but it seems like we can avoid this
error by changing the obj- definition:
obj- := $(platform-y)
Fixes:
26bff9eb49201aeb ("MIPS: Only include the platformfile needed")
Signed-off-by: Huacai Chen <chenhc@lemote.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Huacai Chen [Wed, 13 May 2020 08:38:40 +0000 (16:38 +0800)]
MIPS: Fix typos in arch/mips/Kbuild.platforms
Commit
26bff9eb49201aeb ("MIPS: Only include the platform file needed")
misspelled "txx9" to "tx99", so fix it.
Fixes:
26bff9eb49201aeb ("MIPS: Only include the platform file needed")
Signed-off-by: Huacai Chen <chenhc@lemote.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Thomas Bogendoerfer [Wed, 6 May 2020 16:24:02 +0000 (18:24 +0200)]
MIPS: Only include the platform file needed
Instead of including all Platform files, we simply include the
needed one and avoid clashes with makefile variables.
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Nathan Chancellor [Tue, 28 Apr 2020 22:14:19 +0000 (15:14 -0700)]
MIPS: VDSO: Allow ld.lld to link the VDSO
Currently, when linking with ld.lld, this warning pops up:
arch/mips/vdso/Makefile:70: MIPS VDSO requires binutils >= 2.25
CONFIG_LD_VERSION is set with scripts/ld-version.sh, which is specific
to GNU ld. It returns 0 for ld.lld so CONFIG_MIPS_LD_CAN_LINK_VDSO does
not set.
ld.lld has a completely different versioning scheme (as it follows
LLVM's versioning) and it does not have the issue mentioned in the
comment block so it should be allowed to link the VDSO.
With this patch, the VDSO successfully links and shows P_MIPS_PC32 in
vgettimeofday.o.
$ llvm-objdump -Dr arch/mips/vdso/vgettimeofday.o | grep R_MIPS_PC32
00000024: R_MIPS_PC32 _start
000000b0: R_MIPS_PC32 _start
000002bc: R_MIPS_PC32 _start
0000036c: R_MIPS_PC32 _start
00000468: R_MIPS_PC32 _start
Reported-by: Dmitry Golovin <dima@golovin.in>
Signed-off-by: Nathan Chancellor <natechancellor@gmail.com>
Link: https://github.com/ClangBuiltLinux/linux/issues/785
Link: https://github.com/llvm/llvm-project/commit/e364e2e9ce50c12eb2bf093560e1a1a8544d455a
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Nathan Chancellor [Tue, 28 Apr 2020 22:14:18 +0000 (15:14 -0700)]
MIPS: VDSO: Use $(LD) instead of $(CC) to link VDSO
Currently, the VDSO is being linked through $(CC). This does not match
how the rest of the kernel links objects, which is through the $(LD)
variable.
When clang is built in a default configuration, it first attempts to use
the target triple's default linker then the system's default linker,
unless told otherwise through -fuse-ld=... We do not use -fuse-ld=
because it can be brittle and we have support for invoking $(LD)
directly. See commit
fe00e50b2db8c ("ARM: 8858/1: vdso: use $(LD)
instead of $(CC) to link VDSO") and commit
691efbedc60d2 ("arm64: vdso:
use $(LD) instead of $(CC) to link VDSO") for examples of doing this in
the VDSO.
Do the same thing here. Replace the custom linking logic with $(cmd_ld)
and ldflags-y so that $(LD) is respected. We need to explicitly add two
flags to the linker that were implicitly passed by the compiler:
-G 0 (which comes from ccflags-vdso) and --eh-frame-hdr.
Before this patch (generated by adding '-v' to VDSO_LDFLAGS):
<gcc_prefix>/libexec/gcc/mips64-linux/9.3.0/collect2 \
-plugin <gcc_prefix>/libexec/gcc/mips64-linux/9.3.0/liblto_plugin.so \
-plugin-opt=<gcc_prefix>/libexec/gcc/mips64-linux/9.3.0/lto-wrapper \
-plugin-opt=-fresolution=/tmp/ccGEi5Ka.res \
--eh-frame-hdr \
-G 0 \
-EB \
-mips64r2 \
-shared \
-melf64btsmip \
-o arch/mips/vdso/vdso.so.dbg.raw \
-L<gcc_prefix>/lib/gcc/mips64-linux/9.3.0/64 \
-L<gcc_prefix>/lib/gcc/mips64-linux/9.3.0 \
-L<gcc_prefix>/lib/gcc/mips64-linux/9.3.0/../../../../mips64-linux/lib \
-Bsymbolic \
--no-undefined \
-soname=linux-vdso.so.1 \
-EB \
--hash-style=sysv \
--build-id \
-T arch/mips/vdso/vdso.lds \
arch/mips/vdso/elf.o \
arch/mips/vdso/vgettimeofday.o \
arch/mips/vdso/sigreturn.o
After this patch:
<gcc_prefix>/bin/mips64-linux-ld \
-m elf64btsmip \
-Bsymbolic \
--no-undefined \
-soname=linux-vdso.so.1 \
-EB \
-nostdlib \
-shared \
-G 0 \
--eh-frame-hdr \
--hash-style=sysv \
--build-id \
-T arch/mips/vdso/vdso.lds \
arch/mips/vdso/elf.o \
arch/mips/vdso/vgettimeofday.o
arch/mips/vdso/sigreturn.o \
-o arch/mips/vdso/vdso.so.dbg.raw
Note that we leave behind -mips64r2. Turns out that ld ignores it (see
get_emulation in ld/ldmain.c). This is true of current trunk and 2.23,
which is the minimum supported version for the kernel:
https://sourceware.org/git/?p=binutils-gdb.git;a=blob;f=ld/ldmain.c;hb=
aa4209e7b679afd74a3860ce25659e71cc4847d5#l593
https://sourceware.org/git/?p=binutils-gdb.git;a=blob;f=ld/ldmain.c;hb=
a55e30b51bc6227d8d41f707654d0a5620978dcf#l641
Before this patch, LD=ld.lld did nothing:
$ llvm-readelf -p.comment arch/mips/vdso/vdso.so.dbg | sed 's/(.*//'
String dump of section '.comment':
[ 0] ClangBuiltLinux clang version 11.0.0
After this patch, it does:
$ llvm-readelf -p.comment arch/mips/vdso/vdso.so.dbg | sed 's/(.*//'
String dump of section '.comment':
[ 0] Linker: LLD 11.0.0
[ 62] ClangBuiltLinux clang version 11.0.0
Link: https://github.com/ClangBuiltLinux/linux/issues/785
Signed-off-by: Nathan Chancellor <natechancellor@gmail.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Nathan Chancellor [Tue, 28 Apr 2020 22:14:17 +0000 (15:14 -0700)]
MIPS: Unconditionally specify '-EB' or '-EL'
This was all done to work around a GCC bug that has been fixed after
4.2. The kernel requires GCC 4.6 or newer so remove all of these hacks
and just use the traditional flags.
$ mips64-linux-gcc --version | head -n1
mips64-linux-gcc (GCC) 4.6.3
$ mips64-linux-gcc -EB -dM -E -C -x c /dev/null | grep MIPSE
#define MIPSEB 1
#define __MIPSEB__ 1
#define _MIPSEB 1
#define __MIPSEB 1
$ mips64-linux-gcc -EL -dM -E -C -x c /dev/null | grep MIPSE
#define __MIPSEL__ 1
#define MIPSEL 1
#define _MIPSEL 1
#define __MIPSEL 1
This is necessary when converting the MIPS VDSO to use $(LD) instead of
$(CC) to link because the OUTPUT_FORMAT is defaulted to little endian
and only flips to big endian when '-EB' is set on the command line.
There is no issue currently because the compiler explicitly passes
'-EB' or '-EL' to the linker regardless of whether or not it was
provided by the user. Passing '-v' to VDSO_LDFLAGS shows:
<gcc_prefix>/libexec/gcc/mips64-linux/9.3.0/collect2 ... -EB ...
even though '-EB' is nowhere to be found in KBUILD_CFLAGS. The VDSO
Makefile already supports getting '-EB' or '-EL' from KBUILD_CFLAGS
through a filter directive but '-EB' or '-EL' is not always present.
If we do not do this, we will see the following error when compiling
for big endian:
$ make -j$(nproc) ARCH=mips CROSS_COMPILE=mips64-linux- \
64r2el_defconfig arch/mips/vdso/
...
mips64-linux-ld: arch/mips/vdso/elf.o: compiled for a big endian system
and target is little endian
mips64-linux-ld: arch/mips/vdso/elf.o: endianness incompatible with that
of the selected emulation
mips64-linux-ld: failed to merge target specific data of file
arch/mips/vdso/elf.o
...
Remove this legacy hack and just use '-EB' and '-EL' unconditionally.
Reported-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Signed-off-by: Nathan Chancellor <natechancellor@gmail.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Nathan Chancellor [Tue, 28 Apr 2020 22:14:16 +0000 (15:14 -0700)]
MIPS: VDSO: Move disabling the VDSO logic to Kconfig
After commit
9553d16fa671 ("init/kconfig: Add LD_VERSION Kconfig"), we
have access to GNU ld's version at configuration time. As a result, we
can make it clearer under what configuration circumstances the MIPS VDSO
needs to be disabled.
This is a prerequisite for getting rid of the MIPS VDSO binutils
warning and linking the VDSO when LD is ld.lld. Wrapping the call to
ld-ifversion with CONFIG_LD_IS_LLD does not work because the config
values are wiped away during 'make clean'.
Signed-off-by: Nathan Chancellor <natechancellor@gmail.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Sami Tolvanen [Tue, 28 Apr 2020 22:14:15 +0000 (15:14 -0700)]
kbuild: add CONFIG_LD_IS_LLD
Similarly to the CC_IS_CLANG config, add LD_IS_LLD to avoid GNU ld
specific logic such as ld-version or ld-ifversion and gain the
ability to select potential features that depend on the linker at
configuration time such as LTO.
Signed-off-by: Sami Tolvanen <samitolvanen@google.com>
Acked-by: Masahiro Yamada <masahiroy@kernel.org>
[nc: Reword commit message]
Signed-off-by: Nathan Chancellor <natechancellor@gmail.com>
Tested-by: Sedat Dilek <sedat.dilek@gmail.com>
Reviewed-by: Sedat Dilek <sedat.dilek@gmail.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Christoph Hellwig [Sun, 10 May 2020 07:54:42 +0000 (09:54 +0200)]
MIPS: unexport __flush_icache_user_range
__flush_icache_user_range is not used in modular code, so unexport it.
Signed-off-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Thomas Bogendoerfer [Mon, 20 Apr 2020 12:37:24 +0000 (14:37 +0200)]
MIPS: Remove NEC MARKEINS/EMMA
No (active) developer owns this hardware, so let's remove Linux support.
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Thomas Bogendoerfer [Mon, 20 Apr 2020 12:30:35 +0000 (14:30 +0200)]
MIPS: Remove PMC MSP71xx platform
No (active) developer owns this hardware, so let's remove Linux support.
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Thomas Bogendoerfer [Mon, 20 Apr 2020 12:22:29 +0000 (14:22 +0200)]
MIPS: Remove support for LASAT
All LASAT has probably gone bad, so let's remove Linux support.
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Gustavo A. R. Silva [Thu, 7 May 2020 19:00:52 +0000 (14:00 -0500)]
MIPS: Replace zero-length array with flexible-array
The current codebase makes use of the zero-length array language
extension to the C90 standard, but the preferred mechanism to declare
variable-length types such as these ones is a flexible array member[1][2],
introduced in C99:
struct foo {
int stuff;
struct boo array[];
};
By making use of the mechanism above, we will get a compiler warning
in case the flexible array does not occur last in the structure, which
will help us prevent some kind of undefined behavior bugs from being
inadvertently introduced[3] to the codebase from now on.
Also, notice that, dynamic memory allocations won't be affected by
this change:
"Flexible array members have incomplete type, and so the sizeof operator
may not be applied. As a quirk of the original implementation of
zero-length arrays, sizeof evaluates to zero."[1]
sizeof(flexible-array-member) triggers a warning because flexible array
members have incomplete type[1]. There are some instances of code in
which the sizeof operator is being incorrectly/erroneously applied to
zero-length arrays and the result is zero. Such instances may be hiding
some bugs. So, this work (flexible-array member conversions) will also
help to get completely rid of those sorts of issues.
This issue was found with the help of Coccinelle.
[1] https://gcc.gnu.org/onlinedocs/gcc/Zero-Length.html
[2] https://github.com/KSPP/linux/issues/21
[3] commit
76497732932f ("cxgb3/l2t: Fix undefined behaviour")
Signed-off-by: Gustavo A. R. Silva <gustavoars@kernel.org>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Tiezhu Yang [Fri, 8 May 2020 08:36:05 +0000 (16:36 +0800)]
MIPS: Loongson: Add DMA support for LS7A
In the current market, the most used bridge chip on the Loongson platform
are RS780E and LS7A, the RS780E bridge chip is already supported by the
mainline kernel.
If use the default implementation of __phys_to_dma() and __dma_to_phys()
in dma-direct.h when CONFIG_ARCH_HAS_PHYS_TO_DMA is not set, it works
well used with LS7A on the Loongson single-way and multi-way platform,
and also works well used with RS780E on the Loongson single-way platform,
but the DMA address will be wrong on the non-node0 used with RS780E on
the Loongson multi-way platform.
Just as the description in the code comment, the devices get node id from
40 bit of HyperTransport bus, so we extract 2 bit node id (bit 44~45) from
48 bit address space of Loongson CPU and embed it into HyperTransport bus
(bit 37-38), this operation can be done only at the software level used
with RS780E on the Loongson multi-way platform, because it has no hardware
function to translate address of node id, this is a hardware compatibility
problem.
Device
|
| DMA address
|
Host Bridge
|
| HT bus address (40 bit)
|
CPU
|
| physical address (48 bit)
|
RAM
The LS7A has dma_node_id_offset field in the DMA route config register,
the hardware can use the dma_node_id_offset to translate address of
node id automatically, so we can get correct address when just use the
dma_pfn_offset field in struct device.
For the above reasons, in order to maintain downward compatibility
to support the RS780E bridge chip, it is better to use the platform
dependent implementation of __phys_to_dma() and __dma_to_phys().
Signed-off-by: Tiezhu Yang <yangtiezhu@loongson.cn>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Huacai Chen [Fri, 8 May 2020 09:30:12 +0000 (17:30 +0800)]
MIPS: inst.h: Stop including asm.h to avoid various build failures
Commit
d339cd02b888eb8 ("MIPS: Move unaligned load/store helpers to
inst.h") causes a lot of build failures because macros in asm.h conflict
with various subsystems. Some of these conflictions has been fixed (such
as LONG, PANIC and PRINT) by adjusting asm.h, but some of them is nearly
impossible to fix (such as PTR and END). The only reason of including
asm.h in inst.h is that we need the PTR macro which is used by unaligned
load/store helpers. So in this patch we define a new PTR_STR macro and
use it to replace STR(PTR), then we can stop including asm.h to avoid
various build failures.
Fixes:
d339cd02b888eb8 ("MIPS: Move unaligned load/store helpers to inst.h")
Reported-by: kbuild test robot <lkp@intel.com>
Signed-off-by: Huacai Chen <chenhc@lemote.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Huacai Chen [Thu, 7 May 2020 09:49:18 +0000 (17:49 +0800)]
MIPS: asm: Rename some macros to avoid build errors
Use ASM_ prefix to rename some macros (PANIC and PRINT), in order to
avoid build errors (all users are updated as well):
1, PANIC conflicts with drivers/scsi/smartpqi/smartpqi_init.c
2, PRINT conflicts with net/netfilter/nf_conntrack_h323_asn1.c and net/
mac80211/debugfs_sta.c
Fixes:
d339cd02b888eb8 ("MIPS: Move unaligned load/store helpers to inst.h")
Reported-by: kbuild test robot <lkp@intel.com>
Signed-off-by: Huacai Chen <chenhc@lemote.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Serge Semin [Wed, 6 May 2020 17:42:23 +0000 (20:42 +0300)]
mips: cm: Add L2 ECC/parity errors reporting
According to the MIPS32 InterAptiv software manual error codes 24 - 26
of CM2 indicate L2 ECC/parity error with switching to a corresponding
errors info fields. This patch provides these errors parsing code,
which handles the read/write uncorrectable and correctable ECC/parity
errors, and prints instruction causing the fault, RAM array type, cache
way/dword and syndrome associated with the faulty data.
Co-developed-by: Alexey Malahov <Alexey.Malahov@baikalelectronics.ru>
Signed-off-by: Alexey Malahov <Alexey.Malahov@baikalelectronics.ru>
Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru>
Cc: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Cc: Paul Burton <paulburton@kernel.org>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: linux-pm@vger.kernel.org
Cc: devicetree@vger.kernel.org
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Serge Semin [Wed, 6 May 2020 17:42:22 +0000 (20:42 +0300)]
mips: cm: Fix an invalid error code of INTVN_*_ERR
Commit
3885c2b463f6 ("MIPS: CM: Add support for reporting CM cache
errors") adds cm2_causes[] array with map of error type ID and
pointers to the short description string. There is a mistake in
the table, since according to MIPS32 manual CM2_ERROR_TYPE = {17,18}
correspond to INTVN_WR_ERR and INTVN_RD_ERR, while the table
claims they have {0x17,0x18} codes. This is obviously hex-dec
copy-paste bug. Moreover codes {0x18 - 0x1a} indicate L2 ECC errors.
Fixes:
3885c2b463f6 ("MIPS: CM: Add support for reporting CM cache errors")
Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru>
Cc: Alexey Malahov <Alexey.Malahov@baikalelectronics.ru>
Cc: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Cc: Paul Burton <paulburton@kernel.org>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: linux-pm@vger.kernel.org
Cc: devicetree@vger.kernel.org
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Geert Uytterhoeven [Wed, 6 May 2020 09:04:52 +0000 (11:04 +0200)]
MIPS: ingenic: Replace <linux/clk-provider.h> by <linux/of_clk.h>
The JZ4740 setup code is not a clock provider, and just needs to call
of_clk_init().
Hence it can include <linux/of_clk.h> instead of <linux/clk-provider.h>.
Fixes:
f932449c11dabb4b ("MIPS: ingenic: Drop obsolete code, merge the rest in setup.c")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Paul Cercueil <paul@crapouillou.net>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Liangliang Huang [Mon, 4 May 2020 08:51:29 +0000 (16:51 +0800)]
MIPS: Use fallthrough for arch/mips
Convert the various /* fallthrough */ comments to the pseudo-keyword
fallthrough;
Done via script:
https://lore.kernel.org/lkml/
b56602fcf79f849e733e7b521bb0e17895d390fa.
1582230379.git.joe@perches.com/
Signed-off-by: Liangliang Huang <huangll@lemote.com>
Reviewed-by: Huacai Chen <chenhc@lemote.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Jiaxun Yang [Wed, 6 May 2020 05:52:45 +0000 (13:52 +0800)]
MIPS: Truncate link address into 32bit for 32bit kernel
LLD failed to link vmlinux with 64bit load address for 32bit ELF
while bfd will strip 64bit address into 32bit silently.
To fix LLD build, we should truncate load address provided by platform
into 32bit for 32bit kernel.
Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Link: https://github.com/ClangBuiltLinux/linux/issues/786
Link: https://sourceware.org/bugzilla/show_bug.cgi?id=25784
Reviewed-by: Fangrui Song <maskray@google.com>
Reviewed-by: Kees Cook <keescook@chromium.org>
Tested-by: Nathan Chancellor <natechancellor@gmail.com>
Cc: Maciej W. Rozycki <macro@linux-mips.org>
Tested-by: Nick Desaulniers <ndesaulniers@google.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Jason Yan [Wed, 6 May 2020 13:42:50 +0000 (21:42 +0800)]
MIPS: Remove dead code in pci.h
This code has been marked dead for more than 10 years. Seems no need to
keep it now.
Signed-off-by: Jason Yan <yanaijie@huawei.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Jason Yan [Wed, 6 May 2020 13:43:07 +0000 (21:43 +0800)]
MIPS: CFE: Remove dead code in cfe_getfwinfo()
This code has been marked dead since the beginning of the git history.
Seems no need to keep it now.
Signed-off-by: Jason Yan <yanaijie@huawei.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Jason Yan [Wed, 6 May 2020 13:43:15 +0000 (21:43 +0800)]
MIPS: Octeon: Remove dead code in __cvmx_helper_npi_probe()
This code has been marked dead for more than 10 years. Seems no need to
keep it now.
Signed-off-by: Jason Yan <yanaijie@huawei.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Tiezhu Yang [Sun, 3 May 2020 00:05:02 +0000 (08:05 +0800)]
MIPS: tools: Move "returns" after "loongson3-llsc-check"
Just move "returns" after "loongson3-llsc-check", no function changes.
Signed-off-by: Tiezhu Yang <yangtiezhu@loongson.cn>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Huacai Chen [Sat, 2 May 2020 10:46:24 +0000 (18:46 +0800)]
MIPS: perf: Remove unnecessary "fallthrough" pseudo keywords
The last branch of switch-case doesn't need a "fallthrough" pseudo
keyword, and it will cause errors when building a kernel with -Werror:
arch/mips/kernel/perf_event_mipsxx.c: In function 'reset_counters':
include/linux/compiler_attributes.h:200:41: error: attribute 'fallthrough' not preceding a case label or default label [-Werror]
200 | # define fallthrough __attribute__((__fallthrough__))
| ^~~~~~~~~~~~~
>> arch/mips/kernel/perf_event_mipsxx.c:932:3: note: in expansion of macro 'fallthrough'
932 | fallthrough;
| ^~~~~~~~~~~
arch/mips/kernel/perf_event_mipsxx.c: In function 'loongson3_reset_counters':
include/linux/compiler_attributes.h:200:41: error: attribute 'fallthrough' not preceding a case label or default label [-Werror]
200 | # define fallthrough __attribute__((__fallthrough__))
| ^~~~~~~~~~~~~
arch/mips/kernel/perf_event_mipsxx.c:903:3: note: in expansion of macro 'fallthrough'
903 | fallthrough;
| ^~~~~~~~~~~
cc1: all warnings being treated as errors
Fix it by removing unnecessary "fallthrough" pseudo keywords.
Fixes:
e9dfbaaeef1c9fe ("MIPS: perf: Add hardware perf events support for new Loongson-3")
Reported-by: kbuild test robot <lkp@intel.com>
Signed-off-by: Huacai Chen <chenhc@lemote.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Bin Meng [Sat, 2 May 2020 04:25:49 +0000 (21:25 -0700)]
mips: Drop CONFIG_MTD_M25P80 in various defconfig files
Drop CONFIG_MTD_M25P80 that was removed in
commit
b35b9a10362d ("mtd: spi-nor: Move m25p80 code in spi-nor.c")
Signed-off-by: Bin Meng <bin.meng@windriver.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Jiaxun Yang [Thu, 30 Apr 2020 16:48:02 +0000 (00:48 +0800)]
MIPS: Loongson64: Correct TLB type for Loongson-3 Classic
Huacai just informed me that some early Loongson-3A2000 had wrong
TLB type in Config0 register. That means we have to correct it via
PRID.
It looks like I shoudn't drop MIPS_CPU_FTLB flag in PRID case for
Loongson-3 Classic.
Fixes:
da1bd29742b1 ("MIPS: Loongson64: Probe CPU features via CPUCFG")
Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Reported-by: Huacai Chen <chenhc@lemote.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Jiaxun Yang [Thu, 30 Apr 2020 03:18:35 +0000 (11:18 +0800)]
MIPS: Loongson64: Probe CPU features via CPUCFG
CPUCFG is a Loongson self-defined instruction used to mark CPU
features for Loongson processors started from Loongson-3A4000.
Slightly adjust cpu_probe_loongson function as well. Remove features
that already probed via decode_configs in processor's PRID case
and add a comment about TLBINV.
Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Huacai Chen [Thu, 30 Apr 2020 09:45:16 +0000 (17:45 +0800)]
MIPS: perf: Add hardware perf events support for new Loongson-3
New Loongson-3 means Loongson-3A R2 (Loongson-3A2000) and newer CPUs.
Loongson-3 processors have three types of PMU types (so there are three
event maps): Loongson-3A1000/Loonngson-3B1000/Loongson-3B1500 is Type-1,
Loongson-3A2000/Loongson-3A3000 is Type-2, Loongson-3A4000+ is Type-3.
Signed-off-by: Huacai Chen <chenhc@lemote.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Tiezhu Yang [Thu, 30 Apr 2020 12:36:24 +0000 (20:36 +0800)]
MIPS: tools: Show result for loongson3-llsc-check
It is better to show the result before loongson3-llsc-check exit,
otherwise we can see nothing if the return status is EXIT_SUCCESS,
it seems confusing.
E.g. without this patch:
[loongson@localhost tools]$ ./loongson3-llsc-check ../../../vmlinux
[loongson@localhost tools]$
With this patch:
[loongson@localhost tools]$ ./loongson3-llsc-check ../../../vmlinux
loongson3-llsc-check returns success
[loongson@localhost tools]$
Signed-off-by: Tiezhu Yang <yangtiezhu@loongson.cn>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Paul Cercueil [Mon, 13 Apr 2020 15:26:33 +0000 (17:26 +0200)]
MIPS: ingenic: Drop obsolete code, merge the rest in setup.c
Drop a bootload of 10-years-old dirty code, that is not used anymore, as
it has been replaced with clean code over the ages.
Merge the very few bits left inside setup.c, so that everything is clean
and tidy now.
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Paul Cercueil [Mon, 13 Apr 2020 15:26:32 +0000 (17:26 +0200)]
MIPS: ingenic: GCW0: Update defconfig
Enable support for the new hardware that was added in the devicetree.
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Paul Cercueil [Mon, 13 Apr 2020 15:26:31 +0000 (17:26 +0200)]
MIPS: ingenic: CI20: enable OST, PWM drivers in defconfig
The OST driver provides a clocksource and sched_clock that are much more
accurate than the default ones.
The PWM driver allows to use the PWM pins on the external header of the
board.
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Paul Cercueil [Mon, 13 Apr 2020 15:26:30 +0000 (17:26 +0200)]
MIPS: ingenic: DTS: Update GCW0 support
Add support for the face buttons, the ACT8600 PMUC, the LCD panel
with backlight, the rumble, internal/external SD readers, and other
things.
Note that the otg-phy node was dropped in the process as it was neither
useful nor used, and was inside a non-compliant board "bus".
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Paul Cercueil [Mon, 13 Apr 2020 15:26:29 +0000 (17:26 +0200)]
MIPS: ingenic: DTS: Update JZ4770 support
Add support for the RTC, AIC, CODEC, MMC 0/1/2, ADC, GPU, LCD,
USB OTG, USB PHY controllers.
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Paul Cercueil [Mon, 13 Apr 2020 15:26:28 +0000 (17:26 +0200)]
MIPS: ingenic: DTS: Add nodes for the watchdog/PWM/OST
Add the TCU nodes to the JZ4780, JZ4770 and JZ4740 devicetree files.
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Paul Cercueil [Mon, 13 Apr 2020 15:26:27 +0000 (17:26 +0200)]
MIPS: ingenic: DTS: Respect cell count of common properties
If N fields of X cells should be provided, then that's what the
devicetree should represent, instead of having one single field of
(N*X) cells.
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Paul Cercueil [Mon, 13 Apr 2020 15:26:26 +0000 (17:26 +0200)]
MIPS: ingenic: DTS: Fix invalid value in #dma-cells
The driver requires two cells and not just one.
Since these nodes are both disabled as no hardware currently use them,
this fix does not really requires a Fixes: tag.
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Liangliang Huang [Wed, 29 Apr 2020 09:04:17 +0000 (17:04 +0800)]
MIPS: Loongson64: Switch the order of RS780E and LS7A
Sort the members of enum in alphabetical order is better to avoid
duplicate mistakes (because the list may be grow very large), so
fix it by exchanging the order.
Signed-off-by: Liangliang Huang <huangll@lemote.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Tiezhu Yang [Fri, 3 Apr 2020 09:29:49 +0000 (17:29 +0800)]
MIPS: Loongson: Get host bridge information
Read the address of host bridge configuration space to get the vendor ID
and device ID of host bridge, and then we can distinguish various types
of host bridge such as LS7A or RS780E.
Signed-off-by: Tiezhu Yang <yangtiezhu@loongson.cn>
Reviewed-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Jason Yan [Tue, 28 Apr 2020 06:32:54 +0000 (14:32 +0800)]
MIPS: oprofile: remove unneeded semicolon in common.c
Fix the following coccicheck warning:
arch/mips/oprofile/common.c:113:2-3: Unneeded semicolon
Signed-off-by: Jason Yan <yanaijie@huawei.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Jiaxun Yang [Wed, 22 Apr 2020 14:43:44 +0000 (22:43 +0800)]
MIPS: Kernel: Identify Loongson-2K processors
Loongson-2K (Loongson64 Reduced) is a family of SoC shipped with
gs264e core.
Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Tiezhu Yang [Sun, 26 Apr 2020 09:30:45 +0000 (17:30 +0800)]
MIPS: Loongson: Add support for perf tool
In order to use perf tool on the Loongson platform, we should enable kernel
support for various performance events provided by software and hardware,
so add CONFIG_PERF_EVENTS=y to loongson3_defconfig.
E.g. without this patch:
[loongson@localhost perf]$ ./perf list
List of pre-defined events (to be used in -e):
duration_time [Tool event]
rNNN [Raw hardware event descriptor]
cpu/t1=v1[,t2=v2,t3 ...]/modifier [Raw hardware event descriptor]
(see 'man perf-list' on how to encode it)
mem:<addr>[/len][:access] [Hardware breakpoint]
With this patch:
[loongson@localhost perf]$ ./perf list
List of pre-defined events (to be used in -e):
branch-instructions OR branches [Hardware event]
branch-misses [Hardware event]
cpu-cycles OR cycles [Hardware event]
instructions [Hardware event]
alignment-faults [Software event]
bpf-output [Software event]
context-switches OR cs [Software event]
cpu-clock [Software event]
cpu-migrations OR migrations [Software event]
dummy [Software event]
emulation-faults [Software event]
major-faults [Software event]
minor-faults [Software event]
page-faults OR faults [Software event]
task-clock [Software event]
duration_time [Tool event]
L1-dcache-load-misses [Hardware cache event]
L1-dcache-store-misses [Hardware cache event]
L1-icache-load-misses [Hardware cache event]
branch-load-misses [Hardware cache event]
branch-loads [Hardware cache event]
dTLB-load-misses [Hardware cache event]
dTLB-store-misses [Hardware cache event]
iTLB-load-misses [Hardware cache event]
rNNN [Raw hardware event descriptor]
cpu/t1=v1[,t2=v2,t3 ...]/modifier [Raw hardware event descriptor]
(see 'man perf-list' on how to encode it)
mem:<addr>[/len][:access] [Hardware breakpoint]
Signed-off-by: Tiezhu Yang <yangtiezhu@loongson.cn>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Huacai Chen [Sun, 26 Apr 2020 11:09:52 +0000 (19:09 +0800)]
MIPS: Rename the "Fill" cache ops to avoid build failure
MIPS define a "Fill" macro as a cache operation in cacheops.h, this
will cause build failure under some special configurations because in
seq_file.c there is a "Fill" label. To avoid this failure we rename the
"Fill" macro to "Fill_I" which has the same coding style as other cache
operations in cacheops.h (we think renaming the "Fill" macro is more
reasonable than renaming the "Fill" label).
Callers of "Fill" macro is also updated.
Signed-off-by: Huacai Chen <chenhc@lemote.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Jiaxun Yang [Wed, 22 Apr 2020 14:45:34 +0000 (22:45 +0800)]
MIPS: Clear XContext at boot time
XContext might be dirty at boot time. We need to clear it
to ensure early stackframe is safe.
Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Liangliang Huang [Thu, 23 Apr 2020 23:44:21 +0000 (19:44 -0400)]
MIPS: arch_send_call_function_single_ipi() calling conventions change
Use mp_ops->send_ipi_single() instead of mp_ops->send_ipi_mask() in
arch_send_call_function_single_ipi(). send_ipi_single() can send
IPI signal to a special cpu more efficiently.
Signed-off-by: Liangliang Huang <huangll@lemote.com>
Reviewed-by: Huacai Chen <chenhc@lemote.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Huacai Chen [Fri, 24 Apr 2020 10:56:46 +0000 (18:56 +0800)]
MIPS: Loongson-3: Add some unaligned instructions emulation
1, Add unaligned gslq, gssq, gslqc1, gssqc1 emulation;
2, Add unaligned gsl{h, w, d}x, gss{h, w, d}x emulation;
3, Add unaligned gslwxc1, gsswxc1, gsldxc1, gssdxc1 emulation.
Signed-off-by: Huacai Chen <chenhc@lemote.com>
Signed-off-by: Pei Huang <huangpei@loongson.cn>
Reviewed-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Huacai Chen [Fri, 24 Apr 2020 10:56:45 +0000 (18:56 +0800)]
MIPS: Move unaligned load/store helpers to inst.h
Move unaligned load/store helpers from unaligned.c to inst.h, then
other parts of the kernel can use these helpers.
Use __ASSEMBLY__ to guard the definition of "LONG" in asm.h to avoid
build error on IPxx platforms.
Signed-off-by: Huacai Chen <chenhc@lemote.com>
Signed-off-by: Pei Huang <huangpei@loongson.cn>
Reviewed-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Huacai Chen [Fri, 24 Apr 2020 10:56:44 +0000 (18:56 +0800)]
MIPS: Fix the declaration conflict of mm_isBranchInstr()
mm_isBranchInstr() is declared both in branch.h and in fpu_emulator.h
but the two declarations are conflict. If both of them are included by
a same file, they will cause a build error:
./arch/mips/include/asm/branch.h:33:19: error: static declaration of 'mm_isBranchInstr' follows non-static declaration
static inline int mm_isBranchInstr(struct pt_regs *regs,
^
./arch/mips/include/asm/fpu_emulator.h:177:5: note: previous declaration of 'mm_isBranchInstr' was here
int mm_isBranchInstr(struct pt_regs *regs, struct mm_decoded_insn dec_insn,
Fix this error by removing both isBranchInstr() and mm_isBranchInstr()
in fpu_emulator.h, and declaring both of them in branch.h.
Signed-off-by: Huacai Chen <chenhc@lemote.com>
Reviewed-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Christoph Hellwig [Tue, 21 Apr 2020 17:11:36 +0000 (19:11 +0200)]
ASoC: txx9: add back the hack for a too small resource_size_t
Looks like I misread the Kconfig magic and this driver can be compiled
into 32-bit kernels. Add back the hack to extent the range of the
resource_size_t, and include the header with the txx9-specific ioremap
magic for that.
Fixes:
acfaaf52ebfd ("ASoC: txx9: don't work around too small resource_size_t")
Signed-off-by: Christoph Hellwig <hch@lst.de>
Acked-by: Mark Brown <broonie@kernel.org>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Tiezhu Yang [Tue, 21 Apr 2020 11:59:46 +0000 (19:59 +0800)]
MIPS: Make sparse_init() using top-down allocation
In the current code, if CONFIG_SWIOTLB is set, when failed to get IO TLB
memory from the low pages by plat_swiotlb_setup(), it may lead to the boot
process failed with kernel panic.
(1) On the Loongson and SiByte platform
arch/mips/loongson64/dma.c
arch/mips/sibyte/common/dma.c
void __init plat_swiotlb_setup(void)
{
swiotlb_init(1);
}
kernel/dma/swiotlb.c
void __init
swiotlb_init(int verbose)
{
...
vstart = memblock_alloc_low(PAGE_ALIGN(bytes), PAGE_SIZE);
if (vstart && !swiotlb_init_with_tbl(vstart, io_tlb_nslabs, verbose))
return;
...
pr_warn("Cannot allocate buffer");
no_iotlb_memory = true;
}
phys_addr_t swiotlb_tbl_map_single()
{
...
if (no_iotlb_memory)
panic("Can not allocate SWIOTLB buffer earlier ...");
...
}
(2) On the Cavium OCTEON platform
arch/mips/cavium-octeon/dma-octeon.c
void __init plat_swiotlb_setup(void)
{
...
octeon_swiotlb = memblock_alloc_low(swiotlbsize, PAGE_SIZE);
if (!octeon_swiotlb)
panic("%s: Failed to allocate %zu bytes align=%lx\n",
__func__, swiotlbsize, PAGE_SIZE);
...
}
Because IO_TLB_DEFAULT_SIZE is 64M, if the rest size of low memory is less
than 64M when call plat_swiotlb_setup(), we can easily reproduce the panic
case.
In order to reduce the possibility of kernel panic when failed to get IO
TLB memory under CONFIG_SWIOTLB, it is better to allocate low memory as
small as possible before plat_swiotlb_setup(), so make sparse_init() using
top-down allocation.
Reported-by: Juxin Gao <gaojuxin@loongson.cn>
Co-developed-by: Juxin Gao <gaojuxin@loongson.cn>
Signed-off-by: Juxin Gao <gaojuxin@loongson.cn>
Signed-off-by: Tiezhu Yang <yangtiezhu@loongson.cn>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Tiezhu Yang [Tue, 21 Apr 2020 11:59:45 +0000 (19:59 +0800)]
MIPS: Cleanup code about plat_mem_setup()
In the current code, plat_mem_setup() is called by arch_mem_init() instead
of setup_arch() and has been declared in asm/bootinfo.h, so modify the code
comment to reflect the reality and remove the useless duplicate declartion
in arch/mips/kernel/setup.c.
Signed-off-by: Tiezhu Yang <yangtiezhu@loongson.cn>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Tiezhu Yang [Tue, 21 Apr 2020 11:59:44 +0000 (19:59 +0800)]
MIPS: Do not initialise globals to 0
Fix the following checkpatch error:
ERROR: do not initialise globals to 0
#834: FILE: arch/mips/kernel/setup.c:834:
+int hw_coherentio = 0; /* Actual hardware supported DMA coherency setting. */
Signed-off-by: Tiezhu Yang <yangtiezhu@loongson.cn>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Jiaxun Yang [Mon, 20 Apr 2020 13:45:29 +0000 (21:45 +0800)]
MIPS: Loongson64: Mark RS780 HPET as broken
This driver is using some dangerous hack to set MMIO address for HPET,
which might break systems with other kinds of PCH.
Also, as Loongson-3 cpufreq driver never appeared in mainline,
this driver rarely got used.
So we temporarily mark it as broken until we find a better solution.
Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Jiaxun Yang [Mon, 20 Apr 2020 13:45:28 +0000 (21:45 +0800)]
MIPS: DTS: Loongson64: Add ACPI Controller Node
Add ACPI Controller Node for RS780E PCH to fit newly added driver.
Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Jiaxun Yang [Mon, 20 Apr 2020 13:45:27 +0000 (21:45 +0800)]
dt-bindings: Document Loongson RS780E PCH ACPI Controller
This controller is attached under ISA Bus and can be found
in Loongson-3 systems with RS780E PCH.
Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Jiaxun Yang [Mon, 20 Apr 2020 13:45:26 +0000 (21:45 +0800)]
MIPS: Loongson64: Make RS780E ACPI as a platform driver
Make RS780E ACPI as a platform driver so we can enable it
by DeviceTree selectively.
Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Jiaxun Yang [Mon, 20 Apr 2020 13:45:25 +0000 (21:45 +0800)]
MIPS: Loongson64: Remove dead RTC code
RTC is now enabled by devicetree. So platform code is
no longer needed.
Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Thomas Bogendoerfer [Mon, 20 Apr 2020 11:28:54 +0000 (13:28 +0200)]
MIPS: alchemy: Fix build error after ioremap cleanup
IOremap changes caused following build error:
arch/mips/alchemy/common/setup.c:99:9: error: implicit declaration of function
+‘remap_pfn_range’; did you mean ‘io_remap_pfn_range’?
+[-Werror=implicit-function-declaration]
Fixed my including linux/mm.h
Fixes:
d399157283fb ("MIPS: cleanup fixup_bigphys_addr handling")
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
H. Nikolaus Schaller [Fri, 28 Feb 2020 16:00:53 +0000 (17:00 +0100)]
MIPS: DTS: CI20: make DM9000 Ethernet controller use NVMEM to find the default MAC address
There is a unique MAC address programmed into the eFuses
of the JZ4780 chip in the CI20 factory. By using this
for initializing the DM9000 Ethernet controller, every
CI20 board has an individual - but stable - MAC address
and DHCP can assign stable IP addresses.
Signed-off-by: H. Nikolaus Schaller <hns@goldelico.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
PrasannaKumar Muralidharan [Fri, 28 Feb 2020 16:00:52 +0000 (17:00 +0100)]
MIPS: DTS: JZ4780: define node for JZ4780 efuse
This patch brings support for the JZ4780 efuse. Currently it only exposes
a read only access to the entire 8K bits efuse memory and the
ethernet mac address for the davicom dm9000 chip on the CI20 board.
It also changes the nemc ranges definition to give the driver
access to the efuse registers, which are in the middle of the
nemc reg range.
Tested-by: Mathieu Malaterre <malat@debian.org>
Signed-off-by: PrasannaKumar Muralidharan <prasannatsmkumar@gmail.com>
Signed-off-by: Mathieu Malaterre <malat@debian.org>
Signed-off-by: H. Nikolaus Schaller <hns@goldelico.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Christoph Hellwig [Thu, 16 Apr 2020 15:00:11 +0000 (17:00 +0200)]
MIPS: use ioremap_page_range
Use the generic ioremap_page_range helper instead of reimplementing it.
Signed-off-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Christoph Hellwig [Thu, 16 Apr 2020 15:00:10 +0000 (17:00 +0200)]
MIPS: move ioremap_prot und iounmap out of line
Neither of these interfaces is anywhere near the fast path. Move them
out of line and avoid exposing implementation details to the drivers.
Signed-off-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Christoph Hellwig [Thu, 16 Apr 2020 15:00:09 +0000 (17:00 +0200)]
MIPS: split out the 64-bit ioremap implementation
Split out the mips64 ioremap implementation entirely, as it will never use
page table based remapping.
Signed-off-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Christoph Hellwig [Thu, 16 Apr 2020 15:00:08 +0000 (17:00 +0200)]
MIPS: merge __ioremap_mode into ioremap_prot
There is no reason to have two ioremap with flags interfaces. Merge
the historic mips __ioremap_mode into ioremap_prot which is a generic
kernel interface.
Signed-off-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Christoph Hellwig [Thu, 16 Apr 2020 15:00:07 +0000 (17:00 +0200)]
MIPS: cleanup fixup_bigphys_addr handling
fixup_bigphys_addr is only provided by the alchemy platform. Remove
all the stubs, and ensure we only call it if it is actually implemented.
Also don't bother implementing io_remap_pfn_range if we don't have to,
and move the remaining implementation to alchemy platform code.
Signed-off-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Christoph Hellwig [Thu, 16 Apr 2020 15:00:06 +0000 (17:00 +0200)]
MIPS: remove cpu_has_64bit_addresses
This macro is identical to CONFIG_64BIT, and using a Kconfig variable
for the only places that checks them (the ioremap implementation) will
simplify later patches in this series.
Signed-off-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Christoph Hellwig [Thu, 16 Apr 2020 15:00:05 +0000 (17:00 +0200)]
ASoC: txx9: don't work around too small resource_size_t
The txx9 sound driver deends on HAS_TXX9_ACLC, which is only set for
three tx49xx SOCs, and thus always has a 64-bit phys_addr_t and
resource_size_t. Instead of poking into ioremap internals to work
around a potentially too small resource_size_t just add a BUILD_BUG_ON
to catch such a case.
Signed-off-by: Christoph Hellwig <hch@lst.de>
Acked-by: Mark Brown <broonie@kernel.org>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Jason Yan [Sat, 18 Apr 2020 08:18:34 +0000 (16:18 +0800)]
MIPS: Netlogic: remove unneeded semicolon in fmn_message_handler()
Fix the following coccicheck warning:
arch/mips/netlogic/xlr/fmn.c:106:2-3: Unneeded semicolon
Reported-by: Hulk Robot <hulkci@huawei.com>
Signed-off-by: Jason Yan <yanaijie@huawei.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Arnd Bergmann [Thu, 9 Apr 2020 09:02:28 +0000 (11:02 +0200)]
mips: loongsoon2ef: remove private clk api
As platforms are moving to COMMON_CLK in general, loongson2ef
stuck out as something that has a private implementation but
does not actually use it except for setting the frequency of
the CPU itself from the loongson2_cpufreq driver.
Change that driver to call the register setting function directly
and remove the rest of the stub implementation.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
bibo mao [Wed, 15 Apr 2020 09:56:43 +0000 (17:56 +0800)]
MIPS: Fix typo for user_ld macro definition
There is typo for macro user_ld if __ASSEMBLY__ is declared, this
patch fixes this issue.
Signed-off-by: bibo mao <maobibo@loongson.cn>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Jiaxun Yang [Thu, 26 Mar 2020 06:16:58 +0000 (14:16 +0800)]
MIPS: Kill MIPS_GIC_IRQ_BASE
It never got used by any driver.
Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
bibo mao [Thu, 26 Mar 2020 07:42:47 +0000 (03:42 -0400)]
MIPS: xilfpga: Removed unused header files
Header in directory asm/mach-xilfpga is not used any more.
Remove it here, and it passes to compile with xilfpga_defconfig
Signed-off-by: bibo mao <maobibo@loongson.cn>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Mike Rapoport [Thu, 2 Apr 2020 08:16:14 +0000 (11:16 +0300)]
mips: define pud_index() regardless of page table folding
Commit
31168f033e37 ("mips: drop __pXd_offset() macros that duplicate
pXd_index() ones") is correct that pud_index() & __pud_offset() are the
same when pud_index() is actually provided, however it does not take into
account the __PAGETABLE_PUD_FOLDED case. This has broken MIPS KVM
compilation because it relied on availability of pud_index().
Define pud_index() regardless of page table folded. It will evaluate to
actual index for 4-level pagetables and to 0 for folded PUD level.
Link: https://lore.kernel.org/lkml/20200331154749.5457-1-pbonzini@redhat.com
Reported-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Mike Rapoport <rppt@linux.ibm.com>
Tested-by: Huacai Chen <chenhc@lemote.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
YueHaibing [Fri, 3 Apr 2020 09:49:04 +0000 (17:49 +0800)]
MIPS: TXx9: Fix Kconfig warnings
If TTY and SND is not n, we got this warnings:
WARNING: unmet direct dependencies detected for HAS_TXX9_SERIAL
Depends on [n]: TTY [=n] && HAS_IOMEM [=y]
Selected by [y]:
- SOC_TX3927 [=y]
WARNING: unmet direct dependencies detected for HAS_TXX9_SERIAL
Depends on [n]: TTY [=n] && HAS_IOMEM [=y]
Selected by [y]:
- SOC_TX4938 [=y]
Only dependencies is enabled, they can be enabled, so
use 'imply' instead of 'select' to fix this.
Signed-off-by: YueHaibing <yuehaibing@huawei.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Tiezhu Yang [Tue, 31 Mar 2020 07:00:06 +0000 (15:00 +0800)]
MIPS: Loongson: Use CONFIG_NR_CPUS_DEFAULT_64 to support more CPUs
When I update the mainline kernel on the Loongson 2-way platform which
has 8 CPUs, it only shows 4 CPUs due to NR_CPUS is 4, this is obviously
wrong.
In order to support more CPUs on the Loongson platform, it is better
to use CONFIG_NR_CPUS_DEFAULT_64 instead of CONFIG_NR_CPUS_DEFAULT_4
to specify the maximum number of CPUs which the kernel will support.
Signed-off-by: Tiezhu Yang <yangtiezhu@loongson.cn>
Acked-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Linus Torvalds [Sun, 12 Apr 2020 19:35:55 +0000 (12:35 -0700)]
Linux 5.7-rc1
Linus Torvalds [Sun, 12 Apr 2020 18:04:58 +0000 (11:04 -0700)]
MAINTAINERS: sort field names for all entries
This sorts the actual field names too, potentially causing even more
chaos and confusion at merge time if you have edited the MAINTAINERS
file. But the end result is a more consistent layout, and hopefully
it's a one-time pain minimized by doing this just before the -rc1
release.
This was entirely scripted:
./scripts/parse-maintainers.pl --input=MAINTAINERS --output=MAINTAINERS --order
Requested-by: Joe Perches <joe@perches.com>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Linus Torvalds [Sun, 12 Apr 2020 18:03:52 +0000 (11:03 -0700)]
MAINTAINERS: sort entries by entry name
They are all supposed to be sorted, but people who add new entries don't
always know the alphabet. Plus sometimes the entry names get edited,
and people don't then re-order the entry.
Let's see how painful this will be for merging purposes (the MAINTAINERS
file is often edited in various different trees), but Joe claims there's
relatively few patches in -next that touch this, and doing it just
before -rc1 is likely the best time. Fingers crossed.
This was scripted with
/scripts/parse-maintainers.pl --input=MAINTAINERS --output=MAINTAINERS
but then I also ended up manually upper-casing a few entry names that
stood out when looking at the end result.
Requested-by: Joe Perches <joe@perches.com>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Linus Torvalds [Sun, 12 Apr 2020 17:17:16 +0000 (10:17 -0700)]
Merge tag 'x86-urgent-2020-04-12' of git://git./linux/kernel/git/tip/tip
Pull x86 fixes from Thomas Gleixner:
"A set of three patches to fix the fallout of the newly added split
lock detection feature.
It addressed the case where a KVM guest triggers a split lock #AC and
KVM reinjects it into the guest which is not prepared to handle it.
Add proper sanity checks which prevent the unconditional injection
into the guest and handles the #AC on the host side in the same way as
user space detections are handled. Depending on the detection mode it
either warns and disables detection for the task or kills the task if
the mode is set to fatal"
* tag 'x86-urgent-2020-04-12' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
KVM: VMX: Extend VMXs #AC interceptor to handle split lock #AC in guest
KVM: x86: Emulate split-lock access as a write in emulator
x86/split_lock: Provide handle_guest_split_lock()
Linus Torvalds [Sun, 12 Apr 2020 17:13:14 +0000 (10:13 -0700)]
Merge tag 'timers-urgent-2020-04-12' of git://git./linux/kernel/git/tip/tip
Pull time(keeping) updates from Thomas Gleixner:
- Fix the time_for_children symlink in /proc/$PID/ so it properly
reflects that it part of the 'time' namespace
- Add the missing userns limit for the allowed number of time
namespaces, which was half defined but the actual array member was
not added. This went unnoticed as the array has an exessive empty
member at the end but introduced a user visible regression as the
output was corrupted.
- Prevent further silent ucount corruption by adding a BUILD_BUG_ON()
to catch half updated data.
* tag 'timers-urgent-2020-04-12' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
ucount: Make sure ucounts in /proc/sys/user don't regress again
time/namespace: Add max_time_namespaces ucount
time/namespace: Fix time_for_children symlink
Linus Torvalds [Sun, 12 Apr 2020 17:09:19 +0000 (10:09 -0700)]
Merge tag 'sched-urgent-2020-04-12' of git://git./linux/kernel/git/tip/tip
Pull scheduler fixes/updates from Thomas Gleixner:
- Deduplicate the average computations in the scheduler core and the
fair class code.
- Fix a raise between runtime distribution and assignement which can
cause exceeding the quota by up to 70%.
- Prevent negative results in the imbalanace calculation
- Remove a stale warning in the workqueue code which can be triggered
since the call site was moved out of preempt disabled code. It's a
false positive.
- Deduplicate the print macros for procfs
- Add the ucmap values to the SCHED_DEBUG procfs output for completness
* tag 'sched-urgent-2020-04-12' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
sched/debug: Add task uclamp values to SCHED_DEBUG procfs
sched/debug: Factor out printing formats into common macros
sched/debug: Remove redundant macro define
sched/core: Remove unused rq::last_load_update_tick
workqueue: Remove the warning in wq_worker_sleeping()
sched/fair: Fix negative imbalance in imbalance calculation
sched/fair: Fix race between runtime distribution and assignment
sched/fair: Align rq->avg_idle and rq->avg_scan_cost
Linus Torvalds [Sun, 12 Apr 2020 17:05:24 +0000 (10:05 -0700)]
Merge tag 'perf-urgent-2020-04-12' of git://git./linux/kernel/git/tip/tip
Pull perf fixes from Thomas Gleixner:
"Three fixes/updates for perf:
- Fix the perf event cgroup tracking which tries to track the cgroup
even for disabled events.
- Add Ice Lake server support for uncore events
- Disable pagefaults when retrieving the physical address in the
sampling code"
* tag 'perf-urgent-2020-04-12' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
perf/core: Disable page faults when getting phys address
perf/x86/intel/uncore: Add Ice Lake server uncore support
perf/cgroup: Correct indirection in perf_less_group_idx()
perf/core: Fix event cgroup tracking
Linus Torvalds [Sun, 12 Apr 2020 16:47:10 +0000 (09:47 -0700)]
Merge tag 'locking-urgent-2020-04-12' of git://git./linux/kernel/git/tip/tip
Pull locking fixes from Thomas Gleixner:
"Three small fixes/updates for the locking core code:
- Plug a task struct reference leak in the percpu rswem
implementation.
- Document the refcount interaction with PID_MAX_LIMIT
- Improve the 'invalid wait context' data dump in lockdep so it
contains all information which is required to decode the problem"
* tag 'locking-urgent-2020-04-12' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
locking/lockdep: Improve 'invalid wait context' splat
locking/refcount: Document interaction with PID_MAX_LIMIT
locking/percpu-rwsem: Fix a task_struct refcount
Linus Torvalds [Sun, 12 Apr 2020 16:41:01 +0000 (09:41 -0700)]
Merge tag '5.7-rc-smb3-fixes-part2' of git://git.samba.org/sfrench/cifs-2.6
Pull cifs fixes from Steve French:
"Ten cifs/smb fixes:
- five RDMA (smbdirect) related fixes
- add experimental support for swap over SMB3 mounts
- also a fix which improves performance of signed connections"
* tag '5.7-rc-smb3-fixes-part2' of git://git.samba.org/sfrench/cifs-2.6:
smb3: enable swap on SMB3 mounts
smb3: change noisy error message to FYI
smb3: smbdirect support can be configured by default
cifs: smbd: Do not schedule work to send immediate packet on every receive
cifs: smbd: Properly process errors on ib_post_send
cifs: Allocate crypto structures on the fly for calculating signatures of incoming packets
cifs: smbd: Update receive credits before sending and deal with credits roll back on failure before sending
cifs: smbd: Check send queue size before posting a send
cifs: smbd: Merge code to track pending packets
cifs: ignore cached share root handle closing errors
Linus Torvalds [Sun, 12 Apr 2020 16:39:47 +0000 (09:39 -0700)]
Merge tag 'nfs-for-5.7-2' of git://git.linux-nfs.org/projects/trondmy/linux-nfs
Pull NFS client bugfix from Trond Myklebust:
"Fix an RCU read lock leakage in pnfs_alloc_ds_commits_list()"
* tag 'nfs-for-5.7-2' of git://git.linux-nfs.org/projects/trondmy/linux-nfs:
pNFS: Fix RCU lock leakage
Linus Torvalds [Sat, 11 Apr 2020 18:38:44 +0000 (11:38 -0700)]
Merge tag 'nios2-v5.7-rc1' of git://git./linux/kernel/git/lftan/nios2
Pull nios2 updates from Ley Foon Tan:
- Remove nios2-dev@lists.rocketboards.org from MAINTAINERS
- remove 'resetvalue' property
- rename 'altr,gpio-bank-width' -> 'altr,ngpio'
- enable the common clk subsystem on Nios2
* tag 'nios2-v5.7-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/lftan/nios2:
MAINTAINERS: Remove nios2-dev@lists.rocketboards.org
arch: nios2: remove 'resetvalue' property
arch: nios2: rename 'altr,gpio-bank-width' -> 'altr,ngpio'
arch: nios2: Enable the common clk subsystem on Nios2
Linus Torvalds [Sat, 11 Apr 2020 18:34:36 +0000 (11:34 -0700)]
Merge tag 'dma-mapping-5.7-1' of git://git.infradead.org/users/hch/dma-mapping
Pull dma-mapping fixes from Christoph Hellwig:
- fix an integer truncation in dma_direct_get_required_mask
(Kishon Vijay Abraham)
- fix the display of dma mapping types (Grygorii Strashko)
* tag 'dma-mapping-5.7-1' of git://git.infradead.org/users/hch/dma-mapping:
dma-debug: fix displaying of dma allocation type
dma-direct: fix data truncation in dma_direct_get_required_mask()
Linus Torvalds [Sat, 11 Apr 2020 16:46:12 +0000 (09:46 -0700)]
Merge tag 'kbuild-v5.7-2' of git://git./linux/kernel/git/masahiroy/linux-kbuild
Pull more Kbuild updates from Masahiro Yamada:
- raise minimum supported binutils version to 2.23
- remove old CONFIG_AS_* macros that we know binutils >= 2.23 supports
- move remaining CONFIG_AS_* tests to Kconfig from Makefile
- enable -Wtautological-compare warnings to catch more issues
- do not support GCC plugins for GCC <= 4.7
- fix various breakages of 'make xconfig'
- include the linker version used for linking the kernel into
LINUX_COMPILER, which is used for the banner, and also exposed to
/proc/version
- link lib-y objects to vmlinux forcibly when CONFIG_MODULES=y, which
allows us to remove the lib-ksyms.o workaround, and to solve the last
known issue of the LLVM linker
- add dummy tools in scripts/dummy-tools/ to enable all compiler tests
in Kconfig, which will be useful for distro maintainers
- support the single switch, LLVM=1 to use Clang and all LLVM utilities
instead of GCC and Binutils.
- support LLVM_IAS=1 to enable the integrated assembler, which is still
experimental
* tag 'kbuild-v5.7-2' of git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-kbuild: (36 commits)
kbuild: fix comment about missing include guard detection
kbuild: support LLVM=1 to switch the default tools to Clang/LLVM
kbuild: replace AS=clang with LLVM_IAS=1
kbuild: add dummy toolchains to enable all cc-option etc. in Kconfig
kbuild: link lib-y objects to vmlinux forcibly when CONFIG_MODULES=y
MIPS: fw: arc: add __weak to prom_meminit and prom_free_prom_memory
kbuild: remove -I$(srctree)/tools/include from scripts/Makefile
kbuild: do not pass $(KBUILD_CFLAGS) to scripts/mkcompile_h
Documentation/llvm: fix the name of llvm-size
kbuild: mkcompile_h: Include $LD version in /proc/version
kconfig: qconf: Fix a few alignment issues
kconfig: qconf: remove some old bogus TODOs
kconfig: qconf: fix support for the split view mode
kconfig: qconf: fix the content of the main widget
kconfig: qconf: Change title for the item window
kconfig: qconf: clean deprecated warnings
gcc-plugins: drop support for GCC <= 4.7
kbuild: Enable -Wtautological-compare
x86: update AS_* macros to binutils >=2.23, supporting ADX and AVX2
crypto: x86 - clean up poly1305-x86_64-cryptogams.S by 'make clean'
...
Sedat Dilek [Sat, 11 Apr 2020 13:29:43 +0000 (15:29 +0200)]
mailmap: Add Sedat Dilek (replacement for expired email address)
I do not longer work for credativ Germany.
Please, use my private email address instead.
This is for the case when people want to CC me on
patches sent from my old business email address.
Signed-off-by: Sedat Dilek <sedat.dilek@gmail.com>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Trond Myklebust [Sat, 11 Apr 2020 15:37:18 +0000 (11:37 -0400)]
pNFS: Fix RCU lock leakage
Another brown paper bag moment. pnfs_alloc_ds_commits_list() is leaking
the RCU lock.
Fixes:
a9901899b649 ("pNFS: Add infrastructure for cleaning up per-layout commit structures")
Signed-off-by: Trond Myklebust <trond.myklebust@hammerspace.com>
Xiaoyao Li [Fri, 10 Apr 2020 11:54:02 +0000 (13:54 +0200)]
KVM: VMX: Extend VMXs #AC interceptor to handle split lock #AC in guest
Two types of #AC can be generated in Intel CPUs:
1. legacy alignment check #AC
2. split lock #AC
Reflect #AC back into the guest if the guest has legacy alignment checks
enabled or if split lock detection is disabled.
If the #AC is not a legacy one and split lock detection is enabled, then
invoke handle_guest_split_lock() which will either warn and disable split
lock detection for this task or force SIGBUS on it.
[ tglx: Switch it to handle_guest_split_lock() and rename the misnamed
helper function. ]
Suggested-by: Sean Christopherson <sean.j.christopherson@intel.com>
Signed-off-by: Xiaoyao Li <xiaoyao.li@intel.com>
Signed-off-by: Sean Christopherson <sean.j.christopherson@intel.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Borislav Petkov <bp@suse.de>
Acked-by: Paolo Bonzini <pbonzini@redhat.com>
Link: https://lkml.kernel.org/r/20200410115517.176308876@linutronix.de
Xiaoyao Li [Fri, 10 Apr 2020 11:54:01 +0000 (13:54 +0200)]
KVM: x86: Emulate split-lock access as a write in emulator
Emulate split-lock accesses as writes if split lock detection is on
to avoid #AC during emulation, which will result in a panic(). This
should never occur for a well-behaved guest, but a malicious guest can
manipulate the TLB to trigger emulation of a locked instruction[1].
More discussion can be found at [2][3].
[1] https://lkml.kernel.org/r/
8c5b11c9-58df-38e7-a514-
dc12d687b198@redhat.com
[2] https://lkml.kernel.org/r/
20200131200134.GD18946@linux.intel.com
[3] https://lkml.kernel.org/r/
20200227001117.GX9940@linux.intel.com
Suggested-by: Sean Christopherson <sean.j.christopherson@intel.com>
Signed-off-by: Xiaoyao Li <xiaoyao.li@intel.com>
Signed-off-by: Sean Christopherson <sean.j.christopherson@intel.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Borislav Petkov <bp@suse.de>
Acked-by: Paolo Bonzini <pbonzini@redhat.com>
Link: https://lkml.kernel.org/r/20200410115517.084300242@linutronix.de
Thomas Gleixner [Fri, 10 Apr 2020 11:54:00 +0000 (13:54 +0200)]
x86/split_lock: Provide handle_guest_split_lock()
Without at least minimal handling for split lock detection induced #AC,
VMX will just run into the same problem as the VMWare hypervisor, which
was reported by Kenneth.
It will inject the #AC blindly into the guest whether the guest is
prepared or not.
Provide a function for guest mode which acts depending on the host
SLD mode. If mode == sld_warn, treat it like user space, i.e. emit a
warning, disable SLD and mark the task accordingly. Otherwise force
SIGBUS.
[ bp: Add a !CPU_SUP_INTEL stub for handle_guest_split_lock(). ]
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Borislav Petkov <bp@suse.de>
Acked-by: Paolo Bonzini <pbonzini@redhat.com>
Link: https://lkml.kernel.org/r/20200410115516.978037132@linutronix.de
Link: https://lkml.kernel.org/r/20200402123258.895628824@linutronix.de
Masahiro Yamada [Wed, 8 Apr 2020 18:29:19 +0000 (03:29 +0900)]
kbuild: fix comment about missing include guard detection
The keyword here is 'twice' to explain the trick.
Signed-off-by: Masahiro Yamada <masahiroy@kernel.org>