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Sanjay Patel [Mon, 28 Jan 2019 15:51:34 +0000 (15:51 +0000)]
[x86] allow more shuffle splitting to avoid vpermps (PR40434)
This is tricky to make optimal: sometimes we're better off using
a single wider op, but other times it makes more sense to combine
a narrow ops to achieve the same result.
This solves the case from:
https://bugs.llvm.org/show_bug.cgi?id=40434
There's potentially a similar change for vectors with 64-bit elements,
but it needs adjustments similar to rL352333 to avoid creating infinite
loops.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@352380
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George Rimar [Mon, 28 Jan 2019 15:49:41 +0000 (15:49 +0000)]
[llvm-objdump] - Update test after r352366. NFC.
Change the column name.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@352379
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Ranjeet Singh [Mon, 28 Jan 2019 15:48:07 +0000 (15:48 +0000)]
VERSION_GREATER_EQUAL not supported in llvm cmake.
Patch https://reviews.llvm.org/D56329 caused build failures for me when
building on Windows because of the use of cmake operator
'VERSION_GREATER_EQUAL' which isn't supported in older versions of cmake. The
llvm website states that minimum required version of cmake for building llvm is
3.4.3 https://llvm.org/docs/CMake.html
Differential Revision: https://reviews.llvm.org/D57326
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@352378
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Arnaud A. de Grandmaison [Mon, 28 Jan 2019 15:38:01 +0000 (15:38 +0000)]
Remove no longer needed Arm specific LICENSE.TXT file.
As the codebase is now under the Apache 2.0 license with LLVM
Exceptions, and all Arm's contributions, past or future, are under that
new license, this Arm specific LICENSE.TXT is no longer needed, thus
removing it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@352376
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Michal Gorny [Mon, 28 Jan 2019 15:16:03 +0000 (15:16 +0000)]
[cmake] Fix get_llvm_lit_path() to respect LLVM_EXTERNAL_LIT always
Refactor the get_llvm_lit_path() logic to respect LLVM_EXTERNAL_LIT,
and require the fallback to be defined explicitly
as LLVM_DEFAULT_EXTERNAL_LIT. This fixes building libcxx standalone
after r346888.
The old logic was using LLVM_EXTERNAL_LIT both as user-defined cache
variable and an optional pre-definition of default value from caller
(e.g. libcxx). It included a hack to make this work by assigning
the value back and forth but it was fragile and stopped working
in libcxx.
The new logic is simpler and more transparent. Default value is
provided in a separate variable, and used only when user-specified
variable is empty (i.e. not overriden).
Differential Revision: https://reviews.llvm.org/D57282
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@352374
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George Rimar [Mon, 28 Jan 2019 15:05:10 +0000 (15:05 +0000)]
[obj2yaml] - Dump the sh_entsize section field.
I faced with the fact that obj2yaml does not dump the sh_entsize field.
A problem arose when I tried to dump ELF versioning sections.
This is close to what D50235 did, but D50235 did the change for yaml2obj, and now
I had to do the same for obj2yaml.
Differential revision: https://reviews.llvm.org/D57229
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@352373
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Jordan Rupprecht [Mon, 28 Jan 2019 15:02:40 +0000 (15:02 +0000)]
[llvm-objcopy] Fix crash when writing empty binary output
Summary: When using llvm-objcopy -O binary and the resulting file will be empty (e.g. removing the only section that would be written, or using --only-keep with a section that doesn't exist/isn't SHF_ALLOC), we crash because FileOutputBuffer expects Size > 0. Add a regression test, and change Buffer to open/truncate the output file in this case.
Reviewers: alexshap, jhenderson, jakehehrlich, espindola
Reviewed By: alexshap, jhenderson
Subscribers: jfb, llvm-commits, emaste, arichardson
Differential Revision: https://reviews.llvm.org/D56806
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@352371
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Aleksandar Beserminji [Mon, 28 Jan 2019 14:59:30 +0000 (14:59 +0000)]
[mips] Support for +abs2008 attribute
Instruction abs.[ds] is not generating correct result when working
with NaNs for revisions prior mips32r6 and mips64r6.
To generate a sequence which always produce a correct result, but also
to allow user more control on how his code is compiled, attribute
+abs2008 is added, so user can choose legacy or 2008.
By default legacy mode is used on revisions prior R6. Mips32r6 and
mips64r6 use abs2008 mode by default.
Differential Revision: https://reviews.llvm.org/D35983
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@352370
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George Rimar [Mon, 28 Jan 2019 14:11:35 +0000 (14:11 +0000)]
[llvm-objdump] - Print LMAs when dumping section headers.
When --section-headers is used, GNU objdump prints both LMA and VMA for sections.
llvm-objdump does not do that what makes it's output be slightly inconsistent.
Patch teaches llvm-objdump to print LMA/VMA for ELF file formats.
The behavior for other formats remains unchanged.
Differential revision: https://reviews.llvm.org/D57146
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@352366
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Tim Corringham [Mon, 28 Jan 2019 13:48:59 +0000 (13:48 +0000)]
[AMDGPU] Add intrinsics for 16 bit interpolation
Summary:
Added the intrinsics llvm.amdgcn.interp.p1.f16() and
llvm.amdgcn.interp.p2.f16() and related LIT test.
The p1 intrinsic generates code appropriate for both 16 and 32
bank LDS.
Reviewers: #amdgpu, dstuttard, arsenm, tpr
Reviewed By: #amdgpu, arsenm
Subscribers: jvesely, mgorny, arsenm, kzhuravl, wdng, nhaehnle, yaxunl, dstuttard, tpr, t-tye, llvm-commits
Differential Revision: https://reviews.llvm.org/D46754
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@352357
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James Y Knight [Mon, 28 Jan 2019 13:25:57 +0000 (13:25 +0000)]
[opaque pointer types] Remove GraphTraits specialization for Type.
The only caller has been deleted in r352076, and I'd like to minimize
the amount of code walking Type hierarchies generically, to make it
easier to identify code depending on pointee types.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@352353
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Petar Avramovic [Mon, 28 Jan 2019 12:10:17 +0000 (12:10 +0000)]
[MIPS GlobalISel] Select sub
Lower G_USUBO and G_USUBE. Add narrowScalar for G_SUB.
Legalize and select G_SUB for MIPS 32.
Differential Revision: https://reviews.llvm.org/D53416
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@352351
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Jeremy Morse [Mon, 28 Jan 2019 12:08:31 +0000 (12:08 +0000)]
[DebugInfo][DAG] Avoid re-ordering of DBG_VALUEs
This patch improves the placement of DBG_VALUEs when by SelectionDAG, which
as documented in PR40427 can go very wrong. At the core of this is
ProcessSourceNode, which assumes the last instruction in a BB is the start
of the last processed IR instruction, which isn't always true.
Instead, use a helper function to call InstrEmitter::EmitNode, that records
before-and-after iterators and determines the first of any new instruction
created during emission. This is passed to ProcessSourceNode, which can
then make more elightened decisions about ordering for DBG_VALUE placement.
Differential revision: https://reviews.llvm.org/D57163
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@352350
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George Rimar [Mon, 28 Jan 2019 10:48:54 +0000 (10:48 +0000)]
[llvm-objdump] - Fix comment. NFC.
This was mentioned by James Henderson
in review for https://reviews.llvm.org/D57051.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@352348
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George Rimar [Mon, 28 Jan 2019 10:44:01 +0000 (10:44 +0000)]
[llvm-objdump] - Implement the --adjust-vma option.
GNU objdump's help says: "--adjust-vma: Add OFFSET to all displayed section addresses"
In real life what it does is a bit more complicated
(and IMO not always reasonable. For example, GNU objdump prints not only VMA, but also LMA
for sections. And with --adjust-vma it adjusts LMA, but only when a section has relocations.
llvm-objsump does not seem to support printing LMAs yet, but GNU's logic anyways does not
make sense for me here).
This patch tries to adjust VMA. I tried to implement a reasonable approach.
I am not adjusting sections that are not allocatable. As, for example, adjusting debug sections
VA's and rel[a] sections VA's should not make sense. This behavior seems to be GNU compatible.
Differential revision: https://reviews.llvm.org/D57051
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@352347
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Diana Picus [Mon, 28 Jan 2019 10:37:30 +0000 (10:37 +0000)]
[ARM GlobalISel] Support integer division for Thumb2
Support G_SDIV, G_UDIV, G_SREM and G_UREM.
The only significant difference between arm and thumb mode is that we
need to check a different subtarget feature.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@352346
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Craig Topper [Mon, 28 Jan 2019 07:03:03 +0000 (07:03 +0000)]
[X86] Add new variadic avx512 compress/expand intrinsics that use vXi1 types for the mask argument.
Remove and autoupgrade the old intrinsics
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@352343
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Craig Topper [Mon, 28 Jan 2019 05:42:39 +0000 (05:42 +0000)]
[X86] Add vbmi2 compressstore and expandload tests that aren't fast-isel tests.
These got removed when we autoupgraded to target independent intrinsics, but we didn't have coverage anywhere else. The avx512f/avx512vl versions do have coverage.
Also move some tests back from the upgrade file that aren't really upgraded.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@352342
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Petr Hosek [Mon, 28 Jan 2019 04:12:54 +0000 (04:12 +0000)]
[CMake] Use __libc_start_main rather than fopen when checking for C library
The check_library_exists CMake uses a custom symbol definition. This
is a problem when checking for C library symbols because Clang
recognizes many of them as builtins, and returns the
-Wbuiltin-requires-header (or -Wincompatible-library-redeclaration)
error. When building with -Werror which is the default, this causes
the check_library_exists check fail making the build think that C
library isn't available.
To avoid this issue, we should use a symbol that isn't recognized by
Clang and wouldn't cause the same issue. __libc_start_main seems like
reasonable choice that fits the bill.
Differential Revision: https://reviews.llvm.org/D57142
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@352341
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Amara Emerson [Mon, 28 Jan 2019 03:21:14 +0000 (03:21 +0000)]
[AArch64][GlobalISel] Teach RBS about G_FNEG default mapping.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@352340
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Amara Emerson [Mon, 28 Jan 2019 02:28:22 +0000 (02:28 +0000)]
[AArch64][GlobalISel] Add some missing vector support for FP arithmetic ops.
Moved the fneg lowering legalization test from AArch64 to X86, as we want to
specify that it's already legal.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@352338
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Amara Emerson [Mon, 28 Jan 2019 02:27:59 +0000 (02:27 +0000)]
[AArch64][GlobalISel] Add some vector support for fp <-> int conversions.
Some unrelated, but benign, test changes as well due to the test update script.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@352337
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Matt Arsenault [Sun, 27 Jan 2019 22:36:24 +0000 (22:36 +0000)]
GlobalISel: Don't reduce elements for atomic load/store
This is invalid for the same reason as in the narrowScalar handling
for load.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@352334
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Sanjay Patel [Sun, 27 Jan 2019 21:53:33 +0000 (21:53 +0000)]
[x86] add restriction for lowering to vpermps
This transform was added with rL351346, and we had
an escape for shufps, but we also want one for
unpckps vs. vpermps because vpermps doesn't take
an immediate shuffle index operand.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@352333
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Matt Arsenault [Sun, 27 Jan 2019 21:53:09 +0000 (21:53 +0000)]
GlobalISel: Factor fewerElementVectors into separate functions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@352332
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Sanjay Patel [Sun, 27 Jan 2019 21:34:51 +0000 (21:34 +0000)]
[x86] add tests for extract/extract/unpack; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@352331
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Simon Pilgrim [Sun, 27 Jan 2019 21:01:23 +0000 (21:01 +0000)]
[X86][SSE] Add UNDEF handling to combineSelect ISD::USUBSAT matching (PR40083)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@352330
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Simon Pilgrim [Sun, 27 Jan 2019 20:52:34 +0000 (20:52 +0000)]
[X86][SSE] Add UNDEF test case for combineSelect ISD::USUBSAT matching (PR40083)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@352329
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Simon Pilgrim [Sun, 27 Jan 2019 20:36:37 +0000 (20:36 +0000)]
[X86][SSE] Permit UNDEFs in combineAddToSUBUS matching (PR40083)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@352328
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Sanjay Patel [Sun, 27 Jan 2019 20:17:02 +0000 (20:17 +0000)]
[x86] add more tests for lowerShuffleWithUndefHalf; NFC
Some other transform is creating the opposite form and causing
an infinite loop if we try to split some of these.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@352327
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Simon Pilgrim [Sun, 27 Jan 2019 20:09:30 +0000 (20:09 +0000)]
[X86][SSE] Add PSUBUS undef element test case (PR40083)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@352326
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Martin Storsjo [Sun, 27 Jan 2019 19:53:36 +0000 (19:53 +0000)]
[COFF] Add new relocation types.
Differential Revision: https://reviews.llvm.org/D57291
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@352324
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Alexandre Ganea [Sun, 27 Jan 2019 18:41:40 +0000 (18:41 +0000)]
Fix some warnings on MSVC
Differential Revision: https://reviews.llvm.org/D56329
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@352322
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Simon Pilgrim [Sun, 27 Jan 2019 18:31:33 +0000 (18:31 +0000)]
[X86] Add test cases for PR36721 (unnecessary andl for %cl when shifting)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@352321
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Sanjay Patel [Sun, 27 Jan 2019 18:12:03 +0000 (18:12 +0000)]
[x86] refactor logic in lowerShuffleWithUndefHalf
Although this is longer code, this is no-functional-change-intended.
The goal is to untangle the conditions under which we bail out, so
that's easier to adjust.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@352320
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Matt Arsenault [Sun, 27 Jan 2019 15:57:23 +0000 (15:57 +0000)]
GlobalISel: Verify load/store has a pointer input
I expected this to be automatically verified, but it seems
nothing uses that the type index was declared as a "ptype"
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@352319
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Roman Lebedev [Sun, 27 Jan 2019 15:36:35 +0000 (15:36 +0000)]
[X86][NFC] Replace "<%s" with "< %s" in run-lines.
While i have no intention of actually commiting regeneration
of the check lines in these test files with update_llc_test_checks,
lack of that whitespace breaks that util, which is mildly inconvenient.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@352318
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Roman Lebedev [Sun, 27 Jan 2019 14:35:54 +0000 (14:35 +0000)]
[NFC][MCA][X86][BdVer2] Cherry-pick int-to-ivec forwarding tests from BtVer2
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@352317
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Simon Pilgrim [Sun, 27 Jan 2019 14:04:45 +0000 (14:04 +0000)]
[X86] Add CGP tests for PR40486
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@352316
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Simon Pilgrim [Sun, 27 Jan 2019 13:51:59 +0000 (13:51 +0000)]
[TTI] Add generic SADDSAT/SSUBSAT costs
Add generic costs calculation for SADDSAT/SSUBSAT intrinsics, this uses generic costs for sadd_with_overflow/ssub_with_overflow, an extra sign comparison + a selects based on the sign/overflow.
This completes PR40316
Differential Revision: https://reviews.llvm.org/D57239
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@352315
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Simon Pilgrim [Sun, 27 Jan 2019 12:39:38 +0000 (12:39 +0000)]
[X86] Regenerate reverse branch test to explicitly show branching and condition codes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@352314
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Simon Pilgrim [Sun, 27 Jan 2019 12:38:09 +0000 (12:38 +0000)]
[X86] Regenerate test to explicitly show branching and condition codes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@352313
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Amara Emerson [Sun, 27 Jan 2019 11:34:41 +0000 (11:34 +0000)]
Re-apply "r351584: "GlobalISel: Verify g_zextload and g_sextload""
I reverted it originally due to a bot failing. The underlying bug has been fixed
as of r352311.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@352312
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Amara Emerson [Sun, 27 Jan 2019 10:56:20 +0000 (10:56 +0000)]
[AArch64][GlobalISel] Fix the G_EXTLOAD combiner creating non-extending illegal instructions.
This fixes loads like 's1 = load %p (load 1 from %p)' being combined with an
extend into an illegal 's8 = g_extload %p (load 1 from %p)' which doesn't do any
extension, by avoiding touching those < s8 size loads.
This bug was uncovered by a verifier update r351584, which I reverted it to keep
the bots green.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@352311
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Thomas Preud'homme [Sun, 27 Jan 2019 09:02:46 +0000 (09:02 +0000)]
Revert "Add support for prefix-only CLI options"
This reverts commit r351038.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@352310
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Thomas Preud'homme [Sun, 27 Jan 2019 09:02:19 +0000 (09:02 +0000)]
Revert "Detect incorrect FileCheck variable CLI definition"
This reverts commit r351039.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@352309
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Thomas Preud'homme [Sun, 27 Jan 2019 09:02:05 +0000 (09:02 +0000)]
Revert "Fix defines.txt"
This reverts commit r351042.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@352308
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Gabor Buella [Sun, 27 Jan 2019 06:15:39 +0000 (06:15 +0000)]
[X86] Add some missing blsr patterns
The add+and sequence followed by a branch can
happen e.g. when looping over the set bits of an integer:
```
while (x != 0) {
func(x & ~x);
x &= x - 1;
}
```
Reviewed By: ctopper
Differential Revision: https://reviews.llvm.org/D57296
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@352306
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Gabor Buella [Sun, 27 Jan 2019 06:05:40 +0000 (06:05 +0000)]
[NFC][X86] Add a few more blsr test cases
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@352305
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Craig Topper [Sun, 27 Jan 2019 03:37:05 +0000 (03:37 +0000)]
[X86] Add a pattern for (i64 (and (anyext def32:), 0x00000000FFFFFFFF)) to produce SUBREG_TO_REG
def32 here means the producing instruction zeroed bits 63:32. We already do this for zext, but it looks like we can get an and+anyext sometimes.
Spotted in the diffs from D33587.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@352303
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Matt Arsenault [Sun, 27 Jan 2019 00:53:54 +0000 (00:53 +0000)]
GlobalISel: Fix typo in assert messages
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@352301
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Matt Arsenault [Sun, 27 Jan 2019 00:52:51 +0000 (00:52 +0000)]
GlobalISel: Implement narrowScalar for mul
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@352300
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Matt Arsenault [Sun, 27 Jan 2019 00:12:21 +0000 (00:12 +0000)]
GlobalISel: fewerElementsVector for intrinsic_trunc/intrinsic_round
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@352298
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Matt Arsenault [Sat, 26 Jan 2019 23:54:53 +0000 (23:54 +0000)]
AMDGPU/GlobalISel: Use scalarize instead of clampMaxNumElements
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@352297
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Amara Emerson [Sat, 26 Jan 2019 23:47:09 +0000 (23:47 +0000)]
[GlobalISel][IRTranslator] Fix crash on translation of fneg.
When the fneg IR instruction was added the code to do translation wasn't
tested, and tried to get an invalid operand.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@352296
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Matt Arsenault [Sat, 26 Jan 2019 23:47:07 +0000 (23:47 +0000)]
AMDGPU/GlobalISel: Legalize more bit ops
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@352295
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Matt Arsenault [Sat, 26 Jan 2019 23:44:51 +0000 (23:44 +0000)]
AMDGPU/GlobalISel: Widen small uaddo/usubo
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@352294
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Johannes Doerfert [Sat, 26 Jan 2019 23:40:35 +0000 (23:40 +0000)]
[ValueTracking] Look through casts when determining non-nullness
Bitcast and certain Ptr2Int/Int2Ptr instructions will not alter the
value of their operand and can therefore be looked through when we
determine non-nullness.
Differential Revision: https://reviews.llvm.org/D54956
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@352293
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Simon Pilgrim [Sat, 26 Jan 2019 21:29:16 +0000 (21:29 +0000)]
[X86] combineAddOrSubToADCOrSBB/combineCarryThroughADD - use oneuse for entire SDNode
Fix issue noted in D57281 that only tested the one use for the SDValue (the result flag), not the entire SUB.
I've added the getNode() to make it clearer what is intended than just the -> redirection.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@352291
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Simon Pilgrim [Sat, 26 Jan 2019 20:23:04 +0000 (20:23 +0000)]
[X86] combineCarryThroughADD - add support for X86::COND_A commutations (PR24545)
As discussed on PR24545, we should try to commute X86::COND_A 'icmp ugt' cases to X86::COND_B 'icmp ult' to more optimally bind the carry flag output to a SBB instruction.
Differential Revision: https://reviews.llvm.org/D57281
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@352289
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Simon Pilgrim [Sat, 26 Jan 2019 20:13:44 +0000 (20:13 +0000)]
[X86] Fold X86ISD::SBB(ISD::SUB(X,Y),0) -> X86ISD::SBB(X,Y) (PR25858)
We often generate X86ISD::SBB(X, 0) for carry flag arithmetic.
I had tried to create test cases for the ADC equivalent (which often uses the same pattern) but haven't managed to find anything yet.
Differential Revision: https://reviews.llvm.org/D57169
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@352288
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Amaury Sechet [Sat, 26 Jan 2019 18:13:53 +0000 (18:13 +0000)]
Generate test results for combine-fcopysign.ll using update_llc_test_checks.py . NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@352285
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Simon Pilgrim [Sat, 26 Jan 2019 16:40:03 +0000 (16:40 +0000)]
[X86][SSE] Generalized unsigned compares to support nonsplat constant vectors (PR39859)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@352283
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Simon Pilgrim [Sat, 26 Jan 2019 16:27:48 +0000 (16:27 +0000)]
[X86] Add nonsplat increment/decrement constant vector with min/max test (PR39859)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@352281
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Sanjay Patel [Sat, 26 Jan 2019 16:20:22 +0000 (16:20 +0000)]
[x86] add helper for creating a half-width shuffle; NFC
This reduces a bit of duplication between the combining and
lowering places that use it, but the primary motivation is
to make it easier to rearrange the lowering logic and solve
PR40434:
https://bugs.llvm.org/show_bug.cgi?id=40434
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@352280
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Simon Pilgrim [Sat, 26 Jan 2019 13:56:53 +0000 (13:56 +0000)]
[X86] Add test case from PR34292
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@352274
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Simon Pilgrim [Sat, 26 Jan 2019 13:00:46 +0000 (13:00 +0000)]
[llvm-mca][X86] Add some missing DQI tests
Match more of the coverage of test\CodeGen\X86\avx512-schedule.ll as discussed on D57244
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@352273
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Simon Pilgrim [Sat, 26 Jan 2019 12:51:52 +0000 (12:51 +0000)]
[X86] Add 'less_than_ideal' followup test case from PR24545
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@352272
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Craig Topper [Sat, 26 Jan 2019 06:27:04 +0000 (06:27 +0000)]
[X86] Autoupgrade some of the intrinsics used by stack folding tests that have been previously removed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@352271
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Craig Topper [Sat, 26 Jan 2019 06:27:01 +0000 (06:27 +0000)]
[X86] Remove and autoupgrade vpconflict intrinsics that take a mask and passthru argument.
We have unmasked versions as of r352172
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@352270
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Craig Topper [Sat, 26 Jan 2019 02:44:58 +0000 (02:44 +0000)]
Revert r352255 "[SelectionDAG][X86] Don't use SEXTLOAD for promoting masked loads in the type legalizer"
This might be breaking an lldb windows buildbot.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@352268
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Craig Topper [Sat, 26 Jan 2019 02:41:54 +0000 (02:41 +0000)]
[X86] Remove GCCBuiltins from 512-bit cvt(u)qqtops, cvt(u)qqtopd, and cvt(u)dqtops intrinsics. Add new variadic uitofp/sitofp with rounding mode intrinsics.
Summary: See clang patch D56998 for a full description.
Reviewers: RKSimon, spatel
Reviewed By: RKSimon
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D56999
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@352266
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Matt Arsenault [Sat, 26 Jan 2019 01:42:13 +0000 (01:42 +0000)]
GlobalISel: Fix address space limit in LLT
The IR enforced limit for the address space is 24-bits, but LLT was
only using 23-bits. Additionally, the argument to the constructor was
truncating to 16-bits.
A similar problem still exists for the number of vector elements. The
IR enforces no limit, so if you try to use a vector with > 65535
elements the IRTranslator asserts in the LLT constructor.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@352264
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Thomas Lively [Sat, 26 Jan 2019 01:25:37 +0000 (01:25 +0000)]
[WebAssembly][NFC] Group SIMD-related ISel configuration
Reviewers: aheejin
Subscribers: dschuff, sbc100, jgravelle-google, hiraditya, sunfish
Differential Revision: https://reviews.llvm.org/D57263
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@352262
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Nemanja Ivanovic [Sat, 26 Jan 2019 01:18:48 +0000 (01:18 +0000)]
[PowerPC] Update Vector Costs for P9
For the power9 CPU, vector operations consume a pair of execution units rather
than one execution unit like a scalar operation. Update the target transform
cost functions to reflect the higher cost of vector operations when targeting
Power9.
Patch by RolandF.
Differential revision: https://reviews.llvm.org/D55461
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@352261
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Craig Topper [Sat, 26 Jan 2019 01:17:09 +0000 (01:17 +0000)]
[X86] Add DAG combine to merge vzext_movl with the various fp<->int conversion operations that only write the lower 64-bits of an xmm register and zero the rest.
Summary: We have isel patterns for this, but we're missing some load patterns and all broadcast patterns. A DAG combine seems like a better fit for this.
Reviewers: RKSimon, spatel
Reviewed By: RKSimon
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D56971
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@352260
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Vedant Kumar [Sat, 26 Jan 2019 00:33:15 +0000 (00:33 +0000)]
[llvm-nm] Print out N_COLD_FUNC as "cold func"
Per post-commit feedback from Mike, have llvm-nm print out this symbol
attribute as "[cold func]".
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@352258
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Artem Belevich [Sat, 26 Jan 2019 00:28:32 +0000 (00:28 +0000)]
[NVPTX] Some nvvm.read.ptx.sreg intrinsics should have IntrInaccessibleMemOnly attribute.
These intrinsics may return different values every time they are called
and should not be CSE'd. IntrInaccessibleMemOnly appears to be the right
attribute to model this behavior.
Differential Revision: https://reviews.llvm.org/D57259
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@352256
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Craig Topper [Sat, 26 Jan 2019 00:26:37 +0000 (00:26 +0000)]
[SelectionDAG][X86] Don't use SEXTLOAD for promoting masked loads in the type legalizer
Summary:
I'm not sure why we were using SEXTLOAD. EXTLOAD seems more appropriate since we don't care about the upper bits.
This patch changes this and then modifies the X86 post legalization combine to emit a extending shuffle instead of a sign_extend_vector_inreg. Could maybe use an any_extend_vector_inreg, but I just did what we already do in LowerLoad. I think we can actually get rid of this code entirely if we switch to -x86-experimental-vector-widening-legalization.
On AVX512 targets I think we might be able to use a masked vpmovzx and not have to expand this at all.
Reviewers: RKSimon, spatel
Reviewed By: RKSimon
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D57186
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@352255
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Hans Wennborg [Fri, 25 Jan 2019 22:45:17 +0000 (22:45 +0000)]
Build LLVM-C.dll by default on windows and enable in release package
With the fixes to the building of LLVM-C.dll in D56781 this should now
be safe to land. This will greatly simplify dealing with LLVM for people
that just want to use the C API on windows. This is a follow up from
D35077.
Patch by Jakob Bornecrantz!
Differential revision: https://reviews.llvm.org/D56774
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@352250
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Alexey Lapshin [Fri, 25 Jan 2019 21:59:53 +0000 (21:59 +0000)]
[NFC] Test commit : fix typo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@352248
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Alex Bradbury [Fri, 25 Jan 2019 21:55:48 +0000 (21:55 +0000)]
[RISCV] Add target DAG combine for bitcast fabs/fneg on RV32FD
DAGCombiner::visitBITCAST will perform:
fold (bitconvert (fneg x)) -> (xor (bitconvert x), signbit)
fold (bitconvert (fabs x)) -> (and (bitconvert x), (not signbit))
As shown in double-bitmanip-dagcombines.ll, this can be advantageous. But
RV32FD doesn't use bitcast directly (as i64 isn't a legal type), and instead
uses RISCVISD::SplitF64. This patch adds an equivalent DAG combine for
SplitF64.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@352247
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Mircea Trofin [Fri, 25 Jan 2019 21:49:54 +0000 (21:49 +0000)]
[llvm] Opt-in flag for X86DiscriminateMemOps
Summary:
Currently, if an instruction with a memory operand has no debug information,
X86DiscriminateMemOps will generate one based on the first line of the
enclosing function, or the last seen debug info.
This may cause confusion in certain debugging scenarios. The long term
approach would be to use the line number '0' in such cases, however, that
brings in challenges: the base discriminator value range is limited
(4096 values).
For the short term, adding an opt-in flag for this feature.
See bug 40319 (https://bugs.llvm.org/show_bug.cgi?id=40319)
Reviewers: dblaikie, jmorse, gbedwell
Reviewed By: dblaikie
Subscribers: aprantl, eraman, hiraditya
Differential Revision: https://reviews.llvm.org/D57257
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@352246
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Jessica Paquette [Fri, 25 Jan 2019 21:28:27 +0000 (21:28 +0000)]
[GlobalISel][AArch64][NFC] Fix incorrect comment in selectUnmergeValues
s/scalar/vector/
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@352243
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Alina Sbirlea [Fri, 25 Jan 2019 21:12:08 +0000 (21:12 +0000)]
Revert rL352238.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@352241
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Alex Bradbury [Fri, 25 Jan 2019 21:06:47 +0000 (21:06 +0000)]
[RISCV] Add another potential combine to {double,float}-bitmanip-dagcombines.ll
(fcopysign a, (fneg b)) will be expanded to bitwise operations by
DAGTypeLegalizer::SoftenFloatRes_FCOPYSIGN if the floating point type isn't
legal. Arguably it might be worth doing a combine even if it is legal.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@352240
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Alina Sbirlea [Fri, 25 Jan 2019 20:51:55 +0000 (20:51 +0000)]
[WarnMissedTransforms] Set default to 1.
Summary:
Set default value for retrieved attributes to 1, since the check is against 1.
Eliminates the warning noise generated when the attributes are not present.
Reviewers: sanjoy
Subscribers: jlebar, llvm-commits
Differential Revision: https://reviews.llvm.org/D57253
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@352238
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Ana Pazos [Fri, 25 Jan 2019 20:22:49 +0000 (20:22 +0000)]
Reapply: [RISCV] Set isAsCheapAsAMove for ADDI, ORI, XORI, LUI
This reapplies commit r352010 with RISC-V test fixes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@352237
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Guozhi Wei [Fri, 25 Jan 2019 19:45:13 +0000 (19:45 +0000)]
[MBP] Don't move bottom block before header if it can't reduce taken branches
If bottom of block BB has only one successor OldTop, in most cases it is profitable to move it before OldTop, except the following case:
-->OldTop<-
| . |
| . |
| . |
---Pred |
| |
BB-----
Move BB before OldTop can't reduce the number of taken branches, this patch detects this case and prevent the moving.
Differential Revision: https://reviews.llvm.org/D57067
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@352236
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Craig Topper [Fri, 25 Jan 2019 18:37:36 +0000 (18:37 +0000)]
[X86] Combine masked store and truncate into masked truncating stores.
We also need to combine to masked truncating with saturation stores, but I'm leaving that for a future patch.
This does regress some tests that used truncate wtih saturation followed by a masked store. Those now use a truncating store and use min/max to saturate.
Differential Revision: https://reviews.llvm.org/D57218
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@352230
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Vedant Kumar [Fri, 25 Jan 2019 18:30:37 +0000 (18:30 +0000)]
[HotColdSplit] Introduce a cost model to control splitting behavior
The main goal of the model is to avoid *increasing* function size, as
that would eradicate any memory locality benefits from splitting. This
happens when:
- There are too many inputs or outputs to the cold region. Argument
materialization and reloads of outputs have a cost.
- The cold region has too many distinct exit blocks, causing a large
switch to be formed in the caller.
- The code size cost of the split code is less than the cost of a
set-up call.
A secondary goal is to prevent excessive overall binary size growth.
With the cost model in place, I experimented to find a splitting
threshold that works well in practice. To make warm & cold code easily
separable for analysis purposes, I moved split functions to a "cold"
section. I experimented with thresholds between [0, 4] and set the
default to the threshold which minimized geomean __text size.
Experiment data from building LNT+externals for X86 (N = 639 programs,
all sizes in bytes):
| Configuration | __text geom size | __cold geom size | TEXT geom size |
| **-Os** | 1736.3 | 0, n=0 | 10961.6 |
| -Os, thresh=0 | 1740.53 | 124.482, n=134 | 11014 |
| -Os, thresh=1 | 1734.79 | 57.8781, n=90 | 10978.6 |
| -Os, thresh=2 | ** 1733.85 ** | 65.6604, n=61 | 10977.6 |
| -Os, thresh=3 | 1733.85 | 65.3071, n=61 | 10977.6 |
| -Os, thresh=4 | 1735.08 | 67.5156, n=54 | 10965.7 |
| **-Oz** | 1554.4 | 0, n=0 | 10153 |
| -Oz, thresh=2 | ** 1552.2 ** | 65.633, n=61 | 10176 |
| **-O3** | 2563.37 | 0, n=0 | 13105.4 |
| -O3, thresh=2 | ** 2559.49 ** | 71.1072, n=61 | 13162.4 |
Picking thresh=2 reduces the geomean __text section size by 0.14% at
-Os, -Oz, and -O3 and causes ~0.2% growth in the TEXT segment. Note that
TEXT size is page-aligned, whereas section sizes are byte-aligned.
Experiment data from building LNT+externals for ARM64 (N = 558 programs,
all sizes in bytes):
| Configuration | __text geom size | __cold geom size | TEXT geom size |
| **-Os** | 1763.96 | 0, n=0 | 42934.9 |
| -Os, thresh=2 | ** 1760.9 ** | 76.6755, n=61 | 42934.9 |
Picking thresh=2 reduces the geomean __text section size by 0.17% at
-Os and causes no growth in the TEXT segment.
Measurements were done with D57082 (r352080) applied.
Differential Revision: https://reviews.llvm.org/D57125
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@352228
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Vedant Kumar [Fri, 25 Jan 2019 18:30:22 +0000 (18:30 +0000)]
[MC] Teach the MachO object writer about N_FUNC_COLD
N_FUNC_COLD is a new MachO symbol attribute. It's a hint to the linker
to order a symbol towards the end of its section, to improve locality.
Example:
```
void a1() {}
__attribute__((cold)) void a2() {}
void a3() {}
int main() {
a1();
a2();
a3();
return 0;
}
```
A linker that supports N_FUNC_COLD will order _a2 to the end of the text
section. From `nm -njU` output, we see:
```
_a1
_a3
_main
_a2
```
Differential Revision: https://reviews.llvm.org/D57190
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@352227
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Florian Hahn [Fri, 25 Jan 2019 17:48:31 +0000 (17:48 +0000)]
[opt-viewer] Add javascript to expand/hide full message for multiline remarks.
This patch adds support for displaying remarks with multiple
lines. For such remarks, it creates a hidden div
containing the message's lines except the first one in a <pre>
tag. It also prepends a link (with '+' as text) to the regular remark
line. This link can be used to show/hide the div containing the
full remark.
In combination with D57159, this allows for better displaying of
multiline remarks in the html pages generated by opt-viewer.
The Javascript is very simple and should be supported by any recent
major browser.
Reviewers: hfinkel, anemet, thegameg, serge-sans-paille
Reviewed By: anemet
Differential Revision: https://reviews.llvm.org/D57167
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@352223
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Sanjay Patel [Fri, 25 Jan 2019 17:00:41 +0000 (17:00 +0000)]
[x86] simplify logic in lowerShuffleWithUndefHalf(); NFCI
This seems unnecessarily complicated because we gave names to
opposite polarity bools and have code comments that don't really
line up with the logic.
Step 1: remove UndefUpper and assert that it is the opposite of
UndefLower after the initial early exit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@352217
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Florian Hahn [Fri, 25 Jan 2019 16:59:06 +0000 (16:59 +0000)]
[DiagnosticInfo] Add support for preserving newlines in remark arguments.
This patch adds a new type StringBlockVal which can be used to emit a
YAML block scalar, which preserves newlines in a multiline string. It
also updates MappingTraits<DiagnosticInfoOptimizationBase::Argument> to
use it for argument values with more than a single newline.
This is helpful for remarks that want to display more in-depth
information in a more structured way.
Reviewers: thegameg, anemet
Reviewed By: anemet
Subscribers: hfinkel, hiraditya, llvm-commits
Differential Revision: https://reviews.llvm.org/D57159
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@352216
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Tom Weaver [Fri, 25 Jan 2019 16:29:35 +0000 (16:29 +0000)]
[TEST][COMMIT] - fix comment typo in AsmPrinter/DwarfDebug.cpp - NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@352214
91177308-0d34-0410-b5e6-
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Javed Absar [Fri, 25 Jan 2019 16:17:57 +0000 (16:17 +0000)]
[TblGen][NFC] Fix documentation formatting
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@352212
91177308-0d34-0410-b5e6-
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Alex Bradbury [Fri, 25 Jan 2019 16:04:04 +0000 (16:04 +0000)]
[RISCV][NFC] s/f32/f64 in double-arith.ll
The intrinsic names erroneously used the .f32 variant. As the return and
argument types were still double the intrinsics calls worked properly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@352211
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Simon Pilgrim [Fri, 25 Jan 2019 15:58:28 +0000 (15:58 +0000)]
[X86] Simplify X86ISD::ADD/SUB if we don't use the result flag
Simplify to the generic ISD::ADD/SUB if we don't make use of the result flag.
This mainly helps with ADDCARRY/SUBBORROW intrinsics which get expanded to X86ISD::ADD/SUB but could be simplified further.
Noticed in some of the test cases in PR31754
Differential Revision: https://reviews.llvm.org/D57234
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@352210
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Sanjay Patel [Fri, 25 Jan 2019 15:37:42 +0000 (15:37 +0000)]
[x86] narrow a shuffle that doesn't use or set any high elements
This isn't the final fix for our reduction/horizontal codegen, but it takes care
of a lot of the problems. After we narrow the shuffle, existing combines for
insert/extract and binops kick in, and we end up with cheaper 128-bit ops.
The avg and mul reduction tests show an existing shuffle lowering hole for
AVX2/AVX512. I think in its most minimal form this is:
https://bugs.llvm.org/show_bug.cgi?id=40434
...but we might need multiple fixes to get it right.
Differential Revision: https://reviews.llvm.org/D57156
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@352209
91177308-0d34-0410-b5e6-
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