OSDN Git Service
Oliver Stannard [Wed, 16 Dec 2015 11:35:44 +0000 (11:35 +0000)]
[ARM] Add ARMv8.2-A FP16 scalar instructions
ARMv8.2-A adds 16-bit floating point versions of all existing VFP
floating-point instructions. This is an optional extension, so all of
these instructions require the FeatureFullFP16 subtarget feature.
The assembly for these instructions uses S registers (AArch32 does not
have H registers), but the instructions have ".f16" type specifiers
rather than ".f32" or ".f64". The top 16 bits of each source register
are ignored, and the top 16 bits of the destination register are set to
zero.
These instructions are mostly the same as the 32- and 64-bit versions,
but they use coprocessor 9 rather than 10 and 11.
Two new instructions, VMOVX and VINS, have been added to allow packing
and extracting two 16-bit floats stored in the top and bottom halves of
an S register.
New fixup kinds have been added for the PC-relative load and store
instructions, but no ELF relocations have been added as they have a
range of 512 bytes.
Differential Revision: http://reviews.llvm.org/D15038
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255762
91177308-0d34-0410-b5e6-
96231b3b80d8
Michael Kuperstein [Wed, 16 Dec 2015 11:22:37 +0000 (11:22 +0000)]
[X86] Improve shift combining
This folds (ashr (shl a, [56,48,32,24,16]), SarConst)
into (shl, (sext (a), [56,48,32,24,16] - SarConst))
or into (lshr, (sext (a), SarConst - [56,48,32,24,16]))
depending on sign of (SarConst - [56,48,32,24,16])
sexts in X86 are MOVs.
The MOVs have the same code size as above SHIFTs (only SHIFT by 1 has lower code size).
However the MOVs have 2 advantages to SHIFTs on x86:
1. MOVs can write to a register that differs from source.
2. MOVs accept memory operands.
This fixes PR24373.
Patch by: evgeny.v.stupachenko@intel.com
Differential Revision: http://reviews.llvm.org/D13161
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255761
91177308-0d34-0410-b5e6-
96231b3b80d8
Keno Fischer [Wed, 16 Dec 2015 11:13:23 +0000 (11:13 +0000)]
[SectionMemoryManager] Make better use of virtual memory
Summary: On Windows, the allocation granularity can be significantly
larger than a page (64K), so with many small objects, just clearing
the FreeMem list rapidly leaks quite a bit of virtual memory space
(if not rss). Fix that by only removing those parts of the FreeMem
blocks that overlap pages for which we are applying memory permissions,
rather than dropping the FreeMem blocks entirely.
Reviewers: lhames
Subscribers: llvm-commits
Differential Revision: http://reviews.llvm.org/D15202
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255760
91177308-0d34-0410-b5e6-
96231b3b80d8
Vikram TV [Wed, 16 Dec 2015 11:09:48 +0000 (11:09 +0000)]
Recommit LiveDebugValues pass after fixing a couple of minor issues.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255759
91177308-0d34-0410-b5e6-
96231b3b80d8
Chen Li [Wed, 16 Dec 2015 06:27:09 +0000 (06:27 +0000)]
Remove FileCheck from test case token_landingpad.ll.
The test case only needs to make sure it does not crash LLVM.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255755
91177308-0d34-0410-b5e6-
96231b3b80d8
Cong Hou [Wed, 16 Dec 2015 06:03:30 +0000 (06:03 +0000)]
Minor change to TailDuplication.cpp to turn on normalization when removing successor
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255752
91177308-0d34-0410-b5e6-
96231b3b80d8
George Burgess IV [Wed, 16 Dec 2015 05:21:02 +0000 (05:21 +0000)]
Minor cleanup of Attribute code. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255751
91177308-0d34-0410-b5e6-
96231b3b80d8
Chen Li [Wed, 16 Dec 2015 05:05:18 +0000 (05:05 +0000)]
Fixed test case in rL255749: [SelectionDAGBuilder] Adds support for landingpads of token type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255750
91177308-0d34-0410-b5e6-
96231b3b80d8
Chen Li [Wed, 16 Dec 2015 04:48:42 +0000 (04:48 +0000)]
[SelectionDAGBuilder] Adds support for landingpads of token type
Summary: This patch adds a check in visitLandingPad to see if landingpad's result type is token type. If so, do not create DAG nodes for its exception pointer and selector value. This patch enables the back end to handle landingpads of token type.
Reviewers: JosephTremoulet, majnemer, rnk
Subscribers: sanjoy, llvm-commits
Differential Revision: http://reviews.llvm.org/D15405
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255749
91177308-0d34-0410-b5e6-
96231b3b80d8
Peter Collingbourne [Wed, 16 Dec 2015 02:14:57 +0000 (02:14 +0000)]
Fuzzer: Fix library dependencies.
Newer versions of libstdc++ (4.9+), as well as libc++, depend directly on
libpthread from the standard library headers, so libfuzzer needs to declare
a standard library dependency.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255745
91177308-0d34-0410-b5e6-
96231b3b80d8
Philip Reames [Wed, 16 Dec 2015 01:24:05 +0000 (01:24 +0000)]
Speculative fix for windows build
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255743
91177308-0d34-0410-b5e6-
96231b3b80d8
Philip Reames [Wed, 16 Dec 2015 01:01:30 +0000 (01:01 +0000)]
[EarlyCSE] DSE of stores which write back loaded values
Extend EarlyCSE with an additional style of dead store elimination. If we write back a value just read from that memory location, we can eliminate the store under the assumption that the value hasn't changed.
I'm implementing this mostly because I noticed the omission when looking at the code. It seemed strange to have InstCombine have a peephole which was more powerful than EarlyCSE. :)
Differential Revision: http://reviews.llvm.org/D15397
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255739
91177308-0d34-0410-b5e6-
96231b3b80d8
Philip Reames [Wed, 16 Dec 2015 00:49:36 +0000 (00:49 +0000)]
[IR] Add support for floating pointer atomic loads and stores
This patch allows atomic loads and stores of floating point to be specified in the IR and adds an adapter to allow them to be lowered via existing backend support for bitcast-to-equivalent-integer idiom.
Previously, the only way to specify a atomic float operation was to bitcast the pointer to a i32, load the value as an i32, then bitcast to a float. At it's most basic, this patch simply moves this expansion step to the point we start lowering to the backend.
This patch does not add canonicalization rules to convert the bitcast idioms to the appropriate atomic loads. I plan to do that in the future, but for now, let's simply add the support. I'd like to get instruction selection working through at least one backend (x86-64) without the bitcast conversion before canonicalizing into this form.
Similarly, I haven't yet added the target hooks to opt out of the lowering step I added to AtomicExpand. I figured it would more sense to add those once at least one backend (x86) was ready to actually opt out.
As you can see from the included tests, the generated code quality is not great. I plan on submitting some patches to fix this, but help from others along that line would be very welcome. I'm not super familiar with the backend and my ramp up time may be material.
Differential Revision: http://reviews.llvm.org/D15471
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255737
91177308-0d34-0410-b5e6-
96231b3b80d8
Mike Aizatsky [Wed, 16 Dec 2015 00:31:48 +0000 (00:31 +0000)]
[sancov] blacklist support.
Summary:
Using the blacklist the user can filter own unwanted functions
from all outputs. By default blacklist contains "fun:__sancov*" line.
Differential Revision: http://reviews.llvm.org/D15364
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255732
91177308-0d34-0410-b5e6-
96231b3b80d8
Justin Bogner [Wed, 16 Dec 2015 00:17:34 +0000 (00:17 +0000)]
Fix typo in r255720
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255724
91177308-0d34-0410-b5e6-
96231b3b80d8
Wolfgang Pieb [Wed, 16 Dec 2015 00:08:18 +0000 (00:08 +0000)]
Test commit: fixed spelling error in comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255721
91177308-0d34-0410-b5e6-
96231b3b80d8
Justin Bogner [Wed, 16 Dec 2015 00:01:02 +0000 (00:01 +0000)]
LPM: Simplify how passes mark loops for deletion. NFC
When a pass removes a loop it currently has to reach up into the
LPPassManager's internals to update the state of the iteration over
loops. This reverse dependency results in a pretty awkward interplay
of the LPPassManager and its Passes.
Here, we change this to instead keep track of when a loop has become
"unlooped" in the Loop objects themselves, then the LPPassManager can
check this and manipulate its own state directly. This opens the door
to allow most of the loop passes to work without a backreference to
the LPPassManager.
I've kept passes calling the LPPassManager::deleteLoopFromQueue API
now so I could put an assert in to prove that this is NFC, but a later
pass will update passes just to preserve the LoopInfo directly and
stop referencing the LPPassManager completely.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255720
91177308-0d34-0410-b5e6-
96231b3b80d8
Richard Trieu [Tue, 15 Dec 2015 23:47:17 +0000 (23:47 +0000)]
Remove one of the void casts used to suppress unused variable warning.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255709
91177308-0d34-0410-b5e6-
96231b3b80d8
Peter Collingbourne [Tue, 15 Dec 2015 23:46:21 +0000 (23:46 +0000)]
Un-XFAIL JIT EH tests under [am]san.
These tests started passing after libcxxabi's r255559, which fixed a problem
relating to how libcxxabi links its EH library. The test failures were
caused by an issue with libc++, not the sanitizers (confirmed by building a
pre-r255559 revision with libc++/libc++abi and without sanitizers), so they
should never have been XFAILed under the sanitizers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255708
91177308-0d34-0410-b5e6-
96231b3b80d8
Reid Kleckner [Tue, 15 Dec 2015 23:40:58 +0000 (23:40 +0000)]
[WinEH] Make llvm.x86.seh.recoverfp work on x64
It adjusts from RSP-after-prologue to RBP, which is what SEH filters
need to do before they can use llvm.localrecover.
Fixes SEH filter captures, which were broken in r250088.
Issue reported by Alex Crichton.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255707
91177308-0d34-0410-b5e6-
96231b3b80d8
Evgeniy Stepanov [Tue, 15 Dec 2015 23:30:29 +0000 (23:30 +0000)]
Suppress unused variable warning in the no-asserts build.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255706
91177308-0d34-0410-b5e6-
96231b3b80d8
Richard Trieu [Tue, 15 Dec 2015 23:25:34 +0000 (23:25 +0000)]
Cast variable to void to resolve unused variable warning in non-asserts builds.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255704
91177308-0d34-0410-b5e6-
96231b3b80d8
Hans Wennborg [Tue, 15 Dec 2015 23:21:46 +0000 (23:21 +0000)]
Fix "Not having LAHF/SAHF" assert.
It wants to assert that the subtarget is 64-bit, not the register.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255703
91177308-0d34-0410-b5e6-
96231b3b80d8
Tom Stellard [Tue, 15 Dec 2015 23:15:25 +0000 (23:15 +0000)]
AMDGPU/SI: Set the code object work group segment size when targeting HSA
Reviewers: arsenm
Subscribers: arsenm, llvm-commits
Differential Revision: http://reviews.llvm.org/D15493
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255702
91177308-0d34-0410-b5e6-
96231b3b80d8
Davide Italiano [Tue, 15 Dec 2015 23:14:21 +0000 (23:14 +0000)]
[llvm-objdump/MachODump] Shrink code a little bit. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255701
91177308-0d34-0410-b5e6-
96231b3b80d8
Sanjay Patel [Tue, 15 Dec 2015 23:11:43 +0000 (23:11 +0000)]
[x86] inline calls to fmaxf / llvm.maxnum.f32 using maxss (PR24475)
This patch improves on the suggested codegen from PR24475:
https://llvm.org/bugs/show_bug.cgi?id=24475
but only for the fmaxf() case to start, so we can sort out any bugs before
extending to fmin, f64, and vectors.
The fmax / maxnum definitions provide us flexibility for signed zeros, so the
only thing we have to worry about in this replacement sequence is NaN handling.
Note 1: It may be better to implement this as lowerFMAXNUM(), but that exposes
a problem: SelectionDAGBuilder::visitSelect() transforms compare/select
instructions into FMAXNUM nodes if we declare FMAXNUM legal or custom. Perhaps
that should be checking for NaN inputs or global unsafe-math before transforming?
As it stands, that bypasses a big set of optimizations that the x86 backend
already has in PerformSELECTCombine().
Note 2: The v2f32 test reveals another bug; the vector is extended to v4f32, so
we have completely unnecessary operations happening on undef elements of the
vector.
Differential Revision: http://reviews.llvm.org/D15294
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255700
91177308-0d34-0410-b5e6-
96231b3b80d8
James Y Knight [Tue, 15 Dec 2015 23:07:16 +0000 (23:07 +0000)]
[Sparc] Tweak r255668: Use llvm_unreachable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255698
91177308-0d34-0410-b5e6-
96231b3b80d8
Evgeniy Stepanov [Tue, 15 Dec 2015 23:00:08 +0000 (23:00 +0000)]
Cross-DSO control flow integrity (LLVM part).
An LTO pass that generates a __cfi_check() function that validates a
call based on a hash of the call-site-known type and the target
pointer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255693
91177308-0d34-0410-b5e6-
96231b3b80d8
Tom Stellard [Tue, 15 Dec 2015 22:55:30 +0000 (22:55 +0000)]
AMDGPU/SI: Set the code objects private segment size when targeting HSA.
Summary: I'm not sure how things worked before without this.
Reviewers: arsenm
Subscribers: arsenm, llvm-commits
Differential Revision: http://reviews.llvm.org/D15492
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255692
91177308-0d34-0410-b5e6-
96231b3b80d8
Cong Hou [Tue, 15 Dec 2015 22:45:09 +0000 (22:45 +0000)]
[LoopVectorizer] Refine loop vectorizer's register usage calculator by ignoring specific instructions.
(This is the third attempt to check in this patch, and the first two are r255454
and r255460. The once failed test file reg-usage.ll is now moved to
test/Transform/LoopVectorize/X86 directory with target datalayout and target
triple indicated.)
LoopVectorizationCostModel::calculateRegisterUsage() is used to estimate the
register usage for specific VFs. However, it takes into account many
instructions that won't be vectorized, such as induction variables,
GetElementPtr instruction, etc.. This makes the loop vectorizer too conservative
when choosing VF. In this patch, the induction variables that won't be
vectorized plus GetElementPtr instruction will be added to ValuesToIgnore set
so that their register usage won't be considered any more.
Differential revision: http://reviews.llvm.org/D15177
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255691
91177308-0d34-0410-b5e6-
96231b3b80d8
Tom Stellard [Tue, 15 Dec 2015 22:39:36 +0000 (22:39 +0000)]
AMDGPU/SI: Emit constant variables in the .hsatext section when targeting HSA
Reviewers: arsenm
Subscribers: arsenm, llvm-commits
Differential Revision: http://reviews.llvm.org/D15426
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255689
91177308-0d34-0410-b5e6-
96231b3b80d8
Reid Kleckner [Tue, 15 Dec 2015 22:10:30 +0000 (22:10 +0000)]
Wrap include of <future> in some warning suppression pragmas
Eventually we may need to sink this include to the .cpp file or
something to suport LLVM_ENABLE_THREADS=OFF, but this solves my
immediate problem of fixing the build.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255682
91177308-0d34-0410-b5e6-
96231b3b80d8
Dan Gohman [Tue, 15 Dec 2015 22:01:29 +0000 (22:01 +0000)]
[WebAssembly] Implement instruction selection for constant offsets in addresses.
Add instruction patterns for matching load and store instructions with constant
offsets in addresses. The code is fairly redundant due to the need to replicate
everything between imm, tglobaldadr, and texternalsym, but this appears to be
common tablegen practice. The main alternative appears to be to introduce
matching functions with C++ code, but sticking with purely generated matchers
seems better for now.
Also note that this doesn't yet support offsets from getelementptr, which will
be the most common case; that will depend on a change in target-independent code
in order to set the NoUnsignedWrap flag, which I'll submit separately. Until
then, the testcase uses ptrtoint+add+inttoptr with a nuw on the add.
Also implement isLegalAddressingMode with an approximation of this.
Differential Revision: http://reviews.llvm.org/D15538
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255681
91177308-0d34-0410-b5e6-
96231b3b80d8
Xinliang David Li [Tue, 15 Dec 2015 21:57:08 +0000 (21:57 +0000)]
Initialize all bytes in vp data (msan error)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255680
91177308-0d34-0410-b5e6-
96231b3b80d8
Eric Christopher [Tue, 15 Dec 2015 21:50:27 +0000 (21:50 +0000)]
Add support for the .debug_macro section of the forthcoming DWARF 5 spec.
Patch by B. Sivachandra Reddy!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255679
91177308-0d34-0410-b5e6-
96231b3b80d8
Reid Kleckner [Tue, 15 Dec 2015 21:41:58 +0000 (21:41 +0000)]
Fix clang-cl self-host with MSVC 2013 STL std::bind implementation
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255678
91177308-0d34-0410-b5e6-
96231b3b80d8
Reid Kleckner [Tue, 15 Dec 2015 21:41:34 +0000 (21:41 +0000)]
[WinEH] Remove unused intrinsic llvm.x86.seh.restoreframe
We can clean this up now that we have the X86 CATCHRET instruction to
restore the FP, SP, and BP.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255677
91177308-0d34-0410-b5e6-
96231b3b80d8
David Majnemer [Tue, 15 Dec 2015 21:27:27 +0000 (21:27 +0000)]
[WinEH] Use operand bundles to describe call sites
SimplifyCFG allows tail merging with code which terminates in
unreachable which, in turn, makes it possible for an invoke to end up in
a funclet which it was not originally part of.
Using operand bundles on invokes allows us to determine whether or not
an invoke was part of a funclet in the source program.
Furthermore, it allows us to unambiguously answer questions about the
legality of inlining into call sites which the personality may have
trouble with.
Differential Revision: http://reviews.llvm.org/D15517
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255674
91177308-0d34-0410-b5e6-
96231b3b80d8
Xinliang David Li [Tue, 15 Dec 2015 21:15:06 +0000 (21:15 +0000)]
Test cleanup -- remove duplicate run lines
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255673
91177308-0d34-0410-b5e6-
96231b3b80d8
Tom Stellard [Tue, 15 Dec 2015 20:55:55 +0000 (20:55 +0000)]
AMDGPU/SI: Select constant loads with non-uniform addresses to MUBUF instructions
Summary:
We were previously selecting all constant loads to SMRD instructions and legalizing
the SMRDs with non-uniform addresses during the SIFixSGPRCopesPass.
This new solution is more simple and also generates much better code, because
the instruction selector is able to take advantage of all the MUBUF addressing
modes that are legalization pass wasn't able to.
We also no longer need to generate v_add_* instructions when we
have a uniform pointer and a non-uniform offset, as this is now folded into the
MUBUF instruction during instruction selection.
Reviewers: arsenm
Subscribers: arsenm, llvm-commits
Differential Revision: http://reviews.llvm.org/D15425
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255672
91177308-0d34-0410-b5e6-
96231b3b80d8
Alex Denisov [Tue, 15 Dec 2015 20:50:29 +0000 (20:50 +0000)]
LLVM tutorial: fix broken links/anchors
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255671
91177308-0d34-0410-b5e6-
96231b3b80d8
Xinliang David Li [Tue, 15 Dec 2015 19:44:45 +0000 (19:44 +0000)]
Coverage code refactoring /NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255670
91177308-0d34-0410-b5e6-
96231b3b80d8
Justin Bogner [Tue, 15 Dec 2015 19:40:57 +0000 (19:40 +0000)]
LPM: Stop threading `Pass *` through all of the loop utility APIs. NFC
A large number of loop utility functions take a `Pass *` and reach
into it to find out which analyses to preserve. There are a number of
problems with this:
- The APIs have access to pretty well any Pass state they want, so
it's hard to tell what they may or may not do.
- Other APIs have copied these and pass around a `Pass *` even though
they don't even use it. Some of these just hand a nullptr to the API
since the callers don't even have a pass available.
- Passes in the new pass manager don't work like the current ones, so
the APIs can't be used as is there.
Instead, we should explicitly thread the analysis results that we
actually care about through these APIs. This is both simpler and more
reusable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255669
91177308-0d34-0410-b5e6-
96231b3b80d8
James Y Knight [Tue, 15 Dec 2015 19:23:12 +0000 (19:23 +0000)]
[Sparc] Fix handling of double incoming arguments on sparc little-endian.
On SparcV8, doubles get passed in two 32-bit integer registers. The call
code was already handling endianness correctly, but the incoming
argument code was not -- it got the two halves in opposite order.
Also remove some dead code in LowerFormalArguments_32 to handle
less-than-32bit values, which can't actually happen.
Finally, add some test cases for the 32-bit calling convention, cribbed
from the 64abi.ll test, and run for both big and little-endian.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255668
91177308-0d34-0410-b5e6-
96231b3b80d8
Akira Hatanaka [Tue, 15 Dec 2015 19:11:48 +0000 (19:11 +0000)]
[Docs] Fix Unexpected indentation errors.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255665
91177308-0d34-0410-b5e6-
96231b3b80d8
Michael Kuperstein [Tue, 15 Dec 2015 18:50:32 +0000 (18:50 +0000)]
[X86] MOVPC32r should only emit CFI adjustments when needed
We only want to emit CFI adjustments when actually using DWARF.
This fixes PR25828.
Differential Revision: http://reviews.llvm.org/D15522
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255664
91177308-0d34-0410-b5e6-
96231b3b80d8
Tom Stellard [Tue, 15 Dec 2015 18:04:38 +0000 (18:04 +0000)]
AMDGPU/SI: Implement AMDGPUTargetTransformInfo::isSourceOfDivergence()
Reviewers: arsenm
Subscribers: arsenm, llvm-commits
Differential Revision: http://reviews.llvm.org/D15476
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255661
91177308-0d34-0410-b5e6-
96231b3b80d8
Sanjay Patel [Tue, 15 Dec 2015 17:38:29 +0000 (17:38 +0000)]
[SimplifyCFG] allow speculation of exactly one expensive instruction (PR24818)
This is the last general step to allow more IR-level speculation with a safety harness in place in CodeGenPrepare.
The intent is to restore the behavior enabled by:
http://reviews.llvm.org/rL228826
but prevent bad performance such as:
https://llvm.org/bugs/show_bug.cgi?id=24818
Earlier patches in this sequence:
D12882 (disable SimplifyCFG speculation for expensive instructions)
D13297 (have CGP despeculate expensive ops)
D14630 (have CGP despeculate special versions of cttz/ctlz)
As shown in the test cases, we only have two instructions currently affected: ctz for some x86 and fdiv generally.
Allowing exactly one expensive instruction is a bit of a hack, but it lines up with what is currently implemented
in CGP. If we make the despeculation more general in CGP, we can make the speculation here more liberal.
A follow-up patch will adjust the cost for sqrt and possibly other typically expensive math intrinsics (currently
everything is cheap by default). GPU targets would likely want to override those expensive default costs (just as
they probably should already override the cost of div/rem) because just about any math is cheaper than control-flow
on those targets.
Differential Revision: http://reviews.llvm.org/D15213
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255660
91177308-0d34-0410-b5e6-
96231b3b80d8
Nathan Slingerland [Tue, 15 Dec 2015 17:37:09 +0000 (17:37 +0000)]
[llvm-profdata] Add support for weighted merge of profile data (2nd try)
Summary:
This change adds support for specifying a weight when merging profile data with the llvm-profdata tool.
Weights are specified by using the --weighted-input=<weight>,<filename> option. Input files not specified
with this option (normal positional list after options) are given a default weight of 1.
Adding support for arbitrary weighting of input profile data allows for relative importance to be placed on the
input data from multiple training runs.
Both sampled and instrumented profiles are supported.
Reviewers: davidxl, dnovillo, bogner, silvas
Subscribers: silvas, davidxl, llvm-commits
Differential Revision: http://reviews.llvm.org/D15306
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255659
91177308-0d34-0410-b5e6-
96231b3b80d8
Nicolai Hahnle [Tue, 15 Dec 2015 17:24:15 +0000 (17:24 +0000)]
AMDGPU: mark ldexp LibCalls as unavailable
Summary:
The LibCallSimplifier will turn llvm.exp2.* intrinsics into ldexp* libcalls
which do not make sense with the AMDGPU backend.
In the long run, we'll want an llvm.ldexp.* intrinsic to properly make use of
this optimization, but this works around the problem for now.
See also: http://reviews.llvm.org/D14327 (suggested llvm.ldexp.* implementation)
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=92709
Reviewers: arsenm, tstellarAMD
Differential Revision: http://reviews.llvm.org/D14990
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255658
91177308-0d34-0410-b5e6-
96231b3b80d8
Tom Stellard [Tue, 15 Dec 2015 17:11:17 +0000 (17:11 +0000)]
AMDGPU/SI: Fix bitcast between v2f32 and f64
The radeonsi fp64 support can hit these now that some redundant bitcasts
are folded.
Patch by: Michel Dänzer
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255657
91177308-0d34-0410-b5e6-
96231b3b80d8
Hans Wennborg [Tue, 15 Dec 2015 17:10:28 +0000 (17:10 +0000)]
[X86] Smaller code for materializing 32-bit 1 and -1 constants
"movl $-1, %eax" is 5 bytes, "xorl %eax, %eax; decl %eax" is 3 bytes.
This commit makes LLVM use the latter when optimizing for size.
Differential Revision: http://reviews.llvm.org/D14971
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255656
91177308-0d34-0410-b5e6-
96231b3b80d8
JF Bastien [Tue, 15 Dec 2015 17:07:07 +0000 (17:07 +0000)]
WebAssembly: update expected torture test failures
We now have 252 expected failures.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255654
91177308-0d34-0410-b5e6-
96231b3b80d8
Krzysztof Parzyszek [Tue, 15 Dec 2015 17:05:45 +0000 (17:05 +0000)]
[Hexagon] Preprocess mapped instructions before lowering to MC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255653
91177308-0d34-0410-b5e6-
96231b3b80d8
Tom Stellard [Tue, 15 Dec 2015 17:02:52 +0000 (17:02 +0000)]
AMDGPU/SI: Add llvm.amdgcn.mbcnt.* intrinsics
Summary:
These are meant to be used instead of the llvm.SI.tid intrinsic which will
be deprecated at some point.
Reviewers: arsenm
Subscribers: arsenm, llvm-commits
Differential Revision: http://reviews.llvm.org/D15475
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255652
91177308-0d34-0410-b5e6-
96231b3b80d8
Tom Stellard [Tue, 15 Dec 2015 17:02:49 +0000 (17:02 +0000)]
AMDGPU/SI: Add llvm.amdgcn.v.interp.p[12] intrinsics
Summary:
These are meant to be used instead of the llvm.SI.fs.interp intrinsic which
will be deprecated at some point.
Reviewers: arsenm
Subscribers: arsenm, llvm-commits
Differential Revision: http://reviews.llvm.org/D15474
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255651
91177308-0d34-0410-b5e6-
96231b3b80d8
Tom Stellard [Tue, 15 Dec 2015 16:26:16 +0000 (16:26 +0000)]
AMDGPU/SI: Add getShaderType() function to Utils/
Reviewers: arsenm
Subscribers: arsenm, llvm-commits
Differential Revision: http://reviews.llvm.org/D15424
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255650
91177308-0d34-0410-b5e6-
96231b3b80d8
Nemanja Ivanovic [Tue, 15 Dec 2015 14:50:34 +0000 (14:50 +0000)]
Bitcasts between FP and INT values using direct moves
This patch corresponds to review:
http://reviews.llvm.org/D15286
This patch was meant to land in revision 255246, but I accidentally uploaded
the patch that corresponds to http://reviews.llvm.org/D15372 in that revision
accidentally.
Thereby, this patch is the actual Bitcasts using direct moves patch, whereas
http://reviews.llvm.org/rL255246 actually corresponds to
http://reviews.llvm.org/D15372.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255649
91177308-0d34-0410-b5e6-
96231b3b80d8
Asaf Badouh [Tue, 15 Dec 2015 13:35:29 +0000 (13:35 +0000)]
[x86] adding PKU feature flag
the feature flag is essential for RDPKRU and WRPKRU instruction
more about the instruction can be found in the SDM rev 56, vol 2 from http://www.intel.com/sdm
Differential Revision: http://reviews.llvm.org/D15491
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255644
91177308-0d34-0410-b5e6-
96231b3b80d8
Michael Kuperstein [Tue, 15 Dec 2015 12:55:50 +0000 (12:55 +0000)]
Do not try to use i8 and i16 versions of FP_TO_U/SINT soft float library calls
It appears that neither compiler-rt nor the gnu soft-float libraries actually
implement these conversions. Instead of emitting calls to library functions
that don't exist, handle it similarly to the way we handle i8 -> float and
i16 -> float conversions: call the i32 library function, and adjust the type.
Differential Revision: http://reviews.llvm.org/D15151
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255643
91177308-0d34-0410-b5e6-
96231b3b80d8
Nemanja Ivanovic [Tue, 15 Dec 2015 12:19:34 +0000 (12:19 +0000)]
Define a feature for __float128 support in the PPC back end
This patch corresponds to review:
http://reviews.llvm.org/D15117
In preparation for supporting IEEE Quad precision floating point,
this patch simply defines a feature to specify the target supports this.
For now, nothing is done with the target feature, we just don't want
warnings from the Clang FE when a user specifies -mfloat128.
Calling convention and other related work will add to this patch in
the near future.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255642
91177308-0d34-0410-b5e6-
96231b3b80d8
Cong Hou [Tue, 15 Dec 2015 10:10:40 +0000 (10:10 +0000)]
Improve the successor list update in TailDuplication.cpp.
This patch improves a temporary fix in r255530 so that we can normalize
successor list without trigger assertion failures in tail duplication pass.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255638
91177308-0d34-0410-b5e6-
96231b3b80d8
NAKAMURA Takumi [Tue, 15 Dec 2015 09:37:31 +0000 (09:37 +0000)]
InstCombineLoadStoreAlloca.cpp: Avoid instantiating Twine.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255637
91177308-0d34-0410-b5e6-
96231b3b80d8
James Molloy [Tue, 15 Dec 2015 09:24:01 +0000 (09:24 +0000)]
[PassManagerBuilder] Add a few more scalar optimization passes
This patch does two things:
1. mem2reg is now run immediately after globalopt. Now that globalopt
can localize variables more aggressively, it makes sense to lower
them to SSA form earlier rather than later so they can benefit from
the full set of optimization passes.
2. More scalar optimizations are run after the loop optimizations in
LTO mode. The loop optimizations (especially indvars) can clean up
scalar code sufficiently to make it worthwhile running more scalar
passes. I've particularly added SCCP here as it isn't run anywhere
else in the LTO pass pipeline.
Mem2reg is super cheap and shouldn't affect compilation time at all. The
rest of the added passes are in the LTO pipeline only so doesn't affect
the vast majority of compilations, just the link step.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255634
91177308-0d34-0410-b5e6-
96231b3b80d8
Mehdi Amini [Tue, 15 Dec 2015 09:10:28 +0000 (09:10 +0000)]
Mark ThreadPool unittests as unsupported on PowerPC64
Bots are crashing unexpectingly, see: https://llvm.org/bugs/show_bug.cgi?id=25829
From: Mehdi Amini <mehdi.amini@apple.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255633
91177308-0d34-0410-b5e6-
96231b3b80d8
Mehdi Amini [Tue, 15 Dec 2015 09:10:25 +0000 (09:10 +0000)]
ThreadPool unittest: add a rough mechanism to mark UNSUPPORTED on a given platform
From: Mehdi Amini <mehdi.amini@apple.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255632
91177308-0d34-0410-b5e6-
96231b3b80d8
Elena Demikhovsky [Tue, 15 Dec 2015 08:40:41 +0000 (08:40 +0000)]
Type legalizer for masked gather and scatter intrinsics.
Full type legalizer that works with all vectors length - from 2 to 16, (i32, i64, float, double).
This intrinsic, for example
void @llvm.masked.scatter.v2f32(<2 x float>%data , <2 x float*>%ptrs , i32 align , <2 x i1>%mask )
requires type widening for data and type promotion for mask.
Differential Revision: http://reviews.llvm.org/D13633
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255629
91177308-0d34-0410-b5e6-
96231b3b80d8
Craig Topper [Tue, 15 Dec 2015 06:11:36 +0000 (06:11 +0000)]
[IR] Add classof for GetElementPtrConstantExpr, CompareConstantExpr, InsertValueConstantExpr, and ExtractValueConstantExpr. All but CompareConstantExpr were being used in casts that were erroneously using ConstantExpr::classof due to inheritance. While there use cast<CompareConstantExpr> to simplify code slightly.
I believe in one place we were always casting to ExtractValueConstantExpr when we were trying to choose between ExtractValueConstantExpr and InsertValueConstantExpr because of this. But since they have identical layouts this didn't cause any observable problems.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255624
91177308-0d34-0410-b5e6-
96231b3b80d8
Craig Topper [Tue, 15 Dec 2015 06:11:33 +0000 (06:11 +0000)]
Use CmpInst::Predicate instead of 'unsigned short' in some places. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255623
91177308-0d34-0410-b5e6-
96231b3b80d8
Mehdi Amini [Tue, 15 Dec 2015 05:53:41 +0000 (05:53 +0000)]
Fix MSVC build with LLVM_ENABLE_THREADS=OFF
Follow-up to the ThreadPool implementation.
From: Mehdi Amini <mehdi.amini@apple.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255621
91177308-0d34-0410-b5e6-
96231b3b80d8
Justin Bogner [Tue, 15 Dec 2015 05:52:13 +0000 (05:52 +0000)]
LoopUtils: Remove defaults for arguments that are always specified. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255620
91177308-0d34-0410-b5e6-
96231b3b80d8
Cong Hou [Tue, 15 Dec 2015 05:25:27 +0000 (05:25 +0000)]
Replace the unit test of BranchProbability::normalizeEdgeWeights() with BranchProbability::normalizeProbabilities().
BranchProbability::normalizeEdgeWeights() is going to be retired soon.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255618
91177308-0d34-0410-b5e6-
96231b3b80d8
Teresa Johnson [Tue, 15 Dec 2015 04:44:02 +0000 (04:44 +0000)]
Fix template parameter pack handling in ThreadPool
Fixes passing of template parameter pack via std::forward and add
unittest.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255617
91177308-0d34-0410-b5e6-
96231b3b80d8
Weiming Zhao [Tue, 15 Dec 2015 04:42:49 +0000 (04:42 +0000)]
Bump up MAX_SUBTARGET_FEATURES
Summary:
Currently, ARMGenSubtargetInfo (from ARM.td) is reaching the limit of 96:
enum : uint64_t {
...
XScale = 95
};
We need to bump the maximum value up to accommodate future changes and/or customized subtarget definitions.
Reviewers: apazos, t.p.northover
Subscribers: llvm-commits, aemerson
Differential Revision: http://reviews.llvm.org/D15514
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255616
91177308-0d34-0410-b5e6-
96231b3b80d8
Vaivaswatha Nagaraj [Tue, 15 Dec 2015 04:41:10 +0000 (04:41 +0000)]
NFC: Fix typo in comment
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255615
91177308-0d34-0410-b5e6-
96231b3b80d8
Quentin Colombet [Tue, 15 Dec 2015 03:28:11 +0000 (03:28 +0000)]
[ShrinkWrapping] Do not choose restore point inside loops.
The post-dominance property is not sufficient to guarantee that a restore point
inside a loop is safe.
E.g.,
while(1) {
Save
Restore
if (...)
break;
use/def CSRs
}
All the uses/defs of CSRs are dominated by Save and post-dominated
by Restore. However, the CSRs uses are still reachable after
Restore and before Save are executed.
This fixes PR25824
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255613
91177308-0d34-0410-b5e6-
96231b3b80d8
Dan Gohman [Tue, 15 Dec 2015 03:21:48 +0000 (03:21 +0000)]
[WebAssembly] Use an immediate OperandType for offset operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255612
91177308-0d34-0410-b5e6-
96231b3b80d8
Nico Weber [Tue, 15 Dec 2015 03:14:19 +0000 (03:14 +0000)]
Try to let r255604 have an effect.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255611
91177308-0d34-0410-b5e6-
96231b3b80d8
Mehdi Amini [Tue, 15 Dec 2015 02:32:03 +0000 (02:32 +0000)]
Add specific header for MSVC to be able to build with LLVM_ENABLE_THREADS=OFF
Follow-up to the ThreadPool library
From: Mehdi Amini <mehdi.amini@apple.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255604
91177308-0d34-0410-b5e6-
96231b3b80d8
Dan Gohman [Tue, 15 Dec 2015 02:20:44 +0000 (02:20 +0000)]
[WebAssembly] Remove .import printing.
For now, LLVM doesn't know about wasm module imports, so it shouldn't
emit .import directives.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255602
91177308-0d34-0410-b5e6-
96231b3b80d8
JF Bastien [Tue, 15 Dec 2015 02:02:51 +0000 (02:02 +0000)]
WebAssembly: test global array indexing
This case was tested in the linker from code, but not from globals indexing into other globals. The linker currently barfs on this, ncbray volunteered to fix it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255601
91177308-0d34-0410-b5e6-
96231b3b80d8
Mehdi Amini [Tue, 15 Dec 2015 01:44:07 +0000 (01:44 +0000)]
Instcombine: destructor loads of structs that do not contains padding
For non padded structs, we can just proceed and deaggregate them.
We don't want ot do this when there is padding in the struct as to not
lose information about this padding (the subsequents passes would then
try hard to preserve the padding, which is undesirable).
Also update extractvalue.ll and cast.ll so that they use structs with padding.
Remove the FIXME in the extractvalue of laod case as the non padded case is
handled when processing the load, and we don't want to do it on the padded
case.
Patch by: Amaury SECHET <deadalnix@gmail.com>
Differential Revision: http://reviews.llvm.org/D14483
From: Mehdi Amini <mehdi.amini@apple.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255600
91177308-0d34-0410-b5e6-
96231b3b80d8
Reid Kleckner [Tue, 15 Dec 2015 01:23:55 +0000 (01:23 +0000)]
[llvm-readobj] s/FunctionName/LinkageName/ for codeview dumping
The symbol being printed in this field comes from the main symbol table,
not 0xF1 subsection. Use LinkageName to make that a lot clearer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255596
91177308-0d34-0410-b5e6-
96231b3b80d8
Cong Hou [Tue, 15 Dec 2015 01:21:14 +0000 (01:21 +0000)]
Let operator/ with uint32_t rhs operand be a member of BranchProbability and add a new operator /=. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255595
91177308-0d34-0410-b5e6-
96231b3b80d8
Mehdi Amini [Tue, 15 Dec 2015 00:59:19 +0000 (00:59 +0000)]
Add a C++11 ThreadPool implementation in LLVM
This is a very simple implementation of a thread pool using C++11
thread. It accepts any std::function<void()> for asynchronous
execution. Individual task can be synchronize using the returned
future, or the client can block on the full queue completion.
In case LLVM is configured with Threading disabled, it falls back
to sequential execution using std::async with launch:deferred.
This is intended to support parallelism for ThinLTO processing in
linker plugin, but is generic enough for any other uses.
This is a recommit of r255444 ; trying to workaround a bug in the
MSVC 2013 standard library. I think I was hit by:
http://connect.microsoft.com/VisualStudio/feedbackdetail/view/791185/std-packaged-task-t-where-t-is-void-or-a-reference-class-are-not-movable
Recommit of r255589, trying to please g++ as well.
Differential Revision: http://reviews.llvm.org/D15464
From: mehdi_amini <mehdi_amini@
91177308-0d34-0410-b5e6-
96231b3b80d8>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255593
91177308-0d34-0410-b5e6-
96231b3b80d8
Mehdi Amini [Tue, 15 Dec 2015 00:42:44 +0000 (00:42 +0000)]
Revert "Add a C++11 ThreadPool implementation in LLVM"
This reverts commit r255589. Breaks g++
From: Mehdi Amini <mehdi.amini@apple.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255591
91177308-0d34-0410-b5e6-
96231b3b80d8
Mehdi Amini [Tue, 15 Dec 2015 00:38:05 +0000 (00:38 +0000)]
Add a C++11 ThreadPool implementation in LLVM
This is a very simple implementation of a thread pool using C++11
thread. It accepts any std::function<void()> for asynchronous
execution. Individual task can be synchronize using the returned
future, or the client can block on the full queue completion.
In case LLVM is configured with Threading disabled, it falls back
to sequential execution using std::async with launch:deferred.
This is intended to support parallelism for ThinLTO processing in
linker plugin, but is generic enough for any other uses.
This is a recommit of r255444 ; trying to workaround a bug in the
MSVC 2013 standard library. I think I was hit by:
http://connect.microsoft.com/VisualStudio/feedbackdetail/view/791185/std-packaged-task-t-where-t-is-void-or-a-reference-class-are-not-movable
Differential Revision: http://reviews.llvm.org/D15464
From: Mehdi Amini <mehdi.amini@apple.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255589
91177308-0d34-0410-b5e6-
96231b3b80d8
Xinliang David Li [Tue, 15 Dec 2015 00:32:56 +0000 (00:32 +0000)]
[PGO] make profile prefix even shorter and more readable
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255586
91177308-0d34-0410-b5e6-
96231b3b80d8
Quentin Colombet [Tue, 15 Dec 2015 00:09:23 +0000 (00:09 +0000)]
[X86] Add relaxtion logic for SBB instructions.
Prior to this patch, we would wrongly stick to the variant with imm8 encoding
even when the relocation could not fit that size.
rdar://problem/
23785506
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255583
91177308-0d34-0410-b5e6-
96231b3b80d8
Mike Aizatsky [Mon, 14 Dec 2015 23:55:04 +0000 (23:55 +0000)]
sancov: coverage can be reported by multiple functions.
Differential Revision: http://reviews.llvm.org/D15430
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255582
91177308-0d34-0410-b5e6-
96231b3b80d8
Rafael Espindola [Mon, 14 Dec 2015 23:39:05 +0000 (23:39 +0000)]
Yet another missing include.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255579
91177308-0d34-0410-b5e6-
96231b3b80d8
Rafael Espindola [Mon, 14 Dec 2015 23:34:35 +0000 (23:34 +0000)]
A better attempt to add a missing include
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255578
91177308-0d34-0410-b5e6-
96231b3b80d8
Rafael Espindola [Mon, 14 Dec 2015 23:31:08 +0000 (23:31 +0000)]
Trying to fix the build in a bot.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255577
91177308-0d34-0410-b5e6-
96231b3b80d8
Xinliang David Li [Mon, 14 Dec 2015 23:26:27 +0000 (23:26 +0000)]
[PGO] Shorten profile symbol prefixes
Profile symbols have long prefixes which waste space and creating pressure for linker.
This patch shortens the prefixes to minimal length without losing verbosity.
Differential Revision: http://reviews.llvm.org/D15503
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255575
91177308-0d34-0410-b5e6-
96231b3b80d8
Justin Bogner [Mon, 14 Dec 2015 23:22:48 +0000 (23:22 +0000)]
LoopRotate: Convert the methods of LoopRotate to utility functions. NFC
This moves the actual work to do loop rotation into standalone
functions with the analysis results they need passed in as arguments,
leaving the class itself as a relatively simple shim. This will make
the functions easy to reuse when we're ready to port this
transformation to the new pass manager.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255574
91177308-0d34-0410-b5e6-
96231b3b80d8
Justin Bogner [Mon, 14 Dec 2015 23:22:44 +0000 (23:22 +0000)]
LoopRotate: Reorder some method implementations. NFC
This just moves some callers after their callees. My next patch will
convert some of these methods to stand alone functions, and that diff
is more obviously NFC if I move these first. That change, in turn,
will make it much easier to port this pass to the new pass manager
once the loop pass manager is in place.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255573
91177308-0d34-0410-b5e6-
96231b3b80d8
Rafael Espindola [Mon, 14 Dec 2015 23:17:03 +0000 (23:17 +0000)]
Use diagnostic handler in the LLVMContext
This patch converts code that has access to a LLVMContext to not take a
diagnostic handler.
This has a few advantages
* It is easier to use a consistent diagnostic handler in a single program.
* Less clutter since we are not passing a handler around.
It does make it a bit awkward to implement some C APIs that return a
diagnostic string. I will propose new versions of these APIs and
deprecate the current ones.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255571
91177308-0d34-0410-b5e6-
96231b3b80d8
Quentin Colombet [Mon, 14 Dec 2015 23:12:40 +0000 (23:12 +0000)]
[X86] Add relaxtion logic for ADC instructions.
Prior to this patch, we would wrongly stick to the variant with imm8 encoding
even when the relocation could not fit that size.
rdar://problem/
23785506
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255570
91177308-0d34-0410-b5e6-
96231b3b80d8
Pete Cooper [Mon, 14 Dec 2015 23:10:52 +0000 (23:10 +0000)]
Factor out some duplication. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255569
91177308-0d34-0410-b5e6-
96231b3b80d8
Dan Gohman [Mon, 14 Dec 2015 22:56:51 +0000 (22:56 +0000)]
[WebAssembly] Add type prefixes to call instructions
Add return type information to call and call_indirect instructions. This
allows them to be disambiguated without knowledge of the callee.
Differential Revision: http://reviews.llvm.org/D15484
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255565
91177308-0d34-0410-b5e6-
96231b3b80d8