OSDN Git Service
Simon Pilgrim [Sun, 10 Feb 2019 22:45:48 +0000 (22:45 +0000)]
[X86] EltsFromConsecutiveLoads - replace SmallBitVector with APInt (NFC).
Minor refactor to simplify some incoming patches to improve broadcast loads.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353655
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Mandeep Singh Grang [Sun, 10 Feb 2019 19:53:43 +0000 (19:53 +0000)]
[GlobalISel] Regex the opcodes in unit test to fix non-deterministic ordering
Differential Revision: https://reviews.llvm.org/D57988
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353652
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Nikita Popov [Sun, 10 Feb 2019 19:06:38 +0000 (19:06 +0000)]
[CodeGen][X86] Don't scalarize vector saturating add/sub
Now that we have vector support for [US](ADD|SUB)O we no longer
need to scalarize when expanding [US](ADD|SUB)SAT.
This matches what the cost model already does.
Differential Revision: https://reviews.llvm.org/D57348
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353651
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Simon Pilgrim [Sun, 10 Feb 2019 18:27:37 +0000 (18:27 +0000)]
[AArch64] Regenerate bswap tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353648
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Simon Pilgrim [Sun, 10 Feb 2019 18:07:03 +0000 (18:07 +0000)]
[X86] Add basic bitreverse/bswap combine tests
Shows missing SimplifyDemandedBits support
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353647
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Simon Pilgrim [Sun, 10 Feb 2019 17:42:15 +0000 (17:42 +0000)]
[DAG] Add optional AllowUndefs to isNullOrNullSplat
No change in default behaviour (AllowUndefs = false)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353646
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Simon Pilgrim [Sun, 10 Feb 2019 17:04:00 +0000 (17:04 +0000)]
[DAGCombine] Simplify funnel shifts with undef/zero args to bitshifts
Now that we have SimplifyDemandedBits support for funnel shifts (rL353539), we need to simplify funnel shifts back to bitshifts in cases where either argument has been folded to undef/zero.
Differential Revision: https://reviews.llvm.org/D58009
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353645
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Simon Pilgrim [Sun, 10 Feb 2019 15:46:32 +0000 (15:46 +0000)]
[X86] Add masked variable tests for funnel undef/zero argument combines
I've avoided 'modulo' masks as we'll SimplifyDemandedBits those in the future, and we just need to check that the shift variable is 'in range'
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353644
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Sanjay Patel [Sun, 10 Feb 2019 15:22:06 +0000 (15:22 +0000)]
[x86] narrow 256-bit horizontal ops via demanded elements
256-bit horizontal math ops are an x86 monstrosity (and thankfully have
not been extended to 512-bit AFAIK).
The two 128-bit halves operate on separate halves of the inputs. So if we
don't demand anything in the upper half of the result, we can extract the
low halves of the inputs, do the math, and then insert that result into a
256-bit output.
All of the extract/insert is free (ymm<-->xmm), so we're left with a
narrower (cheaper) version of the original op.
In the affected tests based on:
https://bugs.llvm.org/show_bug.cgi?id=33758
https://bugs.llvm.org/show_bug.cgi?id=38971
...we see that the h-op narrowing can result in further narrowing of other
math via existing generic transforms.
I originally drafted this patch as an exact pattern match starting from
extract_vector_elt, but I thought we might see diffs starting from
extract_subvector too, so I changed it to a more general demanded elements
solution. There are no extra existing regression test improvements from
that switch though, so we could go back.
Differential Revision: https://reviews.llvm.org/D57841
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353641
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Simon Pilgrim [Sun, 10 Feb 2019 14:54:57 +0000 (14:54 +0000)]
[X86] Add additional tests for funnel undef/zero argument combines
As suggested on D58009
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353640
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Sanjay Patel [Sun, 10 Feb 2019 14:29:57 +0000 (14:29 +0000)]
[TargetLowering] refactor setcc folds to fix another miscompile (PR40657)
SimplifySetCC still has much room for improvement, but this should
fix the remaining problem examples from:
https://bugs.llvm.org/show_bug.cgi?id=40657
The initial fix for this problem was rL353615.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353639
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Simon Pilgrim [Sun, 10 Feb 2019 12:55:44 +0000 (12:55 +0000)]
[X86][SSE] Add SimplifyDemandedBits test for BLENDVPD
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353638
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Fangrui Song [Sun, 10 Feb 2019 09:25:56 +0000 (09:25 +0000)]
[Local] Delete a redundant check. NFC
isInstructionTriviallyDead also performs the use_empty() check.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353637
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George Rimar [Sun, 10 Feb 2019 08:35:38 +0000 (08:35 +0000)]
[yaml2obj] - Fix .dynamic section entries writing for 32bit targets.
This was introduced by me in r353613.
I tried to fix Big-endian bot and replaced
uintX_t -> ELFT::Xword. But ELFT::Xword is a packed<uint64_t>,
so it is always 8 bytes and that was obviously incorrect.
My intention was to use something like packed<uint> actually, which
size is target dependent.
Patch fixes this bug and adds a test case, since no bots seems reported this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353636
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Craig Topper [Sun, 10 Feb 2019 02:34:31 +0000 (02:34 +0000)]
[X86] Move some vector InstAliases out from under unnecessary 'let Predicates'. NFCI
We don't have any assembler predicates for vector ISAs so this isn't necessary. It just adds extra lines and identation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353631
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Craig Topper [Sun, 10 Feb 2019 02:21:29 +0000 (02:21 +0000)]
[InstCombine] Fix an unused variable warning.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353630
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Simon Pilgrim [Sat, 9 Feb 2019 22:21:09 +0000 (22:21 +0000)]
[X86] Add tests for funnel undef argument combines
If one of the shifted arguments is undef we should be folding to a regular shift.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353628
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Simon Pilgrim [Sat, 9 Feb 2019 20:34:59 +0000 (20:34 +0000)]
[X86] CombineOr - fold to generic funnel shifts
As discussed on D57389, this is a first step towards moving the SHLD/SHRD matching code to DAGCombiner using FSHL/FSHR instead.
There's a bit of work to do before I can do that, so this just folds to FSHL/FSHR in the existing code (handling the different SHRD/FSHR argument ordering), which fixes the issue we had with i16 shift amounts not being correctly masked.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353626
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Sanjay Patel [Sat, 9 Feb 2019 20:06:11 +0000 (20:06 +0000)]
[x86] add another test for setcc miscompile (PR40657); NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353625
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Nico Weber [Sat, 9 Feb 2019 17:58:16 +0000 (17:58 +0000)]
gn build: Merge r353590
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353621
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Nico Weber [Sat, 9 Feb 2019 17:33:04 +0000 (17:33 +0000)]
llvm-lib: Implement /list flag
Differential Revision: https://reviews.llvm.org/D57952
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353620
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Sanjay Patel [Sat, 9 Feb 2019 17:03:59 +0000 (17:03 +0000)]
[TargetLowering] add tests to show effect of setcc sub->shift; NFC
There's effectively no difference for the cases with variables.
We just trade a sub for an add on those. But the case with a
subtract from constant would require an extra move instruction
on x86, so this looks like a reasonable generic combine.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353619
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Sanjay Patel [Sat, 9 Feb 2019 16:41:20 +0000 (16:41 +0000)]
[x86] add test for setcc sub->shift transform; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353618
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Simon Pilgrim [Sat, 9 Feb 2019 16:27:19 +0000 (16:27 +0000)]
[X86] Regenerate test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353616
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Sanjay Patel [Sat, 9 Feb 2019 15:59:02 +0000 (15:59 +0000)]
[TargetLowering] avoid miscompile in setcc transform (PR40657)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353615
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George Rimar [Sat, 9 Feb 2019 15:18:52 +0000 (15:18 +0000)]
[yaml2elf.cpp] - Fix compilation under linux.
Fixes errors like:
/home/ssglocal/clang-cmake-x86_64-sde-avx512-linux/clang-cmake-x86_64-sde-avx512-linux/llvm/tools/yaml2obj/yaml2elf.cpp:597:5: error: need ‘typename’ before ‘ELFT:: Xword’ because ‘ELFT’ is a dependent scope
ELFT::Xword Tag = (ELFT::Xword)DE.Tag;
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353614
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George Rimar [Sat, 9 Feb 2019 15:03:19 +0000 (15:03 +0000)]
[yaml2elf] - An attemp to fix s390x BB after r353607.
s390x is big-endian and seems r353607 had an issue with endianess,
Bot was unhappy:
http://lab.llvm.org:8011/builders/clang-s390x-linux-lnt/builds/11168/steps/ninja%20check%201/logs/stdio
This should fix it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353613
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Nikita Popov [Sat, 9 Feb 2019 13:54:02 +0000 (13:54 +0000)]
Revert "[SelectionDAG] Extract [US]MULO expansion into TL method; NFC"
This reverts commit r353611.
Triggers an assertion during the libcall expansion on ARM.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353612
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Nikita Popov [Sat, 9 Feb 2019 13:29:22 +0000 (13:29 +0000)]
[SelectionDAG] Extract [US]MULO expansion into TL method; NFC
In preparation for supporting vector expansion.
Also drop a variant of ExpandLibCall, of which the MULO expansions
were the only user.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353611
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Simon Pilgrim [Sat, 9 Feb 2019 13:13:59 +0000 (13:13 +0000)]
[X86][SSE] Generalize X86ISD::BLENDI support to more value types
D42042 introduced the ability for the ExecutionDomainFixPass to more easily change between BLENDPD/BLENDPS/PBLENDW as the domains required.
With this ability, we can avoid most bitcasts/scaling in the DAG that was occurring with X86ISD::BLENDI lowering/combining, blend with the vXi32/vXi64 vectors directly and use isel patterns to lower to the float vector equivalent vectors.
This helps the shuffle combining and SimplifyDemandedVectorElts be more aggressive as we lose track of fewer UNDEF elements than when we go up/down through bitcasts.
I've introduced a basic blend(bitcast(x),bitcast(y)) -> bitcast(blend(x,y)) fold, there are more generalizations I can do there (e.g. widening/scaling and handling the tricky v16i16 repeated mask case).
The vector-reduce-smin/smax regressions will be fixed in a future improvement to SimplifyDemandedBits to peek through bitcasts and support X86ISD::BLENDV.
Differential Revision: https://reviews.llvm.org/D57888
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353610
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George Rimar [Sat, 9 Feb 2019 12:14:20 +0000 (12:14 +0000)]
[lib/ObjectYAML] - Fix BB after r353607 [2]. NFC.
The second and the last place it seems.
Error was:
[ 4%] Building CXX object lib/Support/CMakeFiles/LLVMSupport.dir/Error.cpp.o
/Users/buildslave/as-bldslv9_new/lld-x86_64-darwin13/llvm.src/lib/ObjectYAML/ELFYAML.cpp:993:15: error: unused variable 'Object' [-Werror,-Wunused-variable]
const auto *Object = static_cast<ELFYAML::Object *>(IO.getContext());
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353609
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George Rimar [Sat, 9 Feb 2019 12:04:39 +0000 (12:04 +0000)]
[lib/ObjectYAML] - Fix BB after r353607. NFC.
Error was:
[ 4%] Building CXX object lib/Support/CMakeFiles/LLVMSupport.dir/DAGDeltaAlgorithm.cpp.o
/Users/buildslave/as-bldslv9_new/lld-x86_64-darwin13/llvm.src/lib/ObjectYAML/ELFYAML.cpp:666:15: error: unused variable 'Object' [-Werror,-Wunused-variable]
const auto *Object = static_cast<ELFYAML::Object *>(IO.getContext());
(http://lab.llvm.org:8011/builders/lld-x86_64-darwin13/builds/29920)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353608
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George Rimar [Sat, 9 Feb 2019 11:34:28 +0000 (11:34 +0000)]
[yaml2obj][obj2yaml] - Add support for dumping/parsing .dynamic sections.
This teaches the tools to parse and dump
the .dynamic section and its dynamic tags.
Differential revision: https://reviews.llvm.org/D57691
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353606
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Fangrui Song [Sat, 9 Feb 2019 09:18:37 +0000 (09:18 +0000)]
[GlobalOpt] Simplify __cxa_atexit elimination
cxxDtorIsEmpty checks callers recursively to determine if the
__cxa_atexit-registered function is empty, and eliminates the
__cxa_atexit call accordingly.
This recursive check is unnecessary as redundant instructions and
function calls can be removed by early-cse and inliner. In addition,
cxxDtorIsEmpty does not mark visited function and it may visit a
function exponential times (multiplication principle).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353603
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Petr Hosek [Sat, 9 Feb 2019 03:06:56 +0000 (03:06 +0000)]
[CMake] Don't set <PROJECT>_STANDALONE_BUILD
We shouldn't be treating runtimes builds as standalone builds since
we have enough of the context loaded into the runtimes environment.
Differential Revision: https://reviews.llvm.org/D57992
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353601
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Hubert Tong [Sat, 9 Feb 2019 02:11:51 +0000 (02:11 +0000)]
[MC] Clean up unused inline function and non-anchor defaulted destructors; NFCI
Summary:
Take care of some missing clean-ups that belong with r249548 and some
other copy/paste that had happened. In particular, the destructors are
no longer vtable anchors after r249548; and `setSectionName` in
`MCSectionWasm` is private and unused since r313058 culled its only
caller. The destructors are now implicitly defined, and the unused
function is removed.
Reviewers: nemanjai, jasonliu, grosbach
Reviewed By: nemanjai
Subscribers: sbc100, aheejin, sunfish, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D57182
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353597
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Gabor Buella [Sat, 9 Feb 2019 01:44:28 +0000 (01:44 +0000)]
Extra processing for BitCast + PHI in InstCombine
For some specific cases with bitcast A->B->A with intervening PHI nodes InstCombiner::optimizeBitCastFromPhi transformation creates extra PHI nodes, which are actually a copy of already created PHI or in another words, they are redundant. These extra PHI nodes could lead to extra move instructions generated after DeSSA transformation. This happens when several conditions are met
- SROA kicks in and creates new alloca;
- there is a simple assignment L = R, which falls under 'canonicalize loads' done by combineLoadToOperationType (this transformation is by default). Exactly this transformation is the reason of bitcasts generated;
- the alloca is then used in A->B->A + PHI chain;
- there is a loop unrolling.
As a result optimizeBitCastFromPhi creates as many of PHI nodes for each new SROA alloca as loop unrolling factor is. These new extra PHI nodes are redundant actually except of one and should not be created. Moreover the idea of optimizeBitCastFromPhi is to get rid of the cast (when possible) but that doesn't happen in these conditions.
The proposed fix is to do the cast replacement for the whole calculated/accumulated PHI closure not for one cast only, which is an argument to the optimizeBitCastFromPhi. These will help to accomplish several things: 1) avoid extra PHI nodes generated as all casts which may trigger optimizeBitCastFromPhi transformation will be replaced, 3) bitcasts will be replaced, and 3) create more opportunities to remove dead code, which appears after the replacement.
A new test case shows that it's possible to get rid of all bitcasts completely and get quite good code reduction.
Author: Igor Tsimbalist <igor.v.tsimbalist@intel.com>
Reviewed By: Carrot
Differential Revision: https://reviews.llvm.org/D57053
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353595
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Stanislav Mekhanoshin [Sat, 9 Feb 2019 01:02:28 +0000 (01:02 +0000)]
[AMDGPU] Split idot4/8 signed and unsigned tests. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353593
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Mikhail R. Gadelha [Sat, 9 Feb 2019 00:46:12 +0000 (00:46 +0000)]
This reverts commit
1440a848a635849b97f7a5cfa0ecc40d37451f5b.
and commit
a1853e834c65751f92521f7481b15cf0365e796b.
They broke arm and aarch64
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353590
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Jessica Paquette [Sat, 9 Feb 2019 00:37:31 +0000 (00:37 +0000)]
Recommit "[GlobalISel] Introduce a generic floating point floor opcode, G_FFLOOR""
After r353586, we won't fail on the AMDGPU floor pattern that was killing the
importer before.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353589
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Stanislav Mekhanoshin [Sat, 9 Feb 2019 00:34:21 +0000 (00:34 +0000)]
[AMDGPU] Split dot-insts feature
Differential Revision: https://reviews.llvm.org/D57971
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353587
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Jessica Paquette [Sat, 9 Feb 2019 00:29:13 +0000 (00:29 +0000)]
[GlobalISel] Skip patterns that define complex suboperands twice instead of dying
If we run into a pattern that looks like this:
add
(complex $x, $y)
(complex $x, $z)
We should skip the pattern instead of asserting/doing something unpredictable.
This makes us return an Error in that case, and adds a testcase for skipped
patterns.
Differential Revision: https://reviews.llvm.org/D57980
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353586
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Nico Weber [Sat, 9 Feb 2019 00:21:06 +0000 (00:21 +0000)]
gn build: Merge r353566
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353585
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Sergey Dmitriev [Fri, 8 Feb 2019 23:52:15 +0000 (23:52 +0000)]
[NFC] Avoid passing blocks vector to the OutlineRegionInfo constructor by value.
Reviewers: vsk, fhahn, davidxl
Reviewed By: vsk
Subscribers: hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D57957
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353582
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Sanjay Patel [Fri, 8 Feb 2019 23:34:57 +0000 (23:34 +0000)]
[x86] add test for miscompiling setcc transform (PR40657); NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353580
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Francis Visoiu Mistrih [Fri, 8 Feb 2019 23:34:11 +0000 (23:34 +0000)]
Re-apply r353553 "[GISel][NFC]: Add missing call to record CSE hits in the CSEMIRBuilder"
With a fix after r353563 that adds some more opcodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353579
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Francis Visoiu Mistrih [Fri, 8 Feb 2019 22:49:43 +0000 (22:49 +0000)]
Revert r353553 "[GISel][NFC]: Add missing call to record CSE hits in the CSEMIRBuilder"
This reverts commit r353553.
This breaks CodeGen/AArch64/GlobalISel/legalize-ext-csedebug-output.mir:
http://green.lab.llvm.org/green/job/clang-stage1-cmake-RA-incremental/57963/console
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353575
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Craig Topper [Fri, 8 Feb 2019 21:09:33 +0000 (21:09 +0000)]
[Docs] Use code-block:: text for part of the callbr documentation to attempt to make the bot happy.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353567
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Craig Topper [Fri, 8 Feb 2019 20:50:09 +0000 (20:50 +0000)]
[X86] Add FPCW as an implicit use on floating point load instructions.
These instructions can generate a stack overflow exception so technically they read the stack overflow exception mask bit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353564
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Craig Topper [Fri, 8 Feb 2019 20:48:56 +0000 (20:48 +0000)]
Implementation of asm-goto support in LLVM
This patch accompanies the RFC posted here:
http://lists.llvm.org/pipermail/llvm-dev/2018-October/127239.html
This patch adds a new CallBr IR instruction to support asm-goto
inline assembly like gcc as used by the linux kernel. This
instruction is both a call instruction and a terminator
instruction with multiple successors. Only inline assembly
usage is supported today.
This also adds a new INLINEASM_BR opcode to SelectionDAG and
MachineIR to represent an INLINEASM block that is also
considered a terminator instruction.
There will likely be more bug fixes and optimizations to follow
this, but we felt it had reached a point where we would like to
switch to an incremental development model.
Patch by Craig Topper, Alexander Ivchenko, Mikhail Dvoretckii
Differential Revision: https://reviews.llvm.org/D53765
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353563
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Vedant Kumar [Fri, 8 Feb 2019 20:48:04 +0000 (20:48 +0000)]
[CodeExtractor] Restore outputs after creating exit stubs
When CodeExtractor saves the result of InvokeInst at the first insertion
point of the 'normal destination' basic block, this block can be omitted
in the outlined region, so store is placed outside of the function. The
suggested solution is to process saving outputs after creating exit
stubs for new function, and stores will be placed in that blocks before
return in this case.
Patch by Sergei Kachkov!
Fixes llvm.org/PR40455.
Differential Revision: https://reviews.llvm.org/D57919
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353562
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Matt Arsenault [Fri, 8 Feb 2019 19:59:39 +0000 (19:59 +0000)]
AMDGPU/GlobalISel: Fix broken tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353559
91177308-0d34-0410-b5e6-
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Matt Arsenault [Fri, 8 Feb 2019 19:59:32 +0000 (19:59 +0000)]
AMDGPU: Eliminate GPU specific SubtargetFeatures
Inline compatability is determined from the individual feature
bits. These are just sets of the separate features, but will always be
treated as incompatible unless they are specifically ignored.
Defining the ISA version number here in tablegen would be nice, but it
turns out this wasn't actually used.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353558
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Nemanja Ivanovic [Fri, 8 Feb 2019 19:50:58 +0000 (19:50 +0000)]
[DAGCombine] Optimize pow(X, 0.75) to sqrt(X) * sqrt(sqrt(X))
The sqrt case is faster and we already do this for the case where
the exponent is 0.25. This adds the 0.75 case which is also not
sensitive to signed zeros.
Patch by Whitney Tsang (Whitney)
Differential revision: https://reviews.llvm.org/D57434
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353557
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Aditya Nandakumar [Fri, 8 Feb 2019 19:41:13 +0000 (19:41 +0000)]
[GISel][NFC]: Add missing call to record CSE hits in the CSEMIRBuilder
https://reviews.llvm.org/D57932
Add some logging + tests to make sure CSEInfo prints debug output.
reviewed by: arsenm
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353553
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Jonathan Metzman [Fri, 8 Feb 2019 19:35:04 +0000 (19:35 +0000)]
Document libFuzzer on Windows.
Summary:
Document that libFuzzer supports Windows, how to get it,
and its limitations.
Reviewers: kcc, morehouse, rnk, metzman
Reviewed By: kcc, rnk, metzman
Subscribers: hans, rnk
Differential Revision: https://reviews.llvm.org/D57597
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353551
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Rong Xu [Fri, 8 Feb 2019 19:31:03 +0000 (19:31 +0000)]
[Cmake] Add an option to build LLVM using the experimental new pass manager
Add LLVM_USE_NEWPM to build LLVM using the experimental new pass manager.
Differential Revision: http://reviews.llvm.org/D57068
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353550
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Matt Arsenault [Fri, 8 Feb 2019 19:18:01 +0000 (19:18 +0000)]
AMDGPU: Remove GCN features and predicates
These are no longer necessary since the R600 tablegen files are split
out now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353548
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Reid Kleckner [Fri, 8 Feb 2019 19:03:50 +0000 (19:03 +0000)]
[InstrProf] Implement static profdata registration
Summary:
The motivating use case is eliminating duplicate profile data registered
for the same inline function in two object files. Before this change,
users would observe multiple symbol definition errors with VC link, but
links with LLD would succeed.
Users (Mozilla) have reported that PGO works well with clang-cl and LLD,
but when using LLD without this static registration, we would get into a
"relocation against a discarded section" situation. I'm not sure what
happens in that situation, but I suspect that duplicate, unused profile
information was retained. If so, this change will reduce the size of
such binaries with LLD.
Now, Windows uses static registration and is in line with all the other
platforms.
Reviewers: davidxl, wmi, inglorion, void, calixte
Subscribers: mgorny, krytarowski, eraman, fedor.sergeev, hiraditya, #sanitizers, dmajor, llvm-commits
Tags: #sanitizers, #llvm
Differential Revision: https://reviews.llvm.org/D57929
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353547
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Simon Pilgrim [Fri, 8 Feb 2019 18:57:38 +0000 (18:57 +0000)]
[TargetLowering] Use ISD::FSHR in expandFixedPointMul
Replace OR(SHL,SRL) pattern with ISD::FSHR (legalization expands this later if necessary) - this helps with the scale == 0 'undefined' drop-through case that was discussed on D55720.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353546
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Jonas Devlieghere [Fri, 8 Feb 2019 18:43:11 +0000 (18:43 +0000)]
[test] Run the verifier for dsymutil module tests
Dsymutil has an option "verify" that runs the dwarf verifier on the
generated dSYM. This patch enables this for the module tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353544
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Simon Pilgrim [Fri, 8 Feb 2019 17:19:01 +0000 (17:19 +0000)]
[TargetLowering] Add SimplifyDemandedBits funnel shift support
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353539
91177308-0d34-0410-b5e6-
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Teresa Johnson [Fri, 8 Feb 2019 17:08:27 +0000 (17:08 +0000)]
ArgumentPromotion should copy all metadata to new Function
Summary:
ArgumentPromotion had code to specifically move the dbg metadata over to
the new function, but other metadata such as the function_entry_count
!prof metadata was not. Replace code that moved dbg metadata with a call
to copyMetadata. The old metadata is automatically removed when the old
Function is removed.
Reviewers: davidxl
Subscribers: llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D57846
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353537
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Craig Topper [Fri, 8 Feb 2019 17:07:54 +0000 (17:07 +0000)]
[X86] Remove isReMaterializable from X87 floating point constant loads and constant pool loads.
Summary: These instructions update FPSW so they aren't generically safe to rematerialize into any location if FPSW is live for a comparison result. They also use FPCW for exception masking control. Though the only exception they can generate is stack overflow and we manage the stack ourselves so that's not really going to occur.
Reviewers: RKSimon, spatel
Reviewed By: RKSimon
Subscribers: llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D57934
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353536
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Simon Pilgrim [Fri, 8 Feb 2019 16:51:16 +0000 (16:51 +0000)]
[X86] Add basic funnel shift demanded bits tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353534
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Sanjay Patel [Fri, 8 Feb 2019 16:48:40 +0000 (16:48 +0000)]
[x86] fix formatting; NFC
(test commit #2 migrating to git)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353533
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Carl Ritson [Fri, 8 Feb 2019 15:41:11 +0000 (15:41 +0000)]
[AMDGPU] Fix CS scratch setup on pre-GCN3 ASICs
Summary:
Prior to GCN3 s_load_dword offsets are in dwords rather than bytes.
Thus the scratch buffer descriptor offset must be adjusted for pre-GCN3 ASICs.
Reviewers: nhaehnle, tpr
Reviewed By: nhaehnle
Subscribers: sheredom, arsenm, kzhuravl, jvesely, wdng, yaxunl, dstuttard, t-tye, jfb, llvm-commits
Differential Revision: https://reviews.llvm.org/D56496
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353530
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Nirav Dave [Fri, 8 Feb 2019 15:21:13 +0000 (15:21 +0000)]
Revert r353416 "[DAG] Cleanup unused nodes on failed store-to-load forward combine."
This cleanup causes out-of-tree crashes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353527
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Matt Arsenault [Fri, 8 Feb 2019 15:06:24 +0000 (15:06 +0000)]
AMDGPU/GlobalISel: Fix shift legalization for non-power-of-2
clampScalar doesn't do anything for non-power-of-2 in range.
There should probably be a combination rule to reduce the number
of matching rules.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353526
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Dmitry Preobrazhensky [Fri, 8 Feb 2019 14:57:37 +0000 (14:57 +0000)]
[AMDGPU][MC] Added support of lds_direct operand
See bug 39293: https://bugs.llvm.org/show_bug.cgi?id=39293
Reviewers: artem.tamazov, rampitec
Differential Revision: https://reviews.llvm.org/D57889
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353524
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Matt Arsenault [Fri, 8 Feb 2019 14:46:27 +0000 (14:46 +0000)]
AMDGPU/GlobalISel: Fix non-power-of-2 implicit_def
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353522
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Eugene Leviant [Fri, 8 Feb 2019 14:37:54 +0000 (14:37 +0000)]
[llvm-objcopy] Add few file processing directives
Differential revision: https://reviews.llvm.org/D57877
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353521
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Petar Avramovic [Fri, 8 Feb 2019 14:27:23 +0000 (14:27 +0000)]
[MIPS GlobalISel] Select any extending load and truncating store
Make behavior of G_LOAD in widenScalar same as for G_ZEXTLOAD and
G_SEXTLOAD. That is perform widenScalarDst to size given by the target
and avoid additional checks in common code. Targets can reorder or add
additional rules in LegalizeRuleSet for the opcode to achieve desired
behavior.
Select extending load that does not have specified type of extension
into zero extending load.
Select truncating store that stores number of bytes indicated by size
in MachineMemoperand.
Differential Revision: https://reviews.llvm.org/D57454
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353520
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Nico Weber [Fri, 8 Feb 2019 14:19:54 +0000 (14:19 +0000)]
gn build: Merge r353471, r353373.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353518
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Matt Arsenault [Fri, 8 Feb 2019 14:16:11 +0000 (14:16 +0000)]
AMDGPU/GlobalISel: Don't use a copy in addrspacecast lowering
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353516
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Dmitry Preobrazhensky [Fri, 8 Feb 2019 13:51:31 +0000 (13:51 +0000)]
[AMDGPU][MC][CODEOBJECT] Added predefined symbols to access GPU minor and stepping numbers
Added the following Code Object v3 symbols:
.amdgcn.gfx_generation_minor
.amdgcn.gfx_generation_stepping
Reviewers: artem.tamazov, kzhuravl
Differential Revision: https://reviews.llvm.org/D57826
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353515
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Valery Pykhtin [Fri, 8 Feb 2019 11:59:48 +0000 (11:59 +0000)]
[AMDGPU] Fix DPP combiner
Differential revision: https://reviews.llvm.org/D55444
dpp move with uses and old reg initializer should be in the same BB.
bound_ctrl:0 is only considered when bank_mask and row_mask are fully enabled (0xF). Otherwise the old register value is checked for identity.
Added add, subrev, and, or instructions to the old folding function.
Kill flag is cleared for the src0 (DPP register) as it may be copied into more than one user.
The pass is still disabled by default.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353513
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Carlos Alberto Enciso [Fri, 8 Feb 2019 10:57:26 +0000 (10:57 +0000)]
[DWARF] LLVM ERROR: Broken function found, while removing Debug Intrinsics.
Check that when SimplifyCFG is flattening a 'br', all their debug intrinsic instructions are removed, including any dbg.label referencing a label associated with the basic blocks being removed.
Differential Revision: https://reviews.llvm.org/D57444
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353511
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Eugene Leviant [Fri, 8 Feb 2019 10:51:08 +0000 (10:51 +0000)]
Attempt to fix build bot after r353509
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353510
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Eugene Leviant [Fri, 8 Feb 2019 10:33:16 +0000 (10:33 +0000)]
[llvm-objcopy] Add --redefine-syms
Differential revision: https://reviews.llvm.org/D57738
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353509
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Hans Wennborg [Fri, 8 Feb 2019 10:16:45 +0000 (10:16 +0000)]
Revert r353424 "[llvm-ar][libObject] Fix relative paths when nesting thin archives."
This broke the Chromium build on Windows, see https://crbug.com/930058
> Summary:
> When adding one thin archive to another, we currently chop off the relative path to the flattened members. For instance, when adding `foo/child.a` (which contains `x.txt`) to `parent.a`, whe
> lattening it we should add it as `foo/x.txt` (which exists) instead of `x.txt` (which does not exist).
>
> As a note, this also undoes the `IsNew` parameter of handling relative paths in r288280. The unit test there still passes.
>
> This was reported as part of testing the kernel build with llvm-ar: https://patchwork.kernel.org/patch/
10767545/ (see the second point).
>
> Reviewers: mstorsjo, pcc, ruiu, davide, david2050
>
> Subscribers: hiraditya, llvm-commits
>
> Tags: #llvm
>
> Differential Revision: https://reviews.llvm.org/D57842
This reverts commit
bf990ab5aab03aa0aac53c9ef47ef264307804ed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353507
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Petar Avramovic [Fri, 8 Feb 2019 10:11:33 +0000 (10:11 +0000)]
[MIPS GlobalISel] Select mul
Legalize and select G_MUL for s32 and smaller types for MIPS32.
Differential Revision: https://reviews.llvm.org/D57816
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353506
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Max Kazantsev [Fri, 8 Feb 2019 08:12:41 +0000 (08:12 +0000)]
[LoopSimplifyCFG] Use DTU.applyUpdates instead of insert/deleteEdge
`insert/deleteEdge` methods in DTU can make updates incorrectly in some cases
(see https://bugs.llvm.org/show_bug.cgi?id=40528), and it is recommended to
use `applyUpdates` methods instead when it is needed to make a mass update in CFG.
Differential Revision: https://reviews.llvm.org/D57316
Reviewed By: kuhar
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353502
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Sam Parker [Fri, 8 Feb 2019 07:57:42 +0000 (07:57 +0000)]
[ARM] Add OptMinSize to ARMSubtarget
In many places in the backend, we like to know whether we're
optimising for code size and this is performed by checking the
current machine function attributes. A subtarget is created on a
per-function basis, so it's possible to know when we're compiling for
code size on construction so record this in the new object.
Differential Revision: https://reviews.llvm.org/D57812
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353501
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Sergey Dmitriev [Fri, 8 Feb 2019 06:55:18 +0000 (06:55 +0000)]
[CodeExtractor] Update function's assumption cache after extracting blocks from it
Summary: Assumption cache's self-updating mechanism does not correctly handle the case when blocks are extracted from the function by the CodeExtractor. As a result function's assumption cache may have stale references to the llvm.assume calls that were moved to the outlined function. This patch fixes this problem by removing extracted llvm.assume calls from the function’s assumption cache.
Reviewers: hfinkel, vsk, fhahn, davidxl, sanjoy
Reviewed By: hfinkel, vsk
Subscribers: llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D57215
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353500
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Heejin Ahn [Fri, 8 Feb 2019 04:06:56 +0000 (04:06 +0000)]
[WebAssembly] Fix parseImmediate's memory alignment requirement
This fixes the current failure in the x86-64 ubsan bot caused by
r353496.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353499
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Aditya Nandakumar [Fri, 8 Feb 2019 03:32:46 +0000 (03:32 +0000)]
[GISel]: While constructing the GISelWorklist make sure we reserve at least the required size to the underlying dense map.
https://reviews.llvm.org/D57931
This should save some unnecessary growing of the DenseMap.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353498
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Matt Arsenault [Fri, 8 Feb 2019 02:40:47 +0000 (02:40 +0000)]
AMDGPU/GlobalISel: Legalize addrspacecast
Use a placeholder constant for now on targets
that need the load from the queue ptr.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353497
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Wouter van Oortmerssen [Fri, 8 Feb 2019 01:43:23 +0000 (01:43 +0000)]
[WebAssembly] Fixed Disassembler ignoring endian swap on big endian.
Summary: This fixes: https://bugs.llvm.org/show_bug.cgi?id=40620
Reviewers: aheejin
Subscribers: dschuff, sbc100, jgravelle-google, sunfish, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D57933
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353496
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Craig Topper [Fri, 8 Feb 2019 01:14:12 +0000 (01:14 +0000)]
Fix the lowering issue of intrinsics llvm.localaddress on X86
Patch by Yuanke Luo
Reviewers: craig.topper, annita.zhang, smaslov, rnk, wxiao3
Reviewed By: rnk
Subscribers: efriedma, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D57501
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353492
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Caroline Tice [Fri, 8 Feb 2019 00:51:33 +0000 (00:51 +0000)]
lvm-dwarfdump: Stop counting out-of-line subprogram in the "inlined functions" statistic.
DW_TAG_subprogram DIEs should not be counted in the inlined function statistic. This also addresses the source variables count, as that uses the inlined function count in its calculations.
Differential revision: https://reviews.llvm.org/D57849
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353491
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Craig Topper [Fri, 8 Feb 2019 00:44:39 +0000 (00:44 +0000)]
[X86] Add FPCW as a register and start using it as an implicit use on floating point instructions.
Summary:
FPCW contains the rounding mode control which we manipulate to implement fp to integer conversion by changing the roudning mode, storing the value to the stack, and then changing the rounding mode back. Because we didn't model FPCW and its dependency chain, other instructions could be scheduled into the middle of the sequence.
This patch introduces the register and adds it as an implciit def of FLDCW and implicit use of the FP binary arithmetic instructions and store instructions. There are more instructions that need to be updated, but this is a good start. I believe this fixes at least the reduced test case from PR40529.
Reviewers: RKSimon, spatel, rnk, efriedma, andrew.w.kaylor
Subscribers: dim, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D57735
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353489
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Eli Friedman [Fri, 8 Feb 2019 00:23:35 +0000 (00:23 +0000)]
[AArch64] Fix condition for "high-vector" DUP optimizations.
AArch64 NEON has a bunch of instructions with a "2" suffix that extract
the top half of the source vectors, instead of the bottom half. We have
some DAGCombines to try to take advantage of that. However, they
assumed that any EXTRACT_VECTOR was extracting the high half of the
vector in question.
This issue has apparently existed since the AArch64 backend was merged.
Fixes https://bugs.llvm.org/show_bug.cgi?id=40632 .
Differential Revision: https://reviews.llvm.org/D57862
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353486
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Petar Jovanovic [Thu, 7 Feb 2019 22:57:33 +0000 (22:57 +0000)]
[mips][micromips] Fix how values in .gcc_except_table are calculated
When a landing pad is calculated in a program that is compiled for micromips
with -fPIC flag, it will point to an even address.
Such an error will cause a segmentation fault, as the instructions in
micromips are aligned on odd addresses. This patch sets the last bit of the
offset where a landing pad is, to 1, which will effectively be an odd
address and point to the instruction exactly.
r344591 fixed this issue for -static compilation.
Patch by Aleksandar Beserminji.
Differential Revision: https://reviews.llvm.org/D57677
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353480
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Sanjay Patel [Thu, 7 Feb 2019 22:36:55 +0000 (22:36 +0000)]
[x86] fix formatting; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353477
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Dan Gohman [Thu, 7 Feb 2019 22:33:50 +0000 (22:33 +0000)]
[WebAssembly] Update test output after rL353474. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353476
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Dan Gohman [Thu, 7 Feb 2019 22:03:32 +0000 (22:03 +0000)]
[WebAssembly] Fix imported function symbol names that differ from their import names in the .o format
Add a flag to allow symbols to have a wasm import name which differs from the
linker symbol name, allowing the linker to link code using the import_module
attribute.
This is the MC/Object portion of the patch.
Differential Revision: https://reviews.llvm.org/D57632
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353474
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Quentin Colombet [Thu, 7 Feb 2019 21:27:23 +0000 (21:27 +0000)]
[InstCombine] Optimize `atomicrmw <op>, 0` into `load atomic` when possible
This commit teaches InstCombine how to replace an atomicrmw operation
into a simple load atomic.
For a given `atomicrmw <op>`, this is possible when:
1. The ordering of that operation is compatible with a load (i.e.,
anything that doesn't have a release semantic).
2. <op> does not modify the value being stored
Differential Revision: https://reviews.llvm.org/D57854
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353471
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Peter Collingbourne [Thu, 7 Feb 2019 21:24:30 +0000 (21:24 +0000)]
gn build: Make check-{clang,lld,llvm} pass on FreeBSD.
Mostly achieved by assuming that anything that isn't Win or Mac is ELF,
which seems reasonable enough for now.
Differential Revision: https://reviews.llvm.org/D57870
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353470
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Florian Hahn [Thu, 7 Feb 2019 21:23:37 +0000 (21:23 +0000)]
[LV] Remove unnecessary assignment to UserIC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353469
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