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Hiroshi Inoue [Tue, 27 Jun 2017 12:43:08 +0000 (12:43 +0000)]
[SelectionDAG] set dereferenceable flag in MergeConsecutiveStores to fix assetion failure
When SelectionDAG merges consecutive stores and loads in MergeConsecutiveStores, it does not set dereferenceable flag for a created load instruction. This results in an assertion failure if SelectionDAG commonizes this load instruction with other load instructions, as well as it may miss optimization opportunities.
This patch sat dereferenceable flag for the newly created load instruction if all the load instructions to be merged are dereferenceable.
Differential Revision: https://reviews.llvm.org/D34679
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306404
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Ayman Musa [Tue, 27 Jun 2017 12:08:37 +0000 (12:08 +0000)]
Recommitting rL305465 after fixing bug in TableGen in rL306251 & rL306371
[X86][AVX512] Improve lowering of AVX512 compare intrinsics (remove redundant shift left+right instructions).
AVX512 compare instructions return v*i1 types.
In cases where the number of elements in the returned value are less than 8, clang adds zeroes to get a mask of v8i1 type.
Later on it's replaced with CONCAT_VECTORS, which then is lowered to many DAG nodes including insert/extract element and shift right/left nodes.
The fact that AVX512 compare instructions put the result in a k register and zeroes all its upper bits allows us to remove the extra nodes simply by copying the result to the required register class.
When lowering, identify these cases and transform them into an INSERT_SUBVECTOR node (marked legal), then catch this pattern in instructions selection phase and transform it into one avx512 cmp instruction.
Differential Revision: https://reviews.llvm.org/D33188
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306402
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Vassil Vassilev [Tue, 27 Jun 2017 11:45:26 +0000 (11:45 +0000)]
Add missing include. Should fix modules libstdc++ builds.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306399
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Hiroshi Inoue [Tue, 27 Jun 2017 10:35:37 +0000 (10:35 +0000)]
fix trivial typos, NFC
succesor -> successor
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306393
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Diana Picus [Tue, 27 Jun 2017 10:29:50 +0000 (10:29 +0000)]
[ARM] GlobalISel: Support G_SELECT for pointers
All we need to do is mark it as legal, otherwise it's just like s32.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306390
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Simon Pilgrim [Tue, 27 Jun 2017 10:13:56 +0000 (10:13 +0000)]
[X86][AVX512] Regenerate avx512 arithmetic tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306389
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Daniel Sanders [Tue, 27 Jun 2017 10:11:39 +0000 (10:11 +0000)]
[globalisel][tablegen] Add support for EXTRACT_SUBREG.
Summary:
After this patch, we finally have test cases that require multiple
instruction emission.
Depends on D33590
Reviewers: ab, qcolombet, t.p.northover, rovka, kristof.beyls
Subscribers: javed.absar, llvm-commits, igorb
Differential Revision: https://reviews.llvm.org/D33596
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306388
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Simon Dardis [Tue, 27 Jun 2017 10:11:11 +0000 (10:11 +0000)]
[mips] Refine the condition for when to use CALL16 vs a GOT displacement.
Borrow from the logic for 'jal' in MipsAsmParser::processInstruction
and add the extra condition of bypassing CALL16 if the destination symbol
is an ELF symbol with STB_LOCAL binding.
Patch by: John Baldwin
Reviewers: sdardis
Differential Revision: https://reviews.llvm.org/D33999
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306387
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Diana Picus [Tue, 27 Jun 2017 09:19:51 +0000 (09:19 +0000)]
[ARM] GlobalISel: Support G_SELECT for i32
* Mark as legal for (s32, i1, s32, s32)
* Map everything into GPRs
* Select to two instructions: a CMP of the condition against 0, to set
the flags, and a MOVCCr to select between the two inputs based on the
flags that we've just set
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306382
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Ayal Zaks [Tue, 27 Jun 2017 08:41:19 +0000 (08:41 +0000)]
Recommitting 306331.
Undoing revert 306338 after fixed bug: add metadata to the load instead of the
reverse shuffle added to it, retaining the original ValueMap implementation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306381
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Hiroshi Inoue [Tue, 27 Jun 2017 08:35:35 +0000 (08:35 +0000)]
[PowerPC] fix incorrect processor name for -mcpu in a test case
to surpress warnings. ppc970 should be 970 (or g5)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306380
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Chandler Carruth [Tue, 27 Jun 2017 08:32:03 +0000 (08:32 +0000)]
[SROA] Fix PR32902 by more carefully propagating !nonnull metadata.
This is based heavily on the work done ni D34285. I mostly wanted to do
test cleanup for the author to save them some time, but I had a really
hard time understanding why it was so hard to write better test cases
for these issues.
The problem is that because SROA does a second rewrite of the loads and
because we *don't* propagate !nonnull for non-pointer loads, we first
introduced invalid !nonnull metadata and then stripped it back off just
in time to avoid most ways of this PR manifesting. Moving to the more
careful utility only fixes this by changing the predicate to look at the
new load's type rather than the target type. However, that *does* fix
the bug, and the utility is much nicer including adding range metadata
to model the nonnull property after a conversion to an integer.
However, we have bigger problems because we don't actually propagate
*range* metadata, and the utility to do this extracted from instcombine
isn't really in good shape to do this currently. It *only* handles the
case of copying range metadata from an integer load to a pointer load.
It doesn't even handle the trivial cases of propagating from one integer
load to another when they are the same width! This utility will need to
be beefed up prior to using in this location to get the metadata to
fully survive.
And even then, we need to go and teach things to turn the range metadata
into an assume the way we do with nonnull so that when we *promote* an
integer we don't lose the information.
All of this will require a new test case that looks kind-of like
`preserve-nonnull.ll` does here but focuses on range metadata. It will
also likely require more testing because it needs to correctly handle
changes to the integer width, especially as SROA actively tries to
change the integer width!
Last but not least, I'm a little worried about hooking the range
metadata up here because the instcombine logic for converting from
a range metadata *to* a nonnull metadata node seems broken in the face
of non-zero address spaces where null is not mapped to the integer `0`.
So that probably needs to get fixed with test cases both in SROA and in
instcombine to cover it.
But this *does* extract the core PR fix from D34285 of preventing the
!nonnull metadata from being propagated in a broken state just long
enough to feed into promotion and crash value tracking.
On D34285 there is some discussion of zero-extend handling because it
isn't necessary. First, the new load size covers all of the non-undef
(ie, possibly initialized) bits. This may even extend past the original
alloca if loading those bits could produce valid data. The only way its
valid for us to zero-extend an integer load in SROA is if the original
code had a zero extend or those bits were undef. And we get to assume
things like undef *never* satifies nonnull, so non undef bits can
participate here. No need to special case the zero-extend handling, it
just falls out correctly.
The original credit goes to Ariel Ben-Yehuda! I'm mostly landing this to
save a few rounds of trivial edits fixing style issues and test case
formulation.
Differental Revision: D34285
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306379
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Vassil Vassilev [Tue, 27 Jun 2017 08:10:28 +0000 (08:10 +0000)]
Add missing forward declaraion.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306376
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Nicolai Haehnle [Tue, 27 Jun 2017 08:04:13 +0000 (08:04 +0000)]
AMDGPU: M0 operands to spill/restore opcodes are dead
Summary:
With scalar stores, M0 is clobbered and therefore marked as implicitly
defined. However, it is also dead.
This fixes an assertion when the Greedy Register Allocator decides to
optimize a spill/restore pair away again (via tryHintsRecoloring).
Reviewers: arsenm
Subscribers: qcolombet, kzhuravl, wdng, yaxunl, dstuttard, tpr, t-tye, llvm-commits
Differential Revision: https://reviews.llvm.org/D33319
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306375
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Ayman Musa [Tue, 27 Jun 2017 07:10:20 +0000 (07:10 +0000)]
[TableGen] Fix bug in TableGen CodeGenPatterns when adding variants of the patterns.
All patterns reside in a std::vector container, where new variants are added to it using the standard library's emplace_back function.
When calling this with a new element while there is no enough allocated space, a bigger space is allocated and all the old info in the small vector is copied to the newly allocated vector, then the old vector is freed.
The problem is that before doing this "copying", we take a reference of one of the elements in the old vector, and after the "copying" we add it to the new vector.
As the old vector is freed after the copying, the reference now does not point to a valid element.
Added new function to the API of CodeGenDAGPatterns class to return the same information as a copy in order to avoid this issue.
This was revealed in rL305465 that added many patterns and forced the reallocation of the vector which caused crashes in windows bots.
Differential Revision: https://reviews.llvm.org/D34341
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306371
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Igor Breger [Tue, 27 Jun 2017 07:01:54 +0000 (07:01 +0000)]
[GlobalISel][X86] Add fp32/62 legalizer, regbank-select, selection tests for G_FADD, G_FSUB, G_FMUL, G_FDIV. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306370
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Galina Kistanova [Tue, 27 Jun 2017 06:58:57 +0000 (06:58 +0000)]
Fixed the warning introduced by r306289 to make ubuntu-gcc7.1-werror bot green.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306369
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Mikael Holmen [Tue, 27 Jun 2017 05:32:13 +0000 (05:32 +0000)]
[Reassociate] Make sure EraseInst sets MadeChange
Summary:
EraseInst didn't report that it made IR changes through MadeChange.
It is essential that changes to the IR are reported correctly,
since for example ReassociatePass::run() will indicate that all
analyses are preserved otherwise.
And the CGPassManager determines if the CallGraph is up-to-date
based on status from InstructionCombiningPass::runOnFunction().
Reviewers: craig.topper, rnk, davide
Reviewed By: rnk, davide
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D34616
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306368
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Hiroshi Inoue [Tue, 27 Jun 2017 04:52:17 +0000 (04:52 +0000)]
[PowerPC] set optimization level in SelectionDAGISel
PowerPC backend does not pass the current optimization level to SelectionDAGISel and so SelectionDAGISel works with the default optimization level regardless of the current optimization level.
This patch makes the PowerPC backend set the optimization level correctly.
Differential Revision: https://reviews.llvm.org/D34615
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306367
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Mandeep Singh Grang [Tue, 27 Jun 2017 04:51:44 +0000 (04:51 +0000)]
[COFF, ARM64] Fix typo in COFF ARM64 Relocation Type
Summary:
Fixed IMAGE_REL_ARM64_PAGEBASE_REL2 ==> IMAGE_REL_ARM64_PAGEBASE_REL21
Refer: http://www.microsoft.com/whdc/system/platform/firmware/PECOFF.mspx
Reviewers: zturner, rnk, ruiu
Reviewed By: ruiu
Subscribers: aemerson, kristof.beyls, llvm-commits
Differential Revision: https://reviews.llvm.org/D34659
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306366
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Craig Topper [Tue, 27 Jun 2017 04:50:47 +0000 (04:50 +0000)]
[InstCombine] Add test cases demonstrating that we don't optmize select+cmp+cttz/ctlz when the bitwidth is larger than 64 bits.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306365
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Leslie Zhai [Tue, 27 Jun 2017 03:29:27 +0000 (03:29 +0000)]
[AVR] Migrate to new MCAsmBackend applyFixup and processFixupValue
Reviewers: rafael, dylanmckay, jroelofs, meadori
Reviewed By: rafael, meadori
Subscribers: meadori, llvm-commits
Differential Revision: https://reviews.llvm.org/D34551
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306359
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Chandler Carruth [Tue, 27 Jun 2017 03:08:45 +0000 (03:08 +0000)]
[SROA] Further test cleanup and add a test for the actual propagation of
the nonnull attribute distinct from rewriting it into an assume.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306358
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Davide Italiano [Tue, 27 Jun 2017 02:43:00 +0000 (02:43 +0000)]
[CFLAA] Move FunctionHandle to llvm::cflaa.
Also, while here, remove an unneeded `using namespace llvm`.
Thanks to George for the suggestion.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306355
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Davide Italiano [Tue, 27 Jun 2017 02:25:06 +0000 (02:25 +0000)]
[CFLAA] Move a common function to the header to reduce duplication.
Differential Revision: https://reviews.llvm.org/D34660
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306354
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Chandler Carruth [Tue, 27 Jun 2017 02:23:15 +0000 (02:23 +0000)]
[SROA] Clean up a test case a bit prior to adding more testing for
nonnull as part of fixing PR32902.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306353
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Matthias Braun [Tue, 27 Jun 2017 00:58:48 +0000 (00:58 +0000)]
ScheduleDAGInstrs: Fix fixupKills() adding too many kill flags.
Remove invalid shortcut in fixupKills(): A register needs to be marked
live even when we are not adding a kill flag. This is because a
partially live register must not get a kill flags, but it still needs to
be fully marked live when walking backwards.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306352
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Davide Italiano [Tue, 27 Jun 2017 00:33:37 +0000 (00:33 +0000)]
[CFLAA] Use raw pointers instead of Optional<Pointer>. NFC.
Using Optional<> here doesn't seem to be terribly valuable, but
this is not the main point of this change. The change enables
us to merge the (now) two identical copies of parentFunctionOfValue()
that Steensgaard's and Andersens' provide.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306351
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Davide Italiano [Mon, 26 Jun 2017 23:59:14 +0000 (23:59 +0000)]
[CFLAA] Change FunctionHandle to be common to Steensgaard's and Andersens'
Differential Revision: https://reviews.llvm.org/D34638
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306348
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Wolfgang Pieb [Mon, 26 Jun 2017 23:05:51 +0000 (23:05 +0000)]
DAGCombine: Make sure we only eliminate trunc/extend when the scales of truncation and extension match.
This fixes PR33368.
Reviewer: rksimon
Differential Revision: https://reviews.llvm.org/D34069
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306345
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Dehao Chen [Mon, 26 Jun 2017 23:05:35 +0000 (23:05 +0000)]
revert r306336 for breaking ppc test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306344
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Eugene Zelenko [Mon, 26 Jun 2017 22:44:03 +0000 (22:44 +0000)]
[CodeGen] Fix some Clang-tidy modernize-use-using and Include What You Use warnings; other minor fixes (NFC).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306341
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Vedant Kumar [Mon, 26 Jun 2017 22:33:06 +0000 (22:33 +0000)]
[Coverage] Improve readability by using a struct. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306340
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Ayal Zaks [Mon, 26 Jun 2017 22:26:54 +0000 (22:26 +0000)]
reverting 306331.
Causes TBAA metadata to be generates on reverse shuffles, investigating.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306338
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Sanjay Patel [Mon, 26 Jun 2017 22:20:07 +0000 (22:20 +0000)]
[x86] add tests for missing sbb transforms; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306337
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Dehao Chen [Mon, 26 Jun 2017 21:41:09 +0000 (21:41 +0000)]
Enable vectorizer-maximize-bandwidth by default.
Summary:
vectorizer-maximize-bandwidth is generally useful in terms of performance. I've tested the impact of changing this to default on speccpu benchmarks on sandybridge machines. The result shows non-negative impact:
spec/2006/fp/C++/444.namd 26.84 -0.31%
spec/2006/fp/C++/447.dealII 46.19 +0.89%
spec/2006/fp/C++/450.soplex 42.92 -0.44%
spec/2006/fp/C++/453.povray 38.57 -2.25%
spec/2006/fp/C/433.milc 24.54 -0.76%
spec/2006/fp/C/470.lbm 41.08 +0.26%
spec/2006/fp/C/482.sphinx3 47.58 -0.99%
spec/2006/int/C++/471.omnetpp 22.06 +1.87%
spec/2006/int/C++/473.astar 22.65 -0.12%
spec/2006/int/C++/483.xalancbmk 33.69 +4.97%
spec/2006/int/C/400.perlbench 33.43 +1.70%
spec/2006/int/C/401.bzip2 23.02 -0.19%
spec/2006/int/C/403.gcc 32.57 -0.43%
spec/2006/int/C/429.mcf 40.35 +0.27%
spec/2006/int/C/445.gobmk 26.96 +0.06%
spec/2006/int/C/456.hmmer 24.4 +0.19%
spec/2006/int/C/458.sjeng 27.91 -0.08%
spec/2006/int/C/462.libquantum 57.47 -0.20%
spec/2006/int/C/464.h264ref 46.52 +1.35%
geometric mean +0.29%
The regression on 453.povray seems real, but is due to secondary effects as all hot functions are bit-identical with and without the flag.
I started this patch to consult upstream opinions on this. It will be greatly appreciated if the community can help test the performance impact of this change on other architectures so that we can decided if this should be target-dependent.
Reviewers: hfinkel, mkuper, davidxl, chandlerc
Reviewed By: chandlerc
Subscribers: rengolin, sanjoy, javed.absar, bjope, dorit, magabari, RKSimon, llvm-commits, mzolotukhin
Differential Revision: https://reviews.llvm.org/D33341
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306336
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Dehao Chen [Mon, 26 Jun 2017 21:33:51 +0000 (21:33 +0000)]
Fix the bug when handling shufflevector for aarch64.
Summary: This Fixes https://bugs.llvm.org/show_bug.cgi?id=33600
Reviewers: mssimpso, davidxl, Carrot
Reviewed By: mssimpso
Subscribers: aemerson, rengolin, sanjoy, javed.absar, llvm-commits, kristof.beyls
Differential Revision: https://reviews.llvm.org/D34641
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306334
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Matt Arsenault [Mon, 26 Jun 2017 21:33:36 +0000 (21:33 +0000)]
RenameIndependentSubregs: Fix iterator problem
Fixes bug 33597.
Use of substituteRegister in the tied operand case messes
up the register use iterator, causing some uses to be left
unprocessed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306333
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Vassil Vassilev [Mon, 26 Jun 2017 21:11:29 +0000 (21:11 +0000)]
Add missing forward declaration.
This should fix our modules builds.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306332
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Ayal Zaks [Mon, 26 Jun 2017 21:03:51 +0000 (21:03 +0000)]
[LV] Changing the interface of ValueMap, NFC.
Instead of providing access to the internal MapStorage holding all Values
associated with a given Key, used for setting or resetting them all together,
ValueMap keeps its MapStorage internal; its new interface allows getting,
setting or resetting a single Value, per part or per part-and-lane.
Follows the discussion in https://reviews.llvm.org/D32871.
Differential Revision: https://reviews.llvm.org/D34473
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306331
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Sam Clegg [Mon, 26 Jun 2017 21:01:39 +0000 (21:01 +0000)]
[WebAssembly] Add more support for weak symbols
Add weak symbol tests to MC
Add symbol flags to output of `llvm-readobj -t`.
Differential Revision: https://reviews.llvm.org/D34635
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306330
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Tim Northover [Mon, 26 Jun 2017 20:34:13 +0000 (20:34 +0000)]
AArch64: legalize G_EXTRACT operations.
This is the dual problem to legalizing G_INSERTs so most of the code and
testing was cribbed from there.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306328
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Paul Robinson [Mon, 26 Jun 2017 19:52:32 +0000 (19:52 +0000)]
[DWARF] NFC: Give DwarfFormat a 1-byte base type.
In particular this reduces DWARFFormParams from 64 to 32 bits; pass it
around by value.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306324
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Tim Northover [Mon, 26 Jun 2017 18:49:25 +0000 (18:49 +0000)]
AArch64: remove all kill flags when extending register liveness.
When we forward a stored value to a load and eliminate it entirely we need to
make sure the liveness of the register is maintained all the way to its use.
Previously we only cleared liveness on the store doing the forwarding, but
there could be other killing uses in between.
We already do the right thing when the load has to be converted into something
else, it was just this one path that skipped it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306318
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Paul Robinson [Mon, 26 Jun 2017 18:43:01 +0000 (18:43 +0000)]
[DWARF] NFC: Collect info used by DWARFFormValue into a helper.
Some forms have sizes that depend on the DWARF version, DWARF format
(32/64-bit), or the size of an address. Collect these into a struct
to simplify passing them around. Require callers to provide one when
they query a form's size.
Differential Revision: http://reviews.llvm.org/D34570
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306315
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Simon Pilgrim [Mon, 26 Jun 2017 18:20:46 +0000 (18:20 +0000)]
[X86][SSE] Check SSE2/SSE3 codegen tests on i686 and x86_64
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306314
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Wei Mi [Mon, 26 Jun 2017 18:16:10 +0000 (18:16 +0000)]
[GVN] Recommit the patch "Add phi-translate support in scalarpre".
The recommit fixes three bugs: The first one is to use CurrentBlock instead of
PREInstr's Parent as param of performScalarPREInsertion because the Parent
of a clone instruction may be uninitialized. The second one is stop PRE when
CurrentBlock to its predecessor is a backedge and an operand of CurInst is
defined inside of CurrentBlock. The same value defined inside of loop in last
iteration can not be regarded as available. The third one is an out-of-bound
array access in a flipped if guard.
Right now scalarpre doesn't have phi-translate support, so it will miss some
simple pre opportunities. Like the following testcase, current scalarpre cannot
recognize the last "a * b" is fully redundent because a and b used by the last
"a * b" expr are both defined by phis.
long a[100], b[100], g1, g2, g3;
__attribute__((pure)) long goo();
void foo(long a, long b, long c, long d) {
g1 = a * b;
if (__builtin_expect(g2 > 3, 0)) {
a = c;
b = d;
g2 = a * b;
}
g3 = a * b; // fully redundant.
}
The patch adds phi-translate support in scalarpre. This is only a temporary
solution before the newpre based on newgvn is available.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306313
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Matt Arsenault [Mon, 26 Jun 2017 17:53:59 +0000 (17:53 +0000)]
AMDGPU: Setup SP/FP in callee function prolog/epilog
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306312
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Eric Beckmann [Mon, 26 Jun 2017 17:43:30 +0000 (17:43 +0000)]
Replace trivial use of external rc.exe by writing our own .res file.
This patch removes the dependency on the external rc.exe tool by writing
a simple .res file using our own library. In this patch I also added an
explicit definition for the .res file magic. Furthermore, I added a
unittest for embeded manifests and fixed a bug exposed by the test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306311
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Zachary Turner [Mon, 26 Jun 2017 17:22:36 +0000 (17:22 +0000)]
[llvm-pdbutil] Add a mode to `bytes` for dumping split debug chunks.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306309
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Brian Gesiak [Mon, 26 Jun 2017 16:51:24 +0000 (16:51 +0000)]
[opt-viewer] Python 3 support in opt-stats.py
Summary: Minor changes that allow opt-stats.py to support both Python 2 and 3.
Reviewers: anemet, davidxl
Reviewed By: anemet
Subscribers: llvm-commits, fhahn
Differential Revision: https://reviews.llvm.org/D34564
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306306
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Ulrich Weigand [Mon, 26 Jun 2017 16:50:32 +0000 (16:50 +0000)]
[SystemZ] Fix missing emergency spill slot corner case
We sometimes need emergency spill slots for the register scavenger.
This may be the case when code needs to access a stack slot that
has an offset of 4096 or more relative to the stack pointer.
To make that determination, processFunctionBeforeFrameFinalized
currently simply checks the total stack frame size of the current
function. But this is not enough, since code may need to access
stack slots in the caller's stack frame as well, in particular
incoming arguments stored on the stack.
This commit fixes the problem by taking argument slots into account.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306305
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Simon Pilgrim [Mon, 26 Jun 2017 16:22:52 +0000 (16:22 +0000)]
[X86][SSE] Add combine tests for PMULDQ/PMULUDQ
Found several missed optimizations while investigating replacing _mm_mul_epi32/_mm_mul_epu32 with generic implementations
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306302
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Marina Yatsina [Mon, 26 Jun 2017 16:03:42 +0000 (16:03 +0000)]
[inline asm] dot operator while using imm generates wrong ir + asm - llvm part
Inline asm dot operator while using imm generates wrong ir and asm
This also fixes bugzilla 32987:
https://bugs.llvm.org//show_bug.cgi?id=32987
The clang part of the review that contains the test can be found here:
https://reviews.llvm.org/D33040
commit on behald of zizhar
Differential Revision:
https://reviews.llvm.org/D33039
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306300
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Ahmed Bougacha [Mon, 26 Jun 2017 16:00:24 +0000 (16:00 +0000)]
[X86][AVX-512] Don't raise inexact in ceil, floor, round, trunc.
The non-AVX-512 behavior was changed in r248266 to match N1778
(C bindings for IEEE-754 (2008)), which defined the four functions
to not raise the inexact exception ("rint" is still defined as raising
it).
Update the AVX-512 lowering of these functions to match that: it should
not be different.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306299
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Tom Stellard [Mon, 26 Jun 2017 15:56:52 +0000 (15:56 +0000)]
AMDGPU/GlobalISel: Mark 32-bit G_SHL as legal
Reviewers: arsenm
Reviewed By: arsenm
Subscribers: kzhuravl, wdng, nhaehnle, yaxunl, rovka, kristof.beyls, igorb, dstuttard, tpr, t-tye, llvm-commits
Differential Revision: https://reviews.llvm.org/D34589
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306298
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Simon Pilgrim [Mon, 26 Jun 2017 15:53:11 +0000 (15:53 +0000)]
[X86] Add test case for PR15981
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306296
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Simon Pilgrim [Mon, 26 Jun 2017 15:41:36 +0000 (15:41 +0000)]
[llvm-stress] Add getRandom() helper that was going to be part of D34157. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306294
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Sanjay Patel [Mon, 26 Jun 2017 14:19:26 +0000 (14:19 +0000)]
[x86] transform vector inc/dec to use -1 constant (PR33483)
Convert vector increment or decrement to sub/add with an all-ones constant:
add X, <1, 1...> --> sub X, <-1, -1...>
sub X, <1, 1...> --> add X, <-1, -1...>
The all-ones vector constant can be materialized using a pcmpeq instruction that is
commonly recognized as an idiom (has no register dependency), so that's better than
loading a splat 1 constant.
AVX512 uses 'vpternlogd' for 512-bit vectors because there is apparently no better
way to produce 512 one-bits.
The general advantages of this lowering are:
1. pcmpeq has lower latency than a memop on every uarch I looked at in Agner's tables,
so in theory, this could be better for perf, but...
2. That seems unlikely to affect any OOO implementation, and I can't measure any real
perf difference from this transform on Haswell or Jaguar, but...
3. It doesn't look like it from the diffs, but this is an overall size win because we
eliminate 16 - 64 constant bytes in the case of a vector load. If we're broadcasting
a scalar load (which might itself be a bug), then we're replacing a scalar constant
load + broadcast with a single cheap op, so that should always be smaller/better too.
4. This makes the DAG/isel output more consistent - we use pcmpeq already for padd x, -1
and psub x, -1, so we should use that form for +1 too because we can. If there's some
reason to favor a constant load on some CPU, let's make the reverse transform for all
of these cases (either here in the DAG or in a later machine pass).
This should fix:
https://bugs.llvm.org/show_bug.cgi?id=33483
Differential Revision: https://reviews.llvm.org/D34336
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306289
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Krzysztof Parzyszek [Mon, 26 Jun 2017 14:17:58 +0000 (14:17 +0000)]
[Hexagon] Handle cases when the aligned stack pointer is missing
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306288
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Jonas Paulsson [Mon, 26 Jun 2017 13:38:27 +0000 (13:38 +0000)]
[SystemZ] Add a check against zero before calling getTestUnderMaskCond()
Csmith discovered that this function can be called with a zero argument,
in which case an assert for this triggered.
This patch also adds a guard before the other call to this function since
it was missing, although the test only covers the case where it was
discovered.
Reduced test case attached as CodeGen/SystemZ/int-cmp-54.ll.
Review: Ulrich Weigand
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306287
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Michael Zuckerman [Mon, 26 Jun 2017 13:27:32 +0000 (13:27 +0000)]
[X86][LLVM][test]Expanding Supports lowerInterleavedStore() in X86InterleavedAccess test.
Adding base tast (to trunk) for Store strid=4 vf=32.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306286
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Simon Pilgrim [Mon, 26 Jun 2017 13:17:36 +0000 (13:17 +0000)]
[llvm-stress] Remove Rand32 helper function
To try and help avoid repeats of PR32585, remove Rand32 which is only called by Rand64
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306285
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Simon Pilgrim [Mon, 26 Jun 2017 10:16:34 +0000 (10:16 +0000)]
[llvm-stress] Ensure that the C++11 random device respects its min/max values (PR32585)
As noted on PR32585, the change in D29780/rL295325 resulted in calls to Rand32() (values 0 -> 0xFFFFFFFF) but the min()/max() operators indicated it would be (0 -> 0x7FFFF).
This patch changes the random operator to call Rand() instead which does respect the 0 -> 0x7FFFF range and asserts that the value is in range as well.
Differential Revision: https://reviews.llvm.org/D34089
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306281
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Mikael Holmen [Mon, 26 Jun 2017 09:33:04 +0000 (09:33 +0000)]
[IfConversion] Hoist removeBranch calls out of if/else clauses [NFC]
Summary:
Also added a comment.
Pulled out of https://reviews.llvm.org/D34099.
Reviewers: iteratee
Reviewed By: iteratee
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D34388
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306279
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Craig Topper [Mon, 26 Jun 2017 07:15:59 +0000 (07:15 +0000)]
[IR] Rename BinaryOperator::init to AssertOK and remove argument. Replace default case in switch with llvm_unreachable since all valid opcodes are covered.
This method doesn't do any initializing. It just contains asserts. So renaming to AssertOK makes it consistent with similar instructions in other Instruction classes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306277
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Serguei Katkov [Mon, 26 Jun 2017 06:51:45 +0000 (06:51 +0000)]
This reverts commit r306272.
Revert "[MBP] do not rotate loop if it creates extra branch"
It breaks the sanitizer build bots. Need to fix this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306276
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Tobias Grosser [Mon, 26 Jun 2017 06:50:50 +0000 (06:50 +0000)]
[bugpoint] Do not initialize disassembler passes
We added the initilization of disassembler passes in r306208 with the goal to
bring bugpoint in line with 'opt'. However, 'opt' does itself not initialize
dissassembler passes. As our goal was consistency, we drop the initialization
of dissassembler passes again from bugpoint.
Thanks to Chandler for pointing this out!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306275
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Hiroshi Inoue [Mon, 26 Jun 2017 06:32:04 +0000 (06:32 +0000)]
fix trivial typo in comment, NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306274
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Serguei Katkov [Mon, 26 Jun 2017 05:27:27 +0000 (05:27 +0000)]
[MBP] do not rotate loop if it creates extra branch
This is a last fix for the corner case of PR32214. Actually this is not really corner case in general.
We should not do a loop rotation if we create an additional branch due to it.
Consider the case where we have a loop chain H, M, B, C , where
H is header with viable fallthrough from pre-header and exit from the loop
M - some middle block
B - backedge to Header but with exit from the loop also.
C - some cold block of the loop.
Let's H is determined as a best exit. If we do a loop rotation M, B, C, H we can introduce the extra branch.
Let's compute the change in number of branches:
+1 branch from pre-header to header
-1 branch from header to exit
+1 branch from header to middle block if there is such
-1 branch from cold bock to header if there is one
So if C is not a predecessor of H then we introduce extra branch.
This change actually prohibits rotation of the loop if both true
1) Best Exit has next element in chain as successor.
2) Last element in chain is not a predecessor of first element of chain.
Reviewers: iteratee, xur
Reviewed By: iteratee
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D34271
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306272
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Davide Italiano [Mon, 26 Jun 2017 03:55:41 +0000 (03:55 +0000)]
[CFL-AA] Remove unneeded function declaration. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306268
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Chandler Carruth [Mon, 26 Jun 2017 03:31:31 +0000 (03:31 +0000)]
[InstCombine] Factor the logic for propagating !nonnull and !range
metadata out of InstCombine and into helpers.
NFC, this just exposes the logic used by InstCombine when propagating
metadata from one load instruction to another. The plan is to use this
in SROA to address PR32902.
If anyone has better ideas about how to factor this or name variables,
I'm all ears, but this seemed like a pretty good start and lets us make
progress on the PR.
This is based on a patch by Ariel Ben-Yehuda (D34285).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306267
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Matt Arsenault [Mon, 26 Jun 2017 03:01:36 +0000 (03:01 +0000)]
AMDGPU: Whitespace fixes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306265
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Matt Arsenault [Mon, 26 Jun 2017 03:01:31 +0000 (03:01 +0000)]
AMDGPU: Partially fix implicit.buffer.ptr intrinsic handling
This should not be treated as a different version of
private_segment_buffer. These are distinct things with
different uses and register classes, and requires the
function argument info to have more context about the
function's type and environment.
Also add missing test coverage for the intrinsic, and
emit an error for HSA. This also encovers that the intrinsic
is broken unless there happen to be stack objects.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306264
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Sylvestre Ledru [Mon, 26 Jun 2017 02:45:39 +0000 (02:45 +0000)]
fix various typos
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306262
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Chandler Carruth [Sun, 25 Jun 2017 22:45:31 +0000 (22:45 +0000)]
[LoopSimplify] Re-instate r306081 with a bug fix w.r.t. indirectbr.
This was reverted in r306252, but I already had the bug fixed and was
just trying to form a test case.
The original commit factored the logic for forming dedicated exits
inside of LoopSimplify into a helper that could be used elsewhere and
with an approach that required fewer intermediate data structures. See
that commit for full details including the change to the statistic, etc.
The code looked fine to me and my reviewers, but in fact didn't handle
indirectbr correctly -- it left the 'InLoopPredecessors' vector dirty.
If you have code that looks *just* right, you can end up leaking these
predecessors into a subsequent rewrite, and crash deep down when trying
to update PHI nodes for predecessors that don't exist.
I've added an assert that makes the bug much more obvious, and then
changed the code to reliably clear the vector so we don't get this bug
again in some other form as the code changes.
I've also added a test case that *does* manage to catch this while also
giving some nice positive coverage in the face of indirectbr.
The real code that found this came out of what I think is CPython's
interpreter loop, but any code with really "creative" interpreter loops
mixing indirectbr and other exit paths could manage to tickle the bug.
I was hard to reduce the original test case because in addition to
having a particular pattern of IR, the whole thing depends on the order
of the predecessors which is in turn depends on use list order. The test
case added here was designed so that in multiple different predecessor
orderings it should always end up going down the same path and tripping
the same bug. I hope. At least, it tripped it for me without
manipulating the use list order which is better than anything bugpoint
could do...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306257
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Chandler Carruth [Sun, 25 Jun 2017 22:24:02 +0000 (22:24 +0000)]
[LoopSimplify] Improve a test for loop simplify minorly. NFC.
I did some basic testing while looking for a bug in my recent change to
loop simplify and even though it didn't find the bug it seems like
a useful improvement anyways.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306256
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Davide Italiano [Sun, 25 Jun 2017 22:12:59 +0000 (22:12 +0000)]
[MemDep] Cleanup return after else & use `auto`. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306255
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Anna Thomas [Sun, 25 Jun 2017 21:13:58 +0000 (21:13 +0000)]
[LoopDeletion] NFC: Move phi node value setting into prepass
Recommit NFC patch (rL306157) where I missed incrementing the basic block iterator,
which caused loop deletion tests to hang due to infinite loop.
Had reverted it in rL306162.
rL306157 commit message:
Currently, the implementation of delete dead loops has a special case
when the loop being deleted is never executed. This special case
(updating of exit block's incoming values for phis) can be
run as a prepass for non-executable loops before performing
the actual deletion.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306254
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Daniel Jasper [Sun, 25 Jun 2017 17:58:25 +0000 (17:58 +0000)]
Revert "[LoopSimplify] Factor the logic to form dedicated exits into a utility."
This leads to a segfault. Chandler already has a test case and should be
able to recommit with a fix soon.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306252
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Craig Topper [Sun, 25 Jun 2017 17:33:49 +0000 (17:33 +0000)]
[TableGen] Remove some copies around PatternToMatch.
Summary:
This patch does a few things that should remove some copies around PatternsToMatch. These were noticed while reviewing code for D34341.
Change constructor to take Dstregs by value and move it into the class. Change one of the callers to add std::move to the argument so that it gets moved.
Make AddPatternToMatch take PatternToMatch by rvalue reference so we can move it into the PatternsToMatch vector. I believe we should have a implicit default move constructor available on PatternToMatch. I chose rvalue reference because both callers call it with temporaries already.
Reviewers: RKSimon, aymanmus, spatel
Reviewed By: aymanmus
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D34411
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306251
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Craig Topper [Sun, 25 Jun 2017 17:33:48 +0000 (17:33 +0000)]
[IR] Use isIntOrIntVectorTy instead of writing it out the long way. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306250
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Craig Topper [Sun, 25 Jun 2017 17:33:46 +0000 (17:33 +0000)]
[IR] Move repeated asserts in FCmpInst constructor to a helper method like we do for ICmpInst and other classes. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306249
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Simon Pilgrim [Sun, 25 Jun 2017 17:04:58 +0000 (17:04 +0000)]
[X86][SSE] Remove unused memopfsf32_128/memopfsf64_128 scalar memops
The 'scalar' simd bitops were dropped a while ago
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306248
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Simon Pilgrim [Sun, 25 Jun 2017 16:57:46 +0000 (16:57 +0000)]
Strip trailing whitespace. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306247
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Simon Pilgrim [Sun, 25 Jun 2017 16:12:45 +0000 (16:12 +0000)]
[X86] Add test case for PR15705
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306246
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Sanjay Patel [Sun, 25 Jun 2017 14:15:28 +0000 (14:15 +0000)]
[InstCombine] add (sext i1 X), 1 --> zext (not X)
http://rise4fun.com/Alive/i8Q
A narrow bitwise logic op is obviously better than math for value tracking,
and zext is better than sext. Typically, the 'not' will be folded into an
icmp predicate.
The IR difference would even survive through codegen for x86, so we would see
worse code:
https://godbolt.org/g/C14HMF
one_or_zero(int, int): # @one_or_zero(int, int)
xorl %eax, %eax
cmpl %esi, %edi
setle %al
retq
one_or_zero_alt(int, int): # @one_or_zero_alt(int, int)
xorl %ecx, %ecx
cmpl %esi, %edi
setg %cl
movl $1, %eax
subl %ecx, %eax
retq
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306243
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Elena Demikhovsky [Sun, 25 Jun 2017 13:36:20 +0000 (13:36 +0000)]
AVX-512: Fixed a crash during legalization of <3 x i8> type
The compiler fails with assertion during legalization of SETCC for <3 x i8> operands.
The result is extended to <4 x i8> and then truncated <4 x i1>. It does not happen on AVX2, because the final result of SETCC is <4 x i32>.
Differential Revision: https://reviews.llvm.org/D34503
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306242
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Xin Tong [Sun, 25 Jun 2017 12:55:11 +0000 (12:55 +0000)]
[AST] Fix a bug in aliasesUnknownInst. Make sure we are comparing the unknown instructions in the alias set and the instruction interested in.
Summary:
Make sure we are comparing the unknown instructions in the alias set and the instruction interested in.
I believe this is clearly a bug (missed opportunity). I can also add some test cases if desired.
Reviewers: hfinkel, davide, dberlin
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D34597
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306241
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Igor Breger [Sun, 25 Jun 2017 11:42:17 +0000 (11:42 +0000)]
[GlobalISel][X86] Support vector type G_EXTRACT selection.
Summary:
Support vector type G_EXTRACT selection. For now G_EXTRACT marked as legal for any type, so nothing to do in legalizer.
Split from https://reviews.llvm.org/D33665
Reviewers: qcolombet, t.p.northover, zvi, guyblank
Reviewed By: guyblank
Subscribers: guyblank, rovka, llvm-commits, kristof.beyls
Differential Revision: https://reviews.llvm.org/D33957
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306240
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Dorit Nuzman [Sun, 25 Jun 2017 08:26:25 +0000 (08:26 +0000)]
[AVX2] [TTI CostModel] Add cost of interleaved loads/stores for AVX2
The cost of an interleaved access was only implemented for AVX512. For other
X86 targets an overly conservative Base cost was returned, resulting in
avoiding vectorization where it is actually profitable to vectorize.
This patch starts to add costs for AVX2 for most prominent cases of
interleaved accesses (stride 3,4 chars, for now).
Note1: Improvements of up to ~4x were observed in some of EEMBC's rgb
workloads; There is also a known issue of 15-30% degradations on some of these
workloads, associated with an interleaved access followed by type
promotion/widening; the resulting shuffle sequence is currently inefficient and
will be improved by a series of patches that extend the X86InterleavedAccess pass
(such as D34601 and more to follow).
Note 2: The costs in this patch do not reflect port pressure penalties which can
be very dominant in the case of interleaved accesses since most of the shuffle
operations are restricted to a single port. Further tuning, that may incorporate
these considerations, will be done on top of the upcoming improved shuffle
sequences (that is, along with the abovementioned work to extend
X86InterleavedAccess pass).
Differential Revision: https://reviews.llvm.org/D34023
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306238
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Ed Schouten [Sun, 25 Jun 2017 08:19:37 +0000 (08:19 +0000)]
Add support for Ananas platform
Ananas is a home-brew operating system, mainly for amd64 machines. After
using GCC for quite some time, it has switched to clang and never looked
back - yet, having to manually patch things is annoying, so it'd be much
nicer if this was in the official tree.
More information:
https://github.com/zhmu/ananas/
https://rink.nu/projects/ananas.html
Submitted by: Rink Springer
Differential Revision: https://reviews.llvm.org/D32937
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306237
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Craig Topper [Sun, 25 Jun 2017 06:56:34 +0000 (06:56 +0000)]
[PatternMatch] Just check if value is a Constant before calling isAllOnesValue for not_match. We don't really need to check for a specific subclass of Constant. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306236
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Zachary Turner [Sun, 25 Jun 2017 03:51:42 +0000 (03:51 +0000)]
[pdb] Fix reading of llvm-generated PDBs by cvdump.
If you dump a pdb to yaml, and then round-trip it back to a pdb,
and run cvdump -l <file> on the new pdb, cvdump will generate
output such as this.
*** LINES
** Module: "d:\src\llvm\test\DebugInfo\PDB\Inputs\empty.obj"
Error: Line number corrupted: invalid file id 0
<Unknown> (MD5), 0001:
00000010-
0000001A, line/addr pairs = 3
5
00000010 6
00000013 7
00000018
Note the error message about the corrupted line number.
It turns out that the problem is that cvdump cannot find the
/names stream (e.g. the global string table), and the reason it
can't find the /names stream is because it doesn't understand
the NameMap that we serialize which tells pdb consumers which
stream has the string table.
Some experimentation shows that if we add items to the hash
table in a specific order before serializing it, cvdump can read
it. This suggests that either we're using the wrong hash function,
or we're serializing something incorrectly, but it will take some
deeper investigation to figure out how / why. For now, this at
least allows cvdump to read our line information (and incidentally,
produces an identical byte sequence to what Microsoft tools
produce when writing the named stream map).
Differential Revision: https://reviews.llvm.org/D34491
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306233
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Xinliang David Li [Sun, 25 Jun 2017 00:26:43 +0000 (00:26 +0000)]
[PGO] Implementate profile counter regiser promotion
Differential Revision: http://reviews.llvm.org/D34085
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306231
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Zachary Turner [Sun, 25 Jun 2017 00:00:08 +0000 (00:00 +0000)]
[Support] Don't use std::iterator, it's deprecated in C++17.
In converting this over to iterator_facade_base, some member
operators and methods are no longer needed since iterator_facade
implements them in the base class using CRTP.
Differential Revision: https://reviews.llvm.org/D34223
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306230
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Craig Topper [Sat, 24 Jun 2017 23:34:50 +0000 (23:34 +0000)]
[SCEV] Avoid copying ConstantRange just to get the min/max value
Summary:
This patch changes getRange to getRangeRef and returns a reference to the ConstantRange object stored inside the DenseMap caches. We then take advantage of that to add new helper methods that can return min/max value of a signed or unsigned ConstantRange using that reference without first copying the ConstantRange.
getRangeRef calls itself recursively and I believe the reference return is fine for those calls.
I've left getSignedRange and getUnsignedRange returning a ConstantRange object so they will make a copy now. This is to ensure safety since the reference will be invalidated if the DenseMap changes.
I'm sure there are still more places that can take advantage of the reference and I'll submit future patches as I find them.
Reviewers: sanjoy, davide
Reviewed By: sanjoy
Subscribers: zzheng, llvm-commits, mzolotukhin
Differential Revision: https://reviews.llvm.org/D32978
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306229
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Craig Topper [Sat, 24 Jun 2017 22:59:11 +0000 (22:59 +0000)]
[PatternMatch] Use ConstantFP::isNan instead of getting the APFloat and calling isNaN on that. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306227
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Craig Topper [Sat, 24 Jun 2017 22:59:10 +0000 (22:59 +0000)]
[IR] Implement commutable matchers without using combineOr
Summary:
Turns out creating matchers with combineOr isn't very efficient as we have to build matcher objects for both sides of the OR. Those objects aren't free, the trees usually contain several objects that contain a reference to a Value *, ConstantInt *, APInt * or some such thing. The compiler isn't always willing to inline all the matcher code to get rid of these member variables. Thus we end up loads and stores of these variables.
Using combineOR ends up creating two complete copies of the tree and the associated stores. I believe we're also paying for the opcode check twice.
This patch adds a commutable mode to several of the matcher objects as a bool template parameter that can be used to enable commutable support directly in the match functions of the corresponding objects. This avoids the duplicate object creation and the opcode checks.
This shows about an ~7-8k reduction in the opt binary size on my local build.
Reviewers: spatel, majnemer, davide
Reviewed By: majnemer
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D34592
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306226
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Anton Korobeynikov [Sat, 24 Jun 2017 21:04:32 +0000 (21:04 +0000)]
Another test commit
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306224
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