OSDN Git Service
Hal Finkel [Fri, 6 Feb 2015 23:07:40 +0000 (23:07 +0000)]
Revert "r227976 - [PowerPC] Yet another approach to __tls_get_addr" and related fixups
Unfortunately, even with the workaround of disabling the linker TLS
optimizations in Clang restored (which has already been done), this still
breaks self-hosting on my P7 machine (-O3 -DNDEBUG -mcpu=native).
Bill is currently working on an alternate implementation to address the TLS
issue in a way that also fully elides the linker bug (which, unfortunately,
this approach did not fully), so I'm reverting this now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228460
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Lang Hames [Fri, 6 Feb 2015 23:04:53 +0000 (23:04 +0000)]
[Orc] Add a Kaleidoscope/Orc tutorial demonstrating lazy-codegen.
This tutorial builds on the initial kaleidoscope/orc tutorial by adding a
LazyEmittingLayer to the custom stack. This extra layer defers compilation
of modules in the JIT until they are statically referenced.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228459
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Duncan P. N. Exon Smith [Fri, 6 Feb 2015 22:55:13 +0000 (22:55 +0000)]
Support: Add dwarf::getLanguage()
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228458
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Duncan P. N. Exon Smith [Fri, 6 Feb 2015 22:53:19 +0000 (22:53 +0000)]
Support: Rewrite dwarf::LanguageString(), NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228457
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Lang Hames [Fri, 6 Feb 2015 22:52:04 +0000 (22:52 +0000)]
[Orc] Add a Kaleidoscope tutorial for Orc demonstrating eager compilation.
This tutorial demonstrates a very basic custom Orc JIT stack that performs eager
compilation: All modules are CodeGen'd immediately upon being added to the JIT.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228456
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Duncan P. N. Exon Smith [Fri, 6 Feb 2015 22:50:13 +0000 (22:50 +0000)]
IR: Allow 32-bits for lines in debug location
Remove unnecessary restriction of 24-bits for line numbers in
`MDLocation`.
The rest of the debug info schema (with the exception of local
variables) uses 32-bits for line numbers. As I introduce the
specialized nodes, it makes sense to canonicalize on one size or the
other.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228455
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Lang Hames [Fri, 6 Feb 2015 22:48:43 +0000 (22:48 +0000)]
[Orc] Add more missing headers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228454
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Sanjay Patel [Fri, 6 Feb 2015 22:43:52 +0000 (22:43 +0000)]
use local variables; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228452
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Duncan P. N. Exon Smith [Fri, 6 Feb 2015 22:34:48 +0000 (22:34 +0000)]
Support: Stop stringifying DW_LANG_{lo,hi}_user
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228451
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Duncan P. N. Exon Smith [Fri, 6 Feb 2015 22:29:35 +0000 (22:29 +0000)]
AsmParser: Use DW_TAG_hi_user instead of magic constant, NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228448
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Duncan P. N. Exon Smith [Fri, 6 Feb 2015 22:28:05 +0000 (22:28 +0000)]
AsmWriter: Extract writeTag(), NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228447
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Duncan P. N. Exon Smith [Fri, 6 Feb 2015 22:27:22 +0000 (22:27 +0000)]
AsmWriter: Extract writeMetadataAsOperand(), NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228446
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Evgeniy Stepanov [Fri, 6 Feb 2015 21:47:39 +0000 (21:47 +0000)]
[msan] Fix "missing origin" in atomic store.
An atomic store always make the target location fully initialized (in the
current implementation). It should not store origin. Initialized memory can't
have meaningful origin, and, due to origin granularity (4 bytes) there is a
chance that this extra store would overwrite meaningfull origin for an adjacent
location.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228444
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Cameron Esfahani [Fri, 6 Feb 2015 21:33:08 +0000 (21:33 +0000)]
Test commit to see if it triggers an email to llvm-commits. No change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228442
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Zachary Turner [Fri, 6 Feb 2015 20:42:03 +0000 (20:42 +0000)]
Try to fix Makefile build for LLVMDebugInfoPDB.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228437
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Zachary Turner [Fri, 6 Feb 2015 20:30:52 +0000 (20:30 +0000)]
Resubmit "Create lib/DebugInfo/PDB" (r228428)
This change resubmits the patch that broke the build, this time
without unittests. The unittests will be submitted separately
after the problem has been addressed:
--Original Commit Message--
Create lib/DebugInfo/PDB.
This patch creates a platform-independent interface to a PDB reader.
There is currently no implementation of this interface, which will
be provided in future patches. This defines the basic object model
which any implementation must conform to.
Reviewed by: David Blaikie
Differential Revision: http://reviews.llvm.org/D7356
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228435
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Michael Zolotukhin [Fri, 6 Feb 2015 20:20:40 +0000 (20:20 +0000)]
Use estimated number of optimized insns in unroll-threshold computation.
If complete-unroll could help us to optimize away N% of instructions, we
might want to do this even if the final size would exceed loop-unroll
threshold. However, we don't want to unroll huge loop, and we are add
AbsoluteThreshold to avoid that - this threshold will never be crossed,
even if we expect to optimize 99% instructions after that.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228434
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Michael Zolotukhin [Fri, 6 Feb 2015 20:02:51 +0000 (20:02 +0000)]
[InstSimplify] Add SimplifyFPBinOp function.
It is a variation of SimplifyBinOp, but it takes into account
FastMathFlags.
It is needed in inliner and loop-unroller to accurately predict the
transformation's outcome (previously we dropped the flags and were too
conservative in some cases).
Example:
float foo(float *a, float b) {
float r;
if (a[1] * b)
r = /* a lot of expensive computations */;
else
r = 1;
return r;
}
float boo(float *a) {
return foo(a, 0.0);
}
Without this patch, we don't inline 'foo' into 'boo'.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228432
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Zachary Turner [Fri, 6 Feb 2015 20:00:18 +0000 (20:00 +0000)]
Revert "Create lib/DebugInfo/PDB."
This reverts commit 21028, as it is causing failures in LLVMConfig.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228431
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Kostya Serebryany [Fri, 6 Feb 2015 19:52:07 +0000 (19:52 +0000)]
[fuzzer] move default sanitizer options to a separate file
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228429
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Zachary Turner [Fri, 6 Feb 2015 19:44:09 +0000 (19:44 +0000)]
Create lib/DebugInfo/PDB.
This patch creates a platform-independent interface to a PDB reader.
There is currently no implementation of this interface, which will
be provided in future patches. This defines the basic object model
which any implementation must conform to.
Reviewed by: David Blaikie
Differential Revision: http://reviews.llvm.org/D7356
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228428
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Lang Hames [Fri, 6 Feb 2015 19:36:40 +0000 (19:36 +0000)]
[Orc] Move SectionMemoryManager's implementation from MCJIT to ExecutionEngine.
This is a more sensible home for SectionMemoryManager, and allows the implementation
to be shared between Orc and MCJIT.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228427
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Lang Hames [Fri, 6 Feb 2015 19:34:40 +0000 (19:34 +0000)]
[Orc] Add some missing headers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228426
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Lang Hames [Fri, 6 Feb 2015 19:34:04 +0000 (19:34 +0000)]
[Orc] Fix syntax error in LazyEmittingLayer::removeModuleSet.
This was a trivial think-o, but it's in a method of a templated class
and doesn't have any callers yet, so the compiler let it pass. I hope
to add a unit test to cover this soon.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228425
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Quentin Colombet [Fri, 6 Feb 2015 18:42:41 +0000 (18:42 +0000)]
[LiveIntervalAnalysis] Speed up creation of live ranges for physical registers
by using a segment set.
The patch addresses a compile-time performance regression in the LiveIntervals
analysis pass (see http://llvm.org/bugs/show_bug.cgi?id=18580). This regression
is especially critical when compiling long functions. Our analysis had shown
that the most of time is taken for generation of live intervals for physical
registers. Insertions in the middle of the array of live ranges cause quadratic
algorithmic complexity, which is apparently the main reason for the slow-down.
Overview of changes:
- The patch introduces an additional std::set<Segment>* member in LiveRange for
storing segments in the phase of initial creation. The set is used if this
member is not NULL, otherwise everything works the old way.
- The set of operations on LiveRange used during initial creation (i.e. used by
createDeadDefs and extendToUses) have been reimplemented to use the segment
set if it is available.
- After a live range is created the contents of the set are flushed to the
segment vector, because the set is not as efficient as the vector for the
later uses of the live range. After the flushing, the set is deleted and
cannot be used again.
- The set is only for live ranges computed in
LiveIntervalAnalysis::computeLiveInRegUnits() and getRegUnit() but not in
computeVirtRegs(), because I did not bring any performance benefits to
computeVirtRegs() and for some examples even brought a slow down.
Patch by Vaidas Gasiunas <vaidas.gasiunas@sap.com>
Differential Revision: http://reviews.llvm.org/D6013
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228421
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Adam Nemet [Fri, 6 Feb 2015 18:31:04 +0000 (18:31 +0000)]
[LV] Move addRuntimeCheck to LoopAccessAnalysis
This will allow it to be shared with the new Loop Distribution pass.
getFirstInst is currently duplicated across LoopVectorize.cpp and
LoopAccessAnalysis.cpp. This is a short-term work-around until we figure out
a better solution.
NFC. (The code moved is adjusted a bit for the name of the Loop member and
that PtrRtCheck is now a reference rather than a pointer.)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228418
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Reid Kleckner [Fri, 6 Feb 2015 17:59:49 +0000 (17:59 +0000)]
Don't dllexport declarations
Fixes PR22488
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228411
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Benjamin Kramer [Fri, 6 Feb 2015 17:51:54 +0000 (17:51 +0000)]
Make helper functions/classes/globals static. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228410
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Matthias Braun [Fri, 6 Feb 2015 17:49:36 +0000 (17:49 +0000)]
InstCombine: Combine select sequences into a single select
Normalize
select(C0, select(C1, a, b), b) -> select((C0 & C1), a, b)
select(C0, a, select(C1, a, b)) -> select((C0 | C1), a, b)
This normal form may enable further combines on the And/Or and shortens
paths for the values. Many targets prefer the other but can go back
easily in CodeGen.
Differential Revision: http://reviews.llvm.org/D7399
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228409
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Matthias Braun [Fri, 6 Feb 2015 17:28:47 +0000 (17:28 +0000)]
LiveInterval: Fix SubRange memory leak.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228405
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Daniel Sanders [Fri, 6 Feb 2015 16:37:30 +0000 (16:37 +0000)]
[mips] Fix FileCheck prefixes with whitespace between 'CHECK' and ':'
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228403
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Benjamin Kramer [Fri, 6 Feb 2015 14:44:02 +0000 (14:44 +0000)]
Value: Remove superfluous typedefs and deprecated method. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228400
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Benjamin Kramer [Fri, 6 Feb 2015 14:43:55 +0000 (14:43 +0000)]
AArch64PromoteConstant: Modernize and resolve some Use<->User confusion.
NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228399
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Benjamin Kramer [Fri, 6 Feb 2015 14:43:49 +0000 (14:43 +0000)]
IRCE: Demote template to ArrayRef and SmallVector to array.
NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228398
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Chad Rosier [Fri, 6 Feb 2015 14:14:41 +0000 (14:14 +0000)]
Whitespace.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228397
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Rafael Espindola [Fri, 6 Feb 2015 13:57:58 +0000 (13:57 +0000)]
Correcting keyword highlighting in llvm-mode.el.
llvm-mode was previously confused when variable names contained keywords.
This changes ensures that keywords are only highlighted when they're standalone.
Patch by Wilfred Hughes!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228396
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Peter Zotov [Fri, 6 Feb 2015 13:42:03 +0000 (13:42 +0000)]
[OCaml] Add Llvm.build_empty_phi.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228395
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Arnaud A. de Grandmaison [Fri, 6 Feb 2015 11:28:16 +0000 (11:28 +0000)]
[PBQP] Fix comment wording. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228390
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Craig Topper [Fri, 6 Feb 2015 06:19:28 +0000 (06:19 +0000)]
[X86] Add assembler and disassembler test cases for clflushopt, clwb, pcommit, xsaves, xrstors, xsavec
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228385
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Craig Topper [Fri, 6 Feb 2015 05:50:50 +0000 (05:50 +0000)]
[X86] Remove a ton of duplicate test cases for the assembler.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228383
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Michel Danzer [Fri, 6 Feb 2015 02:51:29 +0000 (02:51 +0000)]
R600/SI: Amend a test to ensure WQM is enabled for LDS in pixel shaders
Reviewed-by: Tom Stellard <tom@stellard.net>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228374
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Michel Danzer [Fri, 6 Feb 2015 02:51:25 +0000 (02:51 +0000)]
R600/SI: Don't enable WQM for V_INTERP_* instructions v2
Doesn't seem necessary anymore. I think this was mostly compensating for
not enabling WQM for texture sampling instructions.
v2: Add test coverage
Reviewed-by: Tom Stellard <tom@stellard.net>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228373
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Michel Danzer [Fri, 6 Feb 2015 02:51:20 +0000 (02:51 +0000)]
R600/SI: Also enable WQM for image opcodes which calculate LOD v3
If whole quad mode isn't enabled for these, the level of detail is
calculated incorrectly for pixels along diagonal triangle edges, causing
artifacts.
v2: Use a TSFlag instead of lots of switch cases
v3: Add test coverage
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=88642
Reviewed-by: Tom Stellard <tom@stellard.net>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228372
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Ramkumar Ramachandra [Fri, 6 Feb 2015 01:46:42 +0000 (01:46 +0000)]
Introduce print-memderefs to test isDereferenceablePointer
Since testing the function indirectly is tricky, introduce a direct
print-memderefs pass, in the same spirit as print-memdeps, which prints
dereferenceability information matched by FileCheck.
Differential Revision: http://reviews.llvm.org/D7075
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228369
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Matthias Braun [Thu, 5 Feb 2015 23:52:14 +0000 (23:52 +0000)]
AArch64: Make test more robust.
Avoid the creation of select instructions which can result in different
scheduling of the selects.
I also added a bunch of additional store volatiles. Those avoid A
CodeGen problem (bug?) where normalizes and denomarlizing the control
moves all shift instructions into the first block where ISel can't match
them together with the cmps.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228362
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Matthias Braun [Thu, 5 Feb 2015 23:52:12 +0000 (23:52 +0000)]
X86: Test cleanup
Use FileCheck, make it more consistent and do not rely on unoptimized
or(cmp,cmp) getting combined for max to be matched.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228361
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Daniel Jasper [Thu, 5 Feb 2015 22:39:46 +0000 (22:39 +0000)]
Small cleanup of MachineLICM.cpp
Specifically:
- Calculate the loop pre-header once at the stat of HoistOutOfLoop, so:
- We don't-DFS walk the MachineDomTree if we aren't going to do anything
- Don't call getCurPreheader for each Scope
- Don't needlessly use a do-while loop
- Use early exit for Scopes.size() == 0
No functional changes intended.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228350
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Colin LeMahieu [Thu, 5 Feb 2015 22:03:32 +0000 (22:03 +0000)]
[Hexagon] Renaming v4 compare-and-jump instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228349
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Colin LeMahieu [Thu, 5 Feb 2015 21:43:56 +0000 (21:43 +0000)]
[Hexagon] Deleting unused patterns.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228348
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Colin LeMahieu [Thu, 5 Feb 2015 21:13:25 +0000 (21:13 +0000)]
[Hexagon] Simplifying and formatting several patterns. Changing a pattern multiply to be expanded.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228347
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Ahmed Bougacha [Thu, 5 Feb 2015 21:10:14 +0000 (21:10 +0000)]
[BasicAA] Add datalayouts to make some tests more useful. NFC.
Fixes PR22462: two of the tests have regressed for a while,
but were using CHECK-NOT to match "May:". The actual output
was changed to "MayAlias:" at some point, which made the tests
useless.
Two others return MayAlias only because of a lack of analysis;
BasicAA returns PartialAlias in those cases, when a datalayout
is present.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228346
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Colin LeMahieu [Thu, 5 Feb 2015 20:38:58 +0000 (20:38 +0000)]
[Hexagon] Factoring a class out of some store patterns, deleting unused definitions and reformatting some patterns.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228345
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Colin LeMahieu [Thu, 5 Feb 2015 20:08:52 +0000 (20:08 +0000)]
[Hexagon] Factoring out a class for immediate transfers and cleaning up formatting.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228343
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Justin Bogner [Thu, 5 Feb 2015 19:54:27 +0000 (19:54 +0000)]
InstrProf: Avoid using std::to_string
Apparently std::to_string doesn't exist in mingw32:
http://lab.llvm.org:8011/builders/clang-native-mingw32-win7/builds/7990
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=52015
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228340
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Alexey Samsonov [Thu, 5 Feb 2015 19:39:20 +0000 (19:39 +0000)]
[ASan] Enable -asan-stack-dynamic-alloca by default.
By default, store all local variables in dynamic alloca instead of
static one. It reduces the stack space usage in use-after-return mode
(dynamic alloca will not be called if the local variables are stored
in a fake stack), and improves the debug info quality for local
variables (they will not be described relatively to %rbp/%rsp, which
are assumed to be clobbered by function calls).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228336
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Eric Christopher [Thu, 5 Feb 2015 19:27:04 +0000 (19:27 +0000)]
Remove the use of getSubtarget in the creation of the X86
PassManager instance. In one case we can make the determination
from the Triple, in the other (execution dependency pass) the
pass will avoid running if we don't have any code that uses that
register class so go ahead and add it to the pipeline.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228334
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Eric Christopher [Thu, 5 Feb 2015 19:27:01 +0000 (19:27 +0000)]
Use cached subtargets inside X86FixupLEAs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228333
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Eric Christopher [Thu, 5 Feb 2015 19:06:45 +0000 (19:06 +0000)]
Migrate the X86 AsmPrinter away from using the subtarget when
dealing with module level emission. Currently this is using
the Triple to determine, but eventually the logic should
probably migrate to TLOF.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228332
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Sylvestre Ledru [Thu, 5 Feb 2015 18:57:02 +0000 (18:57 +0000)]
Fix an incorrect identifier
Summary:
EIEIO is not a correct declaration and breaks the build under Debian HURD.
Instead, E_IEIO is used.
//
http://www.gnu.org/software/libc/manual/html_node/Reserved-Names.html
Some additional classes of identifier names are reserved for future
extensions to the C language or the POSIX.1 environment. While using
these names for your own purposes right now might not cause a problem,
they do raise the possibility of conflict with future versions of the C
or POSIX standards, so you should avoid these names.
...
Names beginning with a capital ‘E’ followed a digit or uppercase letter
may be used for additional error code names. See Error Reporting.//
Reported here:
https://bugs.debian.org/cgi-bin/bugreport.cgi?bug=776965
And patch wrote by Svante Signell
With this patch, LLVM, Clang & LLDB build under Debian HURD:
https://buildd.debian.org/status/fetch.php?pkg=llvm-toolchain-3.6&arch=hurd-i386&ver=1%3A3.6~%2Brc2-2&stamp=
1423040039
Reviewers: hfinkel
Reviewed By: hfinkel
Subscribers: llvm-commits
Differential Revision: http://reviews.llvm.org/D7437
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228331
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Colin LeMahieu [Thu, 5 Feb 2015 18:56:28 +0000 (18:56 +0000)]
[Hexagon] Renaming Y2_barrier. Fixing issues where doubleword variants of instructions can't be newvalue producers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228330
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Hal Finkel [Thu, 5 Feb 2015 18:43:00 +0000 (18:43 +0000)]
[PowerPC] Prepare loops for pre-increment loads/stores
PowerPC supports pre-increment load/store instructions (except for Altivec/VSX
vector load/stores). Using these on embedded cores can be very important, but
most loops are not naturally set up to use them. We can often change that,
however, by placing loops into a non-canonical form. Generically, this means
transforming loops like this:
for (int i = 0; i < n; ++i)
array[i] = c;
to look like this:
T *p = array[-1];
for (int i = 0; i < n; ++i)
*++p = c;
the key point is that addresses accessed are pulled into dedicated PHIs and
"pre-decremented" in the loop preheader. This allows the use of pre-increment
load/store instructions without loop peeling.
A target-specific late IR-level pass (running post-LSR), PPCLoopPreIncPrep, is
introduced to perform this transformation. I've used this code out-of-tree for
generating code for the PPC A2 for over a year. Somewhat to my surprise,
running the test suite + externals on a P7 with this transformation enabled
showed no performance regressions, and one speedup:
External/SPEC/CINT2006/483.xalancbmk/483.xalancbmk
-2.32514% +/- 1.03736%
So I'm going to enable it on everything for now. I was surprised by this
because, on the POWER cores, these pre-increment load/store instructions are
cracked (and, thus, harder to schedule effectively). But seeing no regressions,
and feeling that it is generally easier to split instructions apart late than
it is to combine them late, this might be the better approach regardless.
In the future, we might want to integrate this functionality into LSR (but
currently LSR does not create new PHI nodes, so (for that and other reasons)
significant work would need to be done).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228328
91177308-0d34-0410-b5e6-
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Hal Finkel [Thu, 5 Feb 2015 18:42:53 +0000 (18:42 +0000)]
[PowerPC] Generate pre-increment floating-point ld/st instructions
PowerPC supports pre-increment floating-point load/store instructions, both r+r
and r+i, and we had patterns for them, but they were not marked as legal. Mark
them as legal (and add a test case).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228327
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Colin LeMahieu [Thu, 5 Feb 2015 18:38:08 +0000 (18:38 +0000)]
[Hexagon] Renaming A2_subri, A2_andir, A2_orir. Fixing formatting.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228326
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Ahmed Bougacha [Thu, 5 Feb 2015 18:31:02 +0000 (18:31 +0000)]
[CodeGen] Add hook/combine to form vector extloads, enabled on X86.
The combine that forms extloads used to be disabled on vector types,
because "None of the supported targets knows how to perform load and
sign extend on vectors in one instruction."
That's not entirely true, since at least SSE4.1 X86 knows how to do
those sextloads/zextloads (with PMOVS/ZX).
But there are several aspects to getting this right.
First, vector extloads are controlled by a profitability callback.
For instance, on ARM, several instructions have folded extload forms,
so it's not always beneficial to create an extload node (and trying to
match extloads is a whole 'nother can of worms).
The interesting optimization enables folding of s/zextloads to illegal
(splittable) vector types, expanding them into smaller legal extloads.
It's not ideal (it introduces some legalization-like behavior in the
combine) but it's better than the obvious alternative: form illegal
extloads, and later try to split them up. If you do that, you might
generate extloads that can't be split up, but have a valid ext+load
expansion. At vector-op legalization time, it's too late to generate
this kind of code, so you end up forced to scalarize. It's better to
just avoid creating egregiously illegal nodes.
This optimization is enabled unconditionally on X86.
Note that the splitting combine is happy with "custom" extloads. As
is, this bypasses the actual custom lowering, and just unrolls the
extload. But from what I've seen, this is still much better than the
current custom lowering, which does some kind of unrolling at the end
anyway (see for instance load_sext_4i8_to_4i64 on SSE2, and the added
FIXME).
Also note that the existing combine that forms extloads is now also
enabled on legal vectors. This doesn't have a big effect on X86
(because sext+load is usually combined to sext_inreg+aextload).
On ARM it fires on some rare occasions; that's for a separate commit.
Differential Revision: http://reviews.llvm.org/D6904
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228325
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Ahmed Bougacha [Thu, 5 Feb 2015 18:15:59 +0000 (18:15 +0000)]
[CodeGen] Add isLoadExtLegalOrCustom helper to TargetLowering.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228322
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Andrew Trick [Thu, 5 Feb 2015 18:09:05 +0000 (18:09 +0000)]
X86 ABI fix for return values > 24 bytes.
The return value's address must be returned in %rax.
i.e. the callee needs to copy the sret argument (%rdi)
into the return value (%rax).
This probably won't manifest as a bug when the caller is LLVM-compiled
code. But it is an ABI guarantee and tools expect it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228321
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Colin LeMahieu [Thu, 5 Feb 2015 17:49:13 +0000 (17:49 +0000)]
[Hexagon] Renaming A2_addi and formatting.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228318
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Sanjay Patel [Thu, 5 Feb 2015 17:33:59 +0000 (17:33 +0000)]
move fold comments to the corresponding fold; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228317
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Colin LeMahieu [Thu, 5 Feb 2015 17:32:17 +0000 (17:32 +0000)]
[Hexagon] Since decoding conflicts have been resolved, isCodeGenOnly = 0 by default and remove explicitly setting it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228316
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Sylvestre Ledru [Thu, 5 Feb 2015 17:00:23 +0000 (17:00 +0000)]
Identical code for different branches (CID
1254883)
Reviewers: kledzik, rafael
Reviewed By: rafael
Subscribers: llvm-commits
Differential Revision: http://reviews.llvm.org/D6303
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228313
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Hans Wennborg [Thu, 5 Feb 2015 16:58:10 +0000 (16:58 +0000)]
LowerSwitch: Use ConstantInt for CaseRange::{Low,High}
Case values are always ConstantInt. This allows us to remove
a bunch of casts. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228312
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Hans Wennborg [Thu, 5 Feb 2015 16:50:27 +0000 (16:50 +0000)]
LowerSwitch: remove default args from CaseRange ctor; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228311
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Sylvestre Ledru [Thu, 5 Feb 2015 16:35:44 +0000 (16:35 +0000)]
revert 228308. The code has changed since the review
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228309
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Sylvestre Ledru [Thu, 5 Feb 2015 16:30:25 +0000 (16:30 +0000)]
Identical code for different branches (CID
1254883)
Reviewers: kledzik, rafael
Reviewed By: rafael
Subscribers: llvm-commits
Differential Revision: http://reviews.llvm.org/D6303
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228308
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Tom Stellard [Thu, 5 Feb 2015 15:32:18 +0000 (15:32 +0000)]
R600/SI: Fix bug in TTI loop unrolling preferences
We should be setting UnrollingPreferences::MaxCount to MAX_UINT instead
of UnrollingPreferences::Count.
Count is a 'forced unrolling factor', while MaxCount sets an upper
limit to the unrolling factor.
Setting Count to MAX_UINT was causing the loop in the testcase to be
unrolled 15 times, when it only had a maximum of 4 iterations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228303
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Tom Stellard [Thu, 5 Feb 2015 15:32:15 +0000 (15:32 +0000)]
R600/SI: Fix bug from insertion of llvm.SI.end.cf into loop headers
The llvm.SI.end.cf intrinsic is used to mark the end of if-then blocks,
if-then-else blocks, and loops. It is responsible for updating the
exec mask to re-enable threads that had been masked during the preceding
control flow block. For example:
s_mov_b64 exec, 0x3 ; Initial exec mask
s_mov_b64 s[0:1], exec ; Saved exec mask
v_cmpx_gt_u32 exec, s[2:3], v0, 0 ; llvm.SI.if
do_stuff()
s_or_b64 exec, exec, s[0:1] ; llvm.SI.end.cf
The bug fixed by this patch was one where the llvm.SI.end.cf intrinsic
was being inserted into the header of loops. This would happen when
an if block terminated in a loop header and we would end up with
code like this:
s_mov_b64 exec, 0x3 ; Initial exec mask
s_mov_b64 s[0:1], exec ; Saved exec mask
v_cmpx_gt_u32 exec, s[2:3], v0, 0 ; llvm.SI.if
do_stuff()
LOOP: ; Start of loop header
s_or_b64 exec, exec, s[0:1] ; llvm.SI.end.cf <-BUG: The exec mask has the
same value at the beginning of each loop
iteration.
do_stuff();
s_cbranch_execnz LOOP
The fix is to create a new basic block before the loop and insert the
llvm.SI.end.cf there. This way the exec mask is restored before the
start of the loop instead of at the beginning of each iteration.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228302
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Bill Schmidt [Thu, 5 Feb 2015 15:24:47 +0000 (15:24 +0000)]
[PowerPC] Implement the vclz instructions for PWR8
Patch by Kit Barton.
Add the vector count leading zeros instruction for byte, halfword,
word, and doubleword sizes. This is a fairly straightforward addition
after the changes made for vpopcnt:
1. Add the correct definitions for the various instructions in
PPCInstrAltivec.td
2. Make the CTLZ operation legal on vector types when using P8Altivec
in PPCISelLowering.cpp
Test Plan
Created new test case in test/CodeGen/PowerPC/vec_clz.ll to check the
instructions are being generated when the CTLZ operation is used in
LLVM.
Check the encoding and decoding in test/MC/PowerPC/ppc_encoding_vmx.s
and test/Disassembler/PowerPC/ppc_encoding_vmx.txt respectively.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228301
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Rafael Espindola [Thu, 5 Feb 2015 14:57:47 +0000 (14:57 +0000)]
Add a FIXME.
Thanks to Eric for the suggestion.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228300
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Aaron Ballman [Thu, 5 Feb 2015 13:52:42 +0000 (13:52 +0000)]
Removing an unused variable warning I accidentally introduced with my last warning fix; NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228295
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Aaron Ballman [Thu, 5 Feb 2015 13:40:04 +0000 (13:40 +0000)]
Silencing an MSVC warning about a switch statement with no cases; NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228294
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Bruno Cardoso Lopes [Thu, 5 Feb 2015 13:23:07 +0000 (13:23 +0000)]
[X86][MMX] Handle i32->mmx conversion using movd
Implement a BITCAST dag combine to transform i32->mmx conversion patterns
into a X86 specific node (MMX_MOVW2D) and guarantee that moves between
i32 and x86mmx are better handled, i.e., don't use store-load to do the
conversion..
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228293
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Bruno Cardoso Lopes [Thu, 5 Feb 2015 13:22:57 +0000 (13:22 +0000)]
[X86][MMX] Add several bitcast tests
Avoid regression in previously supported MMX code by adding different
combinations of tests which exercise MMX bitcasts. Small improvements
to these patterns should come next.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228292
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Bruno Cardoso Lopes [Thu, 5 Feb 2015 13:22:50 +0000 (13:22 +0000)]
[X86][MMX] Move MMX DAG node to proper file
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228291
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Michael Kuperstein [Thu, 5 Feb 2015 09:15:37 +0000 (09:15 +0000)]
Teach isDereferenceablePointer() to look through bitcast constant expressions.
This fixes a LICM regression due to the new load+store pair canonicalization.
Differential Revision: http://reviews.llvm.org/D7411
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228284
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Craig Topper [Thu, 5 Feb 2015 08:51:06 +0000 (08:51 +0000)]
[X86] Add xrstors/xsavec/xsaves/clflushopt/clwb/pcommit instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228283
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Craig Topper [Thu, 5 Feb 2015 08:51:02 +0000 (08:51 +0000)]
[X86] Remove two feature flags that covered sets of instructions that have no patterns or intrinsics. Since we don't check feature flags in the assembler parser for any instruction sets, these flags don't provide any value. This frees up 2 of the fully utilized feature flags.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228282
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Matt Arsenault [Thu, 5 Feb 2015 06:05:13 +0000 (06:05 +0000)]
R600/SI: Fix i64 truncate to i1
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228273
91177308-0d34-0410-b5e6-
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Larisse Voufo [Thu, 5 Feb 2015 04:54:51 +0000 (04:54 +0000)]
Disable enumeral mismatch warning when compiling llvm with gcc.
Tested with gcc 4.9.2.
Compiling with -Werror was producing:
.../llvm/lib/Target/X86/X86ISelLowering.cpp: In function 'llvm::SDValue lowerVectorShuffleAsBitMask(llvm::SDLoc, llvm::MVT, llvm::SDValue, llvm::SDValue, llvm::ArrayRef<int>, llvm::SelectionDAG&)':
.../llvm/lib/Target/X86/X86ISelLowering.cpp:7771:40: error: enumeral mismatch in conditional expression: 'llvm::X86ISD::NodeType' vs 'llvm::ISD::NodeType' [-Werror=enum-compare]
V = DAG.getNode(VT.isFloatingPoint() ? X86ISD::FAND : ISD::AND, DL, VT, V,
^
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228271
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Matt Arsenault [Thu, 5 Feb 2015 03:35:34 +0000 (03:35 +0000)]
Add addrspacecast node to tablegen
The node is still defined oddly so that the
address spaces are not operands and not accessible
from tablegen, but as-is this can now be used to write
a ComplexPattern with an addrspacecast root node.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228270
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Matt Arsenault [Thu, 5 Feb 2015 03:30:08 +0000 (03:30 +0000)]
Add support for double / float to EndianStream
Also add new unit tests for endian::Writer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228269
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Michael Zolotukhin [Thu, 5 Feb 2015 02:34:00 +0000 (02:34 +0000)]
Implement new heuristic for complete loop unrolling.
Complete loop unrolling can make some loads constant, thus enabling a
lot of other optimizations. To catch such cases, we look for loads that
might become constants and estimate number of instructions that would be
simplified or become dead after substitution.
Example:
Suppose we have:
int a[] = {0, 1, 0};
v = 0;
for (i = 0; i < 3; i ++)
v += b[i]*a[i];
If we completely unroll the loop, we would get:
v = b[0]*a[0] + b[1]*a[1] + b[2]*a[2]
Which then will be simplified to:
v = b[0]* 0 + b[1]* 1 + b[2]* 0
And finally:
v = b[1]
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228265
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Cameron Esfahani [Thu, 5 Feb 2015 02:09:33 +0000 (02:09 +0000)]
Value soft float calls as more expensive in the inliner.
Summary: When evaluating floating point instructions in the inliner, ask the TTI whether it is an expensive operation. By default, it's not an expensive operation. This keeps the default behavior the same as before. The ARM TTI has been updated to return back TCC_Expensive for targets which don't have hardware floating point.
Reviewers: chandlerc, echristo
Reviewed By: echristo
Subscribers: t.p.northover, aemerson, llvm-commits
Differential Revision: http://reviews.llvm.org/D6936
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228263
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Ahmed Bougacha [Thu, 5 Feb 2015 01:52:19 +0000 (01:52 +0000)]
[ARM] Use patterns instead of hardcoded regs in test. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228259
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Ahmed Bougacha [Thu, 5 Feb 2015 01:45:28 +0000 (01:45 +0000)]
[ARM] Make testcase more explicit. NFC.
The q8/d16 thing is silly; I'd be happy to hear about a better
way to write those tests where simple substitution isn't enough..
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228258
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Reid Kleckner [Thu, 5 Feb 2015 01:23:14 +0000 (01:23 +0000)]
Try to fix the build in MCValue.cpp
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228256
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Sean Silva [Thu, 5 Feb 2015 01:13:47 +0000 (01:13 +0000)]
Fixup.
Didn't see these calls in my release build locally when testing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228254
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Duncan P. N. Exon Smith [Thu, 5 Feb 2015 01:07:47 +0000 (01:07 +0000)]
IR: Split out getOperandAs(), NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228250
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Sean Silva [Thu, 5 Feb 2015 00:58:51 +0000 (00:58 +0000)]
[MC] Remove various unused MCAsmInfo parameters.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228244
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Duncan P. N. Exon Smith [Thu, 5 Feb 2015 00:51:35 +0000 (00:51 +0000)]
IR: Rename 'operator ==()' to 'isKeyOf()', NFC
`isKeyOf()` is a clearer name than overloading `operator==()`.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228242
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Duncan P. N. Exon Smith [Thu, 5 Feb 2015 00:17:43 +0000 (00:17 +0000)]
ADT: Add int64_t interoperability to APSInt
Add some API to `APSInt` to make it easier to compare with `int64_t`.
- `APSInt::compareValues(APSInt, APSInt)` returns 1, -1 or 0 for
greater, lesser, or equal, doing the right thing for mismatched
"has-sign" and bitwidths. This is just like `isSameValue()` (and is
now the implementation of it).
- `APSInt::get(int64_t)` gets a signed `APSInt`.
- `operator<(int64_t)`, etc., are implemented trivially via `get()`
and `compareValues()`.
- Also added `APSInt::getUnsigned(uint64_t)` to make it easier to test
`compareValues()`.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228239
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