OSDN Git Service
Sanjoy Das [Thu, 26 Jan 2017 01:07:33 +0000 (01:07 +0000)]
[ImplicitNullChecks] Add a test demonstrating a case we don't get today
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@293126
91177308-0d34-0410-b5e6-
96231b3b80d8
Kostya Serebryany [Thu, 26 Jan 2017 01:04:54 +0000 (01:04 +0000)]
[libFuzzer] simplify the code for __sanitizer_cov_trace_pc_guard and make sure it is not asan/msan-instrumented
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@293125
91177308-0d34-0410-b5e6-
96231b3b80d8
Michael Kuperstein [Thu, 26 Jan 2017 01:04:11 +0000 (01:04 +0000)]
[LoopUnroll] Properly update loopinfo for runtime unrolling by 2
Even when we don't create a remainder loop (that is, when we unroll by 2), we
may duplicate nested loops into the remainder. This is complicated by the fact
the remainder may itself be either inserted into an outer loop, or at the top
level. In the latter case, we may need to create new top-level loops.
Differential Revision: https://reviews.llvm.org/D29156
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@293124
91177308-0d34-0410-b5e6-
96231b3b80d8
Davide Italiano [Thu, 26 Jan 2017 00:42:42 +0000 (00:42 +0000)]
[NewGVN] Skip uses in unreachable blocks.
Otherwise we ask for a domtree node that's not there, and we crash.
Differential Revision: https://reviews.llvm.org/D29145
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@293122
91177308-0d34-0410-b5e6-
96231b3b80d8
Adam Nemet [Thu, 26 Jan 2017 00:39:51 +0000 (00:39 +0000)]
[llc] Add -pass-remarks-output
This is the opt/llc counterpart of -fsave-optimization-record to output
optimization remarks in a YAML file.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@293121
91177308-0d34-0410-b5e6-
96231b3b80d8
Peter Collingbourne [Thu, 26 Jan 2017 00:32:15 +0000 (00:32 +0000)]
LowerTypeTests: Ignore external globals with type metadata.
Thanks to Davide Italiano for finding the problem and providing a test case.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@293119
91177308-0d34-0410-b5e6-
96231b3b80d8
Kostya Serebryany [Thu, 26 Jan 2017 00:22:08 +0000 (00:22 +0000)]
[libFuzzer] don't call GetPreviousInstructionPc on the hot path -- only when dumping the PCs
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@293117
91177308-0d34-0410-b5e6-
96231b3b80d8
Tim Shen [Thu, 26 Jan 2017 00:11:07 +0000 (00:11 +0000)]
[APFloat] Fix comments. NFC.
Summary: Fix comments in response to jlebar's comments in D27872.
Reviewers: jlebar
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D29109
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@293116
91177308-0d34-0410-b5e6-
96231b3b80d8
Justin Lebar [Thu, 26 Jan 2017 00:10:26 +0000 (00:10 +0000)]
[ValueTracking] Implement SignBitMustBeZero correctly for sqrt.
Summary:
Previously we assumed that the result of sqrt(x) always had 0 as its
sign bit. But sqrt(-0) == -0.
Reviewers: hfinkel, efriedma, sanjoy
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D28928
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@293115
91177308-0d34-0410-b5e6-
96231b3b80d8
Kevin Enderby [Wed, 25 Jan 2017 23:57:32 +0000 (23:57 +0000)]
Change the test added in r293099 so it does not have the string "llvm-nm" to fix
the clang-x86-windows-msvc2015 bot as the name is "llvm-nm.EXE" in that case.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@293114
91177308-0d34-0410-b5e6-
96231b3b80d8
Adam Nemet [Wed, 25 Jan 2017 23:55:59 +0000 (23:55 +0000)]
[llc] Add -pass-remarks-with-hotness
Analogous to the code in opt, this enables hotness in opt-remarks.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@293113
91177308-0d34-0410-b5e6-
96231b3b80d8
Davide Italiano [Wed, 25 Jan 2017 23:37:49 +0000 (23:37 +0000)]
[NewGVN] Simplify folding a lambda used only once. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@293112
91177308-0d34-0410-b5e6-
96231b3b80d8
Adam Nemet [Wed, 25 Jan 2017 23:20:33 +0000 (23:20 +0000)]
New OptimizationRemarkEmitter pass for MIR
This allows MIR passes to emit optimization remarks with the same level
of functionality that is available to IR passes.
It also hooks up the greedy register allocator to report spills. This
allows for interesting use cases like increasing interleaving on a loop
until spilling of registers is observed.
I still need to experiment whether reporting every spill scales but this
demonstrates for now that the functionality works from llc
using -pass-remarks*=<pass>.
Differential Revision: https://reviews.llvm.org/D29004
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@293110
91177308-0d34-0410-b5e6-
96231b3b80d8
Adam Nemet [Wed, 25 Jan 2017 23:20:25 +0000 (23:20 +0000)]
[OptDiag] Split code region out of DiagnosticInfoOptimizationBase
Code region is the only part of this class that is IR-specific. Code
region is moved down in the inheritance tree to a new derived class,
called DiagnosticInfoIROptimization.
All the existing remarks are derived from this new class now.
This allows the new MIR pass-remark classes to be derived from
DiagnosticInfoOptimizationBase.
Also because we keep the name DiagnosticInfoOptimizationBase, the clang
parts don't need any adjustment.
Differential Revision: https://reviews.llvm.org/D29003
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@293109
91177308-0d34-0410-b5e6-
96231b3b80d8
Adrian McCarthy [Wed, 25 Jan 2017 22:48:57 +0000 (22:48 +0000)]
Fix for r293104, which renamed a directory.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@293105
91177308-0d34-0410-b5e6-
96231b3b80d8
Adrian McCarthy [Wed, 25 Jan 2017 22:38:55 +0000 (22:38 +0000)]
NFC: Rename (PDB) RawSession to NativeSession
This eliminates one overload on the term Raw.
Differential Revision: https://reviews.llvm.org/D29098
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@293104
91177308-0d34-0410-b5e6-
96231b3b80d8
Peter Collingbourne [Wed, 25 Jan 2017 21:50:14 +0000 (21:50 +0000)]
LangRef: Document the allowed metadata dropping transforms.
Document the current practice regarding dropping metadata on modules,
functions and global variables.
Differential Revision: https://reviews.llvm.org/D29110
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@293101
91177308-0d34-0410-b5e6-
96231b3b80d8
Kevin Enderby [Wed, 25 Jan 2017 21:33:38 +0000 (21:33 +0000)]
Add a warning when the llvm-nm -print-size flag is used on a Mach-O file as
Mach-O files don’t have size information about the symbols in the object file
format unlike ELF.
Also add the part of the fix to llvm-nm that was missed with r290001 so
-arch armv7m works.
rdar://
25681018
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@293099
91177308-0d34-0410-b5e6-
96231b3b80d8
Daniel Jasper [Wed, 25 Jan 2017 21:21:08 +0000 (21:21 +0000)]
Revert "[PPC] Give unaligned memory access lower cost on processor that supports it"
This reverts commit r292680. It is causing significantly worse
performance and test timeouts in our internal builds. I have already
routed reproduction instructions your way.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@293092
91177308-0d34-0410-b5e6-
96231b3b80d8
Zachary Turner [Wed, 25 Jan 2017 21:21:02 +0000 (21:21 +0000)]
[pdb] Fix failing test
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@293091
91177308-0d34-0410-b5e6-
96231b3b80d8
Zachary Turner [Wed, 25 Jan 2017 21:17:40 +0000 (21:17 +0000)]
[pdb] Correctly parse the hash adjusters table from TPI stream.
This is not a list of pairs, it is a hash table data structure. We now
correctly parse this out and dump it from llvm-pdbdump.
We still need to understand the conditions that lead to a type
getting an entry in the hash adjuster table. That will be done
in a followup investigation / patch.
Differential Revision: https://reviews.llvm.org/D29090
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@293090
91177308-0d34-0410-b5e6-
96231b3b80d8
Tim Northover [Wed, 25 Jan 2017 20:58:26 +0000 (20:58 +0000)]
SDag: fix how initial loads are formed when splitting vector ops.
Later code expects the vector loads produced to be directly
concatenable, which means we shouldn't pad anything except the last load
produced with UNDEF.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@293088
91177308-0d34-0410-b5e6-
96231b3b80d8
Tim Northover [Wed, 25 Jan 2017 20:58:22 +0000 (20:58 +0000)]
GlobalISel: rework getOrCreateVReg to avoid double lookup. NFC.
Thanks to Quentin for suggesting the refactoring.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@293087
91177308-0d34-0410-b5e6-
96231b3b80d8
Tim Northover [Wed, 25 Jan 2017 20:58:07 +0000 (20:58 +0000)]
DebugInfo: remove unused parameter from function. NFC.
I think it's a hold-over from some previous iteration, but it's never
set to true in LLVM as it exists now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@293086
91177308-0d34-0410-b5e6-
96231b3b80d8
Daniel Berlin [Wed, 25 Jan 2017 20:56:19 +0000 (20:56 +0000)]
MemorySSA: Link all defs together into an intrusive defslist, to make updater easier
Summary:
This is the first in a series of patches to add a simple, generalized updater to MemorySSA.
For MemorySSA, every def is may-def, instead of the normal must-def.
(the best way to think of memoryssa is "everything is really one variable, with different versions of that variable at different points in the program).
This means when updating, we end up having to do a bunch of work to touch defs below and above us.
In order to support this quickly, i have ilist'd all the defs for each block. ilist supports tags, so this is quite easy. the only slightly messy part is that you can't have two iplists for the same type that differ only whether they have the ownership part enabled or not, because the traits are for the value type.
The verifiers have been updated to test that the def order is correct.
Reviewers: george.burgess.iv
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D29046
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@293085
91177308-0d34-0410-b5e6-
96231b3b80d8
Konstantin Zhuravlyov [Wed, 25 Jan 2017 20:47:17 +0000 (20:47 +0000)]
[AMDGPU] Bump up n_type for metadata v2
Differential Revision: https://reviews.llvm.org/D29115
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@293083
91177308-0d34-0410-b5e6-
96231b3b80d8
Matt Arsenault [Wed, 25 Jan 2017 20:21:57 +0000 (20:21 +0000)]
AMDGPU: Set call_convention bit in kernel_code_t
According to the documentation this is supposed to be -1
if indirect calls are not supported.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@293081
91177308-0d34-0410-b5e6-
96231b3b80d8
Serge Rogatch [Wed, 25 Jan 2017 20:21:49 +0000 (20:21 +0000)]
[XRay][AArch64] More staging for tail call support in XRay on AArch64 - in LLVM
Summary:
This patch prepares more for tail call support in XRay. Until the logging part supports tail calls, this is just staging, so it seems LLVM part is mostly ready with this patch.
Related: https://reviews.llvm.org/D28948 (compiler-rt)
Reviewers: dberris, rengolin
Reviewed By: dberris
Subscribers: llvm-commits, iid_iunknown, aemerson
Differential Revision: https://reviews.llvm.org/D28947
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@293080
91177308-0d34-0410-b5e6-
96231b3b80d8
Krzysztof Parzyszek [Wed, 25 Jan 2017 19:29:04 +0000 (19:29 +0000)]
Add iterator_range<regclass_iterator> to {Target,MC}RegisterInfo, NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@293077
91177308-0d34-0410-b5e6-
96231b3b80d8
Alexey Bataev [Wed, 25 Jan 2017 17:24:31 +0000 (17:24 +0000)]
[SLP] Extra test for functionality with extra args.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@293076
91177308-0d34-0410-b5e6-
96231b3b80d8
Chad Rosier [Wed, 25 Jan 2017 17:15:48 +0000 (17:15 +0000)]
Revert "Do not verify dominator tree if it has no roots"
This reverts commit r293033, per Danny's comment. In short, we require
domtrees to have roots at all times.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@293075
91177308-0d34-0410-b5e6-
96231b3b80d8
Matthias Braun [Wed, 25 Jan 2017 17:12:10 +0000 (17:12 +0000)]
PowerPC: Slight cleanup of getReservedRegs(); NFC
Change getReservedRegs() to not mark a register as reserved and then
revert that decision in some cases. Motivated by the discussion in
https://reviews.llvm.org/D29056
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@293073
91177308-0d34-0410-b5e6-
96231b3b80d8
Krzysztof Parzyszek [Wed, 25 Jan 2017 16:12:25 +0000 (16:12 +0000)]
Add loop pass insertion point EP_LateLoopOptimizations
Differential Revision: https://reviews.llvm.org/D28694
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@293067
91177308-0d34-0410-b5e6-
96231b3b80d8
Artur Pilipenko [Wed, 25 Jan 2017 16:00:44 +0000 (16:00 +0000)]
[Guards] Introduce loop-predication pass
This patch introduces guard based loop predication optimization. The new LoopPredication pass tries to convert loop variant range checks to loop invariant by widening checks across loop iterations. For example, it will convert
for (i = 0; i < n; i++) {
guard(i < len);
...
}
to
for (i = 0; i < n; i++) {
guard(n - 1 < len);
...
}
After this transformation the condition of the guard is loop invariant, so loop-unswitch can later unswitch the loop by this condition which basically predicates the loop by the widened condition:
if (n - 1 < len)
for (i = 0; i < n; i++) {
...
}
else
deoptimize
This patch relies on an NFC change to make ScalarEvolution::isMonotonicPredicate public (revision 293062).
Reviewed By: sanjoy
Differential Revision: https://reviews.llvm.org/D29034
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@293064
91177308-0d34-0410-b5e6-
96231b3b80d8
Chad Rosier [Wed, 25 Jan 2017 15:56:59 +0000 (15:56 +0000)]
[AArch64] Minor code refactoring. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@293063
91177308-0d34-0410-b5e6-
96231b3b80d8
Artur Pilipenko [Wed, 25 Jan 2017 15:07:55 +0000 (15:07 +0000)]
NFC. Make ScalarEvolution::isMonotonicPredicate public
Will be used by the upcoming LoopPredication optimization.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@293062
91177308-0d34-0410-b5e6-
96231b3b80d8
Artur Pilipenko [Wed, 25 Jan 2017 14:45:12 +0000 (14:45 +0000)]
[InstCombine] Canonicalize guards for NOT OR condition
This is a partial fix for Bug 31520 - [guards] canonicalize guards in instcombine
Reviewed By: apilipenko
Differential Revision: https://reviews.llvm.org/D29075
Patch by Maxim Kazantsev.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@293061
91177308-0d34-0410-b5e6-
96231b3b80d8
Simon Pilgrim [Wed, 25 Jan 2017 14:37:24 +0000 (14:37 +0000)]
[InstCombine][SSE] Add support for PACKSS/PACKUS constant folding
Differential Revision: https://reviews.llvm.org/D28949
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@293060
91177308-0d34-0410-b5e6-
96231b3b80d8
Martin Bohme [Wed, 25 Jan 2017 14:28:19 +0000 (14:28 +0000)]
[ARM] GlobalISel: Fix stack-use-after-scope bug.
Summary:
Lifetime extension wasn't triggered on the result of BuildMI because the
reference was non-const. However, instead of adding a const, I've
removed the reference entirely as RVO should kick in anyway.
Reviewers: rovka, bkramer
Reviewed By: bkramer
Subscribers: aemerson, rengolin, dberris, llvm-commits, kristof.beyls
Differential Revision: https://reviews.llvm.org/D29124
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@293059
91177308-0d34-0410-b5e6-
96231b3b80d8
Artur Pilipenko [Wed, 25 Jan 2017 14:20:52 +0000 (14:20 +0000)]
[InstCombine] Canonicalize guards for AND condition
This is a partial fix for Bug 31520 - [guards] canonicalize guards in instcombine
Reviewed By: apilipenko
Differential Revision: https://reviews.llvm.org/D29074
Patch by Maxim Kazantsev.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@293058
91177308-0d34-0410-b5e6-
96231b3b80d8
Artur Pilipenko [Wed, 25 Jan 2017 14:12:12 +0000 (14:12 +0000)]
[InstCombine] Allow InstrCombine to remove one of adjacent guards if they are equivalent
This is a partial fix for Bug 31520 - [guards] canonicalize guards in instcombine
Reviewed By: majnemer, apilipenko
Differential Revision: https://reviews.llvm.org/D29071
Patch by Maxim Kazantsev.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@293056
91177308-0d34-0410-b5e6-
96231b3b80d8
Alexey Bataev [Wed, 25 Jan 2017 09:54:38 +0000 (09:54 +0000)]
[SLP] Improve horizontal vectorization for non-power-of-2 number of
instructions.
If number of instructions in horizontal reduction list is not power of 2
then only PowerOf2Floor(NumberOfInstructions) last elements are actually
vectorized, other instructions remain scalar. Patch tries to vectorize
the remaining elements either.
Differential Revision: https://reviews.llvm.org/D28959
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@293042
91177308-0d34-0410-b5e6-
96231b3b80d8
whitequark [Wed, 25 Jan 2017 09:32:30 +0000 (09:32 +0000)]
Mark @llvm.powi.* as safe to speculatively execute.
Floating point intrinsics in LLVM are generally not speculatively
executed, since most of them are defined to behave the same as libm
functions, which set errno.
However, the @llvm.powi.* intrinsics do not correspond to any libm
function, and lacks any defined error handling semantics in LangRef.
It most certainly does not alter errno.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@293041
91177308-0d34-0410-b5e6-
96231b3b80d8
Mohammed Agabaria [Wed, 25 Jan 2017 09:14:48 +0000 (09:14 +0000)]
[X86] enable memory interleaving for X86\SLM arch.
Differential Revision: https://reviews.llvm.org/D28547
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@293040
91177308-0d34-0410-b5e6-
96231b3b80d8
Artur Pilipenko [Wed, 25 Jan 2017 09:10:07 +0000 (09:10 +0000)]
Fix buildbot failures introduced by 293036
Fix unused variable, specify types explicitly to make VC compiler happy.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@293039
91177308-0d34-0410-b5e6-
96231b3b80d8
Artur Pilipenko [Wed, 25 Jan 2017 08:53:31 +0000 (08:53 +0000)]
[DAGCombiner] Match load by bytes idiom and fold it into a single load. Attempt #2.
The previous patch (https://reviews.llvm.org/rL289538) got reverted because of a bug. Chandler also requested some changes to the algorithm.
http://lists.llvm.org/pipermail/llvm-commits/Week-of-Mon-
20161212/413479.html
This is an updated patch. The key difference is that collectBitProviders (renamed to calculateByteProvider) now collects the origin of one byte, not the whole value. It simplifies the implementation and allows to stop the traversal earlier if we know that the result won't be used.
From the original commit:
Match a pattern where a wide type scalar value is loaded by several narrow loads and combined by shifts and ors. Fold it into a single load or a load and a bswap if the targets supports it.
Assuming little endian target:
i8 *a = ...
i32 val = a[0] | (a[1] << 8) | (a[2] << 16) | (a[3] << 24)
=>
i32 val = *((i32)a)
i8 *a = ...
i32 val = (a[0] << 24) | (a[1] << 16) | (a[2] << 8) | a[3]
=>
i32 val = BSWAP(*((i32)a))
This optimization was discussed on llvm-dev some time ago in "Load combine pass" thread. We came to the conclusion that we want to do this transformation late in the pipeline because in presence of atomic loads load widening is irreversible transformation and it might hinder other optimizations.
Eventually we'd like to support folding patterns like this where the offset has a variable and a constant part:
i32 val = a[i] | (a[i + 1] << 8) | (a[i + 2] << 16) | (a[i + 3] << 24)
Matching the pattern above is easier at SelectionDAG level since address reassociation has already happened and the fact that the loads are adjacent is clear. Understanding that these loads are adjacent at IR level would have involved looking through geps/zexts/adds while looking at the addresses.
The general scheme is to match OR expressions by recursively calculating the origin of individual bytes which constitute the resulting OR value. If all the OR bytes come from memory verify that they are adjacent and match with little or big endian encoding of a wider value. If so and the load of the wider type (and bswap if needed) is allowed by the target generate a load and a bswap if needed.
Reviewed By: RKSimon, filcab, chandlerc
Differential Revision: https://reviews.llvm.org/D27861
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@293036
91177308-0d34-0410-b5e6-
96231b3b80d8
Diana Picus [Wed, 25 Jan 2017 08:47:40 +0000 (08:47 +0000)]
[ARM] GlobalISel: Support i1 add and ABI extensions
Add support for:
* i1 add
* i1 function arguments, if passed through registers
* i1 returns, with ABI signext/zeroext
Differential Revision: https://reviews.llvm.org/D27706
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@293035
91177308-0d34-0410-b5e6-
96231b3b80d8
Diana Picus [Wed, 25 Jan 2017 08:10:40 +0000 (08:10 +0000)]
[ARM] GlobalISel: Support i8/i16 ABI extensions
At the moment, this means supporting the signext/zeroext attribute on the return
type of the function. For function arguments, signext/zeroext should be handled
by the caller, so there's nothing for us to do until we start lowering calls.
Note that this does not include support for other extensions (i8 to i16), those
will be added later.
Differential Revision: https://reviews.llvm.org/D27705
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@293034
91177308-0d34-0410-b5e6-
96231b3b80d8
Serge Pavlov [Wed, 25 Jan 2017 07:58:10 +0000 (07:58 +0000)]
Do not verify dominator tree if it has no roots
If dominator tree has no roots, the pass that calculates it is
likely to be skipped. It occures, for instance, in the case of
entities with linkage available_externally. Do not run tree
verification in such case.
Differential Revision: https://reviews.llvm.org/D28767
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@293033
91177308-0d34-0410-b5e6-
96231b3b80d8
Dean Michael Berris [Wed, 25 Jan 2017 07:14:43 +0000 (07:14 +0000)]
Implemented color coding and Vertex labels in XRay Graph
Summary:
A patch to enable the llvm-xray graph subcommand to color edges and
vertices based on statistics and to annotate vertices with statistics.
Depends on D27243
Reviewers: dblaikie, dberris
Reviewed By: dberris
Subscribers: mgorny, llvm-commits
Differential Revision: https://reviews.llvm.org/D28225
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@293031
91177308-0d34-0410-b5e6-
96231b3b80d8
Coby Tayree [Wed, 25 Jan 2017 07:09:42 +0000 (07:09 +0000)]
[X86]Enable the use of 'mov' with a 64bit GPR and a large immediate
Enable the next form (intel style):
"mov <reg64>, <largeImm>"
which is should be available,
where <largeImm> stands for immediates which exceed the range of a singed 32bit integer
Differential Revision: https://reviews.llvm.org/D28988
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@293030
91177308-0d34-0410-b5e6-
96231b3b80d8
Diana Picus [Wed, 25 Jan 2017 07:08:53 +0000 (07:08 +0000)]
[ARM] GlobalISel: Bail out on Thumb. NFC
Thumb is not supported yet, so bail out early.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@293029
91177308-0d34-0410-b5e6-
96231b3b80d8
Matt Arsenault [Wed, 25 Jan 2017 06:27:02 +0000 (06:27 +0000)]
AMDGPU: Check nsz instead of unsafe math
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@293028
91177308-0d34-0410-b5e6-
96231b3b80d8
Akira Hatanaka [Wed, 25 Jan 2017 06:21:51 +0000 (06:21 +0000)]
[SimplifyCFG] Do not sink and merge inline-asm instructions.
Conservatively disable sinking and merging inline-asm instructions as doing so
can potentially create arguments that cannot satisfy the inline-asm constraints.
For example, SimplifyCFG used to do the following transformation:
(before)
if.then:
%0 = call i32 asm "rorl $2, $0", "=&r,0,n"(i32 %r6, i32 8)
br label %if.end
if.else:
%1 = call i32 asm "rorl $2, $0", "=&r,0,n"(i32 %r6, i32 6)
br label %if.end
(after)
%.sink = select i1 %tobool, i32 6, i32 8
%0 = call i32 asm "rorl $2, $0", "=&r,0,n"(i32 %r6, i32 %.sink)
This would result in a crash in the backend since only immediate integer operands
are permitted for constraint "n".
rdar://problem/
30110806
Differential Revision: https://reviews.llvm.org/D29111
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@293025
91177308-0d34-0410-b5e6-
96231b3b80d8
Matt Arsenault [Wed, 25 Jan 2017 06:08:42 +0000 (06:08 +0000)]
DAG: Recognize no-signed-zeros-fp-math attribute
clang already emits this with -cl-no-signed-zeros, but codegen
doesn't do anything with it. Treat it like the other fast math
attributes, and change one place to use it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@293024
91177308-0d34-0410-b5e6-
96231b3b80d8
Justin Bogner [Wed, 25 Jan 2017 06:02:10 +0000 (06:02 +0000)]
GlobalISel: Fix typo in error message
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@293023
91177308-0d34-0410-b5e6-
96231b3b80d8
NAKAMURA Takumi [Wed, 25 Jan 2017 05:26:23 +0000 (05:26 +0000)]
Ignore llvm/test/tools/llvm-symbolizer/coff-exports.test on mingw.
FIXME: Demangler could behave along not host but target.
For example, assume host=mingw, target=msc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@293021
91177308-0d34-0410-b5e6-
96231b3b80d8
Matt Arsenault [Wed, 25 Jan 2017 04:54:34 +0000 (04:54 +0000)]
DAGCombiner: Allow negating ConstantFP after legalize
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@293019
91177308-0d34-0410-b5e6-
96231b3b80d8
Gerolf Hoflehner [Wed, 25 Jan 2017 04:34:59 +0000 (04:34 +0000)]
[InstCombine] Added regression test to narrow-swich.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@293018
91177308-0d34-0410-b5e6-
96231b3b80d8
NAKAMURA Takumi [Wed, 25 Jan 2017 04:26:29 +0000 (04:26 +0000)]
Rewind instantiations of OuterAnalysisManagerProxy in r289317, r291651, and r291662.
I found root class should be instantiated for variadic tempate to instantiate static member explicitly.
This will fix failures in mingw DLL build.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@293017
91177308-0d34-0410-b5e6-
96231b3b80d8
Matt Arsenault [Wed, 25 Jan 2017 04:25:02 +0000 (04:25 +0000)]
AMDGPU: Implement early ifcvt target hooks.
Leave early ifcvt disabled for now since there are some
shader-db regressions.
This causes some immediate improvements, but could be better.
The cost checking that the pass does is based on critical path
length for out of order CPUs which we do not want so it skips out
on many cases we want.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@293016
91177308-0d34-0410-b5e6-
96231b3b80d8
Peter Collingbourne [Wed, 25 Jan 2017 03:35:28 +0000 (03:35 +0000)]
gold-plugin: Add the file path to the file open error diagnostic.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@293013
91177308-0d34-0410-b5e6-
96231b3b80d8
Ahmed Bougacha [Wed, 25 Jan 2017 02:55:24 +0000 (02:55 +0000)]
Try to prevent build breakage by touching a CMakeLists.txt.
Looks like our cmake goop for handling .inc->td dependencies doesn't
track the .td files.
This manifests as cmake complaining about missing files since r293009.
Force a rerun to avoid that.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@293012
91177308-0d34-0410-b5e6-
96231b3b80d8
Chandler Carruth [Wed, 25 Jan 2017 02:49:01 +0000 (02:49 +0000)]
[PM] Teach LoopUnroll to update the LPM infrastructure as it unrolls
loops.
We do this by reconstructing the newly added loops after the unroll
completes to avoid threading pass manager details through all the mess
of the unrolling infrastructure.
I've enabled some extra assertions in the LPM to try and catch issues
here and enabled a bunch of unroller tests to try and make sure this is
sane.
Currently, I'm manually running loop-simplify when needed. That should
go away once it is folded into the LPM infrastructure.
Differential Revision: https://reviews.llvm.org/D28848
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@293011
91177308-0d34-0410-b5e6-
96231b3b80d8
Ahmed Bougacha [Wed, 25 Jan 2017 02:41:38 +0000 (02:41 +0000)]
[GlobalISel] Generate selector for more integer binop patterns.
This surprisingly isn't NFC because there are patterns to select GPR
sub to SUBSWrr (rather than SUBWrr/rs); SUBS is later optimized to
SUB if NZCV is dead. From ISel's perspective, both are fine.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@293010
91177308-0d34-0410-b5e6-
96231b3b80d8
Ahmed Bougacha [Wed, 25 Jan 2017 02:41:26 +0000 (02:41 +0000)]
[GlobalISel] Rename TargetGlobalISel.td to GISel/SelectionDAGCompat.td
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@293009
91177308-0d34-0410-b5e6-
96231b3b80d8
Greg Parker [Wed, 25 Jan 2017 02:26:03 +0000 (02:26 +0000)]
Reinstate "r292904 - [lit] Allow boolean expressions in REQUIRES and XFAIL
and UNSUPPORTED"
This reverts the revert in r292942.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@293007
91177308-0d34-0410-b5e6-
96231b3b80d8
Gor Nishanov [Wed, 25 Jan 2017 02:25:54 +0000 (02:25 +0000)]
[coroutines] Spill the result of the invoke instruction correctly
Summary:
When we decide that the result of the invoke instruction need to be spilled, we need to insert the spill into a block that is on the normal edge coming out of the invoke instruction. (Prior to this change the code would insert the spill immediately after the invoke instruction, which breaks the IR, since invoke is a terminator instruction).
In the following example, we will split the edge going into %cont and insert the spill there.
```
%r = invoke double @print(double 0.0) to label %cont unwind label %pad
cont:
%0 = call i8 @llvm.coro.suspend(token none, i1 false)
switch i8 %0, label %suspend [i8 0, label %resume
i8 1, label %cleanup]
resume:
call double @print(double %r)
```
Reviewers: majnemer
Reviewed By: majnemer
Subscribers: mehdi_amini, llvm-commits, EricWF
Differential Revision: https://reviews.llvm.org/D29102
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@293006
91177308-0d34-0410-b5e6-
96231b3b80d8
Tom Stellard [Wed, 25 Jan 2017 01:25:13 +0000 (01:25 +0000)]
AMDGPU add support for spilling to a user sgpr pointed buffers
Summary:
This lets you select which sort of spilling you want, either s[0:1] or 64-bit loads from s[0:1].
Patch By: Dave Airlie
Reviewers: nhaehnle, arsenm, tstellarAMD
Reviewed By: arsenm
Subscribers: mareko, llvm-commits, kzhuravl, wdng, yaxunl, tony-tye
Differential Revision: https://reviews.llvm.org/D25428
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@293000
91177308-0d34-0410-b5e6-
96231b3b80d8
Eugene Zelenko [Wed, 25 Jan 2017 00:29:26 +0000 (00:29 +0000)]
[AArch64] Fix some Clang-tidy modernize and Include What You Use warnings; other minor fixes (NFC).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292996
91177308-0d34-0410-b5e6-
96231b3b80d8
Justin Bogner [Wed, 25 Jan 2017 00:16:53 +0000 (00:16 +0000)]
GlobalISel: Use the correct types when translating landingpad instructions
There was a bug here where we were using p0 instead of s32 for the
selector type in the landingpad. Instead of hardcoding these types we
should get the types from the landingpad instruction directly.
Note that we replicate an assert from SDAG here to only support
two-valued landingpads.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292995
91177308-0d34-0410-b5e6-
96231b3b80d8
Kevin Enderby [Tue, 24 Jan 2017 23:41:04 +0000 (23:41 +0000)]
Fix llvm-objdump so it picks a good CPU based for Mach-O files
for CPU_SUBTYPE_ARM_V7S and CPU_SUBTYPE_ARM_V7K.
For these two cpusubtypes they should default to a cortex-a7 CPU
to give proper disassembly without a -mcpu= flag.
rdar://
27431703
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292993
91177308-0d34-0410-b5e6-
96231b3b80d8
Eugene Zelenko [Tue, 24 Jan 2017 23:02:48 +0000 (23:02 +0000)]
[XCore] Fix some Clang-tidy modernize and Include What You Use warnings; other minor fixes (NFC).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292988
91177308-0d34-0410-b5e6-
96231b3b80d8
Matt Arsenault [Tue, 24 Jan 2017 22:18:39 +0000 (22:18 +0000)]
AMDGPU: Remove spurious out branches after a kill
The sequence like this:
v_cmpx_le_f32_e32 vcc, 0, v0
s_branch BB0_30
s_cbranch_execnz BB0_30
; BB#29:
exp null off, off, off, off done vm
s_endpgm
BB0_30:
; %endif110
is likely wrong. The s_branch instruction will unconditionally jump
to BB0_30 and the skip block (exp done + endpgm) inserted for
performing the kill instruction will never be executed. This results
in a GPU hang with Star Ruler 2.
The s_branch instruction is added during the "Control Flow Optimizer"
pass which seems to re-organize the basic blocks, and we assume
that SI_KILL_TERMINATOR is always the last instruction inside a
basic block. Thus, after inserting a skip block we just go to the
next BB without looking at the subsequent instructions after the
kill, and the s_branch op is never removed.
Instead, we should remove the unconditional out branches and let
skip the two instructions if the exec mask is non-zero.
This patch fixes the GPU hang and doesn't introduce any regressions
with "make check".
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=99019
Patch by Samuel Pitoiset <samuel.pitoiset@gmail.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292985
91177308-0d34-0410-b5e6-
96231b3b80d8
Wei Mi [Tue, 24 Jan 2017 22:15:06 +0000 (22:15 +0000)]
Revert rL292621. Caused some internal build bot failures in apple.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292984
91177308-0d34-0410-b5e6-
96231b3b80d8
Eugene Zelenko [Tue, 24 Jan 2017 22:10:43 +0000 (22:10 +0000)]
[SystemZ] Fix some Clang-tidy modernize and Include What You Use warnings; other minor fixes (NFC).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292983
91177308-0d34-0410-b5e6-
96231b3b80d8
Matt Arsenault [Tue, 24 Jan 2017 22:02:15 +0000 (22:02 +0000)]
Enable FeatureFlatForGlobal on Volcanic Islands
This switches to the workaround that HSA defaults to
for the mesa path.
This should be applied to the 4.0 branch.
Patch by Vedran Miletić <vedran@miletic.net>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292982
91177308-0d34-0410-b5e6-
96231b3b80d8
Dehao Chen [Tue, 24 Jan 2017 21:05:51 +0000 (21:05 +0000)]
Explicitly promote indirect calls before sample profile annotation.
Summary: In iterative sample pgo where profile is collected from PGOed binary, we may see indirect call targets promoted and inlined in the profile. Before profile annotation, we need to make this happen in order to annotate correctly on IR. This patch explicitly promotes these indirect calls and inlines them before profile annotation.
Reviewers: xur, davidxl
Reviewed By: davidxl
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D29040
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292979
91177308-0d34-0410-b5e6-
96231b3b80d8
Saleem Abdulrasool [Tue, 24 Jan 2017 20:04:58 +0000 (20:04 +0000)]
Demangle: correct demangling for CV-qualified functions
When demangling a CV-qualified function type with a final reference type
parameter, we would treat the reference type parameter as a r-value ref
accidentally. This would result in the improper decoration of the
function type itself.
Resolves PR31741!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292976
91177308-0d34-0410-b5e6-
96231b3b80d8
Saleem Abdulrasool [Tue, 24 Jan 2017 20:04:56 +0000 (20:04 +0000)]
Demangle: use named values for CV qualifiers
Rather than hard-coding magic values of 1, 2, 4 (bit-field), use an enum
to name the values. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292975
91177308-0d34-0410-b5e6-
96231b3b80d8
Ivan Krasin [Tue, 24 Jan 2017 19:58:59 +0000 (19:58 +0000)]
Revert [AMDGPU][mc][tests][NFC] Add coverage/smoke tests for Gfx7 and Gfx8.
Reason: broke ASAN bots with a global buffer overflow.
http://lab.llvm.org:8011/builders/sanitizer-x86_64-linux-fast/builds/2291
Each test contains 20-30K test cases but takes only several (from 4 to 10)
seconds to complete on average machine. The tests cover the majority of
AMDGPU Gfx7/Gfx8 instructions, including many dark corners, and intended
to quickly find out if something is broken.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292974
91177308-0d34-0410-b5e6-
96231b3b80d8
Daniel Berlin [Tue, 24 Jan 2017 19:55:36 +0000 (19:55 +0000)]
Remove the load hoisting code of MLSM, it is completely subsumed by GVNHoist
Summary:
GVNHoist performs all the optimizations that MLSM does to loads, in a
more general way, and in a faster time bound (MLSM is N^3 in most
cases, N^4 in a few edge cases).
This disables the load portion.
Note that the way ld_hoist_st_sink.ll is written makes one think that
the loads should be moved to the while.preheader block, but
1. Neither MLSM nor GVNHoist do it (they both move them to identical places).
2. MLSM couldn't possibly do it anyway, as the while.preheader block
is not the head of the diamond, while.body is. (GVNHoist could do it
if it was legal).
3. At a glance, it's not legal anyway because the in-loop load
conflict with the in-loop store, so the loads must stay in-loop.
I am happy to update the test to use update_test_checks so that
checking is tighter, just was going to do it as a followup.
Note that i can find no particular benefit to the store portion on any
real testcase/benchmark i have (even size-wise). If we really still
want it, i am happy to commit to writing a targeted store sinker, just
taking the code from the MemorySSA port of MergedLoadStoreMotion
(which is N^2 worst case, and N most of the time).
We can do what it does in a much better time bound.
We also should be both hoisting and sinking stores, not just sinking
them, anyway, since whether we should hoist or sink to merge depends
basically on luck of the draw of where the blockers are placed.
Nonetheless, i have left it alone for now.
Reviewers: chandlerc, davide
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D29079
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292971
91177308-0d34-0410-b5e6-
96231b3b80d8
Changpeng Fang [Tue, 24 Jan 2017 19:06:28 +0000 (19:06 +0000)]
AMDGPU/SI: Give up in promote alloca when a pointer may be captured.
Differential Revision:
http://reviews.llvm.org/D28970
Reviewer:
Matt
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292966
91177308-0d34-0410-b5e6-
96231b3b80d8
Saleem Abdulrasool [Tue, 24 Jan 2017 18:52:19 +0000 (18:52 +0000)]
Demangle: avoid butchering parameter type
When demangling a CV-qualified function type with a final parameter with
a reference type, we would insert the CV qualification on the parameter
rather than the function, and in the process adjust the insertion point
by one extra, splitting the type name. This avoids doing so, even
though the attribution is still incorrect.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292965
91177308-0d34-0410-b5e6-
96231b3b80d8
Chad Rosier [Tue, 24 Jan 2017 18:08:10 +0000 (18:08 +0000)]
[AArch64] Fix typo. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292959
91177308-0d34-0410-b5e6-
96231b3b80d8
Amaury Sechet [Tue, 24 Jan 2017 17:48:25 +0000 (17:48 +0000)]
Use InstCombine's builder in foldSelectCttzCtlz instead of creating a new one.
Summary: As per title. This will add the instructiions we are interested in in the worklist.
Reviewers: mehdi_amini, majnemer, andreadb
Differential Revision: https://reviews.llvm.org/D29081
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292957
91177308-0d34-0410-b5e6-
96231b3b80d8
Stanislav Mekhanoshin [Tue, 24 Jan 2017 17:46:17 +0000 (17:46 +0000)]
[AMDGPU] Add VGPR copies post regalloc fix pass
Regalloc creates COPY instructions which do not formally use VALU.
That results in v_mov instructions displaced after exec mask modification.
One pass which do it is SIOptimizeExecMasking, but potentially it can be
done by other passes too.
This patch adds a pass immediately after regalloc to add implicit exec
use operand to all VGPR copy instructions.
Differential Revision: https://reviews.llvm.org/D28874
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292956
91177308-0d34-0410-b5e6-
96231b3b80d8
Evandro Menezes [Tue, 24 Jan 2017 17:34:31 +0000 (17:34 +0000)]
[AArch64] Rename 'no-quad-ldst-pairs' to 'slow-paired-128'
In order to follow the pattern of the existing 'slow-misaligned-128store'
option, rename the option 'no-quad-ldst-pairs' to 'slow-paired-128'.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292954
91177308-0d34-0410-b5e6-
96231b3b80d8
Chris Bieneman [Tue, 24 Jan 2017 17:27:01 +0000 (17:27 +0000)]
[Lanai] Rename LanaiInstPrinter library to LanaiAsmPrinter
Summary:
This is in keeping with LLVM convention. The classes are InstPrinters, but the library is ${target}AsmPrinter.
This patch is in response to bryant pointing out to me that Lanai was the only backend deviating from convention here. Thanks!
Reviewers: jpienaar, bryant
Subscribers: mgorny, jgosnell, llvm-commits
Differential Revision: https://reviews.llvm.org/D29043
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292953
91177308-0d34-0410-b5e6-
96231b3b80d8
Sanjay Patel [Tue, 24 Jan 2017 17:03:24 +0000 (17:03 +0000)]
[InstSimplify] try to eliminate icmp Pred (add nsw X, C1), C2
I was surprised to see that we're missing icmp folds based on 'add nsw' in InstCombine,
but we should handle the InstSimplify cases first because that could make the InstCombine
code simpler.
Here are Alive-based proofs for the logic:
Name: add_neg_constant
Pre: C1 < 0 && (C2 > ((1<<(width(C1)-1)) + C1))
%a = add nsw i7 %x, C1
%b = icmp sgt %a, C2
=>
%b = false
Name: add_pos_constant
Pre: C1 > 0 && (C2 < ((1<<(width(C1)-1)) + C1 - 1))
%a = add nsw i6 %x, C1
%b = icmp slt %a, C2
=>
%b = false
Name: nuw
Pre: C1 u>= C2
%a = add nuw i11 %x, C1
%b = icmp ult %a, C2
=>
%b = false
Differential Revision: https://reviews.llvm.org/D29053
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292952
91177308-0d34-0410-b5e6-
96231b3b80d8
Simon Pilgrim [Tue, 24 Jan 2017 16:58:22 +0000 (16:58 +0000)]
[X86][AVX2] Regenerate test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292950
91177308-0d34-0410-b5e6-
96231b3b80d8
Reid Kleckner [Tue, 24 Jan 2017 16:57:55 +0000 (16:57 +0000)]
[CodeView] Fix off-by-one error in def range gap emission
Also fixes a much worse bug where we emitted the wrong gap size for the
def range uncovered by the test for this issue.
Fixes PR31726.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292949
91177308-0d34-0410-b5e6-
96231b3b80d8
Simon Pilgrim [Tue, 24 Jan 2017 16:56:23 +0000 (16:56 +0000)]
[X86][AVX2] Removed FIXME comment and regenerated test.
The comment talked about replacing vpmovzxwd+vpslld+vpsrad with vpmovsxwd - which isn't valid as we're sign extending a <8 x i1> bool vector not an all/nobits <8 x i16>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292948
91177308-0d34-0410-b5e6-
96231b3b80d8
Simon Pilgrim [Tue, 24 Jan 2017 16:53:09 +0000 (16:53 +0000)]
[X86][AVX2] Cleaned up test triple and regenerated tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292946
91177308-0d34-0410-b5e6-
96231b3b80d8
Geoff Berry [Tue, 24 Jan 2017 16:36:07 +0000 (16:36 +0000)]
[SelectionDAG] Handle inverted conditions when splitting into multiple branches.
Summary:
When conditional branches with complex conditions are split into
multiple branches in SelectionDAGBuilder::FindMergedConditions, also
handle inverted conditions. These may sometimes appear without having
been optimized by InstCombine when CodeGenPrepare decides to sink and
duplicate cmp instructions, causing them to have only one use. This
problem can be increased by e.g. GVNHoist hiding more cmps from
InstCombine by combining equivalent cmps from different blocks.
For example codegen X & !(Y | Z) as:
jmp_if_X TmpBB
jmp FBB
TmpBB:
jmp_if_notY Tmp2BB
jmp FBB
Tmp2BB:
jmp_if_notZ TBB
jmp FBB
Reviewers: bogner, MatzeB, qcolombet
Subscribers: llvm-commits, hiraditya, mcrosier, sebpop
Differential Revision: https://reviews.llvm.org/D28380
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292944
91177308-0d34-0410-b5e6-
96231b3b80d8
Alex Lorenz [Tue, 24 Jan 2017 16:17:04 +0000 (16:17 +0000)]
Revert "r292904 - [lit] Allow boolean expressions in REQUIRES and XFAIL
and UNSUPPORTED"
After r292904 llvm-lit fails to emit the test results in the XML format for
Apple's internal buildbots.
rdar://
30164800
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292942
91177308-0d34-0410-b5e6-
96231b3b80d8
Simon Pilgrim [Tue, 24 Jan 2017 16:16:29 +0000 (16:16 +0000)]
[X86][AVX512] Remove unused argument from PMOVX tablegen patterns. NFCI.
Seems to be a copy+paste legacy from the AVX2 patterns.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292941
91177308-0d34-0410-b5e6-
96231b3b80d8
Amaury Sechet [Tue, 24 Jan 2017 14:22:27 +0000 (14:22 +0000)]
Fix formating in foldSelectCttzCtlz. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292934
91177308-0d34-0410-b5e6-
96231b3b80d8
Jonas Paulsson [Tue, 24 Jan 2017 14:21:29 +0000 (14:21 +0000)]
Improve comment for ISD::EXTRACT_VECTOR_ELT
The comment in ISDOpcodes.h for EXTRACT_VECTOR_ELT now explains that the high
bits are undefined if the result is extended.
Review: Hal Finkel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292933
91177308-0d34-0410-b5e6-
96231b3b80d8
Chandler Carruth [Tue, 24 Jan 2017 12:55:57 +0000 (12:55 +0000)]
[PH] Replace uses of AssertingVH from members of analysis results with
a lazy-asserting PoisoningVH.
AssertVH is fundamentally incompatible with cache-invalidation of
analysis results. The invaliadtion happens after the AssertingVH has
already fired. Instead, use a PoisoningVH that will assert if the
dangling handle is ever used rather than merely be assigned or
destroyed.
This patch also removes all of the (numerous) doomed attempts to work
around this fundamental incompatibility. It is a pretty significant
simplification IMO.
The most interesting change is in the Inliner where we still do some
clearing because we don't want to rely on the coarse grained
invalidation strategy of the containing pass manager. However, I prefer
the approach that contains this logic to the cleanup phase of the
Inliner, and I think we could enhance the CGSCC analysis management
layer to make this even better in the future if desired.
The rest is straight cleanup.
I've also added a test for one of the harder cases to work around: when
a *module analysis* contains many AssertingVHes pointing at functions.
Differential Revision: https://reviews.llvm.org/D29006
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292928
91177308-0d34-0410-b5e6-
96231b3b80d8