OSDN Git Service
Bill Buzbee [Tue, 27 May 2014 18:08:11 +0000 (18:08 +0000)]
Merge "AArch64: Enable FLOAT and DOUBLE opcodes"
Serban Constantinescu [Fri, 23 May 2014 16:38:18 +0000 (17:38 +0100)]
AArch64: Enable FLOAT and DOUBLE opcodes
This patch enables all the DOUBLE and FLOAT opcodes except for REM ones.
It has been tested and passes all Dalvik tests except for:
failed: 018-stack-overflow[pid=1076]
failed: 107-int-math2[pid=1593]
Change-Id: I581f219bde354e3402aa3ad6e24ef15566da5f78
Signed-off-by: Serban Constantinescu <serban.constantinescu@arm.com>
Brian Carlstrom [Mon, 26 May 2014 16:57:58 +0000 (16:57 +0000)]
Merge "Fix x86_64 test failures."
Nicolas Geoffray [Mon, 26 May 2014 13:01:46 +0000 (14:01 +0100)]
Fix x86_64 test failures.
Change-Id: I97b3d1755d2e205ca7423248a2af37f1875d5116
Nicolas Geoffray [Mon, 26 May 2014 10:53:44 +0000 (10:53 +0000)]
Merge "Add a linear scan register allocator to the optimizing compiler."
Nicolas Geoffray [Thu, 22 May 2014 11:50:17 +0000 (12:50 +0100)]
Add a linear scan register allocator to the optimizing compiler.
This is a "by-the-book" implementation. It currently only deals
with allocating registers, with no hint optimizations.
The changes remaining to make it functional are:
- Allocate spill slots.
- Resolution and placements of Move instructions.
- Connect it to the code generator.
Change-Id: Ie0b2f6ba1b98da85425be721ce4afecd6b4012a4
Brian Carlstrom [Mon, 26 May 2014 05:44:55 +0000 (05:44 +0000)]
Merge "Make DexFile content read only before running DexFileVerifier"
Brian Carlstrom [Sun, 25 May 2014 23:08:51 +0000 (16:08 -0700)]
Make DexFile content read only before running DexFileVerifier
(cherry picked from commit
98725444129efe2b1b51c87740860caadaef2bf7)
Change-Id: I18a932b2f19d44b820232f4d4e9c358df20ab364
Brian Carlstrom [Sun, 25 May 2014 23:30:49 +0000 (23:30 +0000)]
Merge "Add TARGET_2ND_ARCH support for dump-oat-boot"
Brian Carlstrom [Sun, 25 May 2014 21:38:17 +0000 (14:38 -0700)]
Add TARGET_2ND_ARCH support for dump-oat-boot
Change-Id: I87f1742f401af37893d336074c53dee92993b769
Brian Carlstrom [Sun, 25 May 2014 21:14:29 +0000 (21:14 +0000)]
Merge "Fix ExtractToMemMap to show original zip file name in ashmem"
Bill Buzbee [Sat, 24 May 2014 16:01:22 +0000 (16:01 +0000)]
Merge "x86_64: Rebase on top of "64-bit temp register support""
Bill Buzbee [Sat, 24 May 2014 15:35:09 +0000 (15:35 +0000)]
Merge "Implement all vector instructions for X86"
Mark Mendell [Thu, 22 May 2014 13:52:36 +0000 (09:52 -0400)]
Implement all vector instructions for X86
Add X86 code generation for the vector operations. Added support for
X86 disassembler for the new instructions.
Change-Id: I72b48f5efa3a516a16bb1dd4bdb5c9270a8db53a
Signed-off-by: Mark Mendell <mark.p.mendell@intel.com>
buzbee [Sat, 24 May 2014 13:15:42 +0000 (13:15 +0000)]
Merge "Quick compiler: fix register clobbering."
buzbee [Fri, 23 May 2014 23:04:08 +0000 (16:04 -0700)]
Quick compiler: fix register clobbering.
Ensure all aliased children of a register set are clobbered
when any member is clobbered. Additionally, use a clobbering
mask to avoid clobbering non-overlapping siblings.
Change-Id: Ic0d88a30f3e5b7a359396f6541d602739fa3124a
Dmitry Petrochenko [Thu, 22 May 2014 05:26:50 +0000 (12:26 +0700)]
x86_64: Rebase on top of "64-bit temp register support"
Added the 64-bit core/temp register definition, fixed RegisterPool
creation for x86_64 so that 64-bit core/temps are NOT used for now.
The long arithmetic still operates with register pair on x86_64 and
it is a subject for change in a separate patch.
Change-Id: I2be06d5aefaf80141983bc9d8ed8a2ee24c2b21b
Signed-off-by: Dmitry Petrochenko <dmitry.petrochenko@intel.com>
Mathieu Chartier [Sat, 24 May 2014 00:07:47 +0000 (00:07 +0000)]
Merge "Improve invalid large object free dumping."
Mathieu Chartier [Fri, 23 May 2014 23:42:20 +0000 (16:42 -0700)]
Improve invalid large object free dumping.
Bug:
14974497
Change-Id: I30f99d693151ee5ae1f7b3d420519a0b1b21b2f4
Mathieu Chartier [Fri, 23 May 2014 23:30:35 +0000 (23:30 +0000)]
Merge "Add reserve area to allocation stacks."
Bill Buzbee [Fri, 23 May 2014 23:02:20 +0000 (23:02 +0000)]
Merge "Revert "ART: Better SSA Allocation when recreating SSA""
Bill Buzbee [Fri, 23 May 2014 23:00:22 +0000 (23:00 +0000)]
Revert "ART: Better SSA Allocation when recreating SSA"
Temporarily reverting until memory footprint cost of adding a vreg to ssa entrance map on every applicable MIR node can be assessed..
This reverts commit
cb73fb35e5f7c575ed491c0c8e2d2b1a0a22ea2e.
Change-Id: Ia9c03bfc5d365ad8d8b949e870f1e3bcda7f9a54
Ian Rogers [Fri, 23 May 2014 22:45:34 +0000 (22:45 +0000)]
Merge "ART: Better SSA Allocation when recreating SSA"
Ian Rogers [Fri, 23 May 2014 22:38:35 +0000 (22:38 +0000)]
Merge "ART: BasicBlock API Implementation"
Jean Christophe Beyler [Mon, 12 May 2014 06:36:41 +0000 (23:36 -0700)]
ART: BasicBlock API Implementation
- Adding BasicBlock Utility functions.
Signed-off-by: Jean Christophe Beyler <jean.christophe.beyler@intel.com>
Signed-off-by: Razvan A Lupusoru <razvan.a.lupusoru@intel.com>
Signed-off-by: Yixin Shou <yixin.shou@intel.com>
Signed-off-by: Chao-ying Fu <chao-ying.fu@intel.com>
Signed-off-by: Udayan Banerji <udayan.banerji@intel.com>
Change-Id: Ia264b4e68a9a56441ca143f1d98e5a333cf87b29
Ian Rogers [Fri, 23 May 2014 21:47:48 +0000 (21:47 +0000)]
Merge "[MIPS] Remove warnings about use of at register"
Mathieu Chartier [Fri, 23 May 2014 21:10:42 +0000 (21:10 +0000)]
Merge "Revert "Revert "Fix an outstanding compaction bug in interpreter."""
Brian Carlstrom [Fri, 23 May 2014 09:47:28 +0000 (02:47 -0700)]
Fix ExtractToMemMap to show original zip file name in ashmem
(cherry picked from commit
1fca8e91f32dc8b13d3129b7ef4a0194839736e6)
Change-Id: Id7d22600496b090ac32150c8c6424da89964b6be
Mathieu Chartier [Thu, 22 May 2014 23:48:55 +0000 (16:48 -0700)]
Revert "Revert "Fix an outstanding compaction bug in interpreter.""
Fixed the generic trampoline to not use ToJObject when unnecessary.
Bug:
15167269
This reverts commit
3bdb873122964da7937eb070cbcf2ef638a8e459.
Change-Id: I0525d0e0f3afb753c770e1572070a0fa22b02271
Chris Dearman [Fri, 23 May 2014 17:47:01 +0000 (10:47 -0700)]
[MIPS] Remove warnings about use of at register
Also, don't restore k0 and k1 as part of long jump as they are reserved for
kernel usage.
Change-Id: I4eec9eb5d21de96ca79f2cef9407a0e19c9c2178
Ian Rogers [Fri, 23 May 2014 19:06:24 +0000 (19:06 +0000)]
Merge "ART: refactor x86/x86-64 entrypoints"
Ian Rogers [Fri, 23 May 2014 18:51:20 +0000 (18:51 +0000)]
Merge "Extra debug output for a failing lock check."
Ian Rogers [Fri, 23 May 2014 18:39:11 +0000 (11:39 -0700)]
Extra debug output for a failing lock check.
Change-Id: If4abae535a875a06f4fa4203e6aabc1169b1f38e
Ian Rogers [Fri, 23 May 2014 18:18:07 +0000 (18:18 +0000)]
Merge "ART: API to dex instructions"
Mathieu Chartier [Fri, 23 May 2014 17:54:50 +0000 (10:54 -0700)]
Add reserve area to allocation stacks.
This fixes an issue with heap verification which was caused when
the allocation stack overflowed. This resulted in heap verification
failures since we were storing the newly allocated object in a
handle scope without having it be live either in the live bitmap
or allocation stack. We now push the object in the reserve area
before we do a GC due to allocation stack overflow.
Change-Id: I83b42c4b3250d7eaab1b49e53066e21c8656a740
Ian Rogers [Fri, 23 May 2014 18:14:40 +0000 (18:14 +0000)]
Merge "Make the specification of when we need precise constants more precise."
Ian Rogers [Fri, 23 May 2014 18:03:11 +0000 (18:03 +0000)]
Merge "ART: Added print indices back to BitVector Dumper"
Ian Rogers [Fri, 23 May 2014 17:54:28 +0000 (17:54 +0000)]
Merge "x86_64: Fix 079-Phantom hang with QCG enabled"
Vladimir Marko [Fri, 23 May 2014 17:45:19 +0000 (17:45 +0000)]
Merge "Fix style issue."
Vladimir Marko [Fri, 23 May 2014 17:43:51 +0000 (18:43 +0100)]
Fix style issue.
Change-Id: I2044e01c68265c33e7fa6057efa7b6c7ac41ada4
Ian Rogers [Fri, 23 May 2014 17:43:43 +0000 (10:43 -0700)]
Make the specification of when we need precise constants more precise.
Means that oatdump output showing values for deoptimization actually reflects
what we see at runtime.
Also, doesn't do precise in the case of determining methods and fields for the
quickened case, which may be an occasional performance win.
Change-Id: I62c7fb244f7996ba9d52e7a7ce75c046b663fa17
Vladimir Marko [Fri, 23 May 2014 17:22:59 +0000 (17:22 +0000)]
Merge "Rewrite BitVector index iterator."
Jean Christophe Beyler [Thu, 22 May 2014 22:43:50 +0000 (15:43 -0700)]
ART: Added print indices back to BitVector Dumper
- Added an API to get the indices set instead of 001...0 format
Change-Id: I75841e41ca9b7ef77a0717715669dbe12506d6a1
Signed-Off-By: Jean Christophe Beyler <jean.christophe.beyler@intel.com>
Vladimir Marko [Fri, 23 May 2014 14:16:44 +0000 (15:16 +0100)]
Rewrite BitVector index iterator.
The BitVector::Iterator was not iterating over the bits but
rather over indexes of the set bits. Therefore, we rename it
to IndexIterator and provide a BitVector::Indexes() to get
a container-style interface with begin() and end() for range
based for loops.
Also, simplify InsertPhiNodes where the tmp_blocks isn't
needed since the phi_nodes and input_blocks cannot lose any
blocks in subsequent iterations, so we can do the Union()
directly in those bit vectors and we need to repeat the loop
only if we have new input_blocks, rather than on phi_nodes
change. And move the temporary bit vectors to scoped arena.
Change-Id: I6cb87a2f60724eeef67c6aaa34b36ed5acde6d43
Vladimir Marko [Fri, 23 May 2014 15:44:19 +0000 (15:44 +0000)]
Merge "Remove obsolete pass_driver.cc ."
Vladimir Marko [Fri, 23 May 2014 15:39:12 +0000 (16:39 +0100)]
Remove obsolete pass_driver.cc .
Obsoleted by https://android-review.googlesource.com/93433 .
Change-Id: I01865d17160fdc698f43c61fa4f5642d0f1391d9
Bill Buzbee [Fri, 23 May 2014 12:20:13 +0000 (12:20 +0000)]
Merge "x86_64: Disable optimizations on x86_64"
Bill Buzbee [Fri, 23 May 2014 12:19:59 +0000 (12:19 +0000)]
Merge "x86_64: Disable all intrinsics"
Alexei Zavjalov [Fri, 23 May 2014 10:51:59 +0000 (17:51 +0700)]
ART: refactor x86/x86-64 entrypoints
This patch:
- removes unused stubs in x86/64 runtimes (art_quick_l2d, art_quick_l2f
and art_quick_idivmod)
- replaces art_quick_fmod, art_quick_fmodf and art_quick_is_assignable
entrypoints in x86-64 to the direct calls
- removes art_quick_indexof stub in x86-64
Change-Id: I6141c5c73b0b449fa3b866068b101e0be211b93e
Signed-off-by: Alexei Zavjalov <alexei.zavjalov@intel.com>
Vladimir Marko [Fri, 23 May 2014 10:50:39 +0000 (10:50 +0000)]
Merge "Fix InternTable::Lookup()/Remove() for hash code collisions."
Nicolas Geoffray [Fri, 23 May 2014 09:41:38 +0000 (09:41 +0000)]
Merge "Add virtual destructor to please one of our compilers."
Nicolas Geoffray [Fri, 23 May 2014 09:40:42 +0000 (10:40 +0100)]
Add virtual destructor to please one of our compilers.
Change-Id: I931d130caa75ab90b677e14f1a2d0c438c43ed4f
Calin Juravle [Fri, 23 May 2014 09:38:09 +0000 (09:38 +0000)]
Merge "Fix profile-backoff usage message"
Dmitry Petrochenko [Fri, 16 May 2014 06:24:40 +0000 (13:24 +0700)]
x86_64: Fix 079-Phantom hang with QCG enabled
The 079 test creates "sWatcher" thread. In case of unexpected failure
(e.g. Exception thrown) the sWatcher thread remains alive and it
blocks VM shutdown. We mark the sWarcher thread as daemon and
let VM to stop that thread during shutdown cause by unexpected error.
Change-Id: I0cb0b8bbeb15de47b72ddae1a32fcfea3ef8720e
Signed-off-by: Dmitry Petrochenko <dmitry.petrochenko@intel.com>
Dmitry Petrochenko [Thu, 8 May 2014 05:20:24 +0000 (12:20 +0700)]
x86_64: Disable all intrinsics
Intrinsics are subject to rework for x86_64 and disabled for now.
Change-Id: Ice67db083fe43dc4faa9276faf02234a4a24f207
Signed-off-by: Dmitry Petrochenko <dmitry.petrochenko@intel.com>
Dmitry Petrochenko [Fri, 16 May 2014 11:36:39 +0000 (18:36 +0700)]
x86_64: Disable optimizations on x86_64
This patch disables all QCG optimizations as ARM64 does.
Optimizations are subject to step-by-step enabling according
to test results.
Change-Id: Idd6e10f3b67e8c0f1f029bb26a0e9bf40061aeac
Signed-off-by: Dmitry Petrochenko <dmitry.petrochenko@intel.com>
Nicolas Geoffray [Fri, 23 May 2014 09:15:16 +0000 (09:15 +0000)]
Merge "Forgot these files from last commit."
Nicolas Geoffray [Fri, 23 May 2014 09:14:19 +0000 (10:14 +0100)]
Forgot these files from last commit.
Change-Id: I9ab7975daa5ed7aae6bff8730bb63fb48a798ea8
Nicolas Geoffray [Fri, 23 May 2014 09:03:36 +0000 (09:03 +0000)]
Merge "Import Dart's parallel move resolver."
Nicolas Geoffray [Thu, 22 May 2014 17:32:45 +0000 (18:32 +0100)]
Import Dart's parallel move resolver.
And write a few tests while at it.
A parallel move resolver will be needed for performing multiple moves
that are conceptually parallel, for example moves at a block
exit that branches to a block with phi nodes.
Change-Id: Ib95b247b4fc3f2c2fcab3b8c8d032abbd6104cd7
Sebastien Hertz [Fri, 23 May 2014 08:36:20 +0000 (08:36 +0000)]
Merge "Add a check for null thread before trying to suspend"
Bill Buzbee [Fri, 23 May 2014 05:27:41 +0000 (05:27 +0000)]
Merge "x86: For integer ALU operation handle v+=v case"
Serguei Katkov [Mon, 19 May 2014 08:45:42 +0000 (15:45 +0700)]
x86: For integer ALU operation handle v+=v case
When destination and operand are the same Virtual Register
we should ensure that destination RegLocation is updated after
operand is loaded with LoadValue in physical register.
Change-Id: I59da106471b0c494203af01c99583f51dbc0f9ee
Signed-off-by: Serguei Katkov <serguei.i.katkov@intel.com>
Bill Buzbee [Fri, 23 May 2014 02:56:02 +0000 (02:56 +0000)]
Merge "Create two CompilerTemp for a wide compiler temp"
Chao-ying Fu [Fri, 23 May 2014 00:25:02 +0000 (17:25 -0700)]
Create two CompilerTemp for a wide compiler temp
We create a new CompilerTemp for the high part of
a wide compiler temp to fix counting compiler temps.
Otherwise, assertion failures may happen inside
GetNumUsedCompilerTemps(), if there are any wide compiler temps.
Previously, we never ask for a wide compiler temp, such that
we don't hit the issue.
Change-Id: I9e79ad15e4192665b9d8a9dae5a5453496e48a79
Signed-off-by: Chao-ying Fu <chao-ying.fu@intel.com>
Brian Carlstrom [Thu, 22 May 2014 22:51:11 +0000 (22:51 +0000)]
Merge "Update dump-oat-* and oatdump for new image file layout"
Bill Buzbee [Thu, 22 May 2014 22:37:49 +0000 (22:37 +0000)]
Merge "AArch64: Enable LONG_* and INT_* opcodes."
Mathieu Chartier [Thu, 22 May 2014 22:07:37 +0000 (22:07 +0000)]
Merge "Revert "Fix an outstanding compaction bug in interpreter.""
Mathieu Chartier [Thu, 22 May 2014 22:06:51 +0000 (22:06 +0000)]
Revert "Fix an outstanding compaction bug in interpreter."
This reverts commit
e09ae0920be57760fb390b6944bce420fa0b5582.
Change-Id: I48036306130d5ccfec683d0dc3e9a642a02ee9c1
Mathieu Chartier [Thu, 22 May 2014 21:57:59 +0000 (21:57 +0000)]
Merge "Move SetMonitorEnterObject outside of blocked thread state change."
Mathieu Chartier [Thu, 22 May 2014 21:43:37 +0000 (14:43 -0700)]
Move SetMonitorEnterObject outside of blocked thread state change.
Race condition:
Thread is suspended in monitor kBlocked, GC decides to run the
checkpoint on it. The GC sees that the object is non null, and goes
to mark it, but then the thread does SetMonitorObject(nullptr).
Which causes a null object to be marked.
Change-Id: Ie8a5074112947ec07d01ccb813ca2c1bb9ac7066
Christopher Ferris [Thu, 22 May 2014 21:41:01 +0000 (21:41 +0000)]
Merge "Add support for jemalloc instead of dlmalloc."
Christopher Ferris [Tue, 13 May 2014 21:47:50 +0000 (14:47 -0700)]
Add support for jemalloc instead of dlmalloc.
Bug: 981363
Change-Id: I226ce3249c0d982eb1a9fdb9d04b25737f77345d
Bill Buzbee [Thu, 22 May 2014 20:15:39 +0000 (20:15 +0000)]
Merge "ART: Topological Sort Traversal Implementation"
Brian Carlstrom [Thu, 22 May 2014 18:54:18 +0000 (11:54 -0700)]
Update dump-oat-* and oatdump for new image file layout
Bug:
11997009
Change-Id: I30c356f3ea62b1850d17b5c6bf4af4080a466858
Johnnie Birch [Thu, 15 May 2014 18:31:14 +0000 (11:31 -0700)]
Add a check for null thread before trying to suspend
The patch fixes a jpda test failure due to a failed
assertion in SuspendThreadByThreadId. There should be
a check for a null thread before the assertion check.
This was the behavior of previous code (4.4.2) where
this test passes, but this check was removed during
some refactoring of the code.
Change-Id: Ia63de5f159ce1e51110bf9dc604011d07b2f048e
Signed-off-by: Johnnie Birch <johnnie.l.birch.jr@intel.com>
Jean Christophe Beyler [Tue, 6 May 2014 04:09:40 +0000 (21:09 -0700)]
ART: API to dex instructions
- Added the GetConstant function call in DecodedInstruction.
- Added a few rewriter helper functions for later higher level rewriting.
- Added Setter/Getter data and query functions.
- Added Clobber memory/Const/Call/Cast data and query functions.
- Added expression information (add, multiply, ...).
- Added a IsLinear function for additions and subtractions.
- Added an empty constructor for the DecodedInstruction:
- Useful for the creation of a MIR constructor too.
- Added the IsConditionalBranch utility function.
Signed-off-by: Jean Christophe Beyler <jean.christophe.beyler@intel.com>
Signed-off-by: Razvan A Lupusoru <razvan.a.lupusoru@intel.com>
Signed-off-by: Yixin Shou <yixin.shou@intel.com>
Signed-off-by: Chao-ying Fu <chao-ying.fu@intel.com>
Signed-off-by: Udayan Banerji <udayan.banerji@intel.com>
Change-Id: Ie21f2a7779b38c1b383334f04126c2d792cae462
Jean Christophe Beyler [Tue, 29 Apr 2014 21:40:41 +0000 (14:40 -0700)]
ART: Topological Sort Traversal Implementation
- Added a topological sort implementation for traversal.
- Useful for traversals that require traversing the predecessors first.
- Added a function to BasicBlock to detect if it is an exception block.
Change-Id: I573da1768a635c6fd0259573dbb46b112132e129
Signed-off-by: Jean Christophe Beyler <jean.christophe.beyler@intel.com>
Signed-off-by: Razvan A Lupusoru <razvan.a.lupusoru@intel.com>
Signed-off-by: Yixin Shou <yixin.shou@intel.com>
Signed-off-by: Chao-ying Fu <chao-ying.fu@intel.com>
Signed-off-by: Udayan Banerji <udayan.banerji@intel.com>
Mathieu Chartier [Thu, 22 May 2014 17:57:52 +0000 (17:57 +0000)]
Merge "Fix an outstanding compaction bug in interpreter."
Ian Rogers [Thu, 22 May 2014 17:50:20 +0000 (17:50 +0000)]
Merge "Move modify_ldt_lock into global lock order."
Mathieu Chartier [Thu, 15 May 2014 19:39:19 +0000 (12:39 -0700)]
Fix an outstanding compaction bug in interpreter.
Fixed a bug in DoFieldPut where the FieldHelper GetType could cause
thread suspension which would result in a stale obj.
Added more handles in the class linker to facilitate moving fiels
and methods in the future.
Removed un-necessarly passing handle references since these are value
types and don't need to be passed by reference.
Added a special NullHandle type which allows null handles without a
handle scope.
Change-Id: I1b51723920a2e4f4f8b2907066f578a3e879fd5b
Dan Albert [Thu, 22 May 2014 17:39:44 +0000 (17:39 +0000)]
Merge "Fixes style nitpick"
Hiroshi Yamauchi [Thu, 22 May 2014 17:34:44 +0000 (17:34 +0000)]
Merge "Add a read barrier for weak roots in monitors."
Dan Albert [Thu, 22 May 2014 17:27:29 +0000 (10:27 -0700)]
Fixes style nitpick
Change-Id: Ic3a7119ce7ca9bfae0dbf7af4d285f44d3a72a3e
Chao-ying Fu [Wed, 21 May 2014 18:20:52 +0000 (11:20 -0700)]
Move modify_ldt_lock into global lock order.
Mutex modify_ldt_lock was being removed during runtime shutdown while
daemons thread may still detach. Avoid this by placing in global lock
order.
This fixes cts dalvik vm-tests-tf that hang on some x86 devices.
By irogers: also, tidy global locks to agree with enum constants and
add extra verification that the global annotalysis order agrees with
the LockLevel order. Bumped the oat version and moved the locks as
LockLevel additions previously caused entrypoints to be moved. Make
unattached lock not handle the default mutex level case by moving the
allocated thread ids lock into the global order.
Change-Id: I9d03f19d44ea254accf0ceae8022563c77f7a02f
Signed-off-by: Chao-ying Fu <chao-ying.fu@intel.com>
Dan Albert [Thu, 22 May 2014 17:22:00 +0000 (17:22 +0000)]
Merge "Move art host to libc++"
Serban Constantinescu [Thu, 22 May 2014 14:10:18 +0000 (15:10 +0100)]
AArch64: Enable LONG_* and INT_* opcodes.
This patch fixes some of the issues with LONG and INT opcodes. The patch
has been tested and passes all the dalvik tests except for 018 and 107.
Change-Id: Idd1923ed935ee8236ab0c7e5fa969eaefeea8708
Signed-off-by: Serban Constantinescu <serban.constantinescu@arm.com>
Sebastien Hertz [Thu, 22 May 2014 14:47:06 +0000 (14:47 +0000)]
Merge "Support new VMRuntime native methods"
Bill Buzbee [Thu, 22 May 2014 13:44:31 +0000 (13:44 +0000)]
Merge "ART: Pass driver generalization"
James C Scott [Thu, 1 May 2014 12:52:04 +0000 (05:52 -0700)]
ART: Pass driver generalization
- Generalizing Pass Driver.
- Migrating ME Pass Driver to use the new generalized Pass Driver.
There will be some more changes after in the compiler code to generalize
it a bit more by separating what is being done by the optimizing passes
and post-pass cleanups.
Change-Id: I140a70e88483d7c3991b7d336bd593b2613ae194
Signed-off-by: James C Scott <james.c.scott@intel.com>
Bill Buzbee [Thu, 22 May 2014 13:11:27 +0000 (13:11 +0000)]
Merge "ART: MIR, SSARepresentation, and BasicBlock Additional API"
Jean Christophe Beyler [Thu, 17 Apr 2014 19:47:24 +0000 (12:47 -0700)]
ART: MIR, SSARepresentation, and BasicBlock Additional API
Adding the API calls to the MIR structure to help with higher level code.
Some code has been added to BasicBlock as well for the removal.
Some code has also been added to SSARepresentation.
A constructor has been added to DecodedInstruction.
Change-Id: Ie65948d53d83fd8250545c94c88b442a68d702c7
Signed-off-by: Jean Christophe Beyler <jean.christophe.beyler@intel.com>
Signed-off-by: Razvan A Lupusoru <razvan.a.lupusoru@intel.com>
Signed-off-by: Yixin Shou <yixin.shou@intel.com>
Signed-off-by: Chao-ying Fu <chao-ying.fu@intel.com>
Signed-off-by: Udayan Banerji <udayan.banerji@intel.com>
buzbee [Thu, 22 May 2014 12:32:10 +0000 (12:32 +0000)]
Merge "Quick compiler: free up space in MIR."
Vladimir Marko [Thu, 22 May 2014 11:16:44 +0000 (12:16 +0100)]
Fix InternTable::Lookup()/Remove() for hash code collisions.
When we have a hash code collision but the string is not yet
in the intern table, the old Lookup() would iterate until
the end of the table, i.e. it was up to linear in the size
of the table rather than linear in the number of colliding
hash codes.
And though the multimap::find() is implemented in terms of
lower_bound() in the standard library we're using, this
requirement doesn't seem to be in the C++ standard. It was
therefore wrong to assume that we will iterate across all
hits when starting from the iterator returned by find().
Change-Id: Ie24aaea6e55750a7aafbed24b136878c5dba66eb
Calin Juravle [Thu, 22 May 2014 11:13:54 +0000 (12:13 +0100)]
Fix profile-backoff usage message
Change-Id: Icccd7bbc0c7b6a088a00dfc7f8c52991ec87f544
Vladimir Marko [Thu, 22 May 2014 09:14:18 +0000 (09:14 +0000)]
Merge "Method inlining across dex files in boot image."
Sebastien Hertz [Fri, 16 May 2014 14:56:45 +0000 (16:56 +0200)]
Support new VMRuntime native methods
Implements vmInstructionSet, is64Bit and isCheckJniEnabled methods.
Bug:
14888999
Bug:
14888124
Change-Id: I8a2d3f22f84a093be2fbc74464af6aa7b2a2bebb
Vladimir Marko [Wed, 21 May 2014 11:08:39 +0000 (12:08 +0100)]
Method inlining across dex files in boot image.
Fix LoadCodeAddress() and LoadMethodAddress() to use the dex
file in addition to the method index to uniquely identify
the literal. With that fix in place, when we have both the
direct code and the direct method, we can safely pass the
actual target method id instead of the method id from the
same dex file in the method lowering info. This was already
done for calls from apps into boot image (and thus there was
a bug with a tiny risk of the wrong literal being used) and
now we also do that for calls within the boot image. The
latter allows the inlining pass to inline many more methods
than before in the boot image.
Bug:
15021903
Change-Id: Ic765ce9809b43ef07e7db32b8e3fbc9acb09147f
Sebastien Hertz [Thu, 22 May 2014 06:52:00 +0000 (06:52 +0000)]
Merge "Secure move-exception in intepreter"
Hiroshi Yamauchi [Thu, 22 May 2014 04:10:23 +0000 (21:10 -0700)]
Add a read barrier for weak roots in monitors.
A weak root requires a read barrier for the to-space invariant to hold
because the object pointed to by a weak root can't be marked/forwarded
like the one pointed to by a strong root (GC does not know if it's
alive or not at that point) and because, without a read barrier, a
mutator could access it and obtain a from-space reference, which would
violate the to-space invariant.
TODO: do similar for the other types of weak roots.
Bug:
12687968
Change-Id: I563a0fa4f875e0c21ac96f57696959454e13b15a