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5 years agoRe-land "Fix MSVC dependency issue between Clang-tablegen and LLVM-tablegen"
Alexandre Ganea [Wed, 19 Dec 2018 19:42:21 +0000 (19:42 +0000)]
Re-land "Fix MSVC dependency issue between Clang-tablegen and LLVM-tablegen"
(was reverted by mistake)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@349672 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[X86] Remove a bunch of 'else' after returns in reduceVMULWidth. NFC
Craig Topper [Wed, 19 Dec 2018 19:39:34 +0000 (19:39 +0000)]
[X86] Remove a bunch of 'else' after returns in reduceVMULWidth. NFC

This reduces indentation and makes it obvious this function always returns something.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@349671 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agollvm-dwarfdump: Improve/fix pretty printing of array dimensions
David Blaikie [Wed, 19 Dec 2018 19:34:24 +0000 (19:34 +0000)]
llvm-dwarfdump: Improve/fix pretty printing of array dimensions

This is to address post-commit feedback from Paul Robinson on r348954.

The original commit misinterprets count and upper bound as the same thing (I thought I saw GCC producing an upper bound the same as Clang's count, but GCC correctly produces an upper bound that's one less than the count (in C, that is, where arrays are zero indexed)).

I want to preserve the C-like output for the common case, so in the absence of a lower bound the count (or one greater than the upper bound) is rendered between []. In the trickier cases, where a lower bound is specified, a half-open range is used (eg: lower bound 1, count 2 would be "[1, 3)" and an unknown parts use a '?' (eg: "[1, ?)" or "[?, 7)" or "[?, ? + 3)").

Reviewers: aprantl, probinson, JDevlieghere

Differential Revision: https://reviews.llvm.org/D55721

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@349670 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[ThinLTO] Remove dllimport attribute from locally defined symbols
Matthew Voss [Wed, 19 Dec 2018 19:07:45 +0000 (19:07 +0000)]
[ThinLTO] Remove dllimport attribute from locally defined symbols

Summary:
The LTO/ThinLTO driver currently creates invalid bitcode by setting
symbols marked dllimport as dso_local. The compiler often has access
to the definition (often dllexport) and the declaration (often
dllimport) of an object at link-time, leading to a conflicting
declaration. This patch resolves the inconsistency by removing the
dllimport attribute.

Reviewers: tejohnson, pcc, rnk, echristo

Reviewed By: rnk

Subscribers: dmikulin, wristow, mehdi_amini, inglorion, eraman, steven_wu, dexonsmith, dang, llvm-commits

Differential Revision: https://reviews.llvm.org/D55627

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@349667 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[GlobalISel][AArch64] Add support for @llvm.ceil
Jessica Paquette [Wed, 19 Dec 2018 19:01:36 +0000 (19:01 +0000)]
[GlobalISel][AArch64] Add support for @llvm.ceil

This adds a G_FCEIL generic instruction and uses it in AArch64. This adds
selection for floating point ceil where it has a supported, dedicated
instruction. Other cases aren't handled here.

It updates the relevant gisel tests and adds a select-ceil test. It also adds a
check to arm64-vcvt.ll which ensures that we don't fall back when we run into
one of the relevant cases.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@349664 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[llvm-mca] Rename an error variable.
Matt Davis [Wed, 19 Dec 2018 18:57:43 +0000 (18:57 +0000)]
[llvm-mca] Rename an error variable.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@349662 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[X86] Don't match TESTrr from (cmp (and X, Y), 0) during isel. Defer to post processing
Craig Topper [Wed, 19 Dec 2018 18:49:13 +0000 (18:49 +0000)]
[X86] Don't match TESTrr from (cmp (and X, Y), 0) during isel. Defer to post processing

The (cmp (and X, Y) 0) pattern is greedy and ends up forming a TESTrr and consuming the and when it might be better to use one of the BMI/TBM like BLSR or BLSI.

This patch moves removes the pattern from isel and adds a post processing check to combine TESTrr+ANDrr into just a TESTrr. With this patch we are able to select the BMI/TBM instructions, but we'll also emit a TESTrr when the result is compared to 0. In many cases the peephole pass will be able to use optimizeCompareInstr to remove the TEST, but its probably not perfect.

Differential Revision: https://reviews.llvm.org/D55870

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@349661 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[X86] Fix assert fails in pass X86AvoidSFBPass
Craig Topper [Wed, 19 Dec 2018 18:45:57 +0000 (18:45 +0000)]
[X86] Fix assert fails in pass X86AvoidSFBPass

Fixes https://bugs.llvm.org/show_bug.cgi?id=38743

The function removeRedundantBlockingStores is supposed to remove any blocking stores contained in each other in lockingStoresDispSizeMap.
But it currently looks only at the previous one, which will miss some cases that result in assert.

This patch refine the function to check all previous layouts until find the uncontained one. So all redundant stores will be removed.

Patch by Pengfei Wang

Differential Revision: https://reviews.llvm.org/D55642

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@349660 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago [llvm-mca] Add an error handler for error from parseCodeRegions
Matt Davis [Wed, 19 Dec 2018 18:27:05 +0000 (18:27 +0000)]
 [llvm-mca] Add an error handler for error from parseCodeRegions

Summary:
It's a bit tricky to add a test for the failing path right now, binary support will have an easier path to exercise the path here.

* Ran clang-format.

Reviewers: andreadb

Reviewed By: andreadb

Subscribers: tschuett, gbedwell, llvm-commits

Differential Revision: https://reviews.llvm.org/D55803

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@349659 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoRevert r349517 "[CMake] Default options for faster executables on MSVC"
Alexandre Ganea [Wed, 19 Dec 2018 18:01:42 +0000 (18:01 +0000)]
Revert r349517 "[CMake] Default options for faster executables on MSVC"

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@349656 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoRevert r349517 "[CMake] Default options for faster executables on MSVC"
Alexandre Ganea [Wed, 19 Dec 2018 17:57:31 +0000 (17:57 +0000)]
Revert r349517 "[CMake] Default options for faster executables on MSVC"

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@349654 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[AArch64] Improve the Exynos M3 pipeline model
Evandro Menezes [Wed, 19 Dec 2018 17:37:51 +0000 (17:37 +0000)]
[AArch64] Improve the Exynos M3 pipeline model

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@349652 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[llvm-mca] Split test (NFC)
Evandro Menezes [Wed, 19 Dec 2018 17:37:14 +0000 (17:37 +0000)]
[llvm-mca] Split test (NFC)

Split the Exynos test of the register offset addressing mode into separate
loads and stores tests.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@349651 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoRegenerate test
Simon Pilgrim [Wed, 19 Dec 2018 17:24:34 +0000 (17:24 +0000)]
Regenerate test

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@349646 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoTest commit
Anton Afanasyev [Wed, 19 Dec 2018 17:18:40 +0000 (17:18 +0000)]
Test commit

Fix typos.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@349644 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[X86] Remove already upgraded llvm.x86.avx512.mask.padds/psubs tests
Simon Pilgrim [Wed, 19 Dec 2018 17:18:27 +0000 (17:18 +0000)]
[X86] Remove already upgraded llvm.x86.avx512.mask.padds/psubs tests

Duplicate tests have already been moved to avx512bw-intrinsics-upgrade.ll

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@349643 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[ValueTracking] remove unused parameters from helper functions; NFC
Sanjay Patel [Wed, 19 Dec 2018 16:49:18 +0000 (16:49 +0000)]
[ValueTracking] remove unused parameters from helper functions; NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@349641 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[BPF] Generate BTF DebugInfo under BPF target
Yonghong Song [Wed, 19 Dec 2018 16:40:25 +0000 (16:40 +0000)]
[BPF] Generate BTF DebugInfo under BPF target

This patch implements BTF (BPF Type Format).
The BTF is the debug info format for BPF, introduced
in the below linux patch:
  https://github.com/torvalds/linux/commit/69b693f0aefa0ed521e8bd02260523b5ae446ad7#diff-06fb1c8825f653d7e539058b72c83332
and further extended several times, e.g.,
  https://www.spinics.net/lists/netdev/msg534640.html
  https://www.spinics.net/lists/netdev/msg538464.html
  https://www.spinics.net/lists/netdev/msg540246.html

The main advantage of implementing in LLVM is:
   . better integration/deployment as no extra tools are needed.
   . bpf JIT based compilation (like bcc, bpftrace, etc.) can get
     BTF without much extra effort.
   . BTF line_info needs selective source codes, which can be
     easily retrieved when inside the compiler.

This patch implemented BTF generation by registering a BPF
specific DebugHandler in BPFAsmPrinter.

Signed-off-by: Yonghong Song <yhs@fb.com>
Differential Revision: https://reviews.llvm.org/D55752

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@349640 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[gn build] Merge r349605
Nico Weber [Wed, 19 Dec 2018 16:38:16 +0000 (16:38 +0000)]
[gn build] Merge r349605

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@349638 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[Object] Deduplicate long archive member names
Peter Wu [Wed, 19 Dec 2018 16:15:05 +0000 (16:15 +0000)]
[Object] Deduplicate long archive member names

Summary:
Import libraries as created by llvm-dlltool always use the same archive
member name for every object file (namely, the DLL library name). Ensure
that long names are not repeatedly stored in the string table.

Reviewed By: ruiu

Differential Revision: https://reviews.llvm.org/D55860

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@349637 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoTest commit
Amy Kwan [Wed, 19 Dec 2018 15:21:07 +0000 (15:21 +0000)]
Test commit

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@349633 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[X86][SSE] Auto upgrade PADDUS/PSUBUS intrinsics to UADD_SAT/USUB_SAT generic intrins...
Simon Pilgrim [Wed, 19 Dec 2018 14:43:36 +0000 (14:43 +0000)]
[X86][SSE] Auto upgrade PADDUS/PSUBUS intrinsics to UADD_SAT/USUB_SAT generic intrinsics (llvm)

Now that we use the generic ISD opcodes, we can use the generic intrinsics directly as well. This fixes the poor fast-isel codegen by not expanding to an easily broken IR code sequence.

I'm intending to deal with the signed saturation equivalents as well.

Clang counterpart: https://reviews.llvm.org/D55879

Differential Revision: https://reviews.llvm.org/D55855

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@349630 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[SelectionDAG] Optional handling of UNDEF elements in matchBinaryPredicate (part...
Simon Pilgrim [Wed, 19 Dec 2018 14:09:38 +0000 (14:09 +0000)]
[SelectionDAG] Optional handling of UNDEF elements in matchBinaryPredicate (part 2 of 2)

Now that SimplifyDemandedBits/SimplifyDemandedVectorElts is simplifying vector elements, we're seeing more constant BUILD_VECTOR containing undefs.

This patch provides opt-in support for UNDEF elements in matchBinaryPredicate, passing NULL instead of the result ConstantSDNode* argument.

I've updated the (or (and X, c1), c2) -> (and (or X, c2), c1|c2) fold to demonstrate its use, which I believe is safe for undef cases.

Differential Revision: https://reviews.llvm.org/D55822

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@349629 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[SelectionDAG] Optional handling of UNDEF elements in matchBinaryPredicate (part...
Simon Pilgrim [Wed, 19 Dec 2018 14:09:09 +0000 (14:09 +0000)]
[SelectionDAG] Optional handling of UNDEF elements in matchBinaryPredicate (part 1 of 2)

Now that SimplifyDemandedBits/SimplifyDemandedVectorElts is simplifying vector elements, we're seeing more constant BUILD_VECTOR containing undefs.

This patch provides opt-in support for UNDEF elements in matchBinaryPredicate, passing NULL instead of the result ConstantSDNode* argument.

Differential Revision: https://reviews.llvm.org/D55822

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@349628 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[TargetLowering] Fix propagation of undefs in zero extension ops (PR40091)
Simon Pilgrim [Wed, 19 Dec 2018 13:37:59 +0000 (13:37 +0000)]
[TargetLowering] Fix propagation of undefs in zero extension ops (PR40091)

As described on PR40091, we have several places where zext (and zext_vector_inreg) fold an undef input into an undef output. For zero extensions this is incorrect as the output should guarantee to least have the new upper bits set to zero.

SimplifyDemandedVectorElts is the worst offender (and its the most likely to cause new undefs to appear) but DAGCombiner's tryToFoldExtendOfConstant has a similar issue.

Thanks to @dmgreen for catching this.

Differential Revision: https://reviews.llvm.org/D55883

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@349625 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoLet TableGen write output only if it changed, instead of doing so in cmake, attempt 2
Nico Weber [Wed, 19 Dec 2018 13:35:53 +0000 (13:35 +0000)]
Let TableGen write output only if it changed, instead of doing so in cmake, attempt 2

This relands r330742:
"""
Let TableGen write output only if it changed, instead of doing so in cmake.

Removes one subprocess and one temp file from the build for each tablegen
invocation.

No intended behavior change.
"""

In particular, if you see rebuilds after this change that you didn't see
before this change, that's unintended and it's fine to revert this change
again (but let me know).

r330742 got reverted because some people reported that llvm-tblgen ran on every
build after it.  This could happen if the depfile output got deleted without
deleting the main .inc output. To fix, make TableGen always write the depfile,
but keep writing the main .inc output only if it has changed. This matches what
we did in cmake before.

Differential Revision: https://reviews.llvm.org/D55842

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@349624 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoFix test MC/AMDGPU/reloc.s
Nicolai Haehnle [Wed, 19 Dec 2018 12:13:21 +0000 (12:13 +0000)]
Fix test MC/AMDGPU/reloc.s

Missed this change in r349620

Change-Id: I5123e31ed4bb99ad6903b9ede4de4dbe2cc6d453

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@349622 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[X86][SSE] Remove use of SSE ADDS/SUBS saturation intrinsics from schedule/stack...
Simon Pilgrim [Wed, 19 Dec 2018 12:00:25 +0000 (12:00 +0000)]
[X86][SSE] Remove use of SSE ADDS/SUBS saturation intrinsics from schedule/stack tests

These are due to be upgraded soon, but good to replace them with generic llvm sadd_sat/ssub_sat intrinsics now.

The avx512 masked cases need doing as well but require a bit of tidyup first.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@349621 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoAMDGPU: Use an ABS32_LO relocation for SCRATCH_RSRC_DWORD1
Nicolai Haehnle [Wed, 19 Dec 2018 11:55:03 +0000 (11:55 +0000)]
AMDGPU: Use an ABS32_LO relocation for SCRATCH_RSRC_DWORD1

Summary:
Using HI here makes no logical sense, since the dword is only
32 bits to begin with.

Current Mesa master does not look at the relocation type at all,
so this change is fine. Future Mesa will rely on this, however.

Change-Id: I91085707834c4ac0370926602b93c94b90e44cb1

Reviewers: arsenm, rampitec, mareko

Subscribers: kzhuravl, jvesely, wdng, yaxunl, dstuttard, tpr, t-tye, llvm-commits

Differential Revision: https://reviews.llvm.org/D55369

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@349620 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[llvm-objdump] - Fix one more BB.
George Rimar [Wed, 19 Dec 2018 10:44:49 +0000 (10:44 +0000)]
[llvm-objdump] - Fix one more BB.

Should fix the http://lab.llvm.org:8011/builders/polly-amd64-linux/builds/25876/steps/build/logs/stdio:

/home/grosser/buildslave/polly-amd64-linux/llvm.src/tools/llvm-objdump/llvm-objdump.cpp:539:25: error: conditional expression is ambiguous; 'std::string' (aka 'basic_string<char>') can be converted to 'typename std::remove_reference<StringRef>::type' (aka 'llvm::StringRef') and vice versa
      Target = Demangle ? demangle(*SymName) : *SymName;

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@349617 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[SelectionDAG] Optional handling of UNDEF elements in matchUnaryPredicate
Simon Pilgrim [Wed, 19 Dec 2018 10:41:06 +0000 (10:41 +0000)]
[SelectionDAG] Optional handling of UNDEF elements in matchUnaryPredicate

Now that SimplifyDemandedBits/SimplifyDemandedVectorElts are simplifying vector elements, we're seeing more constant BUILD_VECTOR containing UNDEFs.

This patch provides opt-in handling of UNDEF elements in matchUnaryPredicate, passing NULL instead of the ConstantSDNode* argument.

I've updated SelectionDAG::simplifyShift to demonstrate its use.

Differential Revision: https://reviews.llvm.org/D55819

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@349616 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[X86][SSE] Remove SSE ADDUS/SUBUS saturation intrinsics from schedule/stack tests
Simon Pilgrim [Wed, 19 Dec 2018 10:39:14 +0000 (10:39 +0000)]
[X86][SSE] Remove SSE ADDUS/SUBUS saturation intrinsics from schedule/stack tests

These are already being autoupgraded, currently to an IR sequence, but best to replace them with generic llvm uadd_sat/usub_sat intrinsics (which D55855 will be doing shortly anyhow).

The avx512 masked cases need doing as well but require a bit of tidyup first.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@349615 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[llvm-objdump] - Fix BB.
George Rimar [Wed, 19 Dec 2018 10:29:35 +0000 (10:29 +0000)]
[llvm-objdump] - Fix BB.

Move the helper method before the first incocation in the file.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@349614 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[llvm-objdump] - Demangle the symbols when printing symbol table and relocations.
George Rimar [Wed, 19 Dec 2018 10:21:45 +0000 (10:21 +0000)]
[llvm-objdump] - Demangle the symbols when printing symbol table and relocations.

This is https://bugs.llvm.org/show_bug.cgi?id=40009,

llvm-objdump does not demangle the symbols when prints symbol
table and/or relocations.

Patch teaches it to do that.

Differential revision: https://reviews.llvm.org/D55821

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@349613 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoAMDGPU/InsertWaitcnts: Update VGPR/SGPR bounds when brackets are merged
Carl Ritson [Wed, 19 Dec 2018 10:17:49 +0000 (10:17 +0000)]
AMDGPU/InsertWaitcnts: Update VGPR/SGPR bounds when brackets are merged

Summary:
Fix an issue where VGPR/SGPR bounds are not properly extended when brackets are merged.
This manifests as missing waitcnt insertions when multiple brackets are forwarded to a successor block and the first forward has lower VGPR/SGPR bounds.

Irreducible loop test has been extended based on a CTS failure detected for GFX9.

Reviewers: nhaehnle

Reviewed By: nhaehnle

Subscribers: arsenm, kzhuravl, jvesely, wdng, yaxunl, dstuttard, tpr, t-tye, jfb, llvm-commits

Differential Revision: https://reviews.llvm.org/D55602

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@349611 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[ARM GlobalISel] Support G_CONSTANT for Thumb2
Diana Picus [Wed, 19 Dec 2018 09:55:10 +0000 (09:55 +0000)]
[ARM GlobalISel] Support G_CONSTANT for Thumb2

All we have to do is mark it as legal.

This allows us to select a lot of new patterns handled by TableGen. This
patch adds tests for them and splits up the existing test file for
binary operators into 2 files, one for arithmetic ops and one for
logical ones.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@349610 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoAMDGPU/GlobalISel: Regbankselect for fsub
Matt Arsenault [Wed, 19 Dec 2018 09:07:58 +0000 (09:07 +0000)]
AMDGPU/GlobalISel: Regbankselect for fsub

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@349608 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[llvm-objcopy] [COFF] Fix the Object forward declaration
Martin Storsjo [Wed, 19 Dec 2018 07:45:06 +0000 (07:45 +0000)]
[llvm-objcopy] [COFF] Fix the Object forward declaration

This fixes build warnings with clang, and linker errors with MSVC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@349606 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[llvm-objcopy] Initial COFF support
Martin Storsjo [Wed, 19 Dec 2018 07:24:38 +0000 (07:24 +0000)]
[llvm-objcopy] Initial COFF support

This is an initial implementation of no-op passthrough copying of COFF
with objcopy.

Differential Revision: https://reviews.llvm.org/D54939

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@349605 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[DebugInfo] Make AsmPrinter struct HandlerInfo and Handlers protected
Yonghong Song [Wed, 19 Dec 2018 04:07:47 +0000 (04:07 +0000)]
[DebugInfo] Make AsmPrinter struct HandlerInfo and Handlers protected

In AsmPrinter, make struct HandlerInfo and SmallVector
Handlers protected, so target extended AsmPrinter will
be able to add their own handlers.

Signed-off-by: Yonghong Song <yhs@fb.com>
Differential Revision: https://reviews.llvm.org/D55756

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@349602 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[bugpoint][PR29027] Reduce function attributes
Brian Gesiak [Wed, 19 Dec 2018 03:42:19 +0000 (03:42 +0000)]
[bugpoint][PR29027] Reduce function attributes

Summary:
In addition to reducing the functions in an LLVM module, bugpoint now
reduces the function attributes associated with each of the remaining
functions.

To test this, add a -bugpoint-crashfuncattr test pass, which crashes if
a function in the module has a "bugpoint-crash" attribute. A test case
demonstrates that the IR is reduced to just that one attribute.

Reviewers: MatzeB, silvas, davide, reames

Reviewed By: reames

Subscribers: reames, llvm-commits

Differential Revision: https://reviews.llvm.org/D55216

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@349601 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoFix use-after-free with profile remapping.
Richard Smith [Wed, 19 Dec 2018 03:24:03 +0000 (03:24 +0000)]
Fix use-after-free with profile remapping.

We need to keep the underlying profile reader alive as long as the
profile data, because the profile data may contain StringRefs referring
to strings in the reader's name table.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@349600 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[PowerPC]Exploit P9 vabsdu for unsigned vselect patterns
Kewen Lin [Wed, 19 Dec 2018 03:04:07 +0000 (03:04 +0000)]
[PowerPC]Exploit P9 vabsdu for unsigned vselect patterns

For type v4i32/v8ii16/v16i8, do following transforms:
  (vselect (setcc a, b, setugt), (sub a, b), (sub b, a)) -> (vabsd a, b)
  (vselect (setcc a, b, setuge), (sub a, b), (sub b, a)) -> (vabsd a, b)
  (vselect (setcc a, b, setult), (sub b, a), (sub a, b)) -> (vabsd a, b)
  (vselect (setcc a, b, setule), (sub b, a), (sub a, b)) -> (vabsd a, b)

Differential Revision: https://reviews.llvm.org/D55812

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@349599 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[gn build] Add build file for llvm-objcopy
Nico Weber [Wed, 19 Dec 2018 02:48:01 +0000 (02:48 +0000)]
[gn build] Add build file for llvm-objcopy

Needed by check-lld.

This should've been part of r349486 but I messed up.

Differential Revision: https://reviews.llvm.org/D55831

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@349598 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoRe-land "Fix MSVC dependency issue between Clang-tablegen and LLVM-tablegen"
Alexandre Ganea [Wed, 19 Dec 2018 01:30:29 +0000 (01:30 +0000)]
Re-land "Fix MSVC dependency issue between Clang-tablegen and LLVM-tablegen"

Previously, when compiling Visual Studio targets, one could see random build errors. This was caused by tablegen projects using the same build folders.
This workaround simply chains tablegen projects.

Differential Revision: https://reviews.llvm.org/D54153

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@349596 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoAdd llvm-objdump man page
Ed Maste [Wed, 19 Dec 2018 01:26:55 +0000 (01:26 +0000)]
Add llvm-objdump man page

Differential Revision: https://reviews.llvm.org/D54864

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@349595 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[AArch64] Simplify the Exynos M3 pipeline model
Evandro Menezes [Tue, 18 Dec 2018 23:19:57 +0000 (23:19 +0000)]
[AArch64] Simplify the Exynos M3 pipeline model

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@349569 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[AArch64] Fix instructions order (NFC)
Evandro Menezes [Tue, 18 Dec 2018 23:19:55 +0000 (23:19 +0000)]
[AArch64] Fix instructions order (NFC)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@349568 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[llvm-mca] Improve test (NFC)
Evandro Menezes [Tue, 18 Dec 2018 23:19:52 +0000 (23:19 +0000)]
[llvm-mca] Improve test (NFC)

Add more instruction variations for Exynos.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@349567 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[DebugInfo] Move several private headers to include directory
Yonghong Song [Tue, 18 Dec 2018 23:10:17 +0000 (23:10 +0000)]
[DebugInfo] Move several private headers to include directory

This patch moved the following files in lib/CodeGen/AsmPrinter/
  AsmPrinterHandler.h
  DbgEntityHistoryCalculator.h
  DebugHandlerBase.h
to include/llvm/CodeGen directory.

Such a change will enable Target to extend DebugHandlerBase
and emit Target specific debug info sections.

Signed-off-by: Yonghong Song <yhs@fb.com>
Differential Revision: https://reviews.llvm.org/D55755

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@349564 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[InstCombine] add tests for extract of vector load; NFC
Sanjay Patel [Tue, 18 Dec 2018 22:51:06 +0000 (22:51 +0000)]
[InstCombine] add tests for extract of vector load; NFC

There's a mismatch internally about how we are handling these patterns.
We count loads as cheapToScalarize(), but then we don't actually
scalarize them, so that can leave extra instructions compared to where
we started when scalarizing other ops. If it's cheapToScalarize, then
we should be scalarizing.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@349560 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoPreserve the linkage for objc* intrinsics as clang will set them to weak_external...
Pete Cooper [Tue, 18 Dec 2018 22:42:08 +0000 (22:42 +0000)]
Preserve the linkage for objc* intrinsics as clang will set them to weak_external in some cases

Clang uses weak linkage for objc runtime functions when they are not available on the platform.

The intrinsic has this linkage so we just need to pass that on to the runtime call.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@349559 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoAdd nonlazybind to objc_retain/objc_release when converting from intrinsics.
Pete Cooper [Tue, 18 Dec 2018 22:31:34 +0000 (22:31 +0000)]
Add nonlazybind to objc_retain/objc_release when converting from intrinsics.

For performance reasons, clang set nonlazybind on these functions.  Now that we
are using intrinsics instead of runtime calls, we should set this attribute when
creating the runtime functions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@349558 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[LAA] Introduce enum for vectorization safety status (NFC).
Florian Hahn [Tue, 18 Dec 2018 22:25:11 +0000 (22:25 +0000)]
[LAA] Introduce enum for vectorization safety status (NFC).

This patch adds a VectorizationSafetyStatus enum, which will be extended
in a follow up patch to distinguish between 'safe with runtime checks'
and 'known unsafe' dependences.

Reviewers: anemet, anna, Ayal, hsaito

Reviewed By: Ayal

Differential Revision: https://reviews.llvm.org/D54892

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@349556 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[asan] Restore ODR-violation detection on vtables
Vitaly Buka [Tue, 18 Dec 2018 22:23:30 +0000 (22:23 +0000)]
[asan] Restore ODR-violation detection on vtables

Summary:
unnamed_addr is still useful for detecting of ODR violations on vtables

Still unnamed_addr with lld and --icf=safe or --icf=all can trigger false
reports which can be avoided with --icf=none or by using private aliases
with -fsanitize-address-use-odr-indicator

Reviewers: eugenis

Reviewed By: eugenis

Subscribers: kubamracek, hiraditya, llvm-commits

Differential Revision: https://reviews.llvm.org/D55799

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@349555 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[LoopVectorize] auto-generate complete checks; NFC
Sanjay Patel [Tue, 18 Dec 2018 22:23:04 +0000 (22:23 +0000)]
[LoopVectorize] auto-generate complete checks; NFC

The first test claims to show that the vectorizer will
generate a vector load/loop, but then this file runs
other passes which might scalarize that op. I'm removing
instcombine from the RUN line here to break that dependency.
Also, I'm generating full checks to make it clear exactly
what the vectorizer has done.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@349554 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoRewrite objc intrinsics to runtime methods in PreISelIntrinsicLowering instead of...
Pete Cooper [Tue, 18 Dec 2018 22:20:03 +0000 (22:20 +0000)]
Rewrite objc intrinsics to runtime methods in PreISelIntrinsicLowering instead of SDAG.

SelectionDAG currently changes these intrinsics to function calls, but that won't work
for other ISel's.  Also we want to eventually support nonlazybind and weak linkage coming
from the front-end which we can't do in SelectionDAG.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@349552 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[AArch64] Avoid crashing on .seh directives in assembly
Martin Storsjo [Tue, 18 Dec 2018 22:10:17 +0000 (22:10 +0000)]
[AArch64] Avoid crashing on .seh directives in assembly

Differential Revision: https://reviews.llvm.org/D55670

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@349549 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[InstCombine] auto-generate complete checks; NFC
Sanjay Patel [Tue, 18 Dec 2018 22:09:15 +0000 (22:09 +0000)]
[InstCombine] auto-generate complete checks; NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@349548 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoRevert r349541 (Fix MSVC dependency issue between Clang-tablegen and LLVM-tablegen)
Alexandre Ganea [Tue, 18 Dec 2018 21:39:40 +0000 (21:39 +0000)]
Revert r349541 (Fix MSVC dependency issue between Clang-tablegen and LLVM-tablegen)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@349545 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[asan] In llvm.asan.globals, allow entries to be non-GlobalVariable and skip over...
Kuba Mracek [Tue, 18 Dec 2018 21:20:17 +0000 (21:20 +0000)]
[asan] In llvm.asan.globals, allow entries to be non-GlobalVariable and skip over them

Looks like there are valid reasons why we need to allow bitcasts in llvm.asan.globals, see discussion at https://github.com/apple/swift-llvm/pull/133. Let's look through bitcasts when iterating over entries in the llvm.asan.globals list.

Differential Revision: https://reviews.llvm.org/D55794

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@349544 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[AARCH64] Added test case for PR40091
Simon Pilgrim [Tue, 18 Dec 2018 21:05:22 +0000 (21:05 +0000)]
[AARCH64] Added test case for PR40091

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@349543 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoFix MSVC dependency issue between Clang-tablegen and LLVM-tablegen
Alexandre Ganea [Tue, 18 Dec 2018 21:03:06 +0000 (21:03 +0000)]
Fix MSVC dependency issue between Clang-tablegen and LLVM-tablegen

Previously, when compiling Visual Studio targets, one could see random build errors. This was caused by tablegen projects using the same build folders.
This workaround simply chains tablegen projects.

Differential Revision: https://reviews.llvm.org/D54153

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@349541 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[llvm-mca] Update the Exynos test cases (NFC)
Evandro Menezes [Tue, 18 Dec 2018 20:46:03 +0000 (20:46 +0000)]
[llvm-mca] Update the Exynos test cases (NFC)

Add more entropy to the test cases.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@349537 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[llvm-mca] Dump mask in hex
Evandro Menezes [Tue, 18 Dec 2018 20:45:50 +0000 (20:45 +0000)]
[llvm-mca] Dump mask in hex

Dump the resources masks as hexadecimal.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@349536 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoChange the objc ARC optimizer to use the new objc.* intrinsics
Pete Cooper [Tue, 18 Dec 2018 20:32:49 +0000 (20:32 +0000)]
Change the objc ARC optimizer to use the new objc.* intrinsics

We're moving ARC optimisation and ARC emission in clang away from runtime methods
and towards intrinsics.  This is the part which actually uses the intrinsics in the ARC
optimizer when both analyzing the existing calls and emitting new ones.

Differential Revision: https://reviews.llvm.org/D55348

Reviewers: ahatanak

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@349534 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[X86] Add BSR to isUseDefConvertible.
Craig Topper [Tue, 18 Dec 2018 20:03:54 +0000 (20:03 +0000)]
[X86] Add BSR to isUseDefConvertible.

We already had BSF here as part of __builtin_ffs improvements and I was just wondering yesterday whether we should have BSR there.

This addresses one issue from PR40090.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@349531 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[InstCombine] Simplify cttz/ctlz + icmp eq/ne into mask check
Nikita Popov [Tue, 18 Dec 2018 19:59:50 +0000 (19:59 +0000)]
[InstCombine] Simplify cttz/ctlz + icmp eq/ne into mask check

Checking whether a number has a certain number of trailing / leading
zeros means checking whether it is of the form XXXX1000 / 0001XXXX,
which can be done with an and+icmp.

Related to https://bugs.llvm.org/show_bug.cgi?id=28668. As a next
step, this can be extended to non-equality predicates.

Differential Revision: https://reviews.llvm.org/D55745

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@349530 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[AMDGPU] Removed the unnecessary operand size-check-assert from processBaseWithConstO...
Farhana Aleen [Tue, 18 Dec 2018 19:58:39 +0000 (19:58 +0000)]
[AMDGPU] Removed the unnecessary operand size-check-assert from processBaseWithConstOffset().

Summary: 32bit operand sizes are guaranteed by the opcode check AMDGPU::V_ADD_I32_e64 and
         AMDGPU::V_ADDC_U32_e64. Therefore, we don't any additional operand size-check-assert.

Author: FarhanaAleen

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@349529 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoDebugInfo: Fix missing local imported entities after r349207
David Blaikie [Tue, 18 Dec 2018 19:40:22 +0000 (19:40 +0000)]
DebugInfo: Fix missing local imported entities after r349207

Post commit review/bug reported by Pavel Labath - thanks!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@349528 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[SCCP] Get rid of redundant call for getPredicateInfoFor (NFC).
Florian Hahn [Tue, 18 Dec 2018 19:37:07 +0000 (19:37 +0000)]
[SCCP] Get rid of redundant call for getPredicateInfoFor (NFC).

We can use the result fetched a few lines above.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@349527 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[X86] Don't use SplitOpsAndApply to create ISD::UADDSAT/ISD::USUBSAT nodes. Let type...
Craig Topper [Tue, 18 Dec 2018 19:29:08 +0000 (19:29 +0000)]
[X86] Don't use SplitOpsAndApply to create ISD::UADDSAT/ISD::USUBSAT nodes. Let type legalization and op legalization deal with it.

Now that we've switched to target independent nodes we can rely on generic infrastructure to do the legalization for us.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@349526 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[InstCombine] refactor isCheapToScalarize(); NFC
Sanjay Patel [Tue, 18 Dec 2018 19:07:38 +0000 (19:07 +0000)]
[InstCombine] refactor isCheapToScalarize(); NFC

As the FIXME indicates, this has the potential to go
overboard. So I'm not sure if it's even worth keeping
this vs. iteratively doing simple matches, but we might
as well clean it up.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@349523 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[X86] Use SADDSAT/SSUBSAT instead of ADDS/SUBS
Nikita Popov [Tue, 18 Dec 2018 18:28:22 +0000 (18:28 +0000)]
[X86] Use SADDSAT/SSUBSAT instead of ADDS/SUBS

Migrate the X86 backend from X86ISD opcodes ADDS and SUBS to generic
ISD opcodes SADDSAT and SSUBSAT. This also improves scodegen for
@llvm.sadd.sat() and @llvm.ssub.sat() intrinsics.

This is a followup to D55787 and part of PR40056.

Differential Revision: https://reviews.llvm.org/D55833

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@349520 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[X86] Create PSUBUS from (add (umax X, C), -C)
Craig Topper [Tue, 18 Dec 2018 18:26:25 +0000 (18:26 +0000)]
[X86] Create PSUBUS from (add (umax X, C), -C)

InstCombine seems to canonicalize or PSUB patter into a max with the cosntant and an add with an inverse of the constant.

This patch recognizes this pattern and turns it into PSUBUS. Future work could improve undef element handling.

Fixes some of PR40053

Differential Revision: https://reviews.llvm.org/D55780

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@349519 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoBuildfix for r345516 (Clang compilation failing).
Alexandre Ganea [Tue, 18 Dec 2018 18:23:36 +0000 (18:23 +0000)]
Buildfix for r345516 (Clang compilation failing).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@349518 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[CMake] Default options for faster executables on MSVC
Alexandre Ganea [Tue, 18 Dec 2018 18:17:00 +0000 (18:17 +0000)]
[CMake] Default options for faster executables on MSVC

- Disable incremental linking by default. /INCREMENTAL adds extra thunks in the EXE, which makes execution slower.
- Set /MT (static CRT lib) by default instead of CMake's default /MD (dll CRT lib). The previous default /MD makes all DLL functions to be thunked, thus making execution slower (memcmp, memset, etc.)
- Adds LLVM_ENABLE_INCREMENTAL_LINK which is set to OFF by default.

Differential revision: https://reviews.llvm.org/D55056

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@349517 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[llvm-symbolizer] Omit stderr output when symbolizing a crash
Alexandre Ganea [Tue, 18 Dec 2018 18:13:13 +0000 (18:13 +0000)]
[llvm-symbolizer] Omit stderr output when symbolizing a crash

Differential revision: https://reviews.llvm.org/D55723

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@349516 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[InstCombine] add tests for scalarization; NFC
Sanjay Patel [Tue, 18 Dec 2018 17:56:59 +0000 (17:56 +0000)]
[InstCombine] add tests for scalarization; NFC

We miss pattern matching a splat constant if it has undef elements.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@349515 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoAdd FMF management to common fp intrinsics in GlobalIsel
Michael Berg [Tue, 18 Dec 2018 17:54:52 +0000 (17:54 +0000)]
Add FMF management to common fp intrinsics in GlobalIsel

Summary: This the initial code change to facilitate managing FMF flags from Instructions to MI wrt Intrinsics in Global Isel.  Eventually the GlobalObserver interface will be added as well, where FMF additions can be tracked for the builder and CSE.

Reviewers: aditya_nandakumar, bogner

Reviewed By: bogner

Subscribers: rovka, kristof.beyls, javed.absar

Differential Revision: https://reviews.llvm.org/D55668

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@349514 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[LoopVectorize] Rename pass options. NFC.
Michael Kruse [Tue, 18 Dec 2018 17:46:09 +0000 (17:46 +0000)]
[LoopVectorize] Rename pass options. NFC.

Rename:
NoUnrolling to InterleaveOnlyWhenForced
and
AlwaysVectorize to !VectorizeOnlyWhenForced

Contrary to what the name 'AlwaysVectorize' suggests, it does not
unconditionally vectorize all loops, but applies a cost model to
determine whether vectorization is profitable to all loops. Hence,
passing false will disable the cost model, except when a loop is marked
with llvm.loop.vectorize.enable. The 'OnlyWhenForced' suffix (suggested
by @hfinkel in D55716) better matches this behavior.

Similarly, 'NoUnrolling' disables the profitability cost model for
interleaving (a term to distinguish it from unrolling by the
LoopUnrollPass); rename it for consistency.

Differential Revision: https://reviews.llvm.org/D55785

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@349513 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[X86][SSE] Don't use 'sign bit select' vXi8 ROTL lowering for constant rotation amounts
Simon Pilgrim [Tue, 18 Dec 2018 17:31:11 +0000 (17:31 +0000)]
[X86][SSE] Don't use 'sign bit select' vXi8 ROTL lowering for constant rotation amounts

Noticed by @spatel on D55747 - we get much better codegen if we use the regular shift expansion.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@349510 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[LoopUnroll] Honor '#pragma unroll' even with -fno-unroll-loops.
Michael Kruse [Tue, 18 Dec 2018 17:16:05 +0000 (17:16 +0000)]
[LoopUnroll] Honor '#pragma unroll' even with -fno-unroll-loops.

When using clang with `-fno-unroll-loops` (implicitly added with `-O1`),
the LoopUnrollPass is not not added to the (legacy) pass pipeline. This
also means that it will not process any loop metadata such as
llvm.loop.unroll.enable (which is generated by #pragma unroll or
WarnMissedTransformationsPass emits a warning that a forced
transformation has not been applied (see
https://lists.llvm.org/pipermail/llvm-commits/Week-of-Mon-20181210/610833.html).
Such explicit transformations should take precedence over disabling
heuristics.

This patch unconditionally adds LoopUnrollPass to the optimizing
pipeline (that is, it is still not added with `-O0`), but passes a flag
indicating whether automatic unrolling is dis-/enabled. This is the same
approach as LoopVectorize uses.

The new pass manager's pipeline builder has no option to disable
unrolling, hence the problem does not apply.

Differential Revision: https://reviews.llvm.org/D55716

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@349509 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[X86][SSE] Don't use 'sign bit select' vXi8 ROTL lowering for splat rotation amounts
Simon Pilgrim [Tue, 18 Dec 2018 16:02:23 +0000 (16:02 +0000)]
[X86][SSE] Don't use 'sign bit select' vXi8 ROTL lowering for splat rotation amounts

Noticed by @spatel on D55747 - we get much better codegen if we use the regular shift expansion.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@349500 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[MIPS GlobalISel] Select G_SDIV, G_UDIV, G_SREM and G_UREM
Petar Avramovic [Tue, 18 Dec 2018 15:59:51 +0000 (15:59 +0000)]
[MIPS GlobalISel] Select G_SDIV, G_UDIV, G_SREM and G_UREM

Add support for s64 libcalls for G_SDIV, G_UDIV, G_SREM and G_UREM
and use integer type of correct size when creating arguments for
CLI.lowerCall.
Select G_SDIV, G_UDIV, G_SREM and G_UREM for types s8, s16, s32 and s64
on MIPS32.

Differential Revision: https://reviews.llvm.org/D55651

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@349499 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[gn build] Add build file for llvm-pdbutil
Nico Weber [Tue, 18 Dec 2018 15:09:07 +0000 (15:09 +0000)]
[gn build] Add build file for llvm-pdbutil

Needed for check-lld.

Differential Revision: https://reviews.llvm.org/D55826

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@349490 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[gn build] Add build file for llvm-bcanalyzer
Nico Weber [Tue, 18 Dec 2018 14:58:48 +0000 (14:58 +0000)]
[gn build] Add build file for llvm-bcanalyzer

Needed for check-lld.

Differential Revision: https://reviews.llvm.org/D55824

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@349488 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[gn build] Add build files for llvm-ar, llvm-nm, llvm-objdump, llvm-readelf
Nico Weber [Tue, 18 Dec 2018 13:52:21 +0000 (13:52 +0000)]
[gn build] Add build files for llvm-ar, llvm-nm, llvm-objdump, llvm-readelf

Also add build files for deps DebugInfo/Symbolize, ToolDrivers/dll-tool.
Also add gn/build/libs/xar (needed by llvm-objdump).

Also delete an incorrect part of the symlink description in //BUILD.gn (it used
to be true before I made the symlink step write a stamp file; now it's no
longer true).

These are all binaries needed by check-lld that need symlinks.

Differential Revision: https://reviews.llvm.org/D55743

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@349486 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[X86][SSE] Add shift combine 'out of range' tests with UNDEFs
Simon Pilgrim [Tue, 18 Dec 2018 13:37:04 +0000 (13:37 +0000)]
[X86][SSE] Add shift combine 'out of range' tests with UNDEFs

Shows failure to simplify out of range shift amounts to UNDEF if any element is UNDEF.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@349483 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[X86] Use UADDSAT/USUBSAT instead of ADDUS/SUBUS
Nikita Popov [Tue, 18 Dec 2018 13:23:03 +0000 (13:23 +0000)]
[X86] Use UADDSAT/USUBSAT instead of ADDUS/SUBUS

Replace the X86ISD opcodes ADDUS and SUBUS with generic ISD opcodes
UADDSAT and USUBSAT. As a side-effect, this also makes codegen for
the @llvm.uadd.sat and @llvm.usub.sat intrinsics reasonable.

This only replaces use in the X86 backend, and does not move any of
the ADDUS/SUBUS X86 specific combines into generic codegen.

Differential Revision: https://reviews.llvm.org/D55787

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@349481 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[SelectionDAG][X86] Fix [US](ADD|SUB)SAT vector legalization, add tests
Nikita Popov [Tue, 18 Dec 2018 13:22:53 +0000 (13:22 +0000)]
[SelectionDAG][X86] Fix [US](ADD|SUB)SAT vector legalization, add tests

Integer result promotion needs to use the scalar size, and we need
support for result widening.

This is in preparation for D55787.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@349480 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[docs] Improve HowToCrossCompilerBuiltinsOnArm
Peter Smith [Tue, 18 Dec 2018 12:40:19 +0000 (12:40 +0000)]
[docs] Improve HowToCrossCompilerBuiltinsOnArm

Some recent experience on llvm-dev pointed out some errors in the document:
- Assumption of ninja
- Use of --march rather than -march
- Problems with host include files when a multiarch setup was used
- Insufficient target information passed to assembler
- Instructions on using the cmake cache file BaremetalARM.cmake were
  incomplete

There was also insufficient guidance on what to do when various stages
failed due to misconfiguration or missing steps.

Summary of changes:
- Fixed problems above
- Added a troubleshooting section with common errors.
- Cleared up one "at time of writing" that is no longer a problem.

Differential Revision: https://reviews.llvm.org/D55709

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@349477 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[llvm-dwarfdump] - Do not error out on R_X86_64_DTPOFF64/R_X86_64_DTPOFF32 relocations.
George Rimar [Tue, 18 Dec 2018 12:15:01 +0000 (12:15 +0000)]
[llvm-dwarfdump] - Do not error out on R_X86_64_DTPOFF64/R_X86_64_DTPOFF32 relocations.

This is https://bugs.llvm.org/show_bug.cgi?id=39992,

If we have the following code (test.cpp):

thread_local int tdata = 24;
and build an .o file with debug information:

clang --target=x86_64-pc-linux -c bar.cpp -g

Then object produced may have R_X86_64_DTPOFF64/R_X86_64_DTPOFF32 relocations.
(clang emits R_X86_64_DTPOFF64 and gcc emits R_X86_64_DTPOFF32 for the code above for me)

Currently, llvm-dwarfdump fails to compute this TLS relocation when dumping
object and reports an
error:
failed to compute relocation: R_X86_64_DTPOFF64, Invalid data was encountered while parsing the file

This relocation represents the offset in the TLS block and resolved by the linker,
but this info is unavailable at the
point when the object file is dumped by this tool.

The patch adds the simple evaluation for such relocations to avoid emitting errors.
Resulting behavior seems to be equal to GNU dwarfdump.

Differential revision: https://reviews.llvm.org/D55762

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@349476 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[MIPS GlobalISel] ClampScalar G_AND G_OR and G_XOR
Petar Avramovic [Tue, 18 Dec 2018 11:36:14 +0000 (11:36 +0000)]
[MIPS GlobalISel] ClampScalar G_AND G_OR and G_XOR

Add narrowScalar for G_AND and G_XOR.
Legalize G_AND G_OR and G_XOR for types other then s32
with clampScalar on MIPS32.

Differential Revision: https://reviews.llvm.org/D55362

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@349475 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[AArch64] - Return address signing dwarf support
Luke Cheeseman [Tue, 18 Dec 2018 10:37:42 +0000 (10:37 +0000)]
[AArch64] - Return address signing dwarf support

- Reapply changes intially introduced in r343089
- The archtecture info is no longer loaded whenever a DWARFContext is created
- The runtimes libraries (santiziers) make use of the dwarf context classes but
  do not intialise the target info
- The architecture of the object can be obtained without loading the target info
- Adding a method to the dwarf context to get this information and multiplex the
  string printing later on

Differential Revision: https://reviews.llvm.org/D55774

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@349472 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[X86][AVX] Add 256/512-bit vector funnel shift tests
Simon Pilgrim [Tue, 18 Dec 2018 10:32:54 +0000 (10:32 +0000)]
[X86][AVX] Add 256/512-bit vector funnel shift tests

Extra coverage for D55747

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@349471 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[X86][SSE] Add 128-bit vector funnel shift tests
Simon Pilgrim [Tue, 18 Dec 2018 10:08:23 +0000 (10:08 +0000)]
[X86][SSE] Add 128-bit vector funnel shift tests

Extra coverage for D55747

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@349470 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[IPO][AVR] Create new Functions in the default address space specified in the data...
Dylan McKay [Tue, 18 Dec 2018 09:52:52 +0000 (09:52 +0000)]
[IPO][AVR] Create new Functions in the default address space specified in the data layout

This modifies the IPO pass so that it respects any explicit function
address space specified in the data layout.

In targets with nonzero program address spaces, all functions should, by
default, be placed into the default program address space.

This is required for Harvard architectures like AVR. Without this, the
functions will be marked as residing in data space, and thus not be
callable.

This has no effect to any in-tree official backends, as none use an
explicit program address space in their data layouts.

Patch by Tim Neumann.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@349469 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoAMDGPU: Legalize/regbankselect frame_index
Matt Arsenault [Tue, 18 Dec 2018 09:46:13 +0000 (09:46 +0000)]
AMDGPU: Legalize/regbankselect frame_index

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@349468 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoAMDGPU: Legalize/regbankselect fma
Matt Arsenault [Tue, 18 Dec 2018 09:39:56 +0000 (09:39 +0000)]
AMDGPU: Legalize/regbankselect fma

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@349467 91177308-0d34-0410-b5e6-96231b3b80d8