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Sanjay Patel [Mon, 9 May 2016 16:42:50 +0000 (16:42 +0000)]
[TargetLowering] make helper function for SetCC + and optimizations (NFC)
After looking at D19087 again, it occurred to me that we can do better. If we consolidate
the valueHasExactlyOneBitSet() transforms, we won't incur extra overhead from calling it a
2nd time, and we can shrink SimplifySetCC() a bit. No functional change intended.
Differential Revision: http://reviews.llvm.org/D20050
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268932
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Simon Pilgrim [Mon, 9 May 2016 16:42:23 +0000 (16:42 +0000)]
Fixed unused but set variable warning
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268931
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Matt Arsenault [Mon, 9 May 2016 16:29:50 +0000 (16:29 +0000)]
AMDGPU: Fold shift into cvt_f32_ubyteN
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268930
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Sanjay Patel [Mon, 9 May 2016 16:07:45 +0000 (16:07 +0000)]
fix spelling; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268929
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Daniel Sanders [Mon, 9 May 2016 15:50:15 +0000 (15:50 +0000)]
[mips] Try to fix 'truncation from FindBestPredicateResult to bool' reported by MSVC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268928
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Daniel Sanders [Mon, 9 May 2016 15:37:52 +0000 (15:37 +0000)]
[mips][ias] Attempt to fix 'not all control paths return a value' reported by MSVC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268927
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Frederic Riss [Mon, 9 May 2016 14:44:14 +0000 (14:44 +0000)]
[dsymutil] Prevent use-after-free
The BinaryHolder would query the archive member MemoryBuffer name
to check if the current open archive also contains the next requested
objectfile. This comparison was using a StringRef to a temporary
buffer. It only happened with fat archives. This commit adds long-lived
storage along with the MemoryBuffers for the fat archive filename.
The added test would fail during an ASAN build without the fix.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268924
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Joerg Sonnenberger [Mon, 9 May 2016 14:36:16 +0000 (14:36 +0000)]
Optimize a printf with a double procent to putchar.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268922
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James Molloy [Mon, 9 May 2016 14:32:30 +0000 (14:32 +0000)]
[VectorUtils] Query number of sign bits to allow more truncations
When deciding if a vector calculation can be done in a smaller bitwidth, use sign bit information from ValueTracking to add more information and allow more truncations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268921
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Daniel Sanders [Mon, 9 May 2016 13:38:25 +0000 (13:38 +0000)]
[mips][micromips] Make getPointerRegClass() result depend on the instruction.
Summary:
Previously, it returned the GPR16MMRegClass for all instructions which was
incorrect for instructions like lwsp/lwgp and unnecesarily restricted the
permitted registers for instructions like lw32.
This fixes quite a few of the -verify-machineinstrs errors reported in PR27458.
I've only added -verify-machineinstrs to one test in this change since I
understand there is a plan to enable the verifier by default.
Reviewers: hvarga, zbuljan, zoran.jovanovic, sdardis
Subscribers: dsanders, llvm-commits, sdardis
Differential Revision: http://reviews.llvm.org/D19873
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268918
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Rafael Espindola [Mon, 9 May 2016 13:31:11 +0000 (13:31 +0000)]
Fix bug where temporary file would be left behind every time an archive was updated.
When updating an existing archive, llvm-ar opens the old archive into a
`MemoryBuffer`, does its thing, and writes the results to a temporary
file. That file is then renamed to the original archive filename, thus
replacing it with the updated contents. However, on Windows at least,
what would happen is that the `MemoryBuffer` for the old archive would
actually be an mmap'ed view of the file, so when it came time to do the
rename via Win32's `ReplaceFile`, it would succeed but would be unable
to fully replace the file since there would still be a handle open on
it; instead, the old version got renamed to a random temporary name and
left behind.
Patch by Cameron!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268916
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Simon Pilgrim [Mon, 9 May 2016 13:30:16 +0000 (13:30 +0000)]
[X86][SSE] Added TODO comment to add support for AVX512 mask registers to shuffle comments
This came up in discussion on D19198
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268915
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Daniel Sanders [Mon, 9 May 2016 13:10:57 +0000 (13:10 +0000)]
[mips] Fix use after free and an unnecessary copy introduced in r268896.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268913
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Strahinja Petrovic [Mon, 9 May 2016 12:27:39 +0000 (12:27 +0000)]
[PowerPC] fix register alignment for long double type
This patch fixes register alignment for long double type in
soft float mode. Before this patch alignment was 8 and this
patch changes it to 4.
Differential Revision: http://reviews.llvm.org/D18034
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268909
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Chris Dewhurst [Mon, 9 May 2016 11:55:15 +0000 (11:55 +0000)]
[Sparc][LEON] Add UMAC and SMAC instruction support for Sparc LEON subtargets
This change adds SMAC (signed multiply-accumulate) and UMAC (unsigned multiply-accumulate) for LEON subtargets of the Sparc processor.
The new files LeonFeatures.td and leon-instructions.ll will both be expanded in future, so I want to leave them separate as small files for this review, to be expanded in future check-ins.
Note: The functions are provided only for inline-assembly provision. No DAG selection is provided.
Differential Revision: http://reviews.llvm.org/D19911
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268908
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Silviu Baranga [Mon, 9 May 2016 11:10:44 +0000 (11:10 +0000)]
[AArch64] Implement lowering of the X constraint on AArch64
Summary:
This implements the lowering of the X constraint on
AArch64.
The default behaviour of the X constraint lowering is to
restrict it to "f". This is a problem because the "f"
constraint is not implemented on AArch64 and would be too
restrictive anyway. Therefore, the AArch64 hook will
lower this to "w" (if the operand is a floating point or
vector) or "r" otherwise.
The implementation is similar with the one added for
ARM (r267411).
This is the AArch64 side of the fix for http://llvm.org/PR26493
Reviewers: rengolin
Subscribers: aemerson, rengolin, llvm-commits, t.p.northover
Differential Revision: http://reviews.llvm.org/D19967
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268907
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Simon Pilgrim [Mon, 9 May 2016 10:43:13 +0000 (10:43 +0000)]
[X86][AVX512] Added masked version of combine tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268904
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Benjamin Kramer [Mon, 9 May 2016 10:31:17 +0000 (10:31 +0000)]
Revert "[Mips] Fix use after free."
Fixes use after free but breaks tests.
This reverts commit r268901.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268902
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Benjamin Kramer [Mon, 9 May 2016 10:21:56 +0000 (10:21 +0000)]
[Mips] Fix use after free.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268901
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Daniel Sanders [Mon, 9 May 2016 10:21:14 +0000 (10:21 +0000)]
[mips][ias] R_MIPS_(GOT|HI|LO|PC)16 and R_MIPS_GPREL32 do not need symbols.
Summary:
In theory, care must be taken to ensure that pairs of R_MIPS_(GOT|HI|LO)16
make the same decision on both relocs in the reloc pair but in practice
this isn't as hard as it sounds and only limits the complexity of the
predicate used. We handle all three with the same code to ensure their
decisions always agree with each other.
Reviewers: sdardis
Subscribers: rafael, dsanders, sdardis, llvm-commits
Differential Revision: http://reviews.llvm.org/D19016
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268900
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Zlatko Buljan [Mon, 9 May 2016 08:07:28 +0000 (08:07 +0000)]
[mips][microMIPS] Implement LWP and SWP instructions
Differential Revision: http://reviews.llvm.org/D10640
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268896
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Frederic Riss [Mon, 9 May 2016 06:01:12 +0000 (06:01 +0000)]
[dsymutil] Fix -arch option for thumb variants.
r267249 removed the dual ARM/Thumb interface from MachOObjectFile,
simplifying llvm-dsymutil's code. This unfortunately also regressed
llvm-dsymutil's ability to select thumb slices, because the simplified
code was also dealing with the discrepency between the slice arch
(eg. armv7m) and the triple arch name (eg. thumbv7m).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268894
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Craig Topper [Mon, 9 May 2016 05:34:14 +0000 (05:34 +0000)]
[X86] Strengthen some type contraints for floating point round and extend.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268892
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Craig Topper [Mon, 9 May 2016 05:34:12 +0000 (05:34 +0000)]
[AVX512] Fix up types for arguments of int_x86_avx512_mask_cvtsd2ss_round and int_x86_avx512_mask_cvtss2sd_round. Only the argument being converted should be a different type. The other 2 argument should have the same type as the result.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268891
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Mehdi Amini [Mon, 9 May 2016 05:16:30 +0000 (05:16 +0000)]
ThinLTOCodeGenerator: ignore 0 values for the cache settings.
From: Mehdi Amini <mehdi.amini@apple.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268890
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Craig Topper [Sun, 8 May 2016 23:43:17 +0000 (23:43 +0000)]
[AVX512] Add non-temporal store patterns for v16i32/v32i16/v64i8.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268889
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Junmo Park [Sun, 8 May 2016 23:22:58 +0000 (23:22 +0000)]
Minor code cleanups. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268888
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Craig Topper [Sun, 8 May 2016 23:08:45 +0000 (23:08 +0000)]
[AVX512] Add missing patterns for non-temporal stores of 128/256-bit vXi8/vXi16/vXi32 when VLX is enabled. The equivalent AVX1/2 patterns are disabled by VLX.
This caused regular stores to be emitted instead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268886
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Craig Topper [Sun, 8 May 2016 23:08:40 +0000 (23:08 +0000)]
[AVX512] Change predicates on some vXi16/vXi8 AVX store patterns so they stay enabled unless VLX and BWI instructions are supported."
Without this we could fail instruction selection if VLX was enabled, but BWI wasn't.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268885
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Craig Topper [Sun, 8 May 2016 21:33:53 +0000 (21:33 +0000)]
[AVX512] Add VLX 128/256-bit SET0 operations that encode to 128/256-bit EVEX encoded VPXORD so all 32 registers can be used.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268884
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Craig Topper [Sun, 8 May 2016 21:33:47 +0000 (21:33 +0000)]
[X86] Re-generate tests using update_llc_test_checks.py to prepare for a future commit. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268883
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Craig Topper [Sun, 8 May 2016 21:33:44 +0000 (21:33 +0000)]
Remove Windows line endings in some tests to prepare for a future commit. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268882
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Bruno Cardoso Lopes [Sun, 8 May 2016 21:27:39 +0000 (21:27 +0000)]
[Bitcode] Fix an unsigned integer overflow while parsing bitcode wrapper header
Specially crafted bitcode wrapper headers can cause unsigned interger
overflow and lead to crashes when wrapping around. Fix the offset check
and avoid such scenarios.
Writing a testcase for this would involve editing the binary to generate
values that trigger the overflow, since this would never happen while
generating the bitcode in regular compilation flows, so there's
currently no feasible way add one.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268881
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Craig Topper [Sun, 8 May 2016 20:10:20 +0000 (20:10 +0000)]
[X86] Remove extra patterns that check for BUILD_VECTOR of all 0s. These are always canonicalized to v4i32/v8i32/v16i32 except for in SSE1 only when only v4f32 is supported.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268880
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Simon Pilgrim [Sun, 8 May 2016 15:24:53 +0000 (15:24 +0000)]
[CostModel][X86] Extended comparison instruction cost model tests to include SSE2/SSE3/SSSE3/SSE41/SSE42 targets
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268877
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David Majnemer [Sun, 8 May 2016 08:15:50 +0000 (08:15 +0000)]
[X86] Promote several single precision FP libcalls on Windows
A number of libcalls don't exist in any particular lib but are, instead,
defined in math.h as inline functions (even in C mode!). Don't rely on
their existence when lowering @llvm.{cos,sin,floor,..}.f32, promote them
instead.
N.B. We had logic to handle FREM but were missing out on a number of
others. This change generalizes the FREM handling.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268875
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Craig Topper [Sun, 8 May 2016 07:10:54 +0000 (07:10 +0000)]
[X86] Lower 256-bit vector all-zero constants to v8i32 even with AVX1 only. Either way a 256-bit VXORPS will be used.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268873
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Craig Topper [Sun, 8 May 2016 07:10:50 +0000 (07:10 +0000)]
[X86] Add patterns for 256-bit non-temporal stores when only AVX1 is supported. While there, add a predicate to the SSE2 patterns to avoid an ordering dependency.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268872
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Craig Topper [Sun, 8 May 2016 07:10:47 +0000 (07:10 +0000)]
[X86] No need to avoid selecting AVX_SET0 for 256-bit integer types when only AVX1 is supported. AVX_SET0 just expands to 256-bit VXORPS which is legal in AVX1.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268871
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Weiming Zhao [Sun, 8 May 2016 05:11:54 +0000 (05:11 +0000)]
[ARM] Fix Scavenger assert due to underestimated stack size
(re-apply r268810 as it exposed an uninitialized variable in ARM MFI.
Patch 268868 should fix that.)
Summary:
Currently, when checking if a stack is "BigStack" or not, it doesn't count into spills and arguments. Therefore, LLVM won't reserve spill slot for this actually "BigStack". This may cause scavenger failure.
Reviewers: rengolin
Subscribers: vitalybuka, aemerson, rengolin, tberghammer, danalbert, srhines, llvm-commits
Differential Revision: http://reviews.llvm.org/D19896
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268869
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Weiming Zhao [Sun, 8 May 2016 05:04:47 +0000 (05:04 +0000)]
Fix use-of-uninitialized-value of ARMMachineFunctionInfo
Summary: Explicitly initialize ArgumentStackSize to prevent the msan failure.
Reviewers: rengolin
Subscribers: aemerson, rengolin, llvm-commits
Differential Revision: http://reviews.llvm.org/D20051
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268868
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Simon Pilgrim [Sat, 7 May 2016 20:19:59 +0000 (20:19 +0000)]
Fix unused variable warning.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268867
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Simon Pilgrim [Sat, 7 May 2016 20:12:36 +0000 (20:12 +0000)]
[SelectionDAG] Added bitreverse(bitreverse(v)) --> v
Added bitreverse creation testing
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268865
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Craig Topper [Sat, 7 May 2016 19:25:56 +0000 (19:25 +0000)]
[X86] Fix InstAliases to not allow FARCALL32i/FARCALL16i/FARJMP32i/FARJMP16i in 64-bit mode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268863
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Simon Pilgrim [Sat, 7 May 2016 19:04:00 +0000 (19:04 +0000)]
[X86] Added BITREVERSE constant folding and identity tests
Identity tests are currently failing - this will be fixed soon
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268862
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Simon Pilgrim [Sat, 7 May 2016 18:04:24 +0000 (18:04 +0000)]
[X86] Pulled out duplicate mask width calculation. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268861
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Simon Pilgrim [Sat, 7 May 2016 16:34:16 +0000 (16:34 +0000)]
[CostModel][X86] Split BSWAP/BITREVERSE cost tests from CTPOP/CTLZ/CTTZ 'bit count' cost tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268859
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Sanjay Patel [Sat, 7 May 2016 15:03:40 +0000 (15:03 +0000)]
[x86, BMI] add TLI hook for 'andn' and use it to simplify comparisons
For the sake of minimalism, this patch is x86 only, but I think that at least
PPC, ARM, AArch64, and Sparc probably want to do this too.
We might want to generalize the hook and pattern recognition for a target like
PPC that has a full assortment of negated logic ops (orc, nand).
Note that http://reviews.llvm.org/D18842 will cause this transform to trigger
more often.
For reference, this relates to:
https://llvm.org/bugs/show_bug.cgi?id=27105
https://llvm.org/bugs/show_bug.cgi?id=27202
https://llvm.org/bugs/show_bug.cgi?id=27203
https://llvm.org/bugs/show_bug.cgi?id=27328
Differential Revision: http://reviews.llvm.org/D19087
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268858
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NAKAMURA Takumi [Sat, 7 May 2016 08:43:11 +0000 (08:43 +0000)]
ErrorInfoBase::message(): Don't use raw_string_ostream's buffer, Msg, before closing. Use raw_string_ostream::str() to flush the buffer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268856
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Xinliang David Li [Sat, 7 May 2016 05:39:12 +0000 (05:39 +0000)]
[PM] code refactoring -- preparation for new PM porting /NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268851
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Mehdi Amini [Sat, 7 May 2016 05:07:47 +0000 (05:07 +0000)]
Fix stripDebugInfo: was modifying "DebugLoc" attached to the intrinsic after deleting it.
Fix MSAN build.
From: Mehdi Amini <mehdi.amini@apple.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268849
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NAKAMURA Takumi [Sat, 7 May 2016 04:51:51 +0000 (04:51 +0000)]
MipsELFObjectWriter.cpp: Activate debug printer just for +Asserts. [-Wunused-function]
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268848
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Mehdi Amini [Sat, 7 May 2016 04:10:52 +0000 (04:10 +0000)]
Refactor stripDebugInfo(Function) to handle intrinsic
This moves the code that handles stripping debug info intrinsic from
StripDebugInfo(Module) to StripDebugInfo(Function). The latter is
already walking every instructions so it makes sense to do it at the
same time.
This makes also stripDebugInfo(Function) as an API more useful: it
is really dropping every debug info in the Function.
Finally the existing code is trigerring an assertion when the Module
is not fully materialized.
From: Mehdi Amini <mehdi.amini@apple.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268847
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Lang Hames [Sat, 7 May 2016 03:48:56 +0000 (03:48 +0000)]
[Orc] Fix missing rename from r268845.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268846
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Lang Hames [Sat, 7 May 2016 03:36:38 +0000 (03:36 +0000)]
[Orc] Rename OrcArchitectureSupport to OrcABISupport and add Win32 ABI support.
This enables lazy JITing on Windows x86-64.
Patch by David. Thanks David!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268845
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Vitaly Buka [Sat, 7 May 2016 02:10:59 +0000 (02:10 +0000)]
Revert r268832 "Refactor stripDebugInfo(Function) to handle intrinsic"
It breaks many bots
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268837
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Sanjoy Das [Sat, 7 May 2016 02:08:24 +0000 (02:08 +0000)]
[ValueTracking] Hoist some computation out of a loop; NFC
There is no need to match the comparison instruction repeatedly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268836
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Sanjoy Das [Sat, 7 May 2016 02:08:22 +0000 (02:08 +0000)]
Clean up comment; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268835
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Sanjoy Das [Sat, 7 May 2016 02:08:15 +0000 (02:08 +0000)]
Delete trailing whitespace; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268834
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Vitaly Buka [Sat, 7 May 2016 01:54:00 +0000 (01:54 +0000)]
Revert r268810 becase it brakes msan bot.
16802==WARNING: MemorySanitizer: use-of-uninitialized-value
lib/Target/ARM/ARMFrameLowering.cpp:1632
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268833
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Mehdi Amini [Sat, 7 May 2016 01:42:36 +0000 (01:42 +0000)]
Refactor stripDebugInfo(Function) to handle intrinsic
This moves the code that handles stripping debug info intrinsic from
StripDebugInfo(Module) to StripDebugInfo(Function). The latter is
already walking every instructions so it makes sense to do it at the
same time.
This makes also stripDebugInfo(Function) as an API more useful: it
is really dropping every debug info in the Function.
Finally the existing code is trigerring an assertion when the Module
is not fully materialized.
From: Mehdi Amini <mehdi.amini@apple.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268832
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Ahmed Bougacha [Sat, 7 May 2016 01:11:17 +0000 (01:11 +0000)]
[X86] Teach X86FixupBWInsts to promote MOV8rr/MOV16rr to MOV32rr.
This re-applies r268760, reverted in r268794.
Fixes http://llvm.org/PR27670
The original imp-defs assertion was way overzealous: forward all
implicit operands, except imp-defs of the new super-reg def (r268787
for GR64, but also possible for GR16->GR32), or imp-uses of the new
super-reg use.
While there, mark the source use as Undef, and add an imp-use of the
old source reg: that should cover any case of dead super-regs.
At the stage the pass runs, flags are unlikely to matter anyway;
still, let's be as correct as possible.
Also add MIR tests for the various interesting cases.
Original commit message:
Codesize is less (16) or equal (8), and we avoid partial
dependencies.
Differential Revision: http://reviews.llvm.org/D19999
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268831
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Ahmed Bougacha [Sat, 7 May 2016 01:11:10 +0000 (01:11 +0000)]
[X86] Register and initialize the FixupBW pass.
That lets us use it in MIR tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268830
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Kostya Serebryany [Fri, 6 May 2016 23:51:28 +0000 (23:51 +0000)]
[libFuzzer] modify the docs for startup/init
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268824
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Kostya Serebryany [Fri, 6 May 2016 23:41:11 +0000 (23:41 +0000)]
[libFuzzer] tweak the documentation about rss_limit
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268822
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Kostya Serebryany [Fri, 6 May 2016 23:38:07 +0000 (23:38 +0000)]
[libFuzzer] enhance -rss_limit_mb and enable by default. Now it will print the OOM reproducer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268821
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Rong Xu [Fri, 6 May 2016 23:20:58 +0000 (23:20 +0000)]
[PGO] Use rsplit to parse value-data line in text profile file.
The value-data line is <PGOFuncName>:<Count_Value>. PGOFuncName might contain
':' for the internal linkage functions. We therefore need to use rsplit,
rather split, to extract the data from the line. This fixes the error when
merging a text profile file to an indexed profile file.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268818
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Adrian Prantl [Fri, 6 May 2016 22:53:06 +0000 (22:53 +0000)]
Implement a safer bitcode upgrade for DISubprogram.
The bitcode upgrade I added for DISubprogram in r266446 was based on the
assumption that the CU node for the subprogram was already materialized by the
time the DISubprogram is visited. This assumption may not hold true as future
versions of LLVM may decide to write out bitcode in a different order. This
patch corrects this by introducing a versioning bit next to the distinct flag to
unambiguously differentiate the new from the old record layouts.
Note for people stabilizing LLVM out-of-tree: This patch introduces a bitcode
incompatibility with llvm trunk revisions from r266446 — this commit. (But
D19987 will ensure that it degrades gracefully).
http://reviews.llvm.org/D20004
rdar://problem/
26074194
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268816
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Matthias Braun [Fri, 6 May 2016 22:43:50 +0000 (22:43 +0000)]
DetectDeadLanes: Increase precision when detecting undef inputs
In case of COPY-like instruction we may be able to deduce that a certain
input is unused, based on the used lanes of the register defined by the
instruction.
This even works accross otherwise incompatible copies (no need to have
compatible lanemasks, completely unused operands are still completely
unused). It even makes sense to redo the analysis in this case since we
gained information for a case we previously stopped at because of the
incompatible masks.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268815
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Matthias Braun [Fri, 6 May 2016 22:43:46 +0000 (22:43 +0000)]
DetectDeadLanes: Cleanup, assert on some impossible cases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268814
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Zachary Turner [Fri, 6 May 2016 22:29:34 +0000 (22:29 +0000)]
Drop error when trying to fallback from PDB to DWARF.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268813
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Justin Bogner [Fri, 6 May 2016 22:22:25 +0000 (22:22 +0000)]
cmake: Avoid continue, apparently that's new
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268812
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Simon Pilgrim [Fri, 6 May 2016 22:22:18 +0000 (22:22 +0000)]
[SLPVectorizer][X86] Regenerated SEXT/ZEXT cast vectorization tests
Added 256-bit vector test as well
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268811
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Weiming Zhao [Fri, 6 May 2016 22:20:13 +0000 (22:20 +0000)]
[ARM] Fix Scavenger assert due to underestimated stack size
(this is resubmit of r268529 with minor refactoring. r268529 was reverted
at r268536 due a memory sanitizer failure. I have not been able to
reproduce that failure and I checked all the variable used in my change
but I could not spot an issue. I did some refactoring and see if it will
give a clearer hint)
Summary:
Currently, when checking if a stack is "BigStack" or not, it doesn't count into spills and arguments. Therefore, LLVM won't reserve spill slot for this actually "BigStack". This may cause scavenger failure.
Reviewers: rengolin
Subscribers: vitalybuka, aemerson, rengolin, tberghammer, danalbert, srhines, llvm-commits
Differential Revision: http://reviews.llvm.org/D19896
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268810
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Philip Reames [Fri, 6 May 2016 22:17:01 +0000 (22:17 +0000)]
Reapply 267210 with fix for PR27490
Original Commit Message
Extend load/store type canonicalization to handle unordered operations
Extend the type canonicalization logic to work for unordered atomic loads and stores. Note that while this change itself is fairly simple and low risk, there's a reasonable chance this will expose problems in the backends by suddenly generating IR they wouldn't have seen before. Anything of this nature will be an existing bug in the backend (you could write an atomic float load), but this will definitely change the frequency with which such cases are encountered. If you see problems, feel free to revert this change, but please make sure you collect a test case.
Note that the concern about lowering is now much less likely. PR27490 proved that we already *were* mucking with the types of ordered atomics and volatiles. As a result, this change doesn't introduce as much new behavior as originally thought.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268809
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Zachary Turner [Fri, 6 May 2016 22:15:42 +0000 (22:15 +0000)]
Make llvm-pdbdump print CV type records
This reuses the CVTypeDumper from libcodeview to dump full
information about type records within a PDB file.
Differential Revision: http://reviews.llvm.org/D20022
Reviewed By: rnk
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268808
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Kostya Serebryany [Fri, 6 May 2016 21:58:35 +0000 (21:58 +0000)]
[libFuzzer] add exeprimental -rss_limit_mb flag to fight against OOMs
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268807
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Justin Bogner [Fri, 6 May 2016 21:57:30 +0000 (21:57 +0000)]
CMake: generate check targets for lit suites without their own lit.cfgs
Currently our cmake generates targets like check-llvm-unit and
check-llvm-transforms-loopunroll-x86, but not check-llvm-transforms or
check-llvm-transforms-adce. This is because the search for test suites
only lists the ones with a custom lit.cfg or lit.local.cfg.
Instead, we can do something a little smarter - any directory under
test that isn't called Inputs or inside a directory called Inputs is a
test suite.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268806
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Matthias Braun [Fri, 6 May 2016 21:47:41 +0000 (21:47 +0000)]
LiveIntervalAnalysis: Fix handleMove() extending liverange for undef inputs
Fix handleMove() incorrectly extending liveranges when an undef input of
a vreg was moved past the (current) end of the liverange.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268805
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Philip Reames [Fri, 6 May 2016 21:43:51 +0000 (21:43 +0000)]
[GVN] PRE of unordered loads
Again, fairly simple. Only change is ensuring that we actually copy the property of the load correctly. The aliasing legality constraints were already handled by the FRE patches. There's nothing special about unorder atomics from the perspective of the PRE algorithm itself.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268804
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Simon Pilgrim [Fri, 6 May 2016 21:41:55 +0000 (21:41 +0000)]
[SLPVectorizer][X86] Added BSWAP/BITREVERSE vectorization tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268803
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Simon Pilgrim [Fri, 6 May 2016 21:33:01 +0000 (21:33 +0000)]
[SLPVectorizer][X86] Added CTPOP/CTLZ/CTTZ vectorization tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268800
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Quentin Colombet [Fri, 6 May 2016 21:21:50 +0000 (21:21 +0000)]
Revert "[X86] Add a new LOW32_ADDR_ACCESS_RBP register class."
This reverts commit r268796.
I believe it breaks test/CodeGen/X86/asm-mismatched-types.ll with:
Cannot emit physreg copy instruction
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268799
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Zachary Turner [Fri, 6 May 2016 21:19:29 +0000 (21:19 +0000)]
Fix failing test due to merge conflict.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268798
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Quentin Colombet [Fri, 6 May 2016 21:10:53 +0000 (21:10 +0000)]
[X86] Add a new LOW32_ADDR_ACCESS_RBP register class.
ABIs like NaCl uses 32-bit addresses but have 64-bit frame.
The new register class reflects those constraints when choosing a
register class for a address access.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268796
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Quentin Colombet [Fri, 6 May 2016 21:10:43 +0000 (21:10 +0000)]
[X86] Rename the X32_ADDR_ACCESS register class into LOW32_ADDR_ACCESS.
This register class may be used by any ABIs that uses x86_64 ISA while
using 32-bit addresses, not just in X32 cases. Make sure the name
reflects that.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268795
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Nico Weber [Fri, 6 May 2016 21:07:02 +0000 (21:07 +0000)]
Revert r268760, it caused PR27670.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268794
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Zachary Turner [Fri, 6 May 2016 20:59:35 +0000 (20:59 +0000)]
Add missing include.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268792
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Zachary Turner [Fri, 6 May 2016 20:51:57 +0000 (20:51 +0000)]
Port DebugInfoPDB over to using llvm::Error.
Differential Revision: http://reviews.llvm.org/D19940
Reviewed By: rnk
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268791
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Sanjoy Das [Fri, 6 May 2016 20:39:33 +0000 (20:39 +0000)]
[RS4GC] Fix typo in comment
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268790
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Kevin Enderby [Fri, 6 May 2016 20:16:28 +0000 (20:16 +0000)]
Change GenericBinaryError to no longer include a FileName, which is then not
part of the error message.
As the caller is the one that needs to add the name of where the "object file"
comes from to the error message as the object file could be in an archive, or
coming from a slice of a Mach-O universal file or a buffer created by a JIT.
In the cases of a Mach-O universal file the architecture name may or may not
also need to be printed which is up to the tool code. For example if the tool
code is only selecting the host architecture slice then that architecture name
is never printed.
This patch is the change to the libObject code and there will be follow on
commits for changes to the code for each tool.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268789
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Kostya Serebryany [Fri, 6 May 2016 20:14:48 +0000 (20:14 +0000)]
[libFuzzer] more trophies
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268788
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Ahmed Bougacha [Fri, 6 May 2016 20:03:03 +0000 (20:03 +0000)]
[X86] Accept imp-defs of GR64 super-registers in FixupBW MOVrr.
Testcase will follow shortly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268787
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Marcin Koscielnicki [Fri, 6 May 2016 19:36:56 +0000 (19:36 +0000)]
[MSan] [X86] Fix vararg helper for fixed arguments in overflow area.
This fixes http://llvm.org/PR27646 on x86_64.
Differential Revision: http://reviews.llvm.org/D19997
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268783
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Artem Tamazov [Fri, 6 May 2016 19:32:38 +0000 (19:32 +0000)]
[AMDGPU][llvm-mc] Some refactoring of .td files
Some custom Operands and AsmOperandClasses moved to proper place.
No functional changes.
Differential Revision: http://reviews.llvm.org/D20012
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268780
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Adrian Prantl [Fri, 6 May 2016 19:26:47 +0000 (19:26 +0000)]
Refactor the Verifier so it can diagnose IR validation errors and debug
info metadata errors separately. (NFC)
This patch refactors the Verifier so it can diagnose IR validation errors
and debug info metadata errors separately.
The motivation behind this change is that broken (or outdated) debug info
can be "recovered" from by stripping the debug info.
The problem I'm trying to solve with this sequence of patches is that
historically we've done a really bad job at verifying debug info.
We want to be able to make the verifier stricter without having to worry
about breaking bitcode compatibility with existing producers. For example,
we don't necessarily want IR produced by an older version of clang to be
rejected by an LTO link just because of malformed debug info, and rather
provide an option to strip it. Note that merely outdated (but well-formed)
debug info would continue to be auto-upgraded in this scenario.
http://reviews.llvm.org/D19986
rdar://problem/
25818489
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268778
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Krzysztof Parzyszek [Fri, 6 May 2016 19:13:38 +0000 (19:13 +0000)]
[Hexagon] Be careful about anti-dependencies with a call in packetizer
In a case like
J2_callr <ga:@foo>, %R0<imp-use>, ...
R0<def> = ...
the anti-dependency on R0 cannot be ignored and the two instructions
cannot be packetized together, since if they were, the assignment to
R0 would take place before the call.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268776
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Philip Reames [Fri, 6 May 2016 18:46:45 +0000 (18:46 +0000)]
[GVN] Handle unordered atomics in cross block FRE
You'll note there are essentially no code changes here. Cross block FRE heavily reuses code from the block local FRE. All of the tricky parts were done as part of the previous patch and the refactoring that removed the original code duplication.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268775
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Justin Bogner [Fri, 6 May 2016 18:42:16 +0000 (18:42 +0000)]
SDAG: Don't leave dangling dead nodes after SelectCodeCommon
Relying on the caller to clean up after we've replaced all uses of a
node won't work when we've migrated to the `void Select(...)` API.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268774
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Eric Christopher [Fri, 6 May 2016 18:23:14 +0000 (18:23 +0000)]
The associated PR for this test was PR27135 not PR27132.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268772
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