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Kenneth Graunke [Tue, 27 Nov 2012 05:11:14 +0000 (21:11 -0800)]
meta: Don't try to glOrtho when the draw buffer isn't initialized.
I ran across this while running a glGenerateMipmap() test.
_meta_GenerateMipmap sets MESA_META_TRANSFORM, which causes
_mesa_meta_begin to try and set a default orthographic projection.
Unfortunately, if the drawbuffer isn't set up, ctx->DrawBuffer->Width
and Height are 0, which just causes an GL_INVALID_VALUE error.
Fixes oglconform's fbo/mipmap.automatic, mipmap.manual, and
mipmap.manualIterateTexTargets.
Reviewed-by: Brian Paul <brianp@vmware.com>
Jason Wood [Thu, 29 Nov 2012 00:05:12 +0000 (01:05 +0100)]
docs: Mark some features in GL3.txt as done for r600
Signed-off-by: Marek Olšák <maraeo@gmail.com>
Marek Olšák [Wed, 28 Nov 2012 19:38:22 +0000 (20:38 +0100)]
st/mesa: allow forward-compatible contexts and set Const.ContextFlags
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Marek Olšák [Fri, 23 Nov 2012 19:20:03 +0000 (20:20 +0100)]
st/mesa: add support for GL core profiles
The rest of the plumbing was in place already.
I have tested this by turning on all GL 3.1 features.
The drivers not supporting GL 3.1 will fail to create a core profile
as they should.
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Marek Olšák [Tue, 27 Nov 2012 23:28:18 +0000 (00:28 +0100)]
configure.ac: remove -fomit-frame-pointer from LLVM flags
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
Marek Olšák [Tue, 27 Nov 2012 22:56:04 +0000 (23:56 +0100)]
configure.ac: look for whole words in LLVM flags, not prefixes
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
Marek Olšák [Tue, 27 Nov 2012 22:38:01 +0000 (23:38 +0100)]
configure.ac: consolidate stripping unwanted LLVM flags
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
Marek Olšák [Tue, 27 Nov 2012 21:32:50 +0000 (22:32 +0100)]
configure.ac: print LLVM flags
to see what we're mixing with ours
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
Brian Paul [Wed, 28 Nov 2012 20:35:01 +0000 (13:35 -0700)]
util: add more memory debugging features
Add a DEBUG_FREED_MEMORY option to help catch use-after-free errors.
Add debug_memory_check() function which can be periodically called to
check that all known blocks are good.
Reviewed-by: José Fonseca <jfonseca@vmware.com>
José Fonseca [Wed, 28 Nov 2012 20:45:03 +0000 (20:45 +0000)]
llvmpipe: Implement logic ops for the AoS path.
It was forgotten in the previous patch series, but it is trivial to
implement, based on the SoA path.
This fixes glean logicOp failures.
José Fonseca [Wed, 28 Nov 2012 19:57:26 +0000 (19:57 +0000)]
llvmpipe: Don't use dynamically sized arrays.
Unfortunately for MSVC arrays with a constant variable size are still
considered dynamically sized.
Eric Anholt [Mon, 26 Nov 2012 22:46:11 +0000 (14:46 -0800)]
i965/gen4-5: Fix segfaults with stencil-only depth/stencil setups.
Fixes a ton of piglit regressions since the depthstencil fixes for gen6+.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=57309
Reviewed-by: Chad Versace <chad.versace@linux.intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Eric Anholt [Mon, 26 Nov 2012 22:22:12 +0000 (14:22 -0800)]
i965/fs: Don't generate saturates over existing variable values.
Fixes a crash in http://workshop.chromeexperiments.com/stars/ on i965,
and the new piglit test glsl-fs-clamp-5.
We were trying to emit a saturating move into a uniform, which the code
generator appropriately choked on. This was broken in the change in
32ae8d3b321185a85b73ff703d8fc26bd5f48fa7.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=57166
NOTE: This is a candidate for the 9.0 branch.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Eric Anholt [Tue, 30 Oct 2012 22:35:44 +0000 (15:35 -0700)]
i965/fs: Add some minimal backend-IR dumping.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
James Benton [Fri, 14 Sep 2012 12:29:58 +0000 (13:29 +0100)]
llvmpipe: Update llvmpipe_is_format_unswizzled to reflect latest changes.
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
James Benton [Thu, 13 Sep 2012 15:05:08 +0000 (16:05 +0100)]
llvmpipe: Enable vertex color clamping.
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
James Benton [Thu, 13 Sep 2012 15:04:42 +0000 (16:04 +0100)]
llvmpipe: Unswizzled rendering.
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
James Benton [Wed, 11 Jul 2012 14:39:53 +0000 (15:39 +0100)]
gallivm: Updated lp_build_const_mask_aos to input number of channels.
Also updated lp_build_const_mask_aos_swizzled to reflect this.
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
James Benton [Wed, 11 Jul 2012 14:32:47 +0000 (15:32 +0100)]
util: Updated util_format_is_array to be more accurate.
Will allow formats with padding, e.g. RGBX.
Will now allow swizzled formats as long as the alpha is channel 3.
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
James Benton [Fri, 8 Jun 2012 17:49:53 +0000 (18:49 +0100)]
gallivm: Added support for float to half-float conversion in lp_build_conv.
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
James Benton [Wed, 30 May 2012 13:40:33 +0000 (14:40 +0100)]
gallivm: Changed lp_build_pad_vector to correctly handle scalar argument.
Removed the lp_type argument as it was unnecessary.
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
James Benton [Wed, 30 May 2012 13:38:52 +0000 (14:38 +0100)]
gallivm: Add a function to generate lp_type for a format.
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
James Benton [Wed, 30 May 2012 13:36:22 +0000 (14:36 +0100)]
gallivm: Add support for unorm16 in lp_build_mul.
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Matt Turner [Mon, 26 Nov 2012 19:53:45 +0000 (11:53 -0800)]
glcpp: Support #elif(expression) with no intervening space.
And add test cases to ensure that this works
- 110 verifies that glcpp rejects #elif<digits> which glcpp
previously accepted.
- 111 verifies that glcpp accepts #if followed immediately by
(, +, -, !, or ~.
- 112 does the same as 111 but for #elif.
See
17f9beb6 for #if change.
Reviewed-by: Carl Worth <cworth@cworth.org>
Matt Turner [Wed, 21 Nov 2012 01:23:42 +0000 (17:23 -0800)]
glcpp: Reject #version and #line not followed by whitespace
Fixes part of es3conform's preprocess16_frag test.
Reviewed-by: Carl Worth <cworth@cworth.org>
Marek Olšák [Fri, 23 Nov 2012 02:02:44 +0000 (03:02 +0100)]
mesa: fix BlitFramebuffer between linear and sRGB formats
NOTE: This is a candidate for the stable branches.
Reviewed-by: Brian Paul <brianp@vmware.com>
Roland Scheidegger [Wed, 28 Nov 2012 17:07:27 +0000 (18:07 +0100)]
gallivm: fix multiple lods with different min/mag filter and wide vectors
broken since
529fe420ba6836479619ba42e53665724755fc1c,
I forgot some code, only added the comment...
Fixes bug 57644.
Michel Dänzer [Fri, 23 Nov 2012 15:05:41 +0000 (16:05 +0100)]
radeonsi: Reinstate assertions against invalid colour/depth formats.
radeonsi now supports Z16 and doesn't fail these assertions anymore.
This partially reverts commit
7bba4879bb79719e22a18b52759b1d1d839c783c, but
leaves the error messages in place to allow diagnosing such problems even with
non-debugging builds.
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Michel Dänzer [Fri, 16 Nov 2012 16:18:05 +0000 (17:18 +0100)]
radeonsi: Re-enable Z16 depth buffers.
8 more piglits.
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Marek Olšák [Thu, 22 Nov 2012 18:22:46 +0000 (19:22 +0100)]
radeonsi: remove redundant parameter in r600_init_surface
[ Cherry-picked from r600g commit
f5ac60152b10b04d38e77db6b904dd50d1a54d6c ]
Michel Dänzer [Tue, 20 Nov 2012 11:48:30 +0000 (12:48 +0100)]
radeonsi: Use explicit stencil mipmap level offsets.
Extracted from r600g commit
428e37c2da420f7dc14a2ea265f2387270f9bee1.
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Marek Olšák [Tue, 13 Nov 2012 17:01:53 +0000 (18:01 +0100)]
radeonsi: correct texture memory size for Z32F_S8X24
[ Cherry-picked from r600g commit
ea72351a919c594e7f40e901dca42aebb866f8a6 ]
Michel Dänzer [Tue, 13 Nov 2012 16:57:07 +0000 (17:57 +0100)]
radeonsi: Depth/stencil fixes.
Adapted from r600g commit
018e3f75d69490598d61059ece56d379867f3995.
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Michel Dänzer [Tue, 13 Nov 2012 16:35:09 +0000 (17:35 +0100)]
radeonsi: Flesh out support for depth/stencil exports from the pixel shader.
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Michel Dänzer [Tue, 20 Nov 2012 16:33:19 +0000 (17:33 +0100)]
radeonsi: Fix sampler views for depth textures.
Consistently reference the flushed depth texture in the sampler view, not the
original one.
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Jerome Glisse [Tue, 13 Nov 2012 16:41:59 +0000 (17:41 +0100)]
radeonsi: Fix z/stencil texture creation.
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
[ Cherry-picked from r600g commit
b4f0ab0b22625ac1bb3cf16342039557c086ebae ]
Vinson Lee [Tue, 27 Nov 2012 08:05:08 +0000 (00:05 -0800)]
scons: Build ws_xlib on Mac OS X.
Fixes this SCons build error on Mac OS X if X11 is found.
NameError: name 'ws_xlib' is not defined:
File "SConstruct", line 144:
duplicate = 0 # http://www.scons.org/doc/0.97/HTML/scons-user/x2261.html
File "scons-2.2.0/SCons/Script/SConscript.py", line 614:
return method(*args, **kw)
File "scons-2.2.0/SCons/Script/SConscript.py", line 551:
return _SConscript(self.fs, *files, **subst_kw)
File "scons-2.2.0/SCons/Script/SConscript.py", line 260:
exec _file_ in call_stack[-1].globals
File "src/SConscript", line 34:
SConscript('gallium/SConscript')
File "scons-2.2.0/SCons/Script/SConscript.py", line 614:
return method(*args, **kw)
File "scons-2.2.0/SCons/Script/SConscript.py", line 551:
return _SConscript(self.fs, *files, **subst_kw)
File "scons-2.2.0/SCons/Script/SConscript.py", line 260:
exec _file_ in call_stack[-1].globals
File "src/gallium/SConscript", line 135:
'targets/libgl-xlib/SConscript',
File "scons-2.2.0/SCons/Script/SConscript.py", line 614:
return method(*args, **kw)
File "scons-2.2.0/SCons/Script/SConscript.py", line 551:
return _SConscript(self.fs, *files, **subst_kw)
File "scons-2.2.0/SCons/Script/SConscript.py", line 260:
exec _file_ in call_stack[-1].globals
File "src/gallium/targets/graw-xlib/SConscript", line 9:
ws_xlib,
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Brian Paul <brianp@vmware.com>
Johannes Obermayr [Mon, 26 Nov 2012 23:48:40 +0000 (00:48 +0100)]
configure.ac: Remove -O., -g and -Wall from LLVM_C{PP,XX}FLAGS.
Signed-off-by: Marek Olšák <maraeo@gmail.com>
Brian Paul [Tue, 27 Nov 2012 22:34:13 +0000 (15:34 -0700)]
vbo: move another line of code after declarations
Signed-off-by: Brian Paul <brianp@vmware.com>
Brian Paul [Tue, 27 Nov 2012 20:58:33 +0000 (13:58 -0700)]
vbo: move code after declarations to fix MSVC errors
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Brian Paul [Tue, 27 Nov 2012 20:53:38 +0000 (13:53 -0700)]
vbo: minor whitespace fix
Brian Paul [Tue, 13 Nov 2012 16:51:58 +0000 (09:51 -0700)]
mesa: remove '(void) k' lines
Serves no purpose as the k parameter is used later in the code.
Kenneth Graunke [Tue, 27 Nov 2012 20:06:13 +0000 (12:06 -0800)]
mesa/vbo: Check for invalid types in various packed vertex functions.
According to the ARB_vertex_type_2_10_10_10_rev specification:
"The error INVALID_ENUM is generated by VertexP*, NormalP*,
TexCoordP*, MultiTexCoordP*, ColorP*, or SecondaryColorP if <type>
is not UNSIGNED_INT_2_10_10_10_REV or INT_2_10_10_10_REV."
Fixes 7 subcases of oglconform's packed-vertex test.
v2: Add "gl" prefix to error messages (pointed out by Brian).
Also rebase atop the ctx plumbing.
Reviewed-by: Brian Paul <brianp@vmware.com>
Kenneth Graunke [Thu, 22 Nov 2012 04:17:15 +0000 (20:17 -0800)]
mesa/vbo: Support the ES 3.0 signed normalized scaling rules.
Traditionally, OpenGL has had two separate equations for converting from
signed normalized fixed-point data to floating point data. One was used
primarily for vertex data, while the other was primarily for texturing
and framebuffer data.
However, ES 3.0 and GL 4.2 change this, declaring there's only one
equation to be used in all cases. Unfortunately, it's the other one.
v2: Correctly convert 0b10 to -1.0, as pointed out by Chris Forbes.
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
Kenneth Graunke [Thu, 22 Nov 2012 04:15:22 +0000 (20:15 -0800)]
mesa/vbo: Plumb ctx through to the conv_i(10|2)_to_norm_float functions.
The rules for converting these values actually depend on the current
context API and version. The next patch will implement those changes.
v2: Mark ctx as const, as suggested by Brian.
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
Matt Turner [Mon, 26 Nov 2012 23:13:25 +0000 (15:13 -0800)]
mesa: Set transform feedback's default buffer mode to INTERLEAVED_ATTRIBS
Fixes part of es3conform's transform_feedback_init_defaults test.
NOTE: This is a candidate for the stable branch.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Brian Paul <brianp@vmware.com>
Matt Turner [Fri, 23 Nov 2012 08:03:59 +0000 (00:03 -0800)]
mesa: Return 0 for XFB_VARYING_MAX_LENGTH if no varyings
v2: Perform this count the same way as elsewhere in this file, per
Brian Paul's review.
Fixes part of es3conform's transform_feedback_init_defaults test.
NOTE: This is a candidate for the stable branches.
Reviewed-by: Brian Paul <brianp@vmware.com>
Andreas Boll [Wed, 21 Nov 2012 16:52:07 +0000 (17:52 +0100)]
gallium/tests/trivial: updates for transfer functions changes
Fixes build error with configure option --enable-gallium-tests
introduced in
369e46888904c6d379b8b477d9242cff1608e30e
Compile tested only.
Reviewed-by: Marek Olšák <maraeo@gmail.com>
Andreas Boll [Wed, 21 Nov 2012 14:37:58 +0000 (15:37 +0100)]
gallium/tests/trivial: updates for CSO interface changes
Fixes build error with configure option --enable-gallium-tests
introduced in
ea6f035ae90895bd4ee3247408eb179dfdf96d22
Cc: Brian Paul <brianp@vmware.com>
Reviewed-by: Marek Olšák <maraeo@gmail.com>
Andreas Boll [Tue, 20 Nov 2012 20:04:25 +0000 (21:04 +0100)]
gallium/tests/trivial: updates for util_draw_vertex_buffer changes
Fixes build error with configure option --enable-gallium-tests
introduced in
e73bf3b805de78299f1a652668ba4e6eab9bac94
Reviewed-by: Marek Olšák <maraeo@gmail.com>
James Benton [Wed, 11 Jul 2012 14:31:21 +0000 (15:31 +0100)]
util: Modified u_rect to default to memcpy.
Previously this function would assert if the format didn't fit an expected 4 channel format size.
Now will work with any format type with any amount of channels.
Signed-off-by: José Fonseca <jfonseca@vmware.com>
James Benton [Thu, 13 Sep 2012 15:05:37 +0000 (16:05 +0100)]
util/format: Fix bug in float to non-float conversion in u_format_pack.py.
Signed-off-by: José Fonseca <jfonseca@vmware.com>
James Benton [Wed, 30 May 2012 13:36:44 +0000 (14:36 +0100)]
gallivm: Fix bug in lp_build_one which would incorrectly return a vector for length 1.
Signed-off-by: José Fonseca <jfonseca@vmware.com>
Kenneth Graunke [Tue, 20 Nov 2012 06:36:28 +0000 (22:36 -0800)]
glsl: Support unsigned integer constants in layout qualifiers.
Fixes es3conform's explicit_attrib_location_integer_constants.
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-and-tested-by: Matt Turner <mattst88@gmail.com>
Kenneth Graunke [Wed, 21 Nov 2012 03:26:52 +0000 (19:26 -0800)]
i965/fs: Move struct brw_compile (p) entirely inside fs_generator.
The brw_compile structure contains the brw_instruction store and the
brw_eu_emit.c state tracking fields. These are only useful for the
final assembly generation pass; the earlier compilation stages doesn't
need them.
This also means that the code generator for future hardware won't have
access to the brw_compile structure, which is extremely desirable
because it prevents accidental generation of Gen4-7 code.
v2: rzalloc p, as suggested by Eric.
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Paul Berry <stereotype441@gmail.com>
Kenneth Graunke [Fri, 9 Nov 2012 09:05:47 +0000 (01:05 -0800)]
i965/fs: Split final assembly code generation out of fs_visitor.
Compiling shaders requires several main steps:
1. Generating FS IR from either GLSL IR or Mesa IR
2. Optimizing the IR
3. Register allocation
4. Generating assembly code
This patch splits out step 4 into a separate class named "fs_generator."
There are several reasons for doing so:
1. Future hardware has a different instruction encoding. Splitting
this out will allow us to replace fs_generator (which relies
heavily on the brw_eu_emit.c code and struct brw_instruction) with
a new code generator that writes the new format.
2. It reduces the size of the fs_visitor monolith. (Arguably, a lot
more should be split out, but that's left for "future work.")
3. Separate namespaces allow us to make helper functions for
generating instructions in both classes: ADD() can exist in
fs_visitor and create IR, while ADD() in fs_generator() can
create brw_instructions. (Patches for this upcoming.)
Furthermore, this patch changes the order of operations slightly.
Rather than doing steps 1-4 for SIMD8, then 1-4 for SIMD16, we now:
- Do steps 1-3 for SIMD8, then repeat 1-3 for SIMD16
- Generate final assembly code for both modes together
This is because the frontend work can be done independently, but final
assembly generation needs to pack both into a single program store to
feed the GPU.
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Paul Berry <stereotype441@gmail.com>
Kenneth Graunke [Wed, 21 Nov 2012 01:02:23 +0000 (17:02 -0800)]
i965/fs: Abort on unsupported opcodes rather than failing.
Final code generation should never fail. This is a bug, and there
should be no user-triggerable cases where this could occur.
Also, we're not going to have a fail() method in a moment.
v2: Just abort() rather than assert, to cover the NDEBUG case
(suggested by Eric).
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Paul Berry <stereotype441@gmail.com>
Kenneth Graunke [Wed, 21 Nov 2012 01:30:46 +0000 (17:30 -0800)]
i965: Make it possible to create a cfg_t without a backend_visitor.
All we really need is a memory context and the instruction list; passing
a backend_visitor is just convenient at times.
This will be necessary two patches from now.
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Paul Berry <stereotype441@gmail.com>
Kenneth Graunke [Wed, 21 Nov 2012 00:21:27 +0000 (16:21 -0800)]
i965/fs: Move uses of brw_compile from do_wm_prog to brw_wm_fs_emit.
The brw_compile structure is closely tied to the Gen4-7 hardware
encoding. However, do_wm_prog is very generic: it just calls out to
get a compiled program and then uploads it.
This isn't ultimately where we want it, but it's a step in the right
direction: it's now closer to the code generator.
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Paul Berry <stereotype441@gmail.com>
Kenneth Graunke [Tue, 20 Nov 2012 22:46:56 +0000 (14:46 -0800)]
i965/fs: Pass the brw_context pointer into fs_visitor explicitly.
We used to steal it out of the brw_compile struct...but fs_visitor
isn't going to have one of those in the future.
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Paul Berry <stereotype441@gmail.com>
Kenneth Graunke [Tue, 20 Nov 2012 22:41:21 +0000 (14:41 -0800)]
i965/fs: Move brw_wm_compile::fp to fs_visitor.
Also change it from a brw_fragment_program to a gl_fragment_program,
since that seems to be what everything wants anyway.
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Paul Berry <stereotype441@gmail.com>
Kenneth Graunke [Tue, 20 Nov 2012 22:26:49 +0000 (14:26 -0800)]
i965/fs: Remove struct brw_shader * parameter to fs_visitor constructor.
We can easily recover it from prog, and this makes it clear that we
aren't passing additional information in.
v2: Use an if-statement rather than the ?: operator (suggested by Eric).
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Paul Berry <stereotype441@gmail.com>
Kenneth Graunke [Tue, 20 Nov 2012 21:50:52 +0000 (13:50 -0800)]
i965/fs: Move brw_wm_compile::dispatch_width into fs_visitor.
Also, rather than having brw_wm_fs_emit poke at it directly, make it a
parameter to the fs_visitor constructor.
All other changes generated by search and replace (with occasional
whitespace fixup).
v2: Make dispatch_width const (as suggested by Paul); fix doxygen
mistake (pointed out by Eric); update for rebase.
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Paul Berry <stereotype441@gmail.com>
Kenneth Graunke [Mon, 19 Nov 2012 22:59:14 +0000 (14:59 -0800)]
i965/fs: Move brw_wm_lookup_iz() to fs_visitor::setup_payload_gen4().
This necessitates compiling brw_wm_iz.c as C++.
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Paul Berry <stereotype441@gmail.com>
Kenneth Graunke [Wed, 14 Nov 2012 03:36:18 +0000 (19:36 -0800)]
i965/fs: Move brw_wm_payload_setup() to fs_visitor::setup_payload_gen6()
Now that we only have the one backend, there's no real point in keeping
this separate. Moving it should allow some future simplifications.
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Paul Berry <stereotype441@gmail.com>
Kenneth Graunke [Tue, 20 Nov 2012 20:21:40 +0000 (12:21 -0800)]
i965/fs: Remove brw_wm_compile::computes_depth field.
Everybody determines this by checking if fp's OutputsWritten field
contains the FRAG_RESULT_DEPTH bit. Rather than having payload setup
check this and set the computes_depth flag, we can just do the check in
the only place that actually used it: emit_fb_writes().
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Paul Berry <stereotype441@gmail.com>
Roland Scheidegger [Tue, 27 Nov 2012 02:30:55 +0000 (03:30 +0100)]
gallivm: use the new mip per quad handling in texture fetch path
No longer have to split fetching into quads dynamically if mip levels
are not the same for all quads (aos sampling still always splits due
to performance reasons).
Instead handle multiple mip levels further down, minification etc. takes
this into account.
Reviewed-by: José Fonseca <jfonseca@vmware.com>
Roland Scheidegger [Tue, 27 Nov 2012 02:26:49 +0000 (03:26 +0100)]
gallivm,llvmpipe: handle TXF (texelFetch) instruction, including offsets
This also adds some code to handle per-quad lods for more than 4-wide fetches,
because otherwise I'd have to integrate the texelFetch function into
the splitting stuff... (but it is not used yet outside texelFetch).
passes piglit fs-texelFetch-2D, fails fs-texelFetchOffset-2D due to I believe
a test error (results are undefined for out-of-bounds fetches, we return
whatever is at offset 0, whereas the test expects [0,0,0,1]).
Texel offsets are only handled by texelFetch for now, though the interface
can handle it for everything.
Reviewed-by: José Fonseca <jfonseca@vmware.com>
Chris Forbes [Thu, 22 Nov 2012 03:23:25 +0000 (16:23 +1300)]
i965: Enable ARB_vertex_type_2_10_10_10_rev on Gen4+.
v2 (Kayden): Move the enable into an existing intel->gen >= 4 block
(as suggested by Ian).
Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Chris Forbes [Thu, 22 Nov 2012 03:23:24 +0000 (16:23 +1300)]
i965: emit w/a for packed attribute formats in VS
Implements BGRA swizzle, sign recovery, and normalization
as required by ARB_vertex_type_10_10_10_2_rev.
V2: Ported to the new VS backend, since that's all that's left;
fixed normalization.
V3: Moved fixups out of the GLSL-only path, so it works for FF/VP too.
V4 (Kayden): Rework ES3 normalization, don't heap allocate registers;
tidy comments.
Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Chris Forbes [Thu, 22 Nov 2012 03:23:22 +0000 (16:23 +1300)]
i965: set attribute w/a bits for packed formats
Flag the need for various workarounds to be applied by
the vertex shader.
Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Chris Forbes [Thu, 22 Nov 2012 03:23:21 +0000 (16:23 +1300)]
i965: Generalize GL_FIXED VS w/a support
Next few patches build on this to add other workarounds
for packed formats.
V2: rename BRW_ATTRIB_WA_COMPONENTS to BRW_ATTRIB_WA_COMPONENT_MASK;
V3 (Kayden): remove separate bit for ES3 signed normalization
Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Chris Forbes [Thu, 22 Nov 2012 03:23:20 +0000 (16:23 +1300)]
i965: support 2_10_10_10 formats in get_surface_type.
Always use R10G10B10A2_UINT; Most of the other formats we'd like
don't actually work on the hardware. Will emit w/a for scaling,
sign recovery and BGRA swizzle in the VS.
Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Chris Forbes [Thu, 22 Nov 2012 03:23:19 +0000 (16:23 +1300)]
i965: implement get_size for 2_10_10_10 formats
Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Chris Forbes [Thu, 22 Nov 2012 03:23:23 +0000 (16:23 +1300)]
i965/vs: add support for emitting SHL, SHR, ASR
Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Matt Turner [Thu, 22 Nov 2012 08:06:03 +0000 (00:06 -0800)]
mesa: Use correct glGetTransformFeedbackVarying name in error msg
Reviewed-by: Brian Paul <brianp@vmware.com>
Andreas Boll [Fri, 16 Nov 2012 09:46:06 +0000 (10:46 +0100)]
build: use git ls-files for adding all Makefile.in into the release tarball
Until we have proper 'make dist' this is an improvement of the current
situation, because each time some old Makefiles got converted to automake
we had to update the tarballs target.
NOTE: This is a candidate for the 9.0 branch.
Cc: Eric Anholt <eric@anholt.net>
Acked-by: Matt Turner <mattst88@gmail.com>
Eric Anholt [Wed, 14 Nov 2012 19:44:57 +0000 (11:44 -0800)]
i965: Fix hangs with FP KIL instructions pre-gen6.
We can't support IF statements in 16-wide on these. To get back to 16-wide
for these shaders, we need to support predicate on discard instructions in the
backend IR, which is something we've sort of got on the list to do anyway.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=55828
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Eric Anholt [Fri, 16 Nov 2012 17:56:03 +0000 (09:56 -0800)]
i965/gen4: Fix memory leak each time compile_gs_prog() is called.
Commit
774fb90db3e83d5e7326b7a72e05ce805c306b24 introduced a ralloc context to
each user of struct brw_compile, but for this one a NULL context was used,
causing the later ralloc_free(mem_ctx) to not do anything.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=55175
NOTE: This is a candidate for the stable branches.
Eric Anholt [Tue, 13 Nov 2012 23:54:41 +0000 (15:54 -0800)]
i965/gen4: Fix LOD bias texturing since my fixed reg classes change.
We have a special case where non-shadow comparison with LOD requires using a
SIMD16 vec4 in an 8-wide shader, which appears in the register allocator as a
size 8 vgrf.
Fixes assertions in various piglit tests and webgl conformance.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=56521
Marek Olšák [Thu, 22 Nov 2012 23:38:44 +0000 (00:38 +0100)]
r600g: fix broken streamout if streamout_begin caused a context flush
This fixes graphics corruption in the case where the DISCARD_RANGE flag
is used to map a buffer.
NOTE: This is a candidate for the stable branches.
Marek Olšák [Thu, 22 Nov 2012 21:40:06 +0000 (22:40 +0100)]
r600g: fix ARB_map_buffer_alignment with unaligned offsets and staging buffers
Vinson Lee [Sat, 17 Nov 2012 07:35:42 +0000 (23:35 -0800)]
scons: Append x11 library path if linking x11 library.
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Kenneth Graunke [Fri, 12 Oct 2012 19:46:44 +0000 (12:46 -0700)]
mesa/vbo: Fix scaling issue in 2-bit signed normalized packing.
Since a signed 2-bit integer can only represent -1, 0, or 1, it is
tempting to simply to convert it directly to a float. This maps it
onto the correct range of [-1.0, 1.0]. However, it gives different
values compared to the usual equation:
(2.0 * 1.0 + 1.0) * (1.0 / 3.0) = +1.0 (same)
(2.0 * 0.0 + 1.0) * (1.0 / 3.0) = +0.
33333333... (different)
(2.0 * -1.0 + 1.0) * (1.0 / 3.0) = -0.
33333333... (different)
According to the GL_ARB_vertex_type_2_10_10_10_rev extension, signed
normalization is performed using equation 2.2 from the GL 3.2
specification, which is:
f = (2c + 1)/(2^b - 1). (2.2)
Comments below that equation state: "In general, this representation is
used for signed normalized fixed-point parameters in GL commands, such
as vertex attribute values." Which is what we're doing here.
The 3.2 specification goes on to declare an alternate formula:
f = max{c/(2^(b-1) - 1), -1.0} (2.3)
which is closer to the existing code, and maps the end points to exactly
-1.0 and 1.0. Comments below the equation state: "In general, this
representation is used for signed normalized fixed-point texture or
framebuffer values." Which is *not* what we're doing here.
It then states: "Everywhere that signed normalized fixed-point
values are converted, the equation used is specified." This is the real
clincher: the extension explicitly specifies that we must use equation
2.2, not 2.3. So we need to do (2x + 1) / 3.
This matches the behavior expected by oglconform's packed-vertex test,
and is correct for desktop GL (pre-4.2). It's not correct for ES 3.0,
but a future patch will correct that.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Tested-by: Marek Olšák <maraeo@gmail.com>
Kenneth Graunke [Fri, 12 Oct 2012 18:17:39 +0000 (11:17 -0700)]
mesa/vbo: Fix scaling issue in 10-bit signed normalized packing.
For the 10-bit components, the divisor was incorrect. A 10-bit signed
integer can represent -2^9 through 2^9 - 1, which leads to the following
ranges:
(float)value.x -> [ -512, 511]
2.0F * (float)value.x -> [-1024, 1022]
2.0F * (float)value.x + 1.0F -> [-1023, 1023]
So dividing by 511 would incorrectly scale it to approximately:
[-2.
001956947, 2.
001956947]. To correctly scale to [-1.0, 1.0], we need
to divide by 1023.
This correctly implements the desktop GL rules. ES 3.0 has different
rules, but those will be implemented in a separate patch.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Tested-by: Marek Olšák <maraeo@gmail.com>
Alex Deucher [Wed, 21 Nov 2012 23:48:18 +0000 (18:48 -0500)]
radeonsi: add a new SI pci id
Note: this is a candidate for the stable branch.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Vinson Lee [Wed, 14 Nov 2012 07:20:42 +0000 (23:20 -0800)]
i915: Fix wrong sizeof argument in i915_update_tex_unit.
The bug was found by Coverity.
NOTE: This is a candidate for the stable branches.
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Andreas Boll [Sat, 17 Nov 2012 17:04:54 +0000 (18:04 +0100)]
Add .dirstamp to toplevel .gitignore
Andreas Boll [Wed, 21 Nov 2012 17:17:00 +0000 (18:17 +0100)]
gallium/tests: update .gitignore files
Eric Anholt [Fri, 9 Nov 2012 20:50:03 +0000 (12:50 -0800)]
i965/fs: Add helper functions for IF and CMP and use them.
v2: Rebase on gen6-if fix.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> (v1)
Eric Anholt [Fri, 9 Nov 2012 20:01:05 +0000 (12:01 -0800)]
i965/fs: Add helper functions for generating ALU ops, like in the VS.
This gives us checking of our arguments (no more passing 1 operand to
BRW_OPCODE_MUL!), at the cost of a couple of extra parens.
v2: Rebase on gen6-if fix.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> (v1)
Eric Anholt [Sun, 18 Nov 2012 21:18:03 +0000 (13:18 -0800)]
i965/gen4: Fix crash with fragment programs and texture rectangle.
This was a regression in the brw_fs_fp.cpp change. We just need to return
something good enough to get the IR generation to the end without crashing,
but ir->type isn't initialized and we wanted something of the coordinate's
type anyway.
Fixes around 30 piglit cases on my ilk system in drawpixels and framebuffer
blit.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=56962
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Eric Anholt [Thu, 15 Nov 2012 20:00:33 +0000 (12:00 -0800)]
i965: Disable the GB clip test when a limited viewport is set.
The theory of the guardband is that you extend the clip volume to avoid
expensive clipping computation, and just let fragments outside the viewport
get clipped by the drawable's bounds. But if a smaller-than-window-size
viewport is set, and we don't also happen to have a scissor set, then
rendering could incorrectly extend outside of the viewport when it should have
been clipped to the viewport.
Fixes the new piglit triangle-guardband-viewport test.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
NOTE: This is a candidate for the 9.0 branch.
Eric Anholt [Thu, 15 Nov 2012 19:55:36 +0000 (11:55 -0800)]
i965: Use fewer temporary variables in clip setup.
When you're comparing to the spec, you're trying to immediately see what
numbered dword of the packet your bit ends up in.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
NOTE: This is a candidate for the 9.0 branch.
Eric Anholt [Mon, 12 Nov 2012 21:16:02 +0000 (13:16 -0800)]
Revert "i965/fs: Fix conversions float->bool, int->bool"
This reverts commit
cf0bbb30f6bd9d3fa61b5207320e8f34c563a2c6. It
was just papering over the bug fixed in the previous commit.
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Eric Anholt [Mon, 12 Nov 2012 21:13:55 +0000 (13:13 -0800)]
i965/fs: Fix the gen6-specific if handling for
80ecb8f15b9ad7d6edc
Fixes oglconform shad-compiler advanced.TestLessThani.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=48629
NOTE: This is a candidate for the 9.0 branch.
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Chad Versace [Mon, 19 Nov 2012 19:43:51 +0000 (11:43 -0800)]
intel: Use designated initializers for DRI extension structs
All Intel code is compiled with -std=c99. There is no excuse to not use
designated initializers.
As a nice benefit, the code is now more friendly to grep. Without
designated initializers, psychic prowess is required to find the
initialization of DRI extension function pointers with grep. I have
observed several people, when they first encounter the DRI code, fail at
statically chasing the DRI function pointers due to this problem.
Reviewed-by: Matt Turner <mattst88@gmail.com>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Chad Versace <chad.versace@linux.intel.com>
Chad Versace [Mon, 19 Nov 2012 21:40:00 +0000 (13:40 -0800)]
dri: Use designated initializers for DRI extension structs
The dri directory is compiled with -std=c99. There is no excuse to not use
designated initializers.
As a nice benefit, the code is now more friendly to grep. Without
designated initializers, psychic prowess is required to find the
initialization of DRI extension function pointers with grep. I have
observed several people, when they first encounter the DRI code, fail at
statically chasing the DRI function pointers due to this problem.
Reviewed-by: Matt Turner <mattst88@gmail.com>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Chad Versace <chad.versace@linux.intel.com>
Eric Anholt [Mon, 5 Nov 2012 17:53:31 +0000 (09:53 -0800)]
i965: Use the separate stencil buffer's offsets for stencil setup.
For a packed depth/stencil buffer on separate stencil hardware, the
separate depth miptree is set up with alignment of 4,4 and the separate
stencil miptree is setup with alignment of 8,8. We can't just use the
irb->draw_{x,y} offsets for stencil, since that is the offset in the
depth miptree.
Fixes 12 piglit depthstencil testcases on ivb.
Acked-by: Chad Versace <chad.versace@linux.intel.com>
Eric Anholt [Sun, 4 Nov 2012 20:47:02 +0000 (12:47 -0800)]
i965: Move all the depth/stencil/hiz offset logic into the workaround.
Given that we have the mask information here (assuming the rebase is to
the same tiling, which is safe), we can just save a set of miptrees and
offsets and the global intra-tile offset in the context and cut out a
bunch of logic. This will also save emitting the next fix I need to do
twice.
Acked-by: Chad Versace <chad.versace@linux.intel.com>