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Eric Anholt [Tue, 17 May 2011 17:51:45 +0000 (10:51 -0700)]
i965: Replace struct with bit shifting for WM pull constant surfaces.
This reduces compiled size (4.7% of brw_wm_surface_state.o).
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Eric Anholt [Tue, 17 May 2011 17:35:07 +0000 (10:35 -0700)]
i965: Replace struct with bit shifting for WM render target surfaces.
This massively reduces compiled size (6.7% of brw_wm_surface_state.o).
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Eric Anholt [Thu, 28 Apr 2011 04:50:20 +0000 (21:50 -0700)]
i965: Replace structs with bitfield shifting for WM texture surfaces.
This massively reduces compiled size (4.9% of brw_wm_surface_state.o).
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Eric Anholt [Tue, 31 May 2011 19:03:52 +0000 (12:03 -0700)]
i965: Add defines for surface state setup using bitfield shifting.
It turns out that gcc is just awful at generating code for
brw_structs.h style state setup, and using bitshifting on u32s
generates better code while being similarly readable (and more
verifiable compared to the specs, using the INTEL_MASK macro).
Eric Anholt [Thu, 28 Apr 2011 04:50:20 +0000 (21:50 -0700)]
i965: Don't compute brw->wm.input_size_masks when it's unused.
It's only used in the old fragment program path, to avoid projection
when w is always 1. We do want to do this in the new path pre-gen6
too, but we'll probably do it through the ir.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Eric Anholt [Tue, 17 May 2011 16:20:04 +0000 (09:20 -0700)]
i965: Drop a gratuitous "if" that the compiler didn't eliminate at -O2.
Oddly, this increases compiled code size. (marking the 'if' as likely
also increases code size, but not as much).
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Eric Anholt [Tue, 17 May 2011 16:11:38 +0000 (09:11 -0700)]
i965: Move prepare_wm_surfaces texobj declarations inside of _ReallyEnabled.
Interestingly, the compiler wasn't doing this for us at -O2, so we
were doing the computation for every non-_ReallyEnabled unit.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Ian Romanick [Thu, 19 May 2011 12:34:19 +0000 (14:34 +0200)]
intel: Remove unused NO_TILE macro
Reviewed-by: Eric Anholt <eric@anholt.net>
Marek Olšák [Tue, 31 May 2011 13:53:11 +0000 (15:53 +0200)]
r300g: set squared microtiling for the dummy zbuffer
The pitch of 4 is allowed for squared microtiling only.
Alex Deucher [Tue, 31 May 2011 14:43:31 +0000 (10:43 -0400)]
r600g: cs init fixes
- all asics need to emit CONTEXT_CONTROL
- all r6xx asics need to emit 3D_START_CMDBUF
The ddx and r600c already do this. r600g should as well.
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Marek Olšák [Mon, 30 May 2011 23:16:20 +0000 (01:16 +0200)]
r300g: log when getting unsupported texture format
Dave Airlie [Mon, 30 May 2011 10:21:16 +0000 (20:21 +1000)]
gallium: include limits.h in p_config.h
We are getting inconsistent methods for endian detection (same answer when
it works, just doesn't work on some platforms) depending on whether __GLIBC__
is defined, which of course depends on include ordering before p_config.h
Just make p_config.h include limits.h to solve this.
Signed-off-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Dave Airlie [Tue, 31 May 2011 05:33:07 +0000 (15:33 +1000)]
r600g: add context control to start of CS
On my original R600 card this at least lets gnome shell run for a while longer
and the piglit r300-readcache test case works a lot more reliably.
Still a few more stability issues running a piglit test run though.
Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Tue, 31 May 2011 00:52:07 +0000 (10:52 +1000)]
r600g: don't emit color blend register on original R600.
The original R600 doesn't have these so don't emit them.
Signed-off-by: Dave Airlie <airlied@redhat.com>
Marek Olšák [Sun, 29 May 2011 16:58:45 +0000 (18:58 +0200)]
mesa: forbid UseProgram to be called inside Begin/End
The spec doesn't state it should be an error, but. We have this piglit test
useprogram-inside-begin that passes with this commit. No idea what's correct.
NOTE: This is a candidate for the 7.10 branch.
Reviewed-by: Brian Paul <brianp@vmware.com>
Marek Olšák [Sun, 29 May 2011 04:21:39 +0000 (06:21 +0200)]
st/mesa: don't use resource_copy_region for CopyPixels with conditional render
The conditional rendering should be able to kill CopyPixels.
I assume the render condition has no effect on resource_copy_region.
This fixes piglit:
- NV_conditional_render/copypixels
NOTE: This is a candidate for the 7.10 branch.
Reviewed-by: Brian Paul <brianp@vmware.com>
Marek Olšák [Sun, 29 May 2011 16:20:36 +0000 (18:20 +0200)]
st/mesa: conditional rendering should not kill texture decompression via blit
NOTE: This is a candidate for the 7.10 branch.
Reviewed-by: Brian Paul <brianp@vmware.com>
Marek Olšák [Sun, 29 May 2011 13:35:25 +0000 (15:35 +0200)]
st/mesa: CopyTex(Sub)Image should not be killed by conditional rendering
NOTE: This is a candidate for the 7.10 branch.
Reviewed-by: Brian Paul <brianp@vmware.com>
Marek Olšák [Sun, 29 May 2011 15:52:29 +0000 (17:52 +0200)]
st/mesa: BlitFramebuffer should not be killed by conditional rendering
NOTE: This is a candidate for the 7.10 branch.
Reviewed-by: Brian Paul <brianp@vmware.com>
Marek Olšák [Sun, 29 May 2011 15:52:29 +0000 (17:52 +0200)]
swrast: BlitFramebuffer should not be killed by conditional rendering
NOTE: This is a candidate for the 7.10 branch.
Reviewed-by: Brian Paul <brianp@vmware.com>
Marek Olšák [Sun, 29 May 2011 13:35:25 +0000 (15:35 +0200)]
st/mesa: GenerateMipmap should not be killed by conditional rendering
NOTE: This is a candidate for the 7.10 branch.
Reviewed-by: Brian Paul <brianp@vmware.com>
Marek Olšák [Sat, 28 May 2011 14:30:51 +0000 (16:30 +0200)]
st/mesa: fix typos and add some format fallbacks in format_map
Always default to DEFAULT_*_FORMATS for mandatory GL formats.
(st_choose_format must not fail for those)
Use DEFAULT_RGBA when alpha is required instead of RGB.
Use DEFAULT_RGB otherwise.
These are more or less the remaining differences between the old code and
the new one.
Reviewed-by: Brian Paul <brianp@vmware.com>
Marek Olšák [Sat, 28 May 2011 13:50:10 +0000 (15:50 +0200)]
st/mesa: consolidate listing of depth formats
Reviewed-by: Brian Paul <brianp@vmware.com>
Marek Olšák [Sat, 28 May 2011 12:51:16 +0000 (14:51 +0200)]
st/mesa: add GL_DEPTH_COMPONENT32 fallback formats
This makes D32 work again on chipsets which can't do it.
Reviewed-by: Brian Paul <brianp@vmware.com>
Marek Olšák [Sat, 28 May 2011 12:28:19 +0000 (14:28 +0200)]
st/mesa: fix changing internal format via RenderbufferStorage
The problem is: The second time the function is called with a new
internal format, strb->format is usually not PIPE_FORMAT_NONE.
RenderbufferStorage(... GL_RGBA8 ...);
RenderbufferStorage(... GL_RGBA16 ...); // had no effect on the format
Broken with:
fd6f2d6e5783d8810d0ab88e1c470958fd5eb2eb
Test: piglit/fbo-storage-completeness
NOTE: This is a candidate for the 7.10 branch.
(if
fd6f2d6e5783d8810d0ab88e1c470958fd5eb2eb is cherry-picked as well)
Reviewed-by: Brian Paul <brianp@vmware.com>
Marek Olšák [Sun, 29 May 2011 00:53:01 +0000 (02:53 +0200)]
tgsi/ureg: bump the limit of immediates
Lowered indirect addressing can create lots of immediates.
Fixes piglit/glsl-fs-uniform-array-7 on r300g.
NOTE: This is a candidate for the 7.10 branch.
Reviewed-by: Brian Paul <brianp@vmware.com>
Marek Olšák [Sun, 29 May 2011 01:34:00 +0000 (03:34 +0200)]
trace: implement texture_barrier
Marek Olšák [Sun, 29 May 2011 01:32:54 +0000 (03:32 +0200)]
trace: implement render_condition
Marek Olšák [Sun, 29 May 2011 04:12:22 +0000 (06:12 +0200)]
r300g: clear can be killed by render condition
Fixes piglit:
- NV_conditional_render/clear
Tom Stellard [Wed, 25 May 2011 04:11:03 +0000 (21:11 -0700)]
r300g: Fix non-dri builds
This is just a temporary solution for now until there is a better way
to share code between mesa and gallium.
Marek Olšák [Sun, 29 May 2011 02:36:36 +0000 (04:36 +0200)]
r300g: fix occlusion queries when depth test is disabled or zbuffer is missing
From now on, depth test is always enabled in hardware.
If depth test is disabled in Gallium, the hardware Z function is set to ALWAYS.
If there is no zbuffer set, the colorbuffer0 memory is set as a zbuffer
to silence the CS checker.
This fixes piglit:
- occlusion-query-discard
- NV_conditional_render/bitmap
- NV_conditional_render/drawpixels
- NV_conditional_render/vertex_array
Marek Olšák [Sun, 29 May 2011 01:59:07 +0000 (03:59 +0200)]
r300g: cleanup render_condition a bit
Marek Olšák [Sun, 29 May 2011 01:46:15 +0000 (03:46 +0200)]
r300g: remove fake occlusion queries (debug option)
Marek Olšák [Sun, 29 May 2011 01:44:21 +0000 (03:44 +0200)]
r300g: remove debug option DBG_FALL
Marek Olšák [Sun, 15 May 2011 00:34:16 +0000 (02:34 +0200)]
r300g: print some HyperZ debug info
Stéphane Marchesin [Fri, 27 May 2011 00:19:03 +0000 (17:19 -0700)]
glx: Fix glXGetFBConfigFromVisualSGIX.
We want to check for Success, otherwise it will fail even with the right visual.
NOTE: This is a candidate for the 7.10 branch.
Signed-off-by: Antoine Labour <piman@chromium.org>
Signed-off-by: Stéphane Marchesin <marcheu@chromium.org>
Signed-off-by: Brian Paul <brianp@vmware.com>
Pierre-Eric Pelloux-Prayer [Thu, 26 May 2011 18:06:42 +0000 (20:06 +0200)]
mesa: set parameter list StateFlags field in _mesa_layout_parameters()
When using _mesa_layout_parameters, all params copied in the 'layout'
output in the PASS 1 don't modify StateFlags (because they are simply
memcpy'ed).
This patch fixes the problem, assuring output gl_prog_param_list
StateFlags field is the same as the input one.
NOTE: This is a candidate for the 7.10 branch.
Signed-off-by: Brian Paul <brianp@vmware.com>
Eric Anholt [Fri, 27 May 2011 16:50:34 +0000 (09:50 -0700)]
i965/fs: Fix up for
8752764076e5b3f052a57e0134424a37bf2e9164.
I failed to commit and squash before pushing.
Eric Anholt [Tue, 17 May 2011 15:21:27 +0000 (08:21 -0700)]
mesa: Include shader target in dumps of GLSL source.
This makes automatic parsing of MESA_GLSL=dump output easier.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Eric Anholt [Mon, 16 May 2011 22:10:26 +0000 (15:10 -0700)]
i965/fs: Do a FS compile up front at link time to produce link errors.
At glLinkShaders time, a fail() call in FS compile in 8-wide (the one
that's required to succeed, though we may relax that at some point for
pre-Ironlake performance) will now report out as a link error.
Eric Anholt [Tue, 24 May 2011 23:45:17 +0000 (16:45 -0700)]
i965/fs: Split the GLSL IR -> FS LIR visitor to brw_fs_visitor.cpp.
We now have:
brw_fs.cpp handles calling out to everything and optimization.
brw_fs_visitor.cpp handles translating to our LIR.
brw_fs_emit.cpp handles emitting from our LIR to native code.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Eric Anholt [Tue, 24 May 2011 23:34:27 +0000 (16:34 -0700)]
i965/fs: Split the BRW native code emit to brw_fs_emit.cpp
This is all separate from the visitor and the optimization passes
which feed into it.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Eric Anholt [Thu, 26 May 2011 17:01:10 +0000 (10:01 -0700)]
i965: Move a couple of GLSL IR -> BRW helper functions to brw_shader.cpp.
These will be used by the VS backend as well.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Eric Anholt [Thu, 26 May 2011 16:57:36 +0000 (09:57 -0700)]
i965: Move non-FS-specific shader support to brw_shader.cpp.
These only existed in brw_fs.cpp because it was the only .cpp file in
the area when I wrote them.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Eric Anholt [Wed, 27 Apr 2011 00:58:04 +0000 (17:58 -0700)]
i965: Avoid generating MOVs for assignments of expressions.
No statistically significant difference measured in 3dbenchmark
egypt/pro. It does reduce fragment shader instructions across
shader-db by 0.3%.
Eric Anholt [Tue, 17 May 2011 15:55:11 +0000 (08:55 -0700)]
i965/fs: Move the computation of register block count from unit to compile.
No net code size change, but unit update is down 0.8% code size
pre-gen6.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Eric Anholt [Mon, 23 May 2011 16:12:07 +0000 (09:12 -0700)]
i965/fs: Track fixed GRF regs separate from allocated GRF file in scheduling.
There's an assumption here that fixed GRFs will never intersect with
the allocated GRFs. That's true today, though it might change some
day if we decide to register-allocate the regs containing push
constants once they're dead.
This fixes a regression in
0f7325b89038937bd428f7c89ed9859189a0ab0b in
Lightsmark from the texture instructions now containing g0 references
instead of having that be implied. Performance is improved 15.2% +/-
3.6% (n=3).
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=34968
Eric Anholt [Fri, 20 May 2011 21:13:59 +0000 (14:13 -0700)]
i965/fs: Add a helper function for add_dep(before, after, before->latency).
This lets us avoid a bunch of before==NULL checks in the callers.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Trevor Davenport [Fri, 27 May 2011 08:25:40 +0000 (10:25 +0200)]
nv50: fix emit_add_a16 to emit correct source reg
emit_add_a16 was using the incorrect source.
This caused adds in the form of:
add u16 $a0 s32 $a1 u32 0x00000200
to have a source AREG of $a0 instead of $a1.
Fixes World of Warcraft in OpenGL and D3D without GLSL.
Brian Paul [Fri, 27 May 2011 01:25:44 +0000 (19:25 -0600)]
mesa: s/height/depth/ in texsubimage()
Fixes http://bugs.freedesktop.org/show_bug.cgi?id=37648
Brian Paul [Fri, 27 May 2011 01:25:44 +0000 (19:25 -0600)]
mesa: plug _mesa_GetObjectParameterivAPPLE into display list dispatch table
Brian Paul [Fri, 27 May 2011 01:25:44 +0000 (19:25 -0600)]
mesa: plug in GL_ARB_vertex_array_object display list functions
Brian Paul [Fri, 27 May 2011 01:25:44 +0000 (19:25 -0600)]
mesa: more geometry shader display list functions
Brian Paul [Fri, 27 May 2011 01:25:44 +0000 (19:25 -0600)]
mesa: more transform feedback display list functions
Brian Paul [Fri, 27 May 2011 01:25:44 +0000 (19:25 -0600)]
mesa: make query object API functions static
Only directly referenced by the _mesa_init_queryobj_dispatch() function.
Brian Paul [Fri, 27 May 2011 01:25:44 +0000 (19:25 -0600)]
mesa: simplify query object display list dispatch setup
Eric Anholt [Thu, 19 May 2011 16:56:27 +0000 (09:56 -0700)]
i965: Pack the lookup and line_aa bits into the first dword of the key.
They were occupying whole 32-bit words, despite being only 10 or so
bits. Reduces code size slightly (80/3300 bytes).
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Eric Anholt [Thu, 19 May 2011 16:54:07 +0000 (09:54 -0700)]
i965: Remove dead shadowtex_mask entry in the WM key.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Eric Anholt [Thu, 19 May 2011 15:48:42 +0000 (08:48 -0700)]
i965: Remove linear_color for GL_PERSPECTIVE_CORRECTION_HINT.
From the GL 2.1 spec:
"Required perspective-correct interpolation for all fragment
attributes except depth in sections 3.4.1 and 3.5.1, effectively
making GL PERSPECTIVE CORRECT HINT a no-op."
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Eric Anholt [Wed, 25 May 2011 20:56:04 +0000 (13:56 -0700)]
intel: Drop doubly irrelevant code in intelReadBuffers.
First, FBO read/draw == NULL validation happens in mesa core not
intelReadBuffers -> intel_draw_buffers. Second, that condition is no
longer tested for in our driver since ARB_ES2_compatibility was added.
Reviewed-by: Brian Paul <brianp@vmware.com>
Eric Anholt [Wed, 25 May 2011 20:46:47 +0000 (13:46 -0700)]
mesa: Flush vertices before updating drawbuffer computed state.
Otherwise, the driver is likely to draw the flushed vertices to the
new drawbuffer instead of the old one, missing the point of the flush.
Reviewed-by: Brian Paul <brianp@vmware.com>
Eric Anholt [Wed, 25 May 2011 20:51:26 +0000 (13:51 -0700)]
mesa: Allow NULL read/draw in complete FBOs in ARB_ES2_compatibility.
From the ARB_ES2_compatibility spec:
"(8) How should we handle draw buffer completeness?
RESOLVED: Remove draw/readbuffer completeness checks, and treat
drawbuffers referring to missing attachments as if they were NONE."
Fixes arb_es2_compatibility-drawbuffers when the short-circuit for
ARB_ES2_compatibility in the previous commit is dropped.
Reviewed-by: Brian Paul <brianp@vmware.com>
Eric Anholt [Wed, 25 May 2011 20:43:02 +0000 (13:43 -0700)]
mesa: Trigger FBO validation on DrawBuffers change in non-ES2 mode.
glDrawBuffers pointing at an unattached buffer is supposed to be
incomplete without ARB_ES2_compatibility. The testcase to catch the
bug of not implementing that bit of the spec was tricked by this
missing piece of state update.
Reviewed-by: Brian Paul <brianp@vmware.com>
Brian Paul [Thu, 26 May 2011 03:05:23 +0000 (21:05 -0600)]
mesa: minor whitespace fixes
Brian Paul [Thu, 26 May 2011 02:45:48 +0000 (20:45 -0600)]
mesa: plug in sync object display list functions
Most just dispatch through to the immediate mode functions, except
for glWaitSync(), per the extension spec.
Brian Paul [Thu, 26 May 2011 02:44:35 +0000 (20:44 -0600)]
mesa: display list support for glProgramParameteriARB()
Brian Paul [Thu, 26 May 2011 02:39:08 +0000 (20:39 -0600)]
mesa: plug shader object functions into display list dispatch
Brian Paul [Thu, 26 May 2011 02:27:44 +0000 (20:27 -0600)]
mesa: plug in GL 3.0 ClearBuffer() display list functions
Brian Paul [Thu, 26 May 2011 02:20:22 +0000 (20:20 -0600)]
mesa: fill in missing sampler object display list functions
Brian Paul [Thu, 26 May 2011 00:16:03 +0000 (18:16 -0600)]
st/mesa: simplify some st_context(ctx)->pipe code
Brian Paul [Thu, 26 May 2011 00:07:33 +0000 (18:07 -0600)]
st/mesa: fix incorrect texture level/face/slice accesses
If we use FBOs to access mipmap levels with glRead/Draw/CopyPixels()
we need to be sure to access the correct mipmap level/face/slice.
Before, we were just passing zero in quite a few places.
This fixes the new piglit fbo-mipmap-copypix test.
NOTE: This is a candidate for the 7.10 branch.
Jakob Bornecrantz [Wed, 25 May 2011 20:00:09 +0000 (22:00 +0200)]
i915g: Bump texture sizes
Spotted and tested by Christopher Egert.
Signed-off-by: Jakob Bornecrantz <wallbraker@gmail.com>
Eric Anholt [Mon, 23 May 2011 16:26:42 +0000 (09:26 -0700)]
i965: Warnings cleanup.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Eric Anholt [Tue, 24 May 2011 19:36:50 +0000 (12:36 -0700)]
i965: Fix assertion failures in unused brw_reg setup by deleting it.
I was using undefined values to create an unused value. Go me.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=37366
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Alex Deucher [Wed, 25 May 2011 15:04:25 +0000 (11:04 -0400)]
r600g: remove duplicate opcode in r600_opcodes.h
V_SQ_CF_WORD1_SQ_CF_INST_HALT is 0x1f on both
evergreen and cayman.
Reported-by: Gustaw Smolarczyk <wielkiegie@gmail.com>
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Chad Versace [Mon, 23 May 2011 20:48:18 +0000 (13:48 -0700)]
intel: Change FBO validation criteria to accomodate hiz and seprate stencil
Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Chad Versace <chad@chad-versace.us>
Chad Versace [Mon, 23 May 2011 20:47:42 +0000 (13:47 -0700)]
intel: Fix intel_draw_buffer() to accomodate hiz and separate stencil
The logic of intel_draw_buffers() expected that stencil buffers were
always combined depth/stencil.
Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Chad Versace <chad@chad-versace.us>
Chad Versace [Mon, 23 May 2011 20:48:14 +0000 (13:48 -0700)]
intel: Add hiz_region to intel_mipmap_tree
When a texture is attached to multiple FBO's, a separate renderbuffer
wrapper is created for each attachment. This necessitates storing the hiz
region for these renderbuffers in the texture itself instead of the
renderbuffer wrapper.
Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Chad Versace <chad@chad-versace.us>
Chad Versace [Mon, 23 May 2011 20:48:10 +0000 (13:48 -0700)]
intel: Refactor the wrapping of textures with renderbuffers
Before this commit, the renderbuffer's region was updated in
intel_renderbuffer_texture(). This commit moves the update into
intel_update_wrapper(), which is a more logical location for updates.
This is in preparation for the next commit, which allocates and
updates the texture's hiz region in intel_update_wrapper(). Having the two
region updates located in the same function makes good form.
Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Chad Versace <chad@chad-versace.us>
Chad Versace [Mon, 23 May 2011 20:48:04 +0000 (13:48 -0700)]
intel: Add hiz_region to intel_renderbuffer
A hiz surface must be supplied to the hardware when rendering to a depth
buffer with hiz. There are three potential places to store that surface:
1. Allocate a larger intel_region for the depthbuffer, and let the
region's tail be the hiz surface.
2. Allocate a separate intel_region for hiz, and store it as
brw_context state.
3. Allocate a separate intel_region for hiz, and store it in
intel_renderbuffer.
We choose method 3.
Method 1 has not been chosen due to future complications it might cause
when requesting a DRI drawable's depth buffer attachment from X.
Method 2 has not been chosen because storing the hiz region apart from
the depth region makes lazy hiz/depth resolves difficult to implement.
Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Chad Versace <chad@chad-versace.us>
Chad Versace [Mon, 23 May 2011 20:47:57 +0000 (13:47 -0700)]
intel: Add is_hiz_depth_format() to intel_contex.vtbl
Given a format, is_hiz_depth_format() indicates if HiZ can be enabled on
a depthbuffer of that format.
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Chad Versace <chad@chad-versace.us>
Chad Versace [Mon, 23 May 2011 20:47:35 +0000 (13:47 -0700)]
intel: Allocate region for separate stencil buffer
... in intel_alloc_renderbuffer_storage(). The stencil buffer has quirky
pitch requirements, so its region allocation is a special case.
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Chad Versace <chad@chad-versace.us>
Chad Versace [Mon, 23 May 2011 20:47:27 +0000 (13:47 -0700)]
intel: Change supported texture formats for separate stencil
When hardware supports separate stencil, enable support for separate
depth/stencil texture formats in the table
intel_context.ctx.TextureFormatsSupported. If the hardware must use
separate stencil, then disable support for combined depth/stencil formats.
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Chad Versace <chad@chad-versace.us>
Chad Versace [Mon, 23 May 2011 20:47:17 +0000 (13:47 -0700)]
mesa: Add MESA_FORMAT_X8_Z24 to _mesa_choose_tex_format
Prefer MESA_FORMAT_X8_Z24 over MESA_FORMAT_S8_Z24 for textures with
internal format GL_DEPTH_COMPONENT*.
i965 needs MESA_FORMAT_X8_Z24 for HiZ and separate stencil.
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Chad Versace <chad@chad-versace.us>
Chad Versace [Mon, 23 May 2011 20:47:01 +0000 (13:47 -0700)]
intel: Add flags to intel_context for hiz and separate stencil
Add the following flags:
intel_context.has_separate_stencil
intel_context.must_use_separate_stencil
intel_context.has_hiz
The flags are currently set to false, and will be enabled for a given
chipset once the feature is completely implemented.
Since it may be some time before these features are completed, their
values can be overridden with environment variables INTEL_HIZ and
INTEL_SEPARATE_STENCIL. Valid values for these environment variables are
"0" and "1".
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Chad Versace <chad@chad-versace.us>
Adam Jackson [Wed, 25 May 2011 10:11:20 +0000 (06:11 -0400)]
glx: Don't refer to the request buffer outside of {L,Unl}ockDisplay
... because that's not a safe thing to do. The request buffer is shared
storage among all threads, and after UnlockDisplay the 'req' pointer may
point into someone else's request.
NOTE: This is a candidate for the 7.10 branch.
Signed-off-by: Adam Jackson <ajax@redhat.com>
Alex Deucher [Wed, 25 May 2011 05:27:34 +0000 (01:27 -0400)]
egl_dri2: add new cayman pci ids
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Alex Deucher [Wed, 25 May 2011 02:44:16 +0000 (22:44 -0400)]
r600g: fix eg/cayman scissor workaround
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Dave Airlie [Tue, 24 May 2011 23:25:03 +0000 (09:25 +1000)]
r600g: add workaround for buggy hw scissor on eg/cayman.
This is ported from the same fix to the DDX.
Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Thu, 10 Mar 2011 02:54:13 +0000 (12:54 +1000)]
r600g: add initial cayman acceleration support.
Cayman is the RadeonHD 69xx series of GPUs. This adds support for
3D acceleration to the r600g driver.
Major changes:
Some context registers moved around - mainly MSAA and clipping/guardband related.
GPR allocation is all dynamic
no vertex cache - all unified in texture cache.
5-wide to 4-wide shader engines (no scalar or trans slot)
- some changes to how instructions are placed into slots
- removal of END_OF_PROGRAM bit in favour of END flow control clause
- no vertex fetch clause - TC accepts vertex or texture
Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Wed, 25 May 2011 00:01:25 +0000 (10:01 +1000)]
r600g: don't lookup a vs semantic for position/face.
These don't need one, and I was seeing 0xff being returned and set in
the GPU registers with some tests.
Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Tue, 24 May 2011 23:37:33 +0000 (09:37 +1000)]
r600g: flush the DB dest base as well.
If we do this for CB bases then we should do it for DB bases.
noticed while adding cayman support.
Signed-off-by: Dave Airlie <airlied@redhat.com>
Adam Jackson [Fri, 29 Apr 2011 20:30:50 +0000 (16:30 -0400)]
glx: More comment cleanup
Signed-off-by: Adam Jackson <ajax@redhat.com>
Adam Jackson [Fri, 29 Apr 2011 19:40:38 +0000 (15:40 -0400)]
glx: Remove some misleading comments
These functions have already been modified for direct rendering.
Signed-off-by: Adam Jackson <ajax@redhat.com>
Adam Jackson [Fri, 29 Apr 2011 19:17:42 +0000 (15:17 -0400)]
drisw: Namespace better for ease of navigation
Signed-off-by: Adam Jackson <ajax@redhat.com>
Adam Jackson [Thu, 28 Apr 2011 19:35:30 +0000 (15:35 -0400)]
drisw: dead store removal
Signed-off-by: Adam Jackson <ajax@redhat.com>
Mike Kaplinskiy [Sat, 21 May 2011 23:05:29 +0000 (19:05 -0400)]
mesa: fix glGetTexImage for cases when srgb decode is skipped
See http://bugs.freedesktop.org/show_bug.cgi?id=37150
Signed-off-by: Brian Paul <brianp@vmware.com>
Brian Paul [Tue, 24 May 2011 14:59:09 +0000 (08:59 -0600)]
st/mesa: prefer formats without stencil for DEPTH_COMPONENT
for fast Z clears to be used more often.
Original patch by Marek Olšák. Rebased to table-driven st_choose_format()
by Brian Paul.
Brian Paul [Sat, 21 May 2011 16:43:49 +0000 (10:43 -0600)]
st/mesa: rewrite st_choose_format() to be table driven
Instead of using a giant switch statement with lots of code, use a
table to convert GL format enums to pipe formats.
Tested by running the old code next to the new and asserting that
the return value was the same for piglit tests.
We're doing a linear search, but if that ever appears to be too slow
the table could easily be sorted or hashed.
José Fonseca [Mon, 23 May 2011 19:38:41 +0000 (20:38 +0100)]
wgl: Don't hold on to user supplied HDC.
Certain applications (e.g., Bernina My Label, and the Windows
implementation of Processing language) destroy the device context used when
creating the frame-buffer, causing presents to fail because we were still
referring to the old device context internally.
This change ensures we always use the same HDC passed to the ICD
entry-points when available, or our own HDC when not available (necessary
only when flushing on single buffered visuals).