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Chukun Pan [Fri, 1 Oct 2021 14:54:21 +0000 (22:54 +0800)]
arm64: dts: qcom: ipq8074: Add QUP5 I2C node
Add node to support the QUP5 I2C controller inside of IPQ8074.
It is exactly the same as QUP2 controllers.
Some routers like ZTE MF269 use this bus.
Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211001145421.18302-1-amadeus@jmu.edu.cn
Amit Pundir [Thu, 30 Sep 2021 18:57:42 +0000 (00:27 +0530)]
arm64: dts: qcom: qrb5165-rb5: Add msm-id and board-id
Add qcom,msm-id and qcom,board-id for Robotics Board RB5.
This will help us boot the device with newer Android boot
image header versions, which package dtb separately
instead of the default Image.gz-dtb (appended dtb) format.
Signed-off-by: Amit Pundir <amit.pundir@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210930185742.117928-2-amit.pundir@linaro.org
Amit Pundir [Thu, 30 Sep 2021 18:57:41 +0000 (00:27 +0530)]
arm64: dts: qcom: sdm845-db845c: Add msm-id and board-id
Add qcom,msm-id and qcom,board-id for Dragonboard 845c.
This will help us boot the device with newer Android boot
image header versions, which package dtb separately
instead of the default Image.gz-dtb (appended dtb) format.
Signed-off-by: Amit Pundir <amit.pundir@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210930185742.117928-1-amit.pundir@linaro.org
Konrad Dybcio [Sat, 2 Oct 2021 00:13:58 +0000 (02:13 +0200)]
arm64: dts: qcom: sdm845: Move gpio.h inclusion to SoC DTSI
Almost any board that boots and has a way to interact with it
(say for the rare cases of just-pstore or let's-rely-on-bootloader-setup)
needs to set some GPIOs, so it makes no sense to include gpio.h separately
each time. Hence move it to SoC DTSI.
Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211002001358.45920-6-konrad.dybcio@somainline.org
Konrad Dybcio [Sat, 2 Oct 2021 00:13:57 +0000 (02:13 +0200)]
arm64: dts: qcom: sdm845: Add size/address-cells to dsi[01]
Add the aforementioned properties in the SoC DTSI so that everybody doesn't
have to copy that into their device DTs, effectively reducing code
duplication.
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211002001358.45920-5-konrad.dybcio@somainline.org
Konrad Dybcio [Sat, 2 Oct 2021 00:13:56 +0000 (02:13 +0200)]
arm64: dts: qcom: sdm845: Don't disable MDP explicitly
DPU/MDSS is borderline useless without MDP, so disabling
both of them makes little sense. With this change, enabling
mdss will be enough.
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211002001358.45920-4-konrad.dybcio@somainline.org
Konrad Dybcio [Sat, 2 Oct 2021 00:13:55 +0000 (02:13 +0200)]
arm64: dts: qcom: sdm845: Disable Adreno, modem and Venus by default
Components that rely on proprietary (not to mention signed!) firmware should
not be enabled by default, as lack of the aforementioned firmware could cause
various issues, from random errors to straight-up failing to boot.
Re-enable these remote processors on boards that didn't previously explicitly
disable them.
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Tested-By: Steev Klimaszewski <steev@kali.org>
[bjorn: Added missing changes to db845c and lenovo-yoga-c630 to the patch]
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211002001358.45920-3-konrad.dybcio@somainline.org
Konrad Dybcio [Sat, 2 Oct 2021 00:13:54 +0000 (02:13 +0200)]
arm64: dts: qcom: sdm845: Add XO clock to SDHCI
Add the missing XO clock to the SDHCI controller.
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211002001358.45920-2-konrad.dybcio@somainline.org
Stephan Gerhold [Mon, 4 Oct 2021 20:49:55 +0000 (22:49 +0200)]
ARM: dts: qcom: msm8916-samsung-serranove: Include dts from arm64
After adding all necessary support for MSM8916 SMP/cpuidle without PSCI
on ARM32, build the Samsung Galaxy S4 Mini VE device tree from the arm64
tree together with the ARM32 include to allow booting this device on ARM32.
The approach to include device tree files from other architectures is
inspired from e.g. the Raspberry Pi (bcm2711-rpi-4-b.dts) where this is
used to build the device tree for both ARM32 and ARM64.
Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211004204955.21077-15-stephan@gerhold.net
Stephan Gerhold [Mon, 4 Oct 2021 20:49:54 +0000 (22:49 +0200)]
ARM: dts: qcom: msm8916: Add include for SMP without PSCI on ARM32
Add a special device tree include for MSM8916 on ARM32 that sets up
SMP and cpuidle without PSCI. This is meant for devices with signed
firmware that does not support PSCI and only allows booting ARM32 kernels.
Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211004204955.21077-14-stephan@gerhold.net
Stephan Gerhold [Mon, 4 Oct 2021 20:49:53 +0000 (22:49 +0200)]
arm64: dts: qcom: msm8916: Add CPU ACC and SAW/SPM
Add the device tree nodes necessary for SMP bring-up and cpuidle
without PSCI on ARM32. The hardware is typically controlled by the
PSCI implementation in the TrustZone firmware and is therefore marked
as status = "reserved" by default (from the device tree specification):
"Indicates that the device is operational, but should not be used.
Typically this is used for devices that are controlled by another
software component, such as platform firmware."
Since this is part of the MSM8916 SoC it should be added to msm8916.dtsi
but in practice these nodes should only get enabled via an extra include
on ARM32.
This is necessary for some devices with signed firmware which is missing
both ARM64 and PSCI support and can therefore only boot ARM32 kernels.
Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211004204955.21077-13-stephan@gerhold.net
Stephan Gerhold [Mon, 4 Oct 2021 20:49:47 +0000 (22:49 +0200)]
ARM: qcom: Add ARCH_MSM8916 for MSM8916 on ARM32
Add a CONFIG_ARCH_MSM8916 option to enable building MSM8916 support
on ARM32. Note that since ARM64 is the main supported architecture
for MSM8916 this is only intended for testing and for devices where
signed firmware does not allow booting ARM64 kernels.
Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211004204955.21077-7-stephan@gerhold.net
Stephan Gerhold [Mon, 4 Oct 2021 20:19:12 +0000 (22:19 +0200)]
arm64: dts: qcom: msm8916-samsung-serranove: Add NFC
The LTE version of the S4 Mini VE has a NXP PN547, which is supported
by the nxp-nci-i2c driver in mainline. It seems to detect NFC tags
using "nfctool" just fine, although more testing is difficult given
there seem to be very few useful applications making use of the
Linux NFC subsystem. :(
Note that for some reason Samsung decided to connect the I2C pins
to GPIOs where no hardware I2C bus is available, so we need to
fall back to software bit-banging with i2c-gpio.
Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211004201921.18526-7-stephan@gerhold.net
Stephan Gerhold [Mon, 4 Oct 2021 20:19:11 +0000 (22:19 +0200)]
arm64: dts: qcom: msm8916-samsung-serranove: Add rt5033 battery
Like the Samsung Galaxy A3/A5, the S4 Mini VE uses a Richtek RT5033 PMIC
as battery fuel gauge, charger, flash LED and for some regulators.
For now, only add the fuel gauge/battery device to the device tree,
so we can check the remaining battery percentage.
The other RT5033 drivers need some more work first before
they can be used properly.
Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211004201921.18526-6-stephan@gerhold.net
Stephan Gerhold [Mon, 4 Oct 2021 20:19:10 +0000 (22:19 +0200)]
arm64: dts: qcom: msm8916-samsung-serranove: Add IMU
Add the STMicroelectronics LSM6DS3 IMU that is used in the S4 Mini VE
to the device tree.
Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211004201921.18526-5-stephan@gerhold.net
Stephan Gerhold [Mon, 4 Oct 2021 20:19:09 +0000 (22:19 +0200)]
arm64: dts: qcom: msm8916-samsung-serranove: Add touch key
Add the CORERIVER TC360 touch key together with the two necessary
fixed regulators for it.
Note that for some reason Samsung decided to connect this to GPIOs
where no hardware I2C bus is available, so we need to fall back
to software bit-banging using i2c-gpio.
Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211004201921.18526-4-stephan@gerhold.net
Stephan Gerhold [Mon, 4 Oct 2021 20:19:08 +0000 (22:19 +0200)]
arm64: dts: qcom: msm8916-samsung-serranove: Add touch screen
Like msm8916-samsung-a3u-eur, the S4 Mini VE uses a Zinitix BT541
touch screen. Add it together with the necessary fixed-regulator
to the device tree.
Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211004201921.18526-3-stephan@gerhold.net
Stephan Gerhold [Mon, 4 Oct 2021 20:19:07 +0000 (22:19 +0200)]
arm64: dts: qcom: Add device tree for Samsung Galaxy S4 Mini Value Edition
The Samsung Galaxy S4 Mini Value Edition is an updated version of the
original S4 Mini based on MSM8916. It is similar to the other Samsung
devices based on MSM8916 with only a few minor differences.
The device tree contains initial support for the S4 Mini Value Edition with:
- UART
- eMMC/SD card (needs quirk for some reason)
- Buttons
- Vibrator
- WiFi/Bluetooth (WCNSS)
- USB
Unfortunately, the S4 Mini VE was released with outdated 32-bit only
firmware and never received any update from Samsung. Since the 32-bit
TrustZone firmware is signed there seems to be no way currently to
actually boot this device tree on arm64 Linux at the moment. :(
However, it is possible to use this device tree by compiling an ARM32 kernel
instead. The device tree can be easily built on ARM32 with an #include
and it works really well there. To avoid confusion for others it is still
better to add this device tree on arm64. Otherwise it's easy to forget
to update this one when making some changes that affect all MSM8916 devices.
Maybe someone finds a way to boot ARM64 Linux on this device at some point.
In this case I expect that this device tree can be simply used as-is.
Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211004201921.18526-2-stephan@gerhold.net
Luca Weiss [Thu, 7 Oct 2021 21:24:38 +0000 (23:24 +0200)]
arm64: dts: qcom: sm7225: Add device tree for Fairphone 4
Add device tree for the Fairphone 4 smartphone which is based on
Snapdragon 750G (sm7225) which is basically sm6350.
Currently supported are UART, physical buttons (power & volume), screen
(based on simple-framebuffer set up by the bootloader), regulators and
USB.
Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211007212444.328034-12-luca@z3ntu.xyz
Luca Weiss [Thu, 7 Oct 2021 21:24:37 +0000 (23:24 +0200)]
arm64: dts: qcom: Add SM7225 device tree
The Snapdragon 750G (sm7225) is software-wise very similar to Snapdragon
690 (sm6350) with minor differences in clock speeds and as added here,
it uses the Kryo 570 instead of Kryo 560.
Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211007212444.328034-11-luca@z3ntu.xyz
Luca Weiss [Thu, 7 Oct 2021 21:24:36 +0000 (23:24 +0200)]
dt-bindings: arm: qcom: Document sm7225 and fairphone,fp4 board
Add binding documentation for Fairphone 4 smartphone which is based on
Snapdragon 750G (sm7225).
Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211007212444.328034-10-luca@z3ntu.xyz
Luca Weiss [Thu, 7 Oct 2021 21:24:35 +0000 (23:24 +0200)]
dt-bindings: arm: cpus: Add Kryo 570 CPUs
Document Kryo 570 CPUs found in Qualcomm Snapdragon 750G (SM7225).
Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211007212444.328034-9-luca@z3ntu.xyz
Luca Weiss [Thu, 7 Oct 2021 21:24:34 +0000 (23:24 +0200)]
arm64: dts: qcom: sm6350: add debug uart
Add the necessary nodes for the debug uart on SM6350.
Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211007212444.328034-8-luca@z3ntu.xyz
Luca Weiss [Thu, 7 Oct 2021 21:24:33 +0000 (23:24 +0200)]
arm64: dts: qcom: Add PM6350 PMIC
PM6350 is used in SM6350 and provides similar functionality to other
Qualcomm PMICs.
Add the pon node with power & volume key and the gpios.
Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211007212444.328034-7-luca@z3ntu.xyz
Bhupesh Sharma [Tue, 28 Sep 2021 14:09:29 +0000 (19:39 +0530)]
arm64: dts: qcom: sa8155p-adp: Enable remoteproc capabilities
Enable two of the remoteprocs found on SA8155p platform - 'audio and
compute'. Also specify firmware path for them.
Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210928140929.2549459-3-bhupesh.sharma@linaro.org
Bhupesh Sharma [Tue, 28 Sep 2021 14:09:28 +0000 (19:39 +0530)]
arm64: dts: qcom: sm8150: Add fastrpc nodes
Add fastrpc nodes for sDSP, cDSP, and aDSP.
Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210928140929.2549459-2-bhupesh.sharma@linaro.org
Ola Jeppsson [Mon, 18 Oct 2021 08:50:17 +0000 (10:50 +0200)]
arm64: dts: qcom: sm8350: Add fastrpc nodes
Add fastrpc nodes for sDSP, cDSP, and aDSP.
Signed-off-by: Ola Jeppsson <ola@snap.com>
Acked-by: Heinrich Fink <hfink@snap.com>
Acked-by: Olivier Schonken <oschonken@snapchat.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211018085017.1549494-1-ola@snap.com
Caleb Connolly [Wed, 20 Oct 2021 16:36:59 +0000 (16:36 +0000)]
arm64: dts: qcom: sdm845-oneplus: enable second wifi channel
Like the c630, the OnePlus 6 is also capable of using both antenna
channels for 2.4 and 5ghz wifi, however unlike the c630 only the first
channel is used for bluetooth.
Signed-off-by: Caleb Connolly <caleb@connolly.tech>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211020163557.291803-1-caleb@connolly.tech
Dmitry Baryshkov [Fri, 8 Oct 2021 01:25:24 +0000 (04:25 +0300)]
arm64: dts: qcom: pm8994: add interrupt controller properties
Now that the pmic-mpp is a proper hierarchical IRQ chip, add interrupt
controller properties ('interrupt-controller' and '#interrupt-cells').
The interrupts property is no longer needed so remove it.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211008012524.481877-26-dmitry.baryshkov@linaro.org
Dmitry Baryshkov [Fri, 8 Oct 2021 01:25:23 +0000 (04:25 +0300)]
arm64: dts: qcom: pm8916: add interrupt controller properties
Now that the pmic-mpp is a proper hierarchical IRQ chip, add interrupt
controller properties ('interrupt-controller' and '#interrupt-cells').
The interrupts property is no longer needed so remove it.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211008012524.481877-25-dmitry.baryshkov@linaro.org
Dmitry Baryshkov [Fri, 8 Oct 2021 01:25:11 +0000 (04:25 +0300)]
arm64: dts: qcom: apq8016-sbc: fix mpps state names
The majority of device tree nodes for mpps use xxxx-state as pinctrl
nodes. Change names of mpps pinctrl nodes for the apq8016-sbc board to
follow that pattern.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211008012524.481877-13-dmitry.baryshkov@linaro.org
Dmitry Baryshkov [Fri, 8 Oct 2021 01:25:10 +0000 (04:25 +0300)]
arm64: dts: qcom: pm8994: fix mpps device tree node
Add missing "qcom,spmi-mpp" to the compatible list as required by the
node description. Also add gpio-ranges property to mpps device tree
node, adding the mapping between pinctrl and GPIO pins.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211008012524.481877-12-dmitry.baryshkov@linaro.org
Dmitry Baryshkov [Fri, 8 Oct 2021 01:25:09 +0000 (04:25 +0300)]
arm64: dts: qcom: pm8916: fix mpps device tree node
Add missing "qcom,spmi-mpp" to the compatible list as required by the
node description. Also add gpio-ranges property to mpps device tree
node, adding the mapping between pinctrl and GPIO pins.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211008012524.481877-11-dmitry.baryshkov@linaro.org
Maulik Shah [Wed, 13 Oct 2021 06:38:24 +0000 (12:08 +0530)]
arm64: dts: qcom: Enable RPM Sleep stats
Add device node for Sleep stats driver which provides various
low power mode stats on msm8996, msm8998, qcs404, sdm630 and
sm6125.
Cc: devicetree@vger.kernel.org
Signed-off-by: Maulik Shah <mkshah@codeaurora.org>
Tested-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/1634107104-22197-6-git-send-email-mkshah@codeaurora.org
Maulik Shah [Wed, 13 Oct 2021 06:38:23 +0000 (12:08 +0530)]
arm64: dts: qcom: Enable RPMh Sleep stats
Add device node for Sleep stats driver which provides various
low power mode stats on sc7180, sc7280, sm8150, sm8250 and sm8350.
Also update the reg size of aoss_qmp device to 0x400.
Cc: devicetree@vger.kernel.org
Signed-off-by: Maulik Shah <mkshah@codeaurora.org>
Tested-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/1634107104-22197-5-git-send-email-mkshah@codeaurora.org
Philip Chen [Fri, 8 Oct 2021 18:39:35 +0000 (11:39 -0700)]
arm64: dts: sc7180: Support Parade ps8640 edp bridge
Add a dts fragment file to support the sc7180 boards with the second
source edp bridge, Parade ps8640.
Signed-off-by: Philip Chen <philipchen@chromium.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211008113839.v3.2.I187502fa747bc01a1c624ccf20d985fdffe9c320@changeid
Philip Chen [Fri, 8 Oct 2021 18:39:34 +0000 (11:39 -0700)]
arm64: dts: sc7180: Factor out ti-sn65dsi86 support
Factor out ti-sn65dsi86 edp bridge as a separate dts fragment.
This helps us introduce the second source edp bridge later.
Signed-off-by: Philip Chen <philipchen@chromium.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Reviewed-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211008113839.v3.1.Ibada67e75d2982157e64164f1d11715d46cdc42c@changeid
Arnaud Ferraris [Sat, 16 Oct 2021 10:20:24 +0000 (12:20 +0200)]
arm64: dts: qcom: add 'chassis-type' property
A new 'chassis-type' root node property has recently been approved for
the device-tree specification, in order to provide a simple way for
userspace to detect the device form factor and adjust their behavior
accordingly.
This patch fills in this property for end-user devices (such as laptops,
smartphones and tablets) based on Qualcomm ARM64 processors.
Signed-off-by: Arnaud Ferraris <arnaud.ferraris@collabora.com>
Reviewed-by: Stephan Gerhold <stephan@gerhold.net> # msm8916
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211016102025.23346-4-arnaud.ferraris@collabora.com
Dmitry Baryshkov [Sun, 29 Aug 2021 15:47:55 +0000 (18:47 +0300)]
arm64: dts: qcom: sm8250: remove mmcx regulator
Switch dispcc and videocc into using MMCX domain directly. Drop the now
unused mmcx regulator.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210829154757.784699-7-dmitry.baryshkov@linaro.org
Rajesh Patil [Thu, 30 Sep 2021 10:24:10 +0000 (15:54 +0530)]
arm64: dts: qcom: sc7180: Add qspi compatible
Add "qcom,sc7180-qspi" compatible in qspi node
Signed-off-by: Rajesh Patil <rajpat@codeaurora.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/1632997450-32293-3-git-send-email-rajpat@codeaurora.org
Bjorn Andersson [Thu, 30 Sep 2021 18:21:11 +0000 (11:21 -0700)]
arm64: dts: qcom: sdm845: Drop standalone smem node
Now that the SMEM binding and driver allows the SMEM node to be
described in the reserved-memory region directly, move the compatible
and hwlock properties to the reserved-memory node and drop the
standadlone node.
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>
Link: https://lore.kernel.org/r/20210930182111.57353-5-bjorn.andersson@linaro.org
Stephan Gerhold [Tue, 21 Sep 2021 15:21:19 +0000 (17:21 +0200)]
arm64: dts: qcom: msm8916: Drop underscore in node name
Using underscores in device tree nodes is not very common.
Additionally, the _region suffix in "smem_region@..." is not really
useful since it's obvious that it describes a reserved memory region.
Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210921152120.6710-2-stephan@gerhold.net
Stephan Gerhold [Wed, 22 Sep 2021 19:58:53 +0000 (21:58 +0200)]
arm64: dts: qcom: apq8016-sbc: Clarify firmware-names
Commit
0f6b380d580c ("arm64: dts: qcom: apq8016-sbc: Update modem and WiFi
firmware path") added "firmware-name"s to the APQ8016 SBC (DB410c) device
tree to separate the (test key)-signed firmware from other devices.
However, the added names are a bit confusing. The "modem" firmware used by
DB410c is actually a simplified version for APQ8016 that lacks most of the
modem functionality (phone calls, SMS etc) that is available on MSM8916.
Placing it in "qcom/msm8916/modem.mbn" suggests that it supports all
functionality for MSM and not just the reduced functionality for APQ.
Request the firmware from "qcom/apq8016/modem.mbn" instead to clarify this.
Do the same for "wcnss.mbn" for consistency (although the WCNSS firmware
works just fine on MSM8916).
Finally, add a "_sbc" suffix to the WCNSS_qcom_wlan_nv.bin firmware file.
It seems like the nv.bin firmware is somewhat board specific and can
therefore vary a bit from device to device. This makes it more clear
which board it is intended to be used for.
Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210922195853.95574-1-stephan@gerhold.net
Shawn Guo [Sun, 26 Sep 2021 07:22:15 +0000 (15:22 +0800)]
arm64: dts: qcom: sdm630-nile: Correct regulator label name
29.5V (29p5) is obviously wrong for regulator l4 and l5. Correct them
to be 2.95V (2p95). No functional change.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210926072215.27517-1-shawn.guo@linaro.org
Marijn Suijten [Sat, 25 Sep 2021 14:18:41 +0000 (16:18 +0200)]
arm64: dts: qcom: sm6125: Improve indentation of multiline properties
Some multiline properties (spread out over multiple lines to keep length
in check) were not indented properly, leading to misalignment with the
items above. The DT file is still small enough to address this early in
the process.
Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org>
Reviewed-by: Martin Botka <martin.botka@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210925141841.407257-1-marijn.suijten@somainline.org
Stephan Gerhold [Tue, 28 Sep 2021 11:29:45 +0000 (13:29 +0200)]
arm64: dts: qcom: msm8916-longcheer-l8150: Use &pm8916_usbin extcon
At the moment, longcheer-l8150 is using a dummy extcon-usb-gpio device
that permanently enables USB gadget mode. This workaround allows USB
to work but is actually wrong and confusing. The "vbus-gpio" used there
refers to an unused (floating) GPIO that is pulled up to make
extcon-usb-gpio report USB gadget mode permanently.
Replace this with the new &pm8916_usbin extcon device that actually
reports if an USB cable is attached or not. This allows the USB PHY
to be turned off when there is no USB cable attached and is much
cleaner overall.
Fixes:
16e8e8072108 ("arm64: dts: qcom: Add device tree for Longcheer L8150")
Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210928112945.25310-3-stephan@gerhold.net
Stephan Gerhold [Tue, 28 Sep 2021 11:29:44 +0000 (13:29 +0200)]
arm64: dts: qcom: pm8916: Add pm8941-misc extcon for USB detection
At the moment, USB gadget mode on MSM8916 works only with an extcon
device that reports the correct USB mode. This might be because the
USB PHY needs to be configured appropriately.
Unfortunately there is currently no simple approach to get such an
extcon device during early bring-up. The extcon device for USB VBUS
(i.e. gadget/peripheral mode) is typically provided by the charging
driver which is almost always very complex to port.
On pretty much all devices with PM8916, the USB VBUS is also connected
to the PM8916 "USB_IN" pad, no matter if they use the linear charger
integrated into PM8916 or not. The state of this pad can be checked
with the "USBIN_VALID" interrupt of PM8916.
The "qcom,pm8941-misc" binding exists to expose an "usb_vbus" and/or
"usb_id" interrupt from the PMIC as an extcon device.
Add a &pm8916_usbin node to pm8916.dtsi which can be used as simple
extcon device for devices that are currently lacking a proper charger
driver.
Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210928112945.25310-2-stephan@gerhold.net
Stephan Gerhold [Tue, 28 Sep 2021 11:29:43 +0000 (13:29 +0200)]
arm64: dts: qcom: pm8916: Remove wrong reg-names for rtc@6000
While removing the size from the "reg" properties in pm8916.dtsi,
commit
bd6429e81010 ("ARM64: dts: qcom: Remove size elements from
pmic reg properties") mistakenly also removed the second register
address for the rtc@6000 device. That one did not represent the size
of the register region but actually the address of the second "alarm"
register region of the rtc@6000 device.
Now there are "reg-names" for two "reg" elements, but there is actually
only one "reg" listed.
Since the DT schema for "qcom,pm8941-rtc" only expects one "reg"
element anyway, just drop the "reg-names" entirely to fix this.
Fixes:
bd6429e81010 ("ARM64: dts: qcom: Remove size elements from pmic reg properties")
Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210928112945.25310-1-stephan@gerhold.net
Sibi Sankar [Fri, 17 Sep 2021 13:55:35 +0000 (19:25 +0530)]
arm64: dts: qcom: sc7280: Update Q6V5 MSS node
Update MSS node to support MSA based modem boot on SC7280 SoCs.
Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/1631886935-14691-11-git-send-email-sibis@codeaurora.org
Sibi Sankar [Fri, 17 Sep 2021 13:55:34 +0000 (19:25 +0530)]
arm64: dts: qcom: sc7280: Add Q6V5 MSS node
This patch adds Q6V5 MSS PAS remoteproc node for SC7280 SoCs.
Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/1631886935-14691-10-git-send-email-sibis@codeaurora.org
Sibi Sankar [Fri, 17 Sep 2021 13:55:33 +0000 (19:25 +0530)]
arm64: dts: qcom: sc7280: Add nodes to boot modem
Add miscellaneous nodes to boot the modem and support post-mortem debug
on SC7280 SoCs.
Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/1631886935-14691-9-git-send-email-sibis@codeaurora.org
Sibi Sankar [Fri, 17 Sep 2021 13:55:32 +0000 (19:25 +0530)]
arm64: dts: qcom: sc7280: Add/Delete/Update reserved memory nodes
Add, delete and update platform specific reserved memory nodes.
Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/1631886935-14691-8-git-send-email-sibis@codeaurora.org
Sibi Sankar [Fri, 17 Sep 2021 13:55:31 +0000 (19:25 +0530)]
arm64: dts: qcom: sc7280: Update reserved memory map
Add missing reserved regions as described in v1 of SC7280 memory map.
Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/1631886935-14691-7-git-send-email-sibis@codeaurora.org
AngeloGioacchino Del Regno [Thu, 9 Sep 2021 12:38:23 +0000 (14:38 +0200)]
arm64: dts: qcom: msm8998-fxtec-pro1: Add tlmm keyboard keys
This device has a physical matrix keyboard, connected to a GPIO
expander, for which there's still no support yet.
Though, some of the keys are connected to the MSM8998 GPIOs and not
as a matrix, so these can be added.
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210909123823.368199-4-angelogioacchino.delregno@somainline.org
AngeloGioacchino Del Regno [Thu, 9 Sep 2021 12:38:22 +0000 (14:38 +0200)]
arm64: dts: qcom: msm8998-fxtec-pro1: Add Goodix GT9286 touchscreen
This smartphone has a Goodix GT8296 touch IC, reachable at address
0x14 on blsp2 i2c-1.
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210909123823.368199-3-angelogioacchino.delregno@somainline.org
AngeloGioacchino Del Regno [Thu, 9 Sep 2021 12:38:21 +0000 (14:38 +0200)]
arm64: dts: qcom: msm8998-fxtec-pro1: Add physical keyboard leds
Add configuration for the physical keyboard LEDs, including the
caps lock indicator and keyboard backlight.
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210909123823.368199-2-angelogioacchino.delregno@somainline.org
AngeloGioacchino Del Regno [Thu, 9 Sep 2021 12:38:20 +0000 (14:38 +0200)]
arm64: dts: qcom: Add support for MSM8998 F(x)tec Pro1 QX1000
Add device tree support for the F(x)tec Pro 1 (QX1000) smartphone;
this is a minimal configuration to boot to serial console.
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
Reported-by: kernel test robot <lkp@intel.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210909123823.368199-1-angelogioacchino.delregno@somainline.org
Stephan Gerhold [Mon, 16 Aug 2021 18:18:10 +0000 (20:18 +0200)]
arm64: dts: qcom: msm8916: Fix Secondary MI2S bit clock
At the moment, playing audio on Secondary MI2S will just end up getting
stuck, without actually playing any audio. This happens because the wrong
bit clock is configured when playing audio on Secondary MI2S.
The PRI_I2S_CLK (better name: SPKR_I2S_CLK) is used by the SPKR audio mux
block that provides both Primary and Secondary MI2S.
The SEC_I2S_CLK (better name: MIC_I2S_CLK) is used by the MIC audio mux
block that provides Tertiary MI2S. Quaternary MI2S is also part of the
MIC audio mux but has its own clock (AUX_I2S_CLK).
This means that (quite confusingly) the SEC_I2S_CLK is not actually
used for Secondary MI2S as the name would suggest. Secondary MI2S
needs to have the same clock as Primary MI2S configured.
Fix the clock list for the lpass node in the device tree and add
a comment to clarify this confusing naming. With these changes,
audio can be played correctly on Secondary MI2S.
Cc: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Fixes:
3761a3618f55 ("arm64: dts: qcom: add lpass node")
Tested-by: Vincent Knecht <vincent.knecht@mailoo.org>
Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210816181810.2242-1-stephan@gerhold.net
Stephan Gerhold [Mon, 16 Aug 2021 12:35:44 +0000 (14:35 +0200)]
arm64: dts: qcom: msm8916-longcheer-l8150: Add missing sensor interrupts
So far there were no interrupts set up for the BMC150 accelerometer
+ magnetometer combo because they were broken for some reason.
It turns out Longcheer L8150 actually has a BMC156 which is very similar
to BMC150, but only has an INT2 pin for the accelerometer part.
This requires some minor changes in the bmc150-accel driver which is now
supported by using the more correct bosch,bmc156_accel compatible.
Unfortunately it looks like even INT2 is not functional on most boards
because the interrupt line is not actually connected to the BMC156.
However, there are two pads next to the chip that can be shorted
to make it work if needed.
While at it, add the missing interrupts for the magnetometer part
and extra BMG160 gyroscope, those seem to work without any problems.
Also correct the magnetometer compatible to bosch,bmc156_magn for clarity
(no functional difference for the magnetometer part).
Tested-by: Nikita Travkin <nikita@trvn.ru>
Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210816123544.14027-1-stephan@gerhold.net
Sai Prakash Ranjan [Thu, 12 Aug 2021 09:17:42 +0000 (14:47 +0530)]
arm64: dts: qcom: sc7180: Add IMEM and pil info regions
Add IMEM and pil info DT nodes for SC7180 SoC which will help in the
post-mortem debug.
Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
[bjorn: Dropped dload-mode subnode, as no agreement was reached on this binding]
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/39064a2db95ccc2cb5eef003569bef2de651c8ed.1628757036.git.saiprakash.ranjan@codeaurora.org
Konrad Dybcio [Thu, 23 Sep 2021 16:22:03 +0000 (18:22 +0200)]
arm64: dts: qcom: pm6150l: Add missing include
Add missing include to make it compile.
Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210923162204.21752-17-konrad.dybcio@somainline.org
Konrad Dybcio [Thu, 23 Sep 2021 16:22:02 +0000 (18:22 +0200)]
arm64: dts: qcom: sm6350: Add device tree for Sony Xperia 10 III
Add initial SM6350 SoC and Sony Xperia 10 III (PDX213, Lena platform) device
trees. There is no sign of another Lena devices on the horizon, so a common
DTSI is not created for now. 10 III features a Full HD OLED display and 5G
support, among other nice things like USB3.
The bootloader is VERY unpleasant, to get a bootable setup you have to run:
mkbootimg --kernel arch/arm64/boot/Image.gz --ramdisk [some initrd] \
--dtb arch/arm64/boot/dts/qcom/sm6350-sony-xperia-lena-pdx213.dtb \
--cmdline "[some cmdline]" --base 0 --kernel_offset 0x8000 \
--ramdisk_offset 0x1000000 --dtb_offset 0x1f00000 --os_version 11 \
--os_patch_level "2021-08" --tags_offset 0x100 --pagesize 4096 \
--header_version 2 -o mainline.img
adb reboot bootloader
// You have to either pull vbmeta{"","_system"} from
// /dev/block/bootdevice/by-name/ or build one as a part of AOSP build process
fastboot --disable-verity --disable-verification flash vbmeta vbmeta.img
fastboot --disable-verity --disable-verification flash vbmeta_system \
vbmeta_system.img
fastboot flash boot mainline.img
fastboot erase dtbo // This will take approx 70s...
fastboot reboot
Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210923162204.21752-16-konrad.dybcio@somainline.org
Konrad Dybcio [Thu, 23 Sep 2021 16:22:01 +0000 (18:22 +0200)]
arm64: dts: qcom: sm6350: Add apps_smmu and assign iommus prop to USB1
Add a node for the APPS SMMU to allow for managing memory access to peripherals
such as the USB controller.
While at it, add iommus property to the USB1 node to make sure its registers can
be accessed, as they seem to be gated by default.
Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210923162204.21752-15-konrad.dybcio@somainline.org
Konrad Dybcio [Thu, 23 Sep 2021 16:22:00 +0000 (18:22 +0200)]
arm64: dts: qcom: sm6350: Add SDHCI1/2 nodes
Add SDHCI1/2 nodes for eMMC and uSD card respectively.
Do note that most SM6350 devices seem to come with UFS.
Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
[bjorn: Replaced SM6350_CX with its constant value]
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210923162204.21752-14-konrad.dybcio@somainline.org
Konrad Dybcio [Thu, 23 Sep 2021 16:21:59 +0000 (18:21 +0200)]
arm64: dts: qcom: sm6350: Add RPMHPD and BCM voter
Add RPMHPD node, its OPP table and BCM voter to prepare for performance level
voting.
Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210923162204.21752-13-konrad.dybcio@somainline.org
Konrad Dybcio [Thu, 23 Sep 2021 16:21:58 +0000 (18:21 +0200)]
arm64: dts: qcom: sm6350: Add PRNG node
Add a node for the PRNG to enable hw-accelerated pseudo-random number
generation.
Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210923162204.21752-12-konrad.dybcio@somainline.org
Konrad Dybcio [Thu, 23 Sep 2021 16:21:57 +0000 (18:21 +0200)]
arm64: dts: qcom: sm6350: Add SPMI bus
Add a node for SPMI to allow for communication with on-board PMICs.
Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210923162204.21752-11-konrad.dybcio@somainline.org
Konrad Dybcio [Thu, 23 Sep 2021 16:21:56 +0000 (18:21 +0200)]
arm64: dts: qcom: sm6350: Add AOSS_QMP
Add a node for AOSS_QMP in preparation for remote processor enablement.
Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210923162204.21752-10-konrad.dybcio@somainline.org
Konrad Dybcio [Thu, 23 Sep 2021 16:21:55 +0000 (18:21 +0200)]
arm64: dts: qcom: sm6350: Add TSENS nodes
Add nodes required for TSENS block using the common qcom,tsens-v2 binding.
Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210923162204.21752-9-konrad.dybcio@somainline.org
Konrad Dybcio [Thu, 23 Sep 2021 16:21:54 +0000 (18:21 +0200)]
arm64: dts: qcom: sm6350: Add cpufreq-hw support
Add cpufreq-hw node and assign qcom,freq-domain properties to CPUs to enable
CPU clock scaling.
Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210923162204.21752-8-konrad.dybcio@somainline.org
Konrad Dybcio [Thu, 23 Sep 2021 16:21:53 +0000 (18:21 +0200)]
arm64: dts: qcom: sm6350: Add USB1 nodes
Add nodes required for USB1 to function. SM6350 (thankfully) resuses SDM845 and
SC7180 IP, so no additional code porting is required.
Acked-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
[bjorn: Renamed dwc3 node "usb"]
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210923162204.21752-7-konrad.dybcio@somainline.org
Konrad Dybcio [Thu, 23 Sep 2021 16:21:52 +0000 (18:21 +0200)]
arm64: dts: qcom: sm6350: Add TLMM block node
Add TLMM pinctrl node to enable referencing the SoC pins in other nodes.
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210923162204.21752-6-konrad.dybcio@somainline.org
Konrad Dybcio [Thu, 23 Sep 2021 16:21:51 +0000 (18:21 +0200)]
arm64: dts: qcom: sm6350: Add GCC node
Add and configure GCC node to allow for referencing GCC-controlled clocks
in other nodes.
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210923162204.21752-5-konrad.dybcio@somainline.org
Konrad Dybcio [Thu, 23 Sep 2021 16:21:50 +0000 (18:21 +0200)]
arm64: dts: qcom: sm6350: Add RPMHCC node
Add RPMHCC node to allow for referencing RPMH-controlled clocks in other
nodes.
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210923162204.21752-4-konrad.dybcio@somainline.org
Konrad Dybcio [Thu, 23 Sep 2021 16:21:49 +0000 (18:21 +0200)]
arm64: dts: qcom: sm6350: Add LLCC node
Add a node for LLCC with SM6350-specific compatible.
Acked-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210923162204.21752-3-konrad.dybcio@somainline.org
Konrad Dybcio [Thu, 23 Sep 2021 16:21:48 +0000 (18:21 +0200)]
arm64: dts: qcom: Add SM6350 device tree
Add a base DT for SM6350 SoC
Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210923162204.21752-2-konrad.dybcio@somainline.org
Konrad Dybcio [Thu, 23 Sep 2021 16:21:47 +0000 (18:21 +0200)]
dt-bindings: arm: cpus: Add Kryo 560 CPUs
Document Kryo 560 CPUs found in Qualcomm Snapdragon 690 (SM6350).
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210923162204.21752-1-konrad.dybcio@somainline.org
Sibi Sankar [Thu, 16 Sep 2021 13:59:27 +0000 (19:29 +0530)]
arm64: dts: qcom: sm8350: Use QMP property to control load state
Use the Qualcomm Mailbox Protocol (QMP) property to control the load
state resources on SM8350 SoCs and drop deprecated power-domains exposed
by AOSS QMP node.
Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/1631800770-371-11-git-send-email-sibis@codeaurora.org
Sibi Sankar [Thu, 16 Sep 2021 13:59:26 +0000 (19:29 +0530)]
arm64: dts: qcom: sm8250: Use QMP property to control load state
Use the Qualcomm Mailbox Protocol (QMP) property to control the load
state resources on SM8250 SoCs and drop deprecated power-domains exposed
by AOSS QMP node.
Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/1631800770-371-10-git-send-email-sibis@codeaurora.org
Sibi Sankar [Thu, 16 Sep 2021 13:59:25 +0000 (19:29 +0530)]
arm64: dts: qcom: sm8150: Use QMP property to control load state
Use the Qualcomm Mailbox Protocol (QMP) property to control the load
state resources on SM8150 SoCs and drop deprecated power-domains exposed
by AOSS QMP node.
Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/1631800770-371-9-git-send-email-sibis@codeaurora.org
Sibi Sankar [Thu, 16 Sep 2021 13:59:24 +0000 (19:29 +0530)]
arm64: dts: qcom: sdm845: Use QMP property to control load state
Use the Qualcomm Mailbox Protocol (QMP) property to control the load
state resources on SDM845 SoCs and drop deprecated power-domains exposed
by AOSS QMP node.
Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/1631800770-371-8-git-send-email-sibis@codeaurora.org
Sibi Sankar [Thu, 16 Sep 2021 13:59:23 +0000 (19:29 +0530)]
arm64: dts: qcom: sc7280: Use QMP property to control load state
Use the Qualcomm Mailbox Protocol (QMP) property to control the load
state resources on SC7280 SoCs and drop deprecated power-domains exposed
by AOSS QMP node.
Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/1631800770-371-7-git-send-email-sibis@codeaurora.org
Sibi Sankar [Thu, 16 Sep 2021 13:59:22 +0000 (19:29 +0530)]
arm64: dts: qcom: sc7180: Use QMP property to control load state
Use the Qualcomm Mailbox Protocol (QMP) property to control the load
state resources on SC7180 SoCs and drop deprecated power-domains exposed
by AOSS QMP node.
Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/1631800770-371-6-git-send-email-sibis@codeaurora.org
Douglas Anderson [Thu, 23 Sep 2021 15:14:04 +0000 (08:14 -0700)]
arm64: dts: qcom: sc7180: Base homestar's power coefficients in reality
The commit
82ea7d411d43 ("arm64: dts: qcom: sc7180: Base dynamic CPU
power coefficients in reality") and the commit
be0416a3f917 ("arm64:
dts: qcom: Add sc7180-trogdor-homestar") passed each other in the
tubes that make up the Internet. Despite the fact the patches didn't
cause a merge conflict, they need to account for each other. Do that.
Fixes:
82ea7d411d43 ("arm64: dts: qcom: sc7180: Base dynamic CPU power coefficients in reality")
Fixes:
be0416a3f917 ("arm64: dts: qcom: Add sc7180-trogdor-homestar")
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210923081352.1.I2a2ee0ac428a63927324d65022929565aa7d8361@changeid
AngeloGioacchino Del Regno [Thu, 9 Sep 2021 12:37:33 +0000 (14:37 +0200)]
arm64: dts: qcom: msm8998-xperia: Add audio clock and its pin
All smartphones of this platform are equipped with a WCD9335 audio
codec, getting its MCLK from PM8998 gpio13: add this clock to DT.
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210909123733.367248-7-angelogioacchino.delregno@somainline.org
AngeloGioacchino Del Regno [Thu, 9 Sep 2021 12:37:32 +0000 (14:37 +0200)]
arm64: dts: qcom: msm8998-xperia: Add camera regulators
All of the machines of the Sony Yoshino platform are equipped with
two cameras, sharing the same regulators configuration.
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210909123733.367248-6-angelogioacchino.delregno@somainline.org
AngeloGioacchino Del Regno [Thu, 9 Sep 2021 12:37:31 +0000 (14:37 +0200)]
arm64: dts: qcom: msm8998-xperia: Configure display boost regulators
Add configuration for the LAB and IBB regulators (in boost mode):
this platform has smartphones with three different display sizes,
hence different displays requiring different voltage.
The common configuration parameters have been put in the common
device-tree, while specific voltage specs and soft-start-us are
variant specific, so they have been put into the machine specific
dts file.
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210909123733.367248-5-angelogioacchino.delregno@somainline.org
AngeloGioacchino Del Regno [Thu, 9 Sep 2021 12:37:30 +0000 (14:37 +0200)]
arm64: dts: qcom: msm8998-xperia: Add support for gpio vibrator
All smartphones in the Sony Yoshino platforms have got a simple
vibrator hooked to a GPIO: add support for that and add its own
pin configuration.
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210909123733.367248-4-angelogioacchino.delregno@somainline.org
AngeloGioacchino Del Regno [Thu, 9 Sep 2021 12:37:29 +0000 (14:37 +0200)]
arm64: dts: qcom: msm8998-xperia: Add support for wcn3990 Bluetooth
This platform uses the WCN3990 Bluetooth chip, reachable on UART-3.
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210909123733.367248-3-angelogioacchino.delregno@somainline.org
AngeloGioacchino Del Regno [Thu, 9 Sep 2021 12:37:28 +0000 (14:37 +0200)]
arm64: dts: qcom: msm8998-xperia: Add RMI4 touchscreen support
All of the devices in the Sony Yoshino platform are using a Synaptics
RMI4-compatible touch IC with identical pins and supplies: enable the
I2C-5 bus and add the rmi4-i2c node along with the required pin
configurations.
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210909123733.367248-2-angelogioacchino.delregno@somainline.org
AngeloGioacchino Del Regno [Thu, 9 Sep 2021 12:37:27 +0000 (14:37 +0200)]
arm64: dts: qcom: msm8998: Introduce support for Sony Yoshino platform
This commit introduces support for the Sony Yoshino platform, using
the MSM8998 SoC, including:
- Sony Xperia XZ1 (codename Poplar),
- Sony Xperia XZ1 Compact (codename Lilac),
- Sony Xperia XZ Premium (codename Maple).
All of the three aforementioned smartphones are sharing a 99%
equal board configuration, with very small differences between
each other, which is the reason for the introduction of a common
msm8998-sony-xperia-yoshino DT.
This base configuration includes regulators and project-wide pin
configurations and it's made to boot to a serial console.
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210909123733.367248-1-angelogioacchino.delregno@somainline.org
Shawn Guo [Tue, 24 Aug 2021 02:19:18 +0000 (10:19 +0800)]
arm64: dts: qcom: pm660: Add reboot mode support
It turns out that the pm660 PON is a GEN2 device. Update the compatible
to "qcom,pm8998-pon" and add reboot mode support, so that devices can be
rebooted into bootloader and recovery mode. Tested on Xiaomi Redmi Note
7 phone.
While at it, drop the unnecessary newline between 'compatible' and 'reg'
property.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210824021918.17271-1-shawn.guo@linaro.org
Rajesh Patil [Thu, 23 Sep 2021 12:16:18 +0000 (17:46 +0530)]
arm64: dts: qcom: sc7280: Add aliases for I2C and SPI
Add aliases for i2c and spi for sc7280 soc.
Signed-off-by: Rajesh Patil <rajpat@codeaurora.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/1632399378-12229-9-git-send-email-rajpat@codeaurora.org
Roja Rani Yarubandi [Thu, 23 Sep 2021 12:16:17 +0000 (17:46 +0530)]
arm64: dts: qcom: sc7280: Add QUPv3 wrapper_1 nodes
Add QUPv3 wrapper_1 DT nodes for SC7280 SoC.
Signed-off-by: Roja Rani Yarubandi <rojay@codeaurora.org>
Signed-off-by: Rajesh Patil <rajpat@codeaurora.org>
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/1632399378-12229-8-git-send-email-rajpat@codeaurora.org
Rajesh Patil [Thu, 23 Sep 2021 12:16:16 +0000 (17:46 +0530)]
arm64: dts: qcom: sc7280: Configure uart7 to support bluetooth on sc7280-idp
Add bluetooth uart pin configuration for sc7280-idp.
Signed-off-by: Rajesh Patil <rajpat@codeaurora.org>
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/1632399378-12229-7-git-send-email-rajpat@codeaurora.org
Roja Rani Yarubandi [Thu, 23 Sep 2021 12:16:15 +0000 (17:46 +0530)]
arm64: dts: qcom: sc7280: Update QUPv3 UART5 DT node
Uart5 is treated as dedicated debug uart.Change the
compatible as "qcom,geni-uart" in SoC DT to make it generic
and later update it as "qcom,geni-debug-uart" in sc7280-idp
Add interconnects and power-domains. Split the pinctrl
functions and correct the gpio pins.
Signed-off-by: Roja Rani Yarubandi <rojay@codeaurora.org>
Signed-off-by: Rajesh Patil <rajpat@codeaurora.org>
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/1632399378-12229-6-git-send-email-rajpat@codeaurora.org
Roja Rani Yarubandi [Thu, 23 Sep 2021 12:16:14 +0000 (17:46 +0530)]
arm64: dts: qcom: sc7280: Add QUPv3 wrapper_0 nodes
Add QUPv3 wrapper_0 DT nodes for SC7280 SoC.
Signed-off-by: Roja Rani Yarubandi <rojay@codeaurora.org>
Signed-off-by: Rajesh Patil <rajpat@codeaurora.org>
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/1632399378-12229-5-git-send-email-rajpat@codeaurora.org
Rajesh Patil [Thu, 23 Sep 2021 12:16:13 +0000 (17:46 +0530)]
arm64: dts: qcom: sc7280: Configure SPI-NOR FLASH for sc7280-idp
Add spi-nor flash node and pinctrl configurations for the SC7280 IDP.
Signed-off-by: Rajesh Patil <rajpat@codeaurora.org>
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/1632399378-12229-4-git-send-email-rajpat@codeaurora.org
Roja Rani Yarubandi [Thu, 23 Sep 2021 12:16:12 +0000 (17:46 +0530)]
arm64: dts: qcom: sc7280: Add QSPI node
Add QSPI DT node and qspi_opp_table for SC7280 SoC.
Move qspi_opp_table to / because SPI nodes assume
any child node is a spi device and so we can't put the
table underneath the spi controller.
Signed-off-by: Roja Rani Yarubandi <rojay@codeaurora.org>
Signed-off-by: Rajesh Patil <rajpat@codeaurora.org>
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/1632399378-12229-3-git-send-email-rajpat@codeaurora.org
Fabio Estevam [Wed, 22 Sep 2021 19:52:08 +0000 (16:52 -0300)]
arm64: dts: qcom: sm6125: Remove leading zeroes
dtc complains about the leading zeroes:
arch/arm64/boot/dts/qcom/sm6125.dtsi:497.19-503.6: Warning (unit_address_format): /soc/timer@
f120000/frame@
0f121000: unit name should not have leading 0s
arch/arm64/boot/dts/qcom/sm6125.dtsi:505.19-510.6: Warning (unit_address_format): /soc/timer@
f120000/frame@
0f123000: unit name should not have leading 0s
arch/arm64/boot/dts/qcom/sm6125.dtsi:512.19-517.6: Warning (unit_address_format): /soc/timer@
f120000/frame@
0f124000: unit name should not have leading 0
Remove them.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Martin Botka <martin.botka@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210922195208.1734936-1-festevam@gmail.com