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Matthias Braun [Fri, 18 Nov 2016 19:43:24 +0000 (19:43 +0000)]
Statistic/Timer: Include timers in PrintStatisticsJSON().
Differential Revision: https://reviews.llvm.org/D25588
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287370
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Matthias Braun [Fri, 18 Nov 2016 19:43:18 +0000 (19:43 +0000)]
Timer: Track name and description.
The previously used "names" are rather descriptions (they use multiple
words and contain spaces), use short programming language identifier
like strings for the "names" which should be used when exporting to
machine parseable formats.
Also removed a unused TimerGroup from Hexxagon.
Differential Revision: https://reviews.llvm.org/D25583
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287369
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Geoff Berry [Fri, 18 Nov 2016 19:37:24 +0000 (19:37 +0000)]
[MIRPrinter] Print raw branch probabilities as expected by MIRParser
Fixes PR28751.
Reviewers: MatzeB, qcolombet
Subscribers: mcrosier, llvm-commits
Differential Revision: https://reviews.llvm.org/D26775
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287368
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Matt Arsenault [Fri, 18 Nov 2016 18:33:36 +0000 (18:33 +0000)]
AMDGPU: Fix unused variable warning
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287362
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Hans Wennborg [Fri, 18 Nov 2016 18:27:31 +0000 (18:27 +0000)]
Fix test from r287353: don't use /dev/null
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287360
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Adam Nemet [Fri, 18 Nov 2016 18:06:28 +0000 (18:06 +0000)]
[LTO] Add option to generate optimization records
It is used to drive this from the clang driver via -mllvm.
Same option name is used as in opt.
Differential Revision: https://reviews.llvm.org/D26832
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287356
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Eugene Zelenko [Fri, 18 Nov 2016 18:00:19 +0000 (18:00 +0000)]
[DebugInfo] Fix some Clang-tidy modernize-use-default, modernize-use-equal-delete and Include What You Use warnings; other minor fixes (NFC).
Per Zachary Turner and Mehdi Amini suggestion to make only post-commit reviews.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287355
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Hans Wennborg [Fri, 18 Nov 2016 17:33:05 +0000 (17:33 +0000)]
IRMover: Avoid accidentally mapping types from the destination module (PR30799)
During Module linking, it's possible for SrcM->getIdentifiedStructTypes();
to return types that are actually defined in the destination module
(DstM). Depending on how the bitcode file was read,
getIdentifiedStructTypes() might do a walk over all values, including
metadata nodes, looking for types. In my case, a debug info metadata
node was shared between the two modules, and it referred to a type
defined in the destination module (see test case).
Differential Revision: https://reviews.llvm.org/D26212
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287353
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Mehdi Amini [Fri, 18 Nov 2016 17:28:10 +0000 (17:28 +0000)]
Add link-time detection of LLVM_ABI_BREAKING_CHECKS mismatch
Summary:
LLVM will define a symbol, either EnableABIBreakingChecks or
DisableABIBreakingChecks depending on the configuration setting for
LLVM_ABI_BREAKING_CHECKS.
The llvm-config.h header will add weak references to these symbols in
every clients that includes this header. This should ensure that
a mismatch triggers a link failure (or a load time failure for DSO).
On MSVC, the pragma "detect_mismatch" is used instead.
Reviewers: rnk, jroelofs
Subscribers: llvm-commits, mgorny
Differential Revision: https://reviews.llvm.org/D26841
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287352
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Ehsan Amiri [Fri, 18 Nov 2016 16:24:27 +0000 (16:24 +0000)]
[PPC] limit line width to 80 characters
NFC. Forgot to fix this in the original commit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287350
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Simon Dardis [Fri, 18 Nov 2016 16:17:44 +0000 (16:17 +0000)]
[mips][msa] Implement f16 support
The MIPS MSA ASE provides instructions to convert to and from half precision
floating point. This patch teaches the MIPS backend to treat f16 as a legal
type and how to promote such values to f32 for the usual set of operations.
As a result of this, the fexup[lr].w intrinsics no longer crash LLVM during
type legalization.
Reviewers: zoran.jovanvoic, vkalintiris
Differential Revision: https://reviews.llvm.org/D26398
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287349
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Simon Pilgrim [Fri, 18 Nov 2016 15:31:36 +0000 (15:31 +0000)]
[X86][AVX512] Split AVX512F/AVX512VL tests to demonstrate missed int2fp opportunities without AVX512VL
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287348
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Tom Stellard [Fri, 18 Nov 2016 14:14:35 +0000 (14:14 +0000)]
GlobalISel: Fix unconditional fallback with global isel abort is disabled
Reviewers: t.p.northover, ab, qcolombet
Subscribers: mehdi_amini, vkalintiris, wdng, dberris, llvm-commits, rovka
Differential Revision: https://reviews.llvm.org/D26765
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287344
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Tom Stellard [Fri, 18 Nov 2016 13:53:34 +0000 (13:53 +0000)]
AMDGPU/SI: Remove zero_extend patterns for i16 ops selected to 32-bit insts
Summary:
The 32-bit instructions don't zero the high 16-bits like the 16-bit
instructions do.
Reviewers: arsenm
Subscribers: kzhuravl, wdng, nhaehnle, yaxunl, llvm-commits, tony-tye
Differential Revision: https://reviews.llvm.org/D26828
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287342
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Florian Hahn [Fri, 18 Nov 2016 13:12:07 +0000 (13:12 +0000)]
[simplifycfg][loop-simplify] Preserve loop metadata in 2 transformations.
insertUniqueBackedgeBlock in lib/Transforms/Utils/LoopSimplify.cpp now
propagates existing llvm.loop metadata to newly the added backedge.
llvm::TryToSimplifyUncondBranchFromEmptyBlock in lib/Transforms/Utils/Local.cpp
now propagates existing llvm.loop metadata to the branch instructions in the
predecessor blocks of the empty block that is removed.
Differential Revision: https://reviews.llvm.org/D26495
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287341
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Simon Pilgrim [Fri, 18 Nov 2016 12:16:18 +0000 (12:16 +0000)]
Cleanup function with clang-format. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287340
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Nicolai Haehnle [Fri, 18 Nov 2016 11:55:52 +0000 (11:55 +0000)]
AMDGPU: Fix legalization of MUBUF instructions in shaders
Summary:
The addr64-based legalization is incorrect for MUBUF instructions with idxen
set as well as for BUFFER_LOAD/STORE_FORMAT_* instructions. This affects
e.g. shaders that access buffer textures.
Since we never actually need the addr64-legalization in shaders, this patch
takes the easy route and keys off the calling convention. If this ever
affects (non-OpenGL) compute, the type of legalization needs to be chosen
based on some TSFlag.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=98664
Reviewers: arsenm, tstellarAMD
Subscribers: kzhuravl, wdng, yaxunl, tony-tye, llvm-commits
Differential Revision: https://reviews.llvm.org/D26747
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287339
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Simon Pilgrim [Fri, 18 Nov 2016 11:53:36 +0000 (11:53 +0000)]
Fix spelling mistakes in MIPS target comments. NFC.
Identified by Pedro Giffuni in PR27636.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287338
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Ehsan Amiri [Fri, 18 Nov 2016 11:05:55 +0000 (11:05 +0000)]
[Power9] Add patterns for vnegd, vnegw
Exploit new instructions by adding patterns to .td file.
https://reviews.llvm.org/D26551
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287334
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Simon Pilgrim [Fri, 18 Nov 2016 11:04:02 +0000 (11:04 +0000)]
Fix spelling mistakes in AMDGPU target comments. NFC.
Identified by Pedro Giffuni in PR27636.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287333
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Simon Pilgrim [Fri, 18 Nov 2016 11:00:36 +0000 (11:00 +0000)]
[X86][AVX2] Add v8i32->v8i64 mul test (PR30845)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287332
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Simon Pilgrim [Fri, 18 Nov 2016 10:52:12 +0000 (10:52 +0000)]
Fix typo in comment. NFC.
Identified by Pedro Giffuni in PR27636.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287331
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Ehsan Amiri [Fri, 18 Nov 2016 10:41:44 +0000 (10:41 +0000)]
[PPC][DAGCombine] Convert SETCC to subtract when the result is zero extended
When we see a SETCC whose only users are zero extend operations, we can replace
it with a subtraction. This results in doing all calculations in GPRs and
avoids CR use.
Currently we do this only for ULT, ULE, UGT and UGE condition codes. There are
ways that this can be extended. For example for signed condition codes. In that
case we will be introducing additional sign extend instructions, so more careful
profitability analysis may be required.
Another direction to extend this is for equal, not equal conditions. Also when
users of SETCC are any_ext or sign_ext, we might be able to do something
similar.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287329
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Amaury Sechet [Fri, 18 Nov 2016 10:11:02 +0000 (10:11 +0000)]
Fix go binding to adapt the new attribute API
https://reviews.llvm.org/D26339
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287328
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Craig Topper [Fri, 18 Nov 2016 06:04:33 +0000 (06:04 +0000)]
[InstCombine][AVX-512] Teach InstCombineCalls how to handle the intrinsics for variable shift with 16-bit elements.
This is a straightforward extension of the existing support for 32/64-bit element types. Just needed to add the additional instrinsics to the switches.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287316
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Craig Topper [Fri, 18 Nov 2016 05:04:44 +0000 (05:04 +0000)]
[AVX-512] Replace masked 16-bit element variable shift intrinsics with new unmasked versions and selects.
The same thing was done to 32-bit and 64-bit element sizes previously.
This will allow us to support these shuffls in InstCombineCalls along with the other variable shift intrinsics.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287312
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Matt Arsenault [Fri, 18 Nov 2016 04:42:59 +0000 (04:42 +0000)]
AMDGPU: Move redundant setting of inst properties
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287311
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Matt Arsenault [Fri, 18 Nov 2016 04:42:57 +0000 (04:42 +0000)]
AMDGPU: Fix crash on illegal type for inlineasm
There are still crashes on non-MVT types in other
places.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287310
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Peter Collingbourne [Fri, 18 Nov 2016 03:20:36 +0000 (03:20 +0000)]
Object: Simplify; remove unnecessary use of unique_ptr.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287305
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Matthias Braun [Fri, 18 Nov 2016 02:40:40 +0000 (02:40 +0000)]
MachineOperand: Add dump() method
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287302
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Alexei Starovoitov [Fri, 18 Nov 2016 02:32:35 +0000 (02:32 +0000)]
convert bpf assembler to look like kernel verifier output
since bpf instruction set was introduced people learned to
read and understand kernel verifier output whereas llvm asm
output stayed obscure and unknown. Convert llvm to emit
assembler text similar to kernel to avoid this discrepancy
Signed-off-by: Alexei Starovoitov <ast@kernel.org>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287300
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Craig Topper [Fri, 18 Nov 2016 02:28:50 +0000 (02:28 +0000)]
[Docs][TableGen] Remove reference to tablegen supporting octal integers. It doesn't and hasn't for at least 9 years.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287299
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Craig Topper [Fri, 18 Nov 2016 02:25:34 +0000 (02:25 +0000)]
[AVX-512] Support FCOPYSIGN for v16f32 and v8f64
Summary:
This extends FCOPYSIGN support to 512-bit vectors.
I've also added tests to show what the 128-bit and 256-bit cases look like with broadcast loads.
Reviewers: delena, zvi, RKSimon, spatel
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D26791
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287298
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Yichao Yu [Fri, 18 Nov 2016 01:25:49 +0000 (01:25 +0000)]
Add an option to disable libedit
Summary: This should provide the function similar to `--disable-libedit` with the autotools build system, which seems to be missing from the commit (r200595) that adds this.
Reviewers: pcc, beanz
Subscribers: mgorny, llvm-commits
Differential Revision: https://reviews.llvm.org/D26550
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287293
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Justin Lebar [Fri, 18 Nov 2016 00:42:00 +0000 (00:42 +0000)]
[CUDA] Update docs to indicate that MacOS is now supported.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287290
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Justin Lebar [Fri, 18 Nov 2016 00:41:40 +0000 (00:41 +0000)]
[CUDA] Update docs; CUDA 8.0 is supported as of a while ago.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287289
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Davide Italiano [Thu, 17 Nov 2016 22:59:13 +0000 (22:59 +0000)]
[lli] Prefer `exit(1)` to `return 1` for consistency.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287277
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Davide Italiano [Thu, 17 Nov 2016 22:58:13 +0000 (22:58 +0000)]
[lli] Factor out error handling. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287276
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Dylan McKay [Thu, 17 Nov 2016 22:26:09 +0000 (22:26 +0000)]
[ReleaseNotes] Mention the completion of the upstreaming of the AVR backend
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287273
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Petr Hosek [Thu, 17 Nov 2016 20:22:49 +0000 (20:22 +0000)]
[CMake] Error when LTO and lld are enabled on Darwin
lld on Darwin does not currently support LTO.
Differential Revision: https://reviews.llvm.org/D26715
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287256
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Simon Pilgrim [Thu, 17 Nov 2016 19:21:20 +0000 (19:21 +0000)]
Fix spelling mistakes in Hexagon target comments. NFC.
Identified by Pedro Giffuni in PR27636.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287248
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Simon Pilgrim [Thu, 17 Nov 2016 19:03:05 +0000 (19:03 +0000)]
Fix spelling mistakes in X86 target comments. NFC.
Identified by Pedro Giffuni in PR27636.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287247
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Eugene Zelenko [Thu, 17 Nov 2016 18:11:21 +0000 (18:11 +0000)]
[CodeView] Fix some Clang-tidy modernize-use-default, modernize-use-override and Include What You Use warnings; other minor fixes (NFC).
Per Zachary Turner and Mehdi Amini suggestion to make only post-commit reviews.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287243
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Kostya Serebryany [Thu, 17 Nov 2016 17:31:54 +0000 (17:31 +0000)]
[libFuzzer] better documentation for -fsanitize-coverage=trace-cmp
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287240
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Anna Zaks [Thu, 17 Nov 2016 16:55:40 +0000 (16:55 +0000)]
[asan] Turn on Mach-O global metadata liveness tracking by default
This patch turns on the metadata liveness tracking since all known issues
have been resolved. The future has been implemented in
https://reviews.llvm.org/D16737 and enables support of dead code stripping
option on Mach-O platforms.
As part of enabling the feature, I also plan on reverting the following
patch to compiler-rt:
http://lists.llvm.org/pipermail/llvm-commits/Week-of-Mon-
20160704/369910.html
Differential Revision: https://reviews.llvm.org/D26772
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287235
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Konstantin Zhuravlyov [Thu, 17 Nov 2016 16:41:49 +0000 (16:41 +0000)]
Revert "AMDGPU: Enable ConstrainCopy DAG mutation"
This reverts commit r287146.
This breaks few conformance tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287233
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Daniil Fukalov [Thu, 17 Nov 2016 16:07:52 +0000 (16:07 +0000)]
[SCEV] limit recursion depth of CompareSCEVComplexity
Summary:
CompareSCEVComplexity goes too deep (50+ on a quite a big unrolled loop) and runs almost infinite time.
Added cache of "equal" SCEV pairs to earlier cutoff of further estimation. Recursion depth limit was also introduced as a parameter.
Reviewers: sanjoy
Subscribers: mzolotukhin, tstellarAMD, llvm-commits
Differential Revision: https://reviews.llvm.org/D26389
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287232
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Simon Pilgrim [Thu, 17 Nov 2016 12:21:45 +0000 (12:21 +0000)]
Wdocumentation fix
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287224
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Simon Pilgrim [Thu, 17 Nov 2016 12:14:49 +0000 (12:14 +0000)]
[X86][SSE] Improve lowering of vXi64 multiply with known zero 32-bit halves
vXi64 multiplication is lowered into 3 calls of vpmuludq with the upper/lower 32-bit halves.
If any of these halves are zero then we can remove individual calls. Although there was isBuildVectorAllZeros code to do this I don't think it ever worked (maybe just for constant folded cases that don't seem to be tested for any longer).
This requires additional X86ISD support for computeKnownBitsForTargetNode, so far I've just added support for X86ISD::VZEXT (VPMOVZX* - helping the AVX2+ cases).
Partial fix for PR30845
Differential Revision: https://reviews.llvm.org/D26590
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287223
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Simon Pilgrim [Thu, 17 Nov 2016 12:03:05 +0000 (12:03 +0000)]
Fix spelling in comment. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287222
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Pavel Labath [Thu, 17 Nov 2016 11:22:23 +0000 (11:22 +0000)]
[cmake] Move LLVM_BUILD_STATIC check to an earlier point
Summary:
The motivation for this is to enable correct detection of dlopen() on Android.
Android does not provide a static version of libdl, so if we add the -static flag
after performing the check, it will succeed even though subsequent link steps
will fail. With this change we correctly detect the absence of libdl in a
LLVM_BUILD_STATIC build on Android.
The link itself still does not succeed because the code does not check the result
of this check properly, but I plan to fix that in a separate change.
Reviewers: beanz
Subscribers: danalbert, mgorny, srhines, tberghammer, llvm-commits
Differential Revision: https://reviews.llvm.org/D26463
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287220
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Pablo Barrio [Thu, 17 Nov 2016 10:56:58 +0000 (10:56 +0000)]
[ARM] Relax restriction on variadic functions for tailcall optimization
Summary:
Variadic functions can be treated in the same way as normal functions
with respect to the number and types of parameters.
Reviewers: grosbach, olista01, t.p.northover, rengolin
Subscribers: javed.absar, aemerson, llvm-commits
Differential Revision: https://reviews.llvm.org/D26748
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287219
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Oren Ben Simhon [Thu, 17 Nov 2016 09:59:40 +0000 (09:59 +0000)]
[X86] RegCall - Handling v64i1 in 32/64 bit target
Register Calling Convention defines a new behavior for v64i1 types.
This type should be saved in GPR.
However for 32 bit machine we need to split the value into 2 GPRs (because each is 32 bit).
Differential Revision: https://reviews.llvm.org/D26181
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287217
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Sanjoy Das [Thu, 17 Nov 2016 07:29:43 +0000 (07:29 +0000)]
Delete dead code and add asserts instead; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287214
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Sanjoy Das [Thu, 17 Nov 2016 07:29:40 +0000 (07:29 +0000)]
[ImplicitNullCheck] Fix an edge case where we were hoisting incorrectly
ImplicitNullCheck keeps track of one instruction that the memory
operation depends on that it also hoists with the memory operation.
When hoisting this dependency, it would sometimes clobber a live-in
value to the basic block we were hoisting the two things out of. Fix
this by explicitly looking for such dependencies.
I also noticed two redundant checks on `MO.isDef()` in IsMIOperandSafe.
They're redundant since register MachineOperands are either Defs or Uses
-- there is no third kind. I'll change the checks to asserts in a later
commit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287213
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Craig Topper [Thu, 17 Nov 2016 05:59:55 +0000 (05:59 +0000)]
[X86] Fix formatting. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287211
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Craig Topper [Thu, 17 Nov 2016 05:37:39 +0000 (05:37 +0000)]
[X86] Add a test case where, due to a bug in selectScalarSSELoad, we fold the same load twice.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287210
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Dean Michael Berris [Thu, 17 Nov 2016 05:15:37 +0000 (05:15 +0000)]
[XRay] Support AArch64 in LLVM
This patch adds XRay support in LLVM for AArch64 targets.
This patch is one of a series:
Clang: https://reviews.llvm.org/D26415
compiler-rt: https://reviews.llvm.org/D26413
Author: rSerge
Reviewers: rengolin, dberris
Subscribers: amehsan, aemerson, llvm-commits, iid_iunknown
Differential Revision: https://reviews.llvm.org/D26412
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287209
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Chris Bieneman [Thu, 17 Nov 2016 04:36:59 +0000 (04:36 +0000)]
[CMake] [Darwin] Add support for debugging tablegen dependencies
This patch adds an option to the build system LLVM_DEPENDENCY_DEBUGGING. Over time I plan to extend this to do more complex verifications, but the initial patch causes compile errors wherever there is missing a dependency on intrinsics_gen.
Because intrinsics_gen is a compile-time dependency not a link-time dependency, everything that relies on the headers generated in intrinsics_gen needs an explicit dependency.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287207
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Chris Bieneman [Thu, 17 Nov 2016 04:36:50 +0000 (04:36 +0000)]
[CMake] NFC. Updating CMake dependency specifications
This patch updates a bunch of places where add_dependencies was being explicitly called to add dependencies on intrinsics_gen to instead use the DEPENDS named parameter. This cleanup is needed for a patch I'm working on to add a dependency debugging mode to the build system.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287206
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Konstantin Zhuravlyov [Thu, 17 Nov 2016 04:33:20 +0000 (04:33 +0000)]
[AMDGPU] Add missing test for rL287203
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287204
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Konstantin Zhuravlyov [Thu, 17 Nov 2016 04:28:37 +0000 (04:28 +0000)]
[AMDGPU] Custom lower f16 = fp_round f64
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287203
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Konstantin Zhuravlyov [Thu, 17 Nov 2016 04:00:46 +0000 (04:00 +0000)]
[AMDGPU] Promote f16/i16 conversions to f32/i32
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287201
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Konstantin Zhuravlyov [Thu, 17 Nov 2016 03:49:01 +0000 (03:49 +0000)]
[AMDGPU] Expand `br_cc` for f16
Differential Revision: https://reviews.llvm.org/D26732
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287199
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Lang Hames [Thu, 17 Nov 2016 02:33:47 +0000 (02:33 +0000)]
[Orc] Clang-format the recent RPC update (r286620 and related).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287195
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Dehao Chen [Thu, 17 Nov 2016 01:17:02 +0000 (01:17 +0000)]
Use profile info to adjust loop unroll threshold.
Summary:
For flat loop, even if it is hot, it is not a good idea to unroll in runtime, thus we set a lower partial unroll threshold.
For hot loop, we set a higher unroll threshold and allows expensive tripcount computation to allow more aggressive unrolling.
Reviewers: davidxl, mzolotukhin
Subscribers: sanjoy, mehdi_amini, llvm-commits
Differential Revision: https://reviews.llvm.org/D26527
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287186
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Justin Lebar [Thu, 17 Nov 2016 01:03:42 +0000 (01:03 +0000)]
[CUDA] Update docs to indicate that clang now supports std::complex in CUDA mode.
The last remaining necessary change was D25403, landed as r287012.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287184
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Lang Hames [Thu, 17 Nov 2016 01:02:52 +0000 (01:02 +0000)]
Remove a stale test case.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287183
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Peter Collingbourne [Thu, 17 Nov 2016 00:42:08 +0000 (00:42 +0000)]
llvm-dis: Remove dead code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287182
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Dylan McKay [Thu, 17 Nov 2016 00:09:38 +0000 (00:09 +0000)]
[AVR] Remove some accidentally-commited code that broke the bots
This is a remnant of an on-chip unit testing tool that has since been
moved out-of-tree.
It was accidentally committed in r287162.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287180
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Peter Collingbourne [Wed, 16 Nov 2016 23:40:26 +0000 (23:40 +0000)]
Introduce GlobalSplit pass.
This pass splits globals into elements using inrange annotations on
getelementptr indices.
Differential Revision: https://reviews.llvm.org/D22295
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287178
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Dylan McKay [Wed, 16 Nov 2016 23:06:14 +0000 (23:06 +0000)]
[AVR] Wrap all methods in the pseudo expansion pass in an anon namespace
The '-fpermissive' compiler flag complains if the template
specializations used in the class are used in a different namespace.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287176
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Dylan McKay [Wed, 16 Nov 2016 22:48:38 +0000 (22:48 +0000)]
[AVR] Fix basic block naming in ctlz and cttz tests
The branch selector would change the names.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287174
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Dylan McKay [Wed, 16 Nov 2016 22:48:30 +0000 (22:48 +0000)]
[AVR] Remove unused method from AVRTargetMachine
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287173
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Dylan McKay [Wed, 16 Nov 2016 22:38:43 +0000 (22:38 +0000)]
[AVR] Add tests for counting leading/trailing zeros
This adds two test files that verify the 'cttz' and 'ctlz' operations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287172
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Sanjay Patel [Wed, 16 Nov 2016 22:34:05 +0000 (22:34 +0000)]
[x86] allow FP-logic ops when one operand is FP and result is FP
We save an inter-register file move this way. If there's any CPU where
the FP logic is slower, we could transform this back to int-logic in
MachineCombiner.
This helps, but doesn't solve, PR6137:
https://llvm.org/bugs/show_bug.cgi?id=6137
The 'andn' test shows that we're missing a pattern match to
recognize the xor with -1 constant as a 'not' op.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287171
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Ahmed Bougacha [Wed, 16 Nov 2016 22:25:05 +0000 (22:25 +0000)]
[AsmParser] Avoid recursing when lexing ';'. NFC.
This should prevent stack overflows in non-optimized builds on
.ll files with lots of consecutive commented-out lines.
Instead of recursing into LexToken(), continue into a 'while (true)'.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287170
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Ahmed Bougacha [Wed, 16 Nov 2016 22:25:03 +0000 (22:25 +0000)]
[CodeGen] Pass references, not pointers, to MMI helpers. NFC.
While there, rename them to follow the coding style.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287169
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Ahmed Bougacha [Wed, 16 Nov 2016 22:24:59 +0000 (22:24 +0000)]
Revert "Get GlobalISel to build on Linux after r286407"
This reverts commit r286962.
We want to avoid depending on SelectionDAG, and AddLandingPadInfo
lives in CodeGen now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287168
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Ahmed Bougacha [Wed, 16 Nov 2016 22:24:56 +0000 (22:24 +0000)]
[CodeGen] Pull MMI helpers from FunctionLoweringInfo to MMI. NFC.
They're not SelectionDAG- or FunctionLoweringInfo-specific. They
are, however, specific to building MMI from IR.
We could make them members, but it's nice having MMI be a "simple" data
structure and this logic kept separate.
This also lets us reuse them from GlobalISel.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287167
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Ahmed Bougacha [Wed, 16 Nov 2016 22:24:53 +0000 (22:24 +0000)]
[CodeGen] Cleanup MachineModuleInfo doxygen comments. NFC.
Remove redundant names and only keep header comments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287166
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Ahmed Bougacha [Wed, 16 Nov 2016 22:24:46 +0000 (22:24 +0000)]
[CodeGen] Sort MMI forward declarations. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287165
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Kevin Enderby [Wed, 16 Nov 2016 22:17:38 +0000 (22:17 +0000)]
General clean up of error handling in llvm-objdump to remove its use of report_fatal_error().
No real functional change with this commit.
The problem with report_fatal_error() is it does not include the tool name
and the file name the for which the error message was generated.
Uses of report_fatal_error() were change to report_error() or error()
to get a better error and to make the code smaller and cleaner.
Also changed things like error(errorToErrorCode(SOrErr.takeError())) to
use report_error() with a file name and the llvm::Error (as well as the
ArchitectureName if available) so the error message is printed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287163
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Dylan McKay [Wed, 16 Nov 2016 21:58:04 +0000 (21:58 +0000)]
[AVR] Add the pseudo instruction expansion pass
Summary:
A lot of the pseudo instructions are required because LLVM assumes that
all integers of the same size as the pointer size are legal. This means
that it will not currently expand 16-bit instructions to their 8-bit
variants because it thinks 16-bit types are legal for the operations.
This also adds all of the CodeGen tests that required the pass to run.
Reviewers: arsenm, kparzysz
Subscribers: wdng, mgorny, modocache, llvm-commits
Differential Revision: https://reviews.llvm.org/D26577
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287162
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Vitaly Buka [Wed, 16 Nov 2016 21:51:39 +0000 (21:51 +0000)]
Fix "isn't a prototype" warning
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287161
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Peter Collingbourne [Wed, 16 Nov 2016 21:48:59 +0000 (21:48 +0000)]
X86: Simplify X86ISD::Wrapper operand checks. NFCI.
We only ever create TargetConstantPool, TargetJumpTable, TargetExternalSymbol,
TargetGlobalAddress, TargetGlobalTLSAddress, MCSymbol and TargetBlockAddress
nodes as operands of X86ISD::Wrapper nodes, so we can remove one check and
invert the other.
Also update the documentation comment for X86ISD::Wrapper.
Differential Revision: https://reviews.llvm.org/D26731
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287160
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Sanjoy Das [Wed, 16 Nov 2016 21:45:22 +0000 (21:45 +0000)]
[ImplicitNullChecks] Do not not handle call MachineInstrs
We don't track callee clobbered registers correctly, so avoid hoisting
across calls.
Note: for this bug to trigger we need a `readonly` call target, since we
already have logic to not hoist across potentially storing instructions
either.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287159
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Peter Collingbourne [Wed, 16 Nov 2016 21:44:45 +0000 (21:44 +0000)]
Bitcode: Introduce initial multi-module reader API.
Implement getLazyBitcodeModule() and parseBitcodeFile() in terms of it.
Differential Revision: https://reviews.llvm.org/D26719
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287156
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Tim Northover [Wed, 16 Nov 2016 20:54:28 +0000 (20:54 +0000)]
ARM: fix CodeGen for 64-bit shifts.
One half of the shifts obviously needed conditional selection based on whether
the shift amount is more than 32-bits, but leaving the other half as the
natural shift isn't acceptable either: it's undefined behaviour to shift a
32-bit value by more than 31.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287149
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Rong Xu [Wed, 16 Nov 2016 20:50:06 +0000 (20:50 +0000)]
Make block placement deterministic
We fail to produce bit-to-bit matching stage2 and stage3 compiler in PGO
bootstrap build. The reason is because LoopBlockSet is of SmallPtrSet type
whose iterating order depends on the pointer value.
This patch fixes this issue by changing to use SmallSetVector.
Differential Revision: http://reviews.llvm.org/D26634
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287148
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Sanjay Patel [Wed, 16 Nov 2016 20:40:02 +0000 (20:40 +0000)]
[InstCombine] replace unreachable with assert and remove unreachable code; NFCI
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287147
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Matt Arsenault [Wed, 16 Nov 2016 20:35:23 +0000 (20:35 +0000)]
AMDGPU: Enable ConstrainCopy DAG mutation
This fixes a probably unintended divergence from the default
scheduler behavior.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287146
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Sanjay Patel [Wed, 16 Nov 2016 20:18:34 +0000 (20:18 +0000)]
[InstCombine] fix formatting and add FIXMEs to foldOperationIntoSelectOperand(); NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287145
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Geoff Berry [Wed, 16 Nov 2016 19:35:19 +0000 (19:35 +0000)]
[AArch64] Handle vector types in replaceZeroVectorStore.
Summary:
Extend replaceZeroVectorStore to handle more vector type stores,
floating point zero vectors and set alignment more accurately on split
stores.
This is a follow-up change to r286875.
This change fixes PR31038.
Reviewers: MatzeB
Subscribers: mcrosier, aemerson, llvm-commits, rengolin
Differential Revision: https://reviews.llvm.org/D26682
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287142
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Mandeep Singh Grang [Wed, 16 Nov 2016 18:53:17 +0000 (18:53 +0000)]
[LoopVectorize] Fix for non-determinism in codegen
Summary: This patch fixes issues in codegen uncovered due to https://reviews.llvm.org/D26718
Reviewers: mssimpso
Subscribers: llvm-commits, mzolotukhin
Differential Revision: https://reviews.llvm.org/D26727
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287135
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Tom Stellard [Wed, 16 Nov 2016 18:42:17 +0000 (18:42 +0000)]
AMDGPU/SI: Avoid creating unnecessary copies in the SIFixSGPRCopies pass
Summary:
1. Don't try to copy values to and from the same register class.
2. Replace copies with of registers with immediate values with v_mov/s_mov
instructions.
The main purpose of this change is to make MachineSink do a better job of
determining when it is beneficial to split a critical edge, since the pass
assumes that copies will become move instructions.
This prevents a regression in uniform-cfg.ll if we enable critical edge
splitting for AMDGPU.
Reviewers: arsenm
Subscribers: arsenm, kzhuravl, llvm-commits
Differential Revision: https://reviews.llvm.org/D23408
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287131
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Eugene Zelenko [Wed, 16 Nov 2016 18:32:58 +0000 (18:32 +0000)]
[ExecutionEngine] Fix examples build broken in r287126 and other Include What You Use warnings.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287130
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Sanjay Patel [Wed, 16 Nov 2016 18:09:44 +0000 (18:09 +0000)]
fix comment formatting; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287127
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Eugene Zelenko [Wed, 16 Nov 2016 18:07:33 +0000 (18:07 +0000)]
[ExecutionEngine] Fix some Clang-tidy modernize-use-default, modernize-use-equals-delete and Include What You Use warnings; other minor fixes.
Differential revision: https://reviews.llvm.org/D26729
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287126
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Sanjay Patel [Wed, 16 Nov 2016 17:42:40 +0000 (17:42 +0000)]
[x86] add fake scalar FP logic instructions to ReplaceableInstrs to save some bytes
We can replace "scalar" FP-bitwise-logic with other forms of bitwise-logic instructions.
Scalar SSE/AVX FP-logic instructions only exist in your imagination and/or the bowels of
compilers, but logically equivalent int, float, and double variants of bitwise-logic
instructions are reality in x86, and the float variant may be a shorter instruction
depending on which flavor (SSE or AVX) of vector ISA you have...so just prefer float all
the time.
This is a preliminary step towards solving PR6137:
https://llvm.org/bugs/show_bug.cgi?id=6137
Differential Revision:
https://reviews.llvm.org/D26712
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287122
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