OSDN Git Service
Lang Hames [Tue, 26 Jun 2018 21:35:48 +0000 (21:35 +0000)]
[ORC] Add LLJIT and LLLazyJIT, and replace OrcLazyJIT in LLI with LLLazyJIT.
LLJIT is a prefabricated ORC based JIT class that is meant to be the go-to
replacement for MCJIT. Unlike OrcMCJITReplacement (which will continue to be
supported) it is not API or bug-for-bug compatible, but targets the same
use cases: Simple, non-lazy compilation and execution of LLVM IR.
LLLazyJIT extends LLJIT with support for function-at-a-time lazy compilation,
similar to what was provided by LLVM's original (now long deprecated) JIT APIs.
This commit also contains some simple utility classes (CtorDtorRunner2,
LocalCXXRuntimeOverrides2, JITTargetMachineBuilder) to support LLJIT and
LLLazyJIT.
Both of these classes are works in progress. Feedback from JIT clients is very
welcome!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335670
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Konstantin Zhuravlyov [Tue, 26 Jun 2018 21:33:38 +0000 (21:33 +0000)]
AMDGPU: Silence unused warnings in waitcnt insertion pass in release build
Differential Revision: https://reviews.llvm.org/D48607
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335669
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Jessica Paquette [Tue, 26 Jun 2018 21:30:34 +0000 (21:30 +0000)]
[X86][AsmParser] Recommit r335658
Recommit of r335658 so that it does not change the behaviour of any
existing error output.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335668
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Vedant Kumar [Tue, 26 Jun 2018 21:16:59 +0000 (21:16 +0000)]
Rename skipDebugInfo -> skipDebugIntrinsics, NFC
This addresses post-commit feedback about the name 'skipDebugInfo' being
misleading. This name could be interpreted as meaning 'a function that
skips instructions with debug locations'.
The new name, 'skipDebugIntrinsics', makes it clear that this function
only skips debug info intrinsics.
Thanks to Adrian Prantl for pointing this out!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335667
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Lang Hames [Tue, 26 Jun 2018 20:59:51 +0000 (20:59 +0000)]
[ORC] Allow IRTransformLayer2's transform to be modified after initialization.
Also give the constructor's transform parameter a default no-op transform value.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335665
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Lang Hames [Tue, 26 Jun 2018 20:59:50 +0000 (20:59 +0000)]
[ORC] Reset AsynchronousSymbolQuery's NotifySymbolsResolved callback on error.
AsynchronousSymbolQuery::canStillFail checks the value of the callback to
prevent sending it redundant error notifications, so we need to reset it after
running it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335664
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Lang Hames [Tue, 26 Jun 2018 20:59:49 +0000 (20:59 +0000)]
[ORC] Move the VSOList typedef out of VSO.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335663
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Lang Hames [Tue, 26 Jun 2018 20:59:49 +0000 (20:59 +0000)]
[ORC] Add a FIXME.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335662
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Lang Hames [Tue, 26 Jun 2018 20:59:46 +0000 (20:59 +0000)]
[ORC] Fix a FIXME by moving MangleAndInterner to Core.h.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335661
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Jessica Paquette [Tue, 26 Jun 2018 20:57:19 +0000 (20:57 +0000)]
Revert "[X86][AsmParser] Emit an error when RIP-relative instructions are used in 32-bit mode"
This reverts commit
4850a9aae8b38c7deadc103d634ec7397e6c323b.
It caused MC/X86/x86_errors.s to fail. Will fix and recommit shortly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335660
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Jessica Paquette [Tue, 26 Jun 2018 20:33:46 +0000 (20:33 +0000)]
[X86][AsmParser] Emit an error when RIP-relative instructions are used in 32-bit mode
Right now, when we use RIP-relative instructions in 32-bit mode, we'll just
assert and crash.
This adds an error message which tells the user that they can't do that in
32-bit mode, so that we don't crash (and also can see the issue outside of
assert builds).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335658
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Stanislav Mekhanoshin [Tue, 26 Jun 2018 20:04:19 +0000 (20:04 +0000)]
[AMDGPU] Add llvm.amdgcn.fmad.ftz intrinsic
This intrinsic selects v_mad_f32 regardless of fp32 denorm support.
Differential Revision: https://reviews.llvm.org/D48573
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335654
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Sanjay Patel [Tue, 26 Jun 2018 19:46:56 +0000 (19:46 +0000)]
[DAGCombiner] use isBitwiseNot to simplify code; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335652
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Matt Arsenault [Tue, 26 Jun 2018 19:10:00 +0000 (19:10 +0000)]
AMDGPU: Add pass to lower kernel arguments to loads
This replaces most argument uses with loads, but for
now not all.
The code in SelectionDAG for calling convention lowering
is actively harmful for amdgpu_kernel. It attempts to
split the argument types into register legal types, which
results in low quality code for arbitary types. Since
all kernel arguments are passed in memory, we just want the
raw types.
I've tried a couple of methods of mitigating this in SelectionDAG,
but it's easier to just bypass this problem alltogether. It's
possible to hack around the problem in the initial lowering,
but the real problem is the DAG then expects to be able to use
CopyToReg/CopyFromReg for uses of the arguments outside the block.
Exposing the argument loads in the IR also has the advantage
that the LoadStoreVectorizer can merge them.
I'm not sure the best approach to dealing with the IR
argument list is. The patch as-is just leaves the IR arguments
in place, so all the existing code will still compute the same
kernarg size and pointlessly lowers the arguments.
Arguably the frontend should emit kernels with an empty argument
list in the first place. Alternatively a dummy array could be
inserted as a single argument just to reserve space.
This does have some disadvantages. Local pointer kernel arguments can
no longer have AssertZext placed on them as the equivalent !range
metadata is not valid on pointer typed loads. This is mostly bad
for SI which needs to know about the known bits in order to use the
DS instruction offset, so in this case this is not done.
More importantly, this skips noalias arguments since this pass
does not yet convert this to the equivalent !alias.scope and !noalias
metadata. Producing this metadata correctly seems to be tricky,
although this logically is the same as inlining into a function which
doesn't exist. Additionally, exposing these loads to the vectorizer
may result in degraded aliasing information if a pointer load is
merged with another argument load.
I'm also not entirely sure this is preserving the current clover
ABI, although I would greatly prefer if it would stop widening
arguments and match the HSA ABI. As-is I think it is extending
< 4-byte arguments to 4-bytes but doesn't align them to 4-bytes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335650
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Matt Arsenault [Tue, 26 Jun 2018 18:55:43 +0000 (18:55 +0000)]
ConstantFold: Don't fold global address vs. null for addrspace != 0
Not sure why this logic seems to be repeated in 2 different places,
one called by the other.
On AMDGPU addrspace(3) globals start allocating at 0, so these
checks will be incorrect (not that real code actually tries
to compare these addresses)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335649
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Vedant Kumar [Tue, 26 Jun 2018 18:55:26 +0000 (18:55 +0000)]
Use a variable to appease a no-asserts bot, NFC
Failure URL:
http://lab.llvm.org:8011/builders/lld-x86_64-darwin13/builds/22836
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335648
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Vedant Kumar [Tue, 26 Jun 2018 18:54:10 +0000 (18:54 +0000)]
[Debugify] Don't treat missing dbg.values as an error (PR37942)
When checking the debug info in a module, don't treat a missing
dbg.value as an error. The dbg.value may simply have been DCE'd, in
which case the debugger has enough information to display the variable
as <optimized out>.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335647
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Tim Shen [Tue, 26 Jun 2018 18:54:10 +0000 (18:54 +0000)]
[ConstantRange] Add support of mul in makeGuaranteedNoWrapRegion.
Summary: This is trying to add support for r334428.
Reviewers: sanjoy
Subscribers: jlebar, hiraditya, bixia, llvm-commits
Differential Revision: https://reviews.llvm.org/D48399
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335646
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Matt Arsenault [Tue, 26 Jun 2018 18:51:17 +0000 (18:51 +0000)]
LoopUnroll: Allow analyzing intrinsic call costs
I'm not sure why the code here is skipping calls since
TTI does try to do something for general calls, but it
at least should allow intrinsics.
Skip intrinsics that should not be omitted as calls, which
is by far the most common case on AMDGPU.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335645
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Vedant Kumar [Tue, 26 Jun 2018 18:44:53 +0000 (18:44 +0000)]
[Local] Add a convenient insertReplacementDbgValues overload, NFC
Add an overload for the common case where the replacement dbg.values
have the same DIExpressions as the originals.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335643
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Vedant Kumar [Tue, 26 Jun 2018 18:44:52 +0000 (18:44 +0000)]
[Local] Sink salvageDI's early exit into helper functions, NFC
salvageDebugInfo() performs a check that allows it to exit early without
doing a DenseMap lookup. It's a bit neater and marginally more useful to
sink this early exit into the findDbg{Addr,Users,Values} helpers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335642
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Brendon Cahoon [Tue, 26 Jun 2018 18:44:05 +0000 (18:44 +0000)]
[Hexagon] Add a "generic" cpu
Add the generic processor for Hexagon so that it can be used
with 3rd party programs that create a back-end with the
"generic" CPU. This patch also enables the JIT for Hexagon.
Differential Revision: https://reviews.llvm.org/D48571
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335641
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Simon Pilgrim [Tue, 26 Jun 2018 17:46:51 +0000 (17:46 +0000)]
[DAGCombiner] Don't accept -1 sdiv divisors in sdiv-by-pow2 vector expansion (PR37119)
Temporary fix until I've managed to get D45806 updated - both +1 and -1 special cases need to be properly supported.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335637
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Fangrui Song [Tue, 26 Jun 2018 17:44:23 +0000 (17:44 +0000)]
Move `REQUIRES:` line to the top
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335635
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Sanjay Patel [Tue, 26 Jun 2018 17:31:38 +0000 (17:31 +0000)]
[InstSimplify] fold shifts by sext bool
https://rise4fun.com/Alive/c3Y
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335633
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Sanjay Patel [Tue, 26 Jun 2018 17:15:07 +0000 (17:15 +0000)]
[InstSimplify] add tests for shifts by sext bool; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335631
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Simon Pilgrim [Tue, 26 Jun 2018 17:06:05 +0000 (17:06 +0000)]
[X86][SSE] Add another sdiv by (nonuniform) minus one test (PR37119)
Include a test that divides by -1 but not by 1 (another special case)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335629
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Sanjay Patel [Tue, 26 Jun 2018 16:39:29 +0000 (16:39 +0000)]
[InstCombine] simplify code for urem fold; NFCI
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335623
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Sanjay Patel [Tue, 26 Jun 2018 16:30:00 +0000 (16:30 +0000)]
[InstCombine] fold urem with sext bool divisor
Similar to other patches in this series:
https://reviews.llvm.org/rL335512
https://reviews.llvm.org/rL335527
https://reviews.llvm.org/rL335597
https://reviews.llvm.org/rL335616
...this is filling a gap in analysis that is exposed by an unrelated select-of-constants transform.
I didn't see a way to unify the sext cases because each div/rem opcode results in a different fold.
Note that in this case, the backend might want to convert the select into math:
Name: sext urem
%e = sext i1 %x to i32
%r = urem i32 %y, %e
=>
%c = icmp eq i32 %y, -1
%z = zext i1 %c to i32
%r = add i32 %z, %y
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335622
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Simon Pilgrim [Tue, 26 Jun 2018 16:20:16 +0000 (16:20 +0000)]
[SLPVectorizer] Recognise non uniform power of 2 constants
Since D46637 we are better at handling uniform/non-uniform constant Pow2 detection; this patch tweaks the SLP argument handling to support them.
As SLP works with arrays of values I don't think we can easily use the pattern match helpers here.
Differential Revision: https://reviews.llvm.org/D48214
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335621
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Sanjay Patel [Tue, 26 Jun 2018 16:01:24 +0000 (16:01 +0000)]
[InstCombine] add tests for urem with sext bool divisor; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335619
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Simon Pilgrim [Tue, 26 Jun 2018 15:39:16 +0000 (15:39 +0000)]
[DAGCombiner] Pull out VT bitwidth in visitSDIV. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335617
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Sanjay Patel [Tue, 26 Jun 2018 15:32:54 +0000 (15:32 +0000)]
[InstSimplify] fold srem with sext bool divisor
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335616
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James Henderson [Tue, 26 Jun 2018 15:29:09 +0000 (15:29 +0000)]
Fix doc title underlining.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335615
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James Henderson [Tue, 26 Jun 2018 15:15:45 +0000 (15:15 +0000)]
[FileCheck] Add CHECK-EMPTY directive for checking for blank lines
Prior to this change, there was no clean way of getting FileCheck to
check that a line is completely empty. The expected way of using
"CHECK: {{^$}}" does not work because the '^' matches the end of the
previous match (this behaviour may be desirable in certain instances).
For the same reason, "CHECK-NEXT: {{^$}}" will fail when the previous
match was at the end of the line, as the pattern will match there.
Using the recommended [[:space:]] to match an explicit new line could
also match a space, and thus is not always desired. Literal '\n'
matches also do not work. A workaround was suggested in the review, but
it is a little clunky.
This change adds a new directive that behaves the same as CHECK-NEXT,
except that it only matches against empty lines (nothing, not even
whitespace, is allowed). As with CHECK-NEXT, it will fail if more than
one newline occurs before the next blank line. Example usage:
; test.txt
foo
bar
; CHECK: foo
; CHECK-EMPTY:
; CHECK-NEXT: bar
Differential Revision: https://reviews.llvm.org/D28896
Reviewed by: probinson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335613
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Krzysztof Parzyszek [Tue, 26 Jun 2018 14:55:04 +0000 (14:55 +0000)]
Silence "unused variable" warning in LiveIntervals.cpp after r335607
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335610
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Sanjay Patel [Tue, 26 Jun 2018 14:47:31 +0000 (14:47 +0000)]
[InstSimplify] add tests for srem with sext bool divisor; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335609
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Nico Weber [Tue, 26 Jun 2018 14:42:48 +0000 (14:42 +0000)]
Fix LLVM_ENABLE_THREADS=0 builds after r335440.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335608
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Krzysztof Parzyszek [Tue, 26 Jun 2018 14:37:16 +0000 (14:37 +0000)]
Account for undef values from predecessors in extendSegmentsToUses
It is legal for a PHI node not to have a live value in a predecessor
as long as the end of the predecessor is jointly dominated by an undef
value.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335607
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Simon Pilgrim [Tue, 26 Jun 2018 14:15:31 +0000 (14:15 +0000)]
[TargetLowering] isVectorClearMaskLegal - use ArrayRef<int> instead of const SmallVectorImpl<int>&
This is more generic and matches isShuffleMaskLegal.
Differential Revision: https://reviews.llvm.org/D48591
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335605
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Than McIntosh [Tue, 26 Jun 2018 14:11:30 +0000 (14:11 +0000)]
[X86,ARM] Retain split-stack prolog check for sibling calls
Summary:
If a routine with no stack frame makes a sibling call, we need to
preserve the stack space check even if the local stack frame is empty,
since the call target could be a "no-split" function (in which case
the linker needs to be able to fix up the prolog sequence in order to
switch to a larger stack).
This fixes PR37807.
Reviewers: cherry, javed.absar
Subscribers: srhines, llvm-commits
Differential Revision: https://reviews.llvm.org/D48444
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335604
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Simon Pilgrim [Tue, 26 Jun 2018 14:06:23 +0000 (14:06 +0000)]
Fix spelling mistakes in comments. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335603
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Teresa Johnson [Tue, 26 Jun 2018 13:56:49 +0000 (13:56 +0000)]
[ThinLTO] Parse module summary index from assembly
Summary:
Adds assembly parsing support for the module summary index (follow on
to r333335 which added the assembly writing support).
I added support to llvm-as to invoke the index parsing, so that it can
create either a bitcode file with a Module and a per-module index, or
a combined index without a Module.
I will send follow on patches soon to do the following:
- add support to tools such as llvm-lto2 to parse the per-module indexes
from assembly instead of bitcode when testing the thin link.
- verification support.
Depends on D47844 and D47842.
Reviewers: pcc, dexonsmith, mehdi_amini
Subscribers: inglorion, eraman, steven_wu, llvm-commits
Differential Revision: https://reviews.llvm.org/D47905
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335602
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Sanjay Patel [Tue, 26 Jun 2018 12:41:15 +0000 (12:41 +0000)]
[InstCombine] fold udiv with sext bool divisor
Note: I didn't add a hasOneUse() check because the existing,
related fold doesn't have that check. I suspect that the
improved analysis and codegen make these some of the rare
canonicalization cases where we allow an increase in
instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335597
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Tim Northover [Tue, 26 Jun 2018 12:28:47 +0000 (12:28 +0000)]
ARM: add binary file git swallowed.
Should fix bots.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335596
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Tim Northover [Tue, 26 Jun 2018 11:39:20 +0000 (11:39 +0000)]
ARM: correctly decode VFP instructions following unpredictable t2IT
When the condition code for an IT instruction is "AL" we get strange "15"
predicates on subsequent instructions. These are dealt with for most
instructions by treating them as "ARMCC::AL", but VFP takes a different path
which didn't have this code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335594
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Tim Northover [Tue, 26 Jun 2018 11:38:41 +0000 (11:38 +0000)]
ARM: diagnose unpredictable IT instructions
IT instructions are allowed to have the 'AL' predicate, but it must never
result in an 'NV' predicated instruction. Essentially this means that all
branches must be 't' rather than 'e' if the predicate is 'AL'.
This patch adds a diagnostic for this during assembly (error because parsing
hits an assertion if allowed to continue) and an annotation during disassembly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335593
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Andrea Di Biagio [Tue, 26 Jun 2018 11:00:21 +0000 (11:00 +0000)]
[llvm-mca] Removed wrong NDEBUG guards introduced by my last commit.
This partially reverts r335589.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335592
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Clement Courbet [Tue, 26 Jun 2018 10:52:41 +0000 (10:52 +0000)]
[llvm-exegesis][NFC] Fix windows warning in rL335465.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335591
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Simon Pilgrim [Tue, 26 Jun 2018 10:45:41 +0000 (10:45 +0000)]
[X86] Just use ArrayRef instead of SmallVectorImpl in a few static method arguments. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335590
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Andrea Di Biagio [Tue, 26 Jun 2018 10:44:12 +0000 (10:44 +0000)]
[llvm-mca] Remove unused header files and correctly guard some include headers under NDEBUG. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335589
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Florian Hahn [Tue, 26 Jun 2018 10:15:02 +0000 (10:15 +0000)]
[IPSCCP] Change dead blocks to unreachable after visiting all executable blocks.
changeToUnreachable may remove PHI nodes from executable blocks we found values
for and we would fail to replace them. By changing dead blocks to unreachable after
we replaced constants in all executable blocks, we ensure such PHI nodes are replaced
by their known value before.
Fixes PR37780.
Reviewers: efriedma, davide
Reviewed By: efriedma
Differential Revision: https://reviews.llvm.org/D48421
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335588
91177308-0d34-0410-b5e6-
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Simon Pilgrim [Tue, 26 Jun 2018 10:02:12 +0000 (10:02 +0000)]
Fix MSVC "signed/unsigned mismatch" warning. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335587
91177308-0d34-0410-b5e6-
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Bernard Ogden [Tue, 26 Jun 2018 09:49:31 +0000 (09:49 +0000)]
[AArch64] Tighten up directives tests
Move expected-fail cases from directive-cpu.s to
directive-cpu-err.s. This allows us to remove the 'not' from the
llvm-mc invocation in directive-cpu.s so that this test will fail
in unexpected error cases. It also means that we are not relying
on all stderr coming before any stdout, which seems fragile.
Also make use of CHECK-NEXT to ensure that multiline error messages
really are occuring together.
And add a test to verify that .cpu with an arch version as extension
is rejected.
Differential Revision: https://reviews.llvm.org/D47873
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335586
91177308-0d34-0410-b5e6-
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Bernard Ogden [Tue, 26 Jun 2018 09:36:13 +0000 (09:36 +0000)]
[AArch64] Clean up LSE directive tests
These were specifying an architecture version with .cpu directive,
which is invalid. As the error for this case outputs the problem
instruction we were still matching the expectations of FileCheck.
This patch fixes up the LSE tests to do what they seem to intend. A
follow-up patch will tighten up the directive tests.
Differential Revision: https://reviews.llvm.org/D47872
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335585
91177308-0d34-0410-b5e6-
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Simon Pilgrim [Tue, 26 Jun 2018 09:31:18 +0000 (09:31 +0000)]
Fix MSVC "not all control paths return a value" warnings. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335584
91177308-0d34-0410-b5e6-
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Clement Courbet [Tue, 26 Jun 2018 08:49:30 +0000 (08:49 +0000)]
[llvm-exegesis] Get the BenchmarkRunner from the ExegesisTarget.
Summary:
This allows targets to override code generation for some instructions.
As an example of override, this also moves ad-hoc instruction filtering
for X86 into the X86 ExegesisTarget.
Reviewers: gchatelet
Subscribers: mgorny, tschuett, llvm-commits
Differential Revision: https://reviews.llvm.org/D48587
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335582
91177308-0d34-0410-b5e6-
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Andrei Elovikov [Tue, 26 Jun 2018 07:05:08 +0000 (07:05 +0000)]
[NFC] Prefer (void) to LLVM_ATTRIBUTE_UNUSED for unused var in GlobalISElemitter.cpp.
Reviewers: dsanders, craig.topper
Reviewed By: dsanders
Subscribers: rovka, kristof.beyls, llvm-commits
Differential Revision: https://reviews.llvm.org/D48534
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335581
91177308-0d34-0410-b5e6-
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Bjorn Pettersson [Tue, 26 Jun 2018 06:17:00 +0000 (06:17 +0000)]
Improve ConvertDebugDeclareToDebugValue
Summary:
This is a follow-up to r334830 and r335031.
In the valueCoversEntireFragment check we now also handle
the situation when there is a variable length array (VLA)
involved, and the length of the array has been reduced to
a constant.
The ConvertDebugDeclareToDebugValue functions that are related
to PHI nodes and load instructions now avoid inserting dbg.value
intrinsics when the value does not, for certain, cover the
variable/fragment that should be described.
In r334830 we assumed that the value always covered the entire
var/fragment and we had assertions in the code to show that
assumption. However, those asserts failed when compiling code
with VLAs, so we removed the asserts in r335031. Now when we
know that the valueCoversEntireFragment check can fail also for
PHI/Load instructions we avoid to insert the faulty dbg.value
intrinsic in such situations. Compared to the Store instruction
scenario we simply drop the dbg.value here (as the variable does
not change its value due to PHI/Load, so an earlier dbg.value
describing the variable should still be valid).
Reviewers: aprantl, vsk, efriedma
Reviewed By: aprantl
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D48547
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335580
91177308-0d34-0410-b5e6-
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Gil Rapaport [Tue, 26 Jun 2018 05:31:18 +0000 (05:31 +0000)]
[InstCombine] (A + 1) + (B ^ -1) --> A - B
Turn canonicalized subtraction back into (-1 - B) and combine it with (A + 1) into (A - B).
This is similar to the folding already done for (B ^ -1) + Const into (-1 + Const) - B.
Differential Revision: https://reviews.llvm.org/D48535
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335579
91177308-0d34-0410-b5e6-
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Craig Topper [Tue, 26 Jun 2018 04:53:42 +0000 (04:53 +0000)]
[X86] Don't use getScalarShiftAmountTy to get the immediate type for target specific VSHLDQ/VSRLDQ nodes.
These opcodes have a fixed type of i8 for their immediate and shouldn't have anything to do with the scalar shift amount used by target independent shift nodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335578
91177308-0d34-0410-b5e6-
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Dan Gohman [Tue, 26 Jun 2018 03:18:38 +0000 (03:18 +0000)]
[WebAssembly] Fix lowering of varargs functions with non-legal fixed arguments.
CallLoweringInfo's NumFixedArgs field gives the number of fixed arguments
before legalization. The ISD::OutputArg "Outs" array holds legalized
arguments, so when indexing into it to find the non-fixed arguemn, we need
to use the number of arguments after legalization.
Fixes PR37934.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335576
91177308-0d34-0410-b5e6-
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Craig Topper [Tue, 26 Jun 2018 03:11:15 +0000 (03:11 +0000)]
[X86] Use XOR for SUB (C, X) during isel if will help fold an immediate
Summary:
Same idea as D48529, but restricted to X86 and done very late to avoid any surprises where subtract might be better for DAG combining.
This seems like the safest way to do this trick. And we consider doing it as a DAG combine later.
Reviewers: spatel, RKSimon
Reviewed By: spatel
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D48557
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335575
91177308-0d34-0410-b5e6-
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Dan Gohman [Tue, 26 Jun 2018 03:03:41 +0000 (03:03 +0000)]
[WebAssembly] Fix a typo in a comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335574
91177308-0d34-0410-b5e6-
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Teresa Johnson [Tue, 26 Jun 2018 02:29:08 +0000 (02:29 +0000)]
[ThinLTO] Add string saver onto index for value names
Summary:
Adds a string saver to the ModuleSummaryIndex so it can store value
names in the case of adding a ValueInfo for a GUID when we don't
have the name stored in a Module string table. This is motivated
by the upcoming summary parser patch, where we will read value names
from the summary entry and want to store them, even when a Module
is not available.
Currently this allows us to store the name in the legacy bitcode case,
and I have added a test to show that.
Reviewers: pcc, dexonsmith
Subscribers: mehdi_amini, inglorion, eraman, steven_wu, llvm-commits
Differential Revision: https://reviews.llvm.org/D47842
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335570
91177308-0d34-0410-b5e6-
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Craig Topper [Tue, 26 Jun 2018 01:37:02 +0000 (01:37 +0000)]
[X86] Redefine avx512 packed fpclass intrinsics to return a vXi1 mask and implement the mask input argument using an 'and' IR instruction.
This recommits r335562 and 335563 as a single commit.
The frontend will surround the intrinsic with the appropriate marshalling to/from a scalar type to match the sigature of the builtin that software expects.
By exposing the vXi1 type directly in the llvm intrinsic we make it available to optimizers much earlier. This can enable the scalar marshalling code to be optimized away.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335568
91177308-0d34-0410-b5e6-
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Teresa Johnson [Tue, 26 Jun 2018 01:32:58 +0000 (01:32 +0000)]
[ThinLTO] Add per-module indexes to combined index consistently
Summary:
Without this change we only add module paths to the combined index when
there is a module hash or at least one global value. Make this more
consistent by adding the module to the index whenever there is a summary
section, and it is a per-module summary (had a MODULE_CODE_SOURCE_FILENAME
record).
Since we will no longer add module paths lazily, add a new interface to get
the module info from the index that asserts it is already added.
Fixes PR37899.
Reviewers: Vlad, pcc
Subscribers: mehdi_amini, inglorion, steven_wu, llvm-commits
Differential Revision: https://reviews.llvm.org/D48511
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335567
91177308-0d34-0410-b5e6-
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Craig Topper [Tue, 26 Jun 2018 01:31:53 +0000 (01:31 +0000)]
Revert r335562 and 335563 "[X86] Redefine avx512 packed fpclass intrinsics to return a vXi1 mask and implement the mask input argument using an 'and' IR instruction."
These were supposed to have been squashed to a single commit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335566
91177308-0d34-0410-b5e6-
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Lang Hames [Tue, 26 Jun 2018 01:22:29 +0000 (01:22 +0000)]
[ORC] Add a symbolAliases function to the Core APIs.
symbolAliases can be used to define symbol aliases within a VSO.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335565
91177308-0d34-0410-b5e6-
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Craig Topper [Tue, 26 Jun 2018 00:43:46 +0000 (00:43 +0000)]
[X86] Redefine avx512 packed fpclass intrinsics to return a vXi1 mask and implement the mask input argument using an 'and' IR instruction.
The frontend will surround the intrinsic with the appropriate marshalling to/from a scalar type to match the sigature of the builtin that software expects.
By exposing the vXi1 type directly in the llvm intrinsic we make it available to optimizers much earlier. This can enable the scalar marshalling code to be optimized away.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335563
91177308-0d34-0410-b5e6-
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Craig Topper [Tue, 26 Jun 2018 00:43:34 +0000 (00:43 +0000)]
foo
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335562
91177308-0d34-0410-b5e6-
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Fangrui Song [Tue, 26 Jun 2018 00:41:49 +0000 (00:41 +0000)]
[gdb] Escape unprintable bytes in SmallString and StringRef
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335561
91177308-0d34-0410-b5e6-
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Teresa Johnson [Tue, 26 Jun 2018 00:20:49 +0000 (00:20 +0000)]
[ThinLTO] Compute GUID directly from GV when building per-module index
Summary:
I discovered when writing the summary parsing support that the
per-module index builder and writer are computing the GUID from the
value name alone (ignoring the linkage type). This was ok since those
GUID were not emitted in the bitcode, and there are never multiple
conflicting names in a single module.
However, I don't see a reason for making the GUID computation different
for the per-module case. It also makes things simpler on the parsing
side to have the GUID computation consistent. So this patch changes the
summary analysis phase and the per-module summary writer to compute the
GUID using the facility on the GlobalValue.
Reviewers: pcc, dexonsmith
Subscribers: llvm-commits, inglorion
Differential Revision: https://reviews.llvm.org/D47844
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335560
91177308-0d34-0410-b5e6-
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Eric Christopher [Mon, 25 Jun 2018 23:53:54 +0000 (23:53 +0000)]
Add a warning if someone attempts to add extra section flags to sections
with well defined semantics like .rodata.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335558
91177308-0d34-0410-b5e6-
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Tim Shen [Mon, 25 Jun 2018 23:49:20 +0000 (23:49 +0000)]
[APInt] Add helpers for rounding u/sdivs.
Reviewers: sanjoy, craig.topper
Subscribers: jlebar, hiraditya, bixia, llvm-commits
Differential Revision: https://reviews.llvm.org/D48498
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335557
91177308-0d34-0410-b5e6-
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Fangrui Song [Mon, 25 Jun 2018 23:38:48 +0000 (23:38 +0000)]
[gdb] Add pretty printer for Expected
Reviewers: dblaikie
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D48512
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335554
91177308-0d34-0410-b5e6-
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Chandler Carruth [Mon, 25 Jun 2018 23:32:54 +0000 (23:32 +0000)]
[PM/LoopUnswitch] Teach the new unswitch to handle nontrivial
unswitching of switches.
This works much like trivial unswitching of switches in that it reliably
moves the switch out of the loop. Here we potentially clone the entire
loop into each successor of the switch and re-point the cases at these
clones.
Due to the complexity of actually doing nontrivial unswitching, this
patch doesn't create a dedicated routine for handling switches -- it
would duplicate far too much code. Instead, it generalizes the existing
routine to handle both branches and switches as it largely reduces to
looping in a few places instead of doing something once. This actually
improves the results in some cases with branches due to being much more
careful about how dead regions of code are managed. With branches,
because exactly one clone is created and there are exactly two edges
considered, somewhat sloppy handling of the dead regions of code was
sufficient in most cases. But with switches, there are much more
complicated patterns of dead code and so I've had to move to a more
robust model generally. We still do as much pruning of the dead code
early as possible because that allows us to avoid even cloning the code.
This also surfaced another problem with nontrivial unswitching before
which is that we weren't as precise in reconstructing loops as we could
have been. This seems to have been mostly harmless, but resulted in
pointless LCSSA PHI nodes and other unnecessary cruft. With switches, we
have to get this *right*, and everything benefits from it.
While the testing may seem a bit light here because we only have two
real cases with actual switches, they do a surprisingly good job of
exercising numerous edge cases. Also, because we share the logic with
branches, most of the changes in this patch are reasonably well covered
by existing tests.
The new unswitch now has all of the same fundamental power as the old
one with the exception of the single unsound case of *partial* switch
unswitching -- that really is just loop specialization and not
unswitching at all. It doesn't fit into the canonicalization model in
any way. We can add a loop specialization pass that runs late based on
profile data if important test cases ever come up here.
Differential Revision: https://reviews.llvm.org/D47683
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335553
91177308-0d34-0410-b5e6-
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Craig Topper [Mon, 25 Jun 2018 23:29:47 +0000 (23:29 +0000)]
[X86] Update fpclass intrinsic tests to chain their calls to the intrinsic rather than joining them with add.
The test cases try to test masked and unmasked isntructions at the same time. Previously the masked version relies on an extra fucntion parameter. Then the two results were combined with 'add'.
This patch gets rid of the second parameter and just passes the result of the first intrinsic into the mask argument of the second call. Then there's no need for an 'add'.
This configuration works a lot better with an upcoming patch to redefine the intrinsics to use vXi1 types for the output and mask argument.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335551
91177308-0d34-0410-b5e6-
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Francis Visoiu Mistrih [Mon, 25 Jun 2018 23:14:08 +0000 (23:14 +0000)]
[OrcMCJIT] Fix test after r335508 causing it to fail on green dragon
http://green.lab.llvm.org/green/job/clang-stage1-configure-RA/46572/console
LLVM ERROR: unsupported relocation with subtraction expression, symbol
'__GLOBAL_OFFSET_TABLE_' can not be undefined in a subtraction
expression
Do the same thing as MCJIT/eh-lg-pic.ll.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335548
91177308-0d34-0410-b5e6-
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Eric Christopher [Mon, 25 Jun 2018 23:12:04 +0000 (23:12 +0000)]
Fix unsigned/signed comparison failure in unittest.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335547
91177308-0d34-0410-b5e6-
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Sanjay Patel [Mon, 25 Jun 2018 22:50:26 +0000 (22:50 +0000)]
[InstCombine] cleanup udiv folds; NFCI
This removes a "UDivFoldAction" in favor of a simple constant
matcher. In theory, the existing code could do more matching,
but I don't see any evidence or need for it. I've left a TODO
about using ValueTracking in case we see any regressions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335545
91177308-0d34-0410-b5e6-
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Sanjay Patel [Mon, 25 Jun 2018 22:27:36 +0000 (22:27 +0000)]
[InstCombine] add/move tests for udiv; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335544
91177308-0d34-0410-b5e6-
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Benjamin Kramer [Mon, 25 Jun 2018 21:43:09 +0000 (21:43 +0000)]
[Instrumentation] Remove unused include
It's also a layering violation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335528
91177308-0d34-0410-b5e6-
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Sanjay Patel [Mon, 25 Jun 2018 21:39:41 +0000 (21:39 +0000)]
[InstCombine] fold sdiv with sext bool divisor
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335527
91177308-0d34-0410-b5e6-
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Sanjay Patel [Mon, 25 Jun 2018 21:36:09 +0000 (21:36 +0000)]
[InstCombine] add tests for sdiv with sext bool divisor; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335526
91177308-0d34-0410-b5e6-
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Vlad Tsyrklevich [Mon, 25 Jun 2018 21:28:35 +0000 (21:28 +0000)]
UBSan blacklist workaround for bot timeouts
Summary: Workaround for PR37929
Reviewers: eugenis, vitalybuka
Reviewed By: eugenis
Subscribers: llvm-commits, kcc
Differential Revision: https://reviews.llvm.org/D48566
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335525
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Florian Hahn [Mon, 25 Jun 2018 20:55:26 +0000 (20:55 +0000)]
Revert r335513: [SCEVExp] Advance found insertion point
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335522
91177308-0d34-0410-b5e6-
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Craig Topper [Mon, 25 Jun 2018 20:45:45 +0000 (20:45 +0000)]
[LoopIdiomRecognize] Fix a couple places where it appears we were unintenionally making copies of DebugLoc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335521
91177308-0d34-0410-b5e6-
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Florian Hahn [Mon, 25 Jun 2018 20:40:50 +0000 (20:40 +0000)]
Force vector width for scev-expander-debug.ll test
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335520
91177308-0d34-0410-b5e6-
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Craig Topper [Mon, 25 Jun 2018 20:27:46 +0000 (20:27 +0000)]
[X86] Simplify intrinsic table binary search to not require a temporary struct.
std::lower_bound doesn't require the thing to search for to be the same type as the table entries. We just need to define an appropriate comparison function that can take an table entry and an intrinsic number.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335518
91177308-0d34-0410-b5e6-
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Craig Topper [Mon, 25 Jun 2018 20:11:16 +0000 (20:11 +0000)]
[X86] Add comment about the sorting of the memory folding tables added in r335501.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335517
91177308-0d34-0410-b5e6-
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Fangrui Song [Mon, 25 Jun 2018 19:40:08 +0000 (19:40 +0000)]
[docs] Update doc after split of -gen-intrinsic in r335407
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335515
91177308-0d34-0410-b5e6-
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Lei Huang [Mon, 25 Jun 2018 19:28:27 +0000 (19:28 +0000)]
[PowerPC] Fix incorrectly encoded wait instruction
Encoding for the wait instruction was wrong. Fix according to ISA 3.0.
Differential Revision: https://reviews.llvm.org/D48550
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335514
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Florian Hahn [Mon, 25 Jun 2018 19:17:29 +0000 (19:17 +0000)]
[SCEVExp] Advance found insertion point until we find a non-dbg instruction.
This avoids creating unnecessary casts if the IP used to be a dbg info
intrinsic. Fixes PR37727.
Reviewers: vsk, aprantl, sanjoy, efriedma
Reviewed By: vsk, efriedma
Differential Revision: https://reviews.llvm.org/D47874
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335513
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Sanjay Patel [Mon, 25 Jun 2018 18:51:21 +0000 (18:51 +0000)]
[InstSimplify] fold div/rem of zexted bool
I was looking at an unrelated fold and noticed that
we don't have this simplification (because the other
fold would break existing tests).
Name: zext udiv
%z = zext i1 %x to i32
%r = udiv i32 %y, %z
=>
%r = %y
Name: zext urem
%z = zext i1 %x to i32
%r = urem i32 %y, %z
=>
%r = 0
Name: zext sdiv
%z = zext i1 %x to i32
%r = sdiv i32 %y, %z
=>
%r = %y
Name: zext srem
%z = zext i1 %x to i32
%r = srem i32 %y, %z
=>
%r = 0
https://rise4fun.com/Alive/LZ9
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335512
91177308-0d34-0410-b5e6-
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Kamil Rytarowski [Mon, 25 Jun 2018 18:49:13 +0000 (18:49 +0000)]
Handle NetBSD specific path in findDebugBinary()
Summary:
The NetBSD Operating System installs debuginfo
files into /usr/libdata/debug, rather than other path
like in some other popular distribution.
This change makes llvm-symbolizer functional with
the basesystem executables.
Reviewers: joerg, vitalybuka
Reviewed By: vitalybuka
Subscribers: JDevlieghere, llvm-commits
Differential Revision: https://reviews.llvm.org/D48525
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335511
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Sanjay Patel [Mon, 25 Jun 2018 18:27:14 +0000 (18:27 +0000)]
[InstSimplify] add tests for div/rem with bool divisor; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335509
91177308-0d34-0410-b5e6-
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Reid Kleckner [Mon, 25 Jun 2018 18:16:27 +0000 (18:16 +0000)]
Re-land r335297 "[X86] Implement more of x86-64 large and medium PIC code models"
The large code model allows code and data segments to exceed 2GB, which
means that some symbol references may require a displacement that cannot
be encoded as a displacement from RIP. The large PIC model even relaxes
the assumption that the GOT itself is within 2GB of all code. Therefore,
we need a special code sequence to materialize it:
.LtmpN:
leaq .LtmpN(%rip), %rbx
movabsq $_GLOBAL_OFFSET_TABLE_-.LtmpN, %rax # Scratch
addq %rax, %rbx # GOT base reg
From that, non-local references go through the GOT base register instead
of being PC-relative loads. Local references typically use GOTOFF
symbols, like this:
movq extern_gv@GOT(%rbx), %rax
movq local_gv@GOTOFF(%rbx), %rax
All calls end up being indirect:
movabsq $local_fn@GOTOFF, %rax
addq %rbx, %rax
callq *%rax
The medium code model retains the assumption that the code segment is
less than 2GB, so calls are once again direct, and the RIP-relative
loads can be used to access the GOT. Materializing the GOT is easy:
leaq _GLOBAL_OFFSET_TABLE_(%rip), %rbx # GOT base reg
DSO local data accesses will use it:
movq local_gv@GOTOFF(%rbx), %rax
Non-local data accesses will use RIP-relative addressing, which means we
may not always need to materialize the GOT base:
movq extern_gv@GOTPCREL(%rip), %rax
Direct calls are basically the same as they are in the small code model:
They use direct, PC-relative addressing, and the PLT is used for calls
to non-local functions.
This patch adds reasonably comprehensive testing of LEA, but there are
lots of interesting folding opportunities that are unimplemented.
I restricted the MCJIT/eh-lg-pic.ll test to Linux, since the large PIC
code model is not implemented for MachO yet.
Differential Revision: https://reviews.llvm.org/D47211
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335508
91177308-0d34-0410-b5e6-
96231b3b80d8
Sanjay Patel [Mon, 25 Jun 2018 17:52:10 +0000 (17:52 +0000)]
[InstCombine] add tests for add-of-sext-bool; NFC
We canonicalize to select with a zext-add and either zext-sub or sext-sub,
so this shows a pattern that's not conforming to the general trend.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335506
91177308-0d34-0410-b5e6-
96231b3b80d8
Aditya Nandakumar [Mon, 25 Jun 2018 17:48:48 +0000 (17:48 +0000)]
[GISel]: Update the end of GISel Opcode namespace.
G_ADDRSPACE_CAST was added at the end, but PRE_ISEL_GENERIC_OPCODE_END
is still pointing incorrectly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335505
91177308-0d34-0410-b5e6-
96231b3b80d8