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Stefan Hajnoczi [Fri, 2 Sep 2022 15:14:22 +0000 (11:14 -0400)]
Merge tag 'char-pull-request' of https://gitlab.com/marcandre.lureau/qemu into staging
chardev patches & small audio fix
# -----BEGIN PGP SIGNATURE-----
#
# iQJQBAABCAA6FiEEh6m9kz+HxgbSdvYt2ujhCXWWnOUFAmMSAXYcHG1hcmNhbmRy
# ZS5sdXJlYXVAcmVkaGF0LmNvbQAKCRDa6OEJdZac5YvaD/9VUIy96LZUGIexEhLj
# IT804yjCtSl9iV7/V7oivIPr9IpTKnUQS/yqbX8B8Afc6uQHDQRrhoNmuDRb3gCo
# V4XhZxZTzUvwJ/FUp35tgsEvqTMsK9taVrPtwVB9VJ3c7OkjvJGn1Q9+Di7WbsuZ
# +rZVR7+1IxkFpIqxBiSqdjHCkqSsAYtaL7wqSnpwiz3jw1nbL25iheo3gylNJbg5
# tfxLLJDFUs9Qqf04iVFtMv9vKoXZDBlCLEiCaCHbpzMXylP6t82oRoj3j2XioqvS
# 9dc3NNcWqTg5Srx1HJ95V8jPnUqLXD91fw9EqD+v0Va1l1JZ+2lGvqnTWDRZfBl3
# 2WZ23oHgwPSgFUyArmrSMX6qRG+f29NHA+r6F5ebVm8AzCP/QkhIqY/EJx8te77C
# 6cN8xS8LDkiL6fsJ5r5ZXViaCgvC33oLSmBQ/wVAJtNChYykmFUBw66Wc+ySSM/L
# HqNNflM1vWHnAc4/EqQT9PYV7cl5Ooss7i1lDIXu5tEpWtBFzV5OFtGE+njfQJ4B
# gpe0zhwXM/+fRyGvDnCkwINTQMgoKku12nTTE9NBpMWxlhW9BtCpY92Ht5BJmNVj
# b+ylbZaTiGBjHfshx0UlZ4vsDDy5gA28gJa7S6cs/Ak7TMLjwqj0Av+upUYt3PBW
# 8A1IB2wL91sFESh5RrMJCg4Bbg==
# =jtDp
# -----END PGP SIGNATURE-----
# gpg: Signature made Fri 02 Sep 2022 09:13:26 EDT
# gpg: using RSA key
87A9BD933F87C606D276F62DDAE8E10975969CE5
# gpg: issuer "marcandre.lureau@redhat.com"
# gpg: Good signature from "Marc-André Lureau <marcandre.lureau@redhat.com>" [full]
# gpg: aka "Marc-André Lureau <marcandre.lureau@gmail.com>" [full]
# Primary key fingerprint: 87A9 BD93 3F87 C606 D276 F62D DAE8 E109 7596 9CE5
* tag 'char-pull-request' of https://gitlab.com/marcandre.lureau/qemu:
audio: exit(1) if audio backend failed to be found or initialized
tests/unit: Update test-io-channel-socket.c for Windows
chardev/char-socket: Update AF_UNIX for Windows
util/qemu-sockets: Enable unix socket support on Windows
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Marc-André Lureau [Mon, 22 Aug 2022 13:10:21 +0000 (17:10 +0400)]
audio: exit(1) if audio backend failed to be found or initialized
If you specify a known backend but it isn't compiled in, or failed to
initialize, you get a simple warning and the "none" backend as a
fallback, and QEMU runs happily:
$ qemu-system-x86_64 -audiodev id=audio,driver=dsound
audio: Unknown audio driver `dsound'
audio: warning: Using timer based audio emulation
...
Instead, QEMU should fail to start:
$ qemu-system-x86_64 -audiodev id=audio,driver=dsound
audio: Unknown audio driver `dsound'
$
Resolves:
https://bugzilla.redhat.com/show_bug.cgi?id=
1983493
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Reviewed-by: Volker Rümelin <vr_qemu@t-online.de>
Message-Id: <
20220822131021.975656-1-marcandre.lureau@redhat.com>
Bin Meng [Tue, 2 Aug 2022 07:52:00 +0000 (15:52 +0800)]
tests/unit: Update test-io-channel-socket.c for Windows
Change to dynamically include the test cases by checking AF_UNIX
availability using a new helper socket_check_afunix_support().
With such changes testing on a Windows host can be covered as well.
Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Message-Id: <
20220802075200.907360-5-bmeng.cn@gmail.com>
Bin Meng [Tue, 2 Aug 2022 07:51:59 +0000 (15:51 +0800)]
chardev/char-socket: Update AF_UNIX for Windows
Now that AF_UNIX has come to Windows, update the existing logic in
qemu_chr_compute_filename() and qmp_chardev_open_socket() for Windows.
Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Message-Id: <
20220802075200.907360-4-bmeng.cn@gmail.com>
Bin Meng [Tue, 2 Aug 2022 07:51:58 +0000 (15:51 +0800)]
util/qemu-sockets: Enable unix socket support on Windows
Support for the unix socket has existed both in BSD and Linux for the
longest time, but not on Windows. Since Windows 10 build 17063 [1],
the native support for the unix socket has come to Windows. Starting
this build, two Win32 processes can use the AF_UNIX address family
over Winsock API to communicate with each other.
[1] https://devblogs.microsoft.com/commandline/af_unix-comes-to-windows/
Signed-off-by: Xuzhou Cheng <xuzhou.cheng@windriver.com>
Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Message-Id: <
20220802075200.907360-3-bmeng.cn@gmail.com>
Stefan Hajnoczi [Thu, 1 Sep 2022 20:26:45 +0000 (16:26 -0400)]
Merge tag 'pull-avr-
20220901' of https://gitlab.com/rth7680/qemu into staging
Fix avr_cpu_tlb_fill use of probe argument
Fix skip instructions being separated from the next insn (#1118)
# -----BEGIN PGP SIGNATURE-----
#
# iQFRBAABCgA7FiEEekgeeIaLTbaoWgXAZN846K9+IV8FAmMQRs4dHHJpY2hhcmQu
# aGVuZGVyc29uQGxpbmFyby5vcmcACgkQZN846K9+IV+7cAgAtlUxw9kNnIdrz1HG
# mkXO1kOfj0si8OHeAddy221lOL7zUm/Tw6vOdqxBsUjzkERLTNC6MhtVu6s3msyP
# Yi+Hh1lC9tk+YTYNnIeMqgEQYno3RFGAIaDHHRGQn8ha9PWWr0yGGaWTOZjm3Idf
# QYvFxiKfgTOEVekP4GYwkMsM02ItHu0hLLUUryKrQrCISNYzkF7AEtPxfxG4eDIr
# kN0QQndN5pfhRWnV6cvo6VVmAGz70YfKnlJgAFveeCZETYNpHP1npcsc4uj52JGk
# o0jxUSbZEzIbqLWSHqxa3KXydx/070sh0qmTmCzJSU7hOfmYpBHnT4ApHkijrIGI
# 3lrrJw==
# =5lX1
# -----END PGP SIGNATURE-----
# gpg: Signature made Thu 01 Sep 2022 01:44:46 EDT
# gpg: using RSA key
7A481E78868B4DB6A85A05C064DF38E8AF7E215F
# gpg: issuer "richard.henderson@linaro.org"
# gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [full]
# Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E 215F
* tag 'pull-avr-
20220901' of https://gitlab.com/rth7680/qemu:
target/avr: Disable interrupts when env->skip set
target/avr: Only execute one interrupt at a time
target/avr: Call avr_cpu_do_interrupt directly
target/avr: Support probe argument to tlb_fill
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Stefan Hajnoczi [Thu, 1 Sep 2022 17:53:20 +0000 (13:53 -0400)]
Merge tag 'pull-ppc-
20220831' of https://gitlab.com/danielhb/qemu into staging
ppc patch queue for 2022-08-31:
In the first 7.2 queue we have changes in the powernv pnv-phb handling,
the start of the QOMification of the ppc405 model, the removal of the
taihu machine, a new SLOF image and others.
# -----BEGIN PGP SIGNATURE-----
#
# iHUEABYKAB0WIQQX6/+ZI9AYAK8oOBk82cqW3gMxZAUCYw/AFgAKCRA82cqW3gMx
# ZI6XAP0d8m6r1JqKXPSfCwVYy+AfrwY7oZWYbeTqdamK6xHcUQD+JyCcFcogY4Vz
# YwvHLd9W2cqvoWiZ4tmkK4Mb0Xt0Xg4=
# =0uL/
# -----END PGP SIGNATURE-----
# gpg: Signature made Wed 31 Aug 2022 16:09:58 EDT
# gpg: using EDDSA key
17EBFF9923D01800AF2838193CD9CA96DE033164
# gpg: Good signature from "Daniel Henrique Barboza <danielhb413@gmail.com>" [unknown]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg: There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 17EB FF99 23D0 1800 AF28 3819 3CD9 CA96 DE03 3164
* tag 'pull-ppc-
20220831' of https://gitlab.com/danielhb/qemu: (60 commits)
ppc4xx: Fix code style problems reported by checkpatch
ppc/ppc4xx: Fix sdram trace events
hw/ppc/Kconfig: Move imply before select
hw/ppc/sam460ex: Remove PPC405 dependency from sam460ex
ppc405: Move machine specific code to ppc405_boards.c
ppc/ppc405: QOM'ify FPGA
ppc/ppc405: Use an explicit I2C object
hw/intc/ppc-uic: Convert ppc-uic to a PPC4xx DCR device
ppc/ppc405: Use an embedded PPCUIC model in SoC state
ppc4xx: Rename ppc405-ebc to ppc4xx-ebc
ppc4xx: Move EBC model to ppc4xx_devs.c
ppc4xx: Rename ppc405-plb to ppc4xx-plb
ppc4xx: Move PLB model to ppc4xx_devs.c
ppc/ppc405: QOM'ify MAL
ppc/ppc405: QOM'ify PLB
ppc/ppc405: QOM'ify POB
ppc/ppc405: QOM'ify OPBA
ppc/ppc405: QOM'ify EBC
ppc/ppc405: QOM'ify DMA
ppc/ppc405: QOM'ify GPIO
...
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Richard Henderson [Fri, 26 Aug 2022 20:53:32 +0000 (13:53 -0700)]
target/avr: Disable interrupts when env->skip set
This bit is not saved across interrupts, so we must
delay delivering the interrupt until the skip has
been processed.
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1118
Reviewed-by: Michael Rolnik <mrolnik@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Richard Henderson [Fri, 26 Aug 2022 20:35:52 +0000 (13:35 -0700)]
target/avr: Only execute one interrupt at a time
We cannot deliver two interrupts simultaneously;
the first interrupt handler must execute first.
Reviewed-by: Michael Rolnik <mrolnik@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Richard Henderson [Fri, 26 Aug 2022 20:32:56 +0000 (13:32 -0700)]
target/avr: Call avr_cpu_do_interrupt directly
There is no need to go through cc->tcg_ops when
we know what value that must have.
Reviewed-by: Michael Rolnik <mrolnik@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Richard Henderson [Tue, 23 Aug 2022 04:57:20 +0000 (21:57 -0700)]
target/avr: Support probe argument to tlb_fill
While there are no target-specific nonfaulting probes,
generic code may grow some uses at some point.
Note that the attrs argument was incorrect -- it should have
been MEMTXATTRS_UNSPECIFIED. Just use the simpler interface.
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Stefan Hajnoczi [Wed, 31 Aug 2022 22:18:59 +0000 (18:18 -0400)]
Merge tag 'testing-pull-request-2022-08-30' of https://gitlab.com/thuth/qemu into staging
* First batch of patches to get qtests adapted for Windows
* Two preparation patches for the upcoming removal of the slirp submodule
* Some other small test fixes (typos, etc.)
# -----BEGIN PGP SIGNATURE-----
#
# iQJFBAABCAAvFiEEJ7iIR+7gJQEY8+q5LtnXdP5wLbUFAmMOVvcRHHRodXRoQHJl
# ZGhhdC5jb20ACgkQLtnXdP5wLbUcOA//d4MU0VWbMRXHLLTvaIO+0I1JhiMP5PbU
# qgDwGfIu7uY58hXvjDCSmoV5Lj35I/VdsmWYcC4dwQcIr9BwZq3H+jthB4sxMDIJ
# UAnowmO22x5iTZr4PBY3GuYKRRUaf7EuqqOwmNAtrvDV+3BVn2sQFLtjWhqnyhqR
# syonfyVhlFhqnFXPs6fXTXQxiuziuMmmHGSQMNRGuBudkivvOTQzElb3gxTp7pRe
# FfIoAUVohUXptd26U+5Zr2KPxQQ/eZ2Elhnhjc6/r4u4JpbyfCQrGTFAMSuvq4HM
# z/kKr/JA0v6vmX5ARjbCL0RhoNOM/DcOooxzX6YO3VkZTrQAHZxAsk25mihURRX3
# UgGLDlagNuPSTl1fkUuumH86fFQ54bFBFFOV3yJWQF5UDuWKoy3bPlSf5L0/bwRp
# z5gYnf0lJxMG3kGgmaOnW4gj0Z0amn9AzI33BQDIldVNTHnp8/hNpscrsq5Voi2j
# ot1G/aZt9OH+DeqAB8TJfbsHE8mtTgioihZ2QQOMAKVkF25UImFjNWliX8SUHG2h
# E3ro9QLugV2FgIggJwRyN9w394hEn7BR8DMyiPCRemcjnT4Fuy9IoEBEkJ2gj3n4
# QiDPdrr/1dw8uApGBts3YyRbSmajqKUegXCuOYXjpU90f4Kno0WN2/jkTx8pvfcE
# bJvG21nzrdY=
# =MCyJ
# -----END PGP SIGNATURE-----
# gpg: Signature made Tue 30 Aug 2022 14:29:11 EDT
# gpg: using RSA key
27B88847EEE0250118F3EAB92ED9D774FE702DB5
# gpg: issuer "thuth@redhat.com"
# gpg: Good signature from "Thomas Huth <th.huth@gmx.de>" [full]
# gpg: aka "Thomas Huth <thuth@redhat.com>" [full]
# gpg: aka "Thomas Huth <huth@tuxfamily.org>" [full]
# gpg: aka "Thomas Huth <th.huth@posteo.de>" [unknown]
# Primary key fingerprint: 27B8 8847 EEE0 2501 18F3 EAB9 2ED9 D774 FE70 2DB5
* tag 'testing-pull-request-2022-08-30' of https://gitlab.com/thuth/qemu: (23 commits)
tests/avocado/migration: Get find_free_port() from the ports
tests/qtest/ac97-test: Correct reference to driver
gitlab-ci: Only use one process in Windows jobs for compilation
docs/devel/testing: fix minor typo
tests/avocado: Fix trivial typo
tests/avocado: Do not run tests that require libslirp if it is not available
tests/vm: Add libslirp to the VM tests
tests/qtest: prom-env-test: Use double quotes to pass the prom-env option
tests/qtest: npcm7xx_emc-test: Skip running test_{tx, rx} on win32
tests/qtest: machine-none-test: Use double quotes to pass the cpu option
tests/qtest: device-plug-test: Reverse the usage of double/single quotes
tests/qtest: libqos: Rename malloc.h to libqos-malloc.h
tests/qtest: libqos: Drop inclusion of <sys/wait.h>
tests/qtest: migration-test: Skip running test_migrate_fd_proto on win32
tests/qtest: i440fx-test: Skip running request_{bios, pflash} for win32
tests/qtest: Build cases that use memory-backend-file for posix only
tests/qtest: Build e1000e-test for posix only
tests/qtest: Adapt {m48t59,rtc}-test cases for win32
backends/tpm: Exclude headers and macros that don't exist on win32
tests/qtest: migration-test: Handle link() for win32
...
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Stefan Hajnoczi [Wed, 31 Aug 2022 20:50:43 +0000 (16:50 -0400)]
Merge tag 's390x-pull-request-2022-08-30' of https://gitlab.com/thuth/qemu into staging
* Compat machine types for QEMU 7.2
* Add feature bit for the "processor-activity-instrumentation extension"
* Fix emulation of CLFIT and CLGIT instructions
* Fix hugepages support on s390x with the memfd memory-backend
# -----BEGIN PGP SIGNATURE-----
#
# iQJFBAABCAAvFiEEJ7iIR+7gJQEY8+q5LtnXdP5wLbUFAmMOD0cRHHRodXRoQHJl
# ZGhhdC5jb20ACgkQLtnXdP5wLbWrUg//YyjsnuUoKhea7PmnL6WUOyD0jZoMtDK3
# IwRzneLfTPQneStqCc1gtoWMelhP68wa/t2ygfwB5hOrLKz8r0aIvnsfEgc8t++R
# 58IwClD9Z2d26lCMzIlW3A4ACQfZVk96wtqPmfShMHKuZePrA/oM4l7R+EItP9nl
# s1WYUZ0ia/qogJ2Wr+MvDGbURv37DqYJ2OuY8WCrIX9trQxUwcydZKMv1ca55mpn
# GfZNBbTuqhLMf+r4NmxNzHnMayGtWOyaISStJBhGDlRJyKjDsy1ghAXDMa1WFRup
# lj6mBoq0F19PCnjI9AUFVNvPhuj/1Ku+YkVwrImleSdBBmgaUx+LWwFXU+stnQv7
# 9bYosdTJ55BJ8YmRn1w00b+rIVg4SvJimQJc+BizWe7tdpc+E1AhBerUC4bwZxZw
# NRiPwSraym2b9/mpv7/fzUGECEpP37IHHZtIa37OO3d48NuaHpFHhpcskbmfCIwP
# K19Jqc5cyLf7/iEliOo+BVcMVDQSL4M4x7CePpO1Kd83RmDEoBQlQDL9ZcXYAefz
# yY7OYwi2DfO893umDNuXwyN6b3HwOjDztFy2emgVRfwFIsm4jWnsByRsjVasaIvd
# kmfCjZj0URBoUCfJiKtrpzgF+uup8n54uJxtbsWyf83xdMz/zpsDXAnm1eG6qZq3
# 7MD1+akz2Ak=
# =lJy4
# -----END PGP SIGNATURE-----
# gpg: Signature made Tue 30 Aug 2022 09:23:19 EDT
# gpg: using RSA key
27B88847EEE0250118F3EAB92ED9D774FE702DB5
# gpg: issuer "thuth@redhat.com"
# gpg: Good signature from "Thomas Huth <th.huth@gmx.de>" [full]
# gpg: aka "Thomas Huth <thuth@redhat.com>" [full]
# gpg: aka "Thomas Huth <huth@tuxfamily.org>" [full]
# gpg: aka "Thomas Huth <th.huth@posteo.de>" [unknown]
# Primary key fingerprint: 27B8 8847 EEE0 2501 18F3 EAB9 2ED9 D774 FE70 2DB5
* tag 's390x-pull-request-2022-08-30' of https://gitlab.com/thuth/qemu:
util/mmap-alloc: Remove qemu_mempath_getpagesize()
softmmu/physmem: Remove the ifdef __linux__ around the pagesize functions
backends/hostmem: Fix support of memory-backend-memfd in qemu_maxrampagesize()
target/s390x: Fix CLFIT and CLGIT immediate size
s390x/cpumodel: add stfl197 processor-activity-instrumentation extension 1
hw: Add compat machines for 7.2
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
BALATON Zoltan [Wed, 17 Aug 2022 15:08:43 +0000 (17:08 +0200)]
ppc4xx: Fix code style problems reported by checkpatch
Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Message-Id: <
62798fbe9c200da3e0c870601ed9162b1c3a50a5.
1660746880.git.balaton@eik.bme.hu>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Cédric Le Goater [Wed, 17 Aug 2022 15:08:42 +0000 (17:08 +0200)]
ppc/ppc4xx: Fix sdram trace events
Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
Message-Id: <
0a3e454eb7fd5f2b807a9c752c28693f27829f1d.
1660746880.git.balaton@eik.bme.hu>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
BALATON Zoltan [Wed, 17 Aug 2022 15:08:40 +0000 (17:08 +0200)]
hw/ppc/Kconfig: Move imply before select
In pegasos2 section move imply before select to match other sections.
Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Message-Id: <
4d46dde64c2e5df6db3f92426fb3ae885939c2b0.
1660746880.git.balaton@eik.bme.hu>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
BALATON Zoltan [Wed, 17 Aug 2022 18:59:14 +0000 (20:59 +0200)]
hw/ppc/sam460ex: Remove PPC405 dependency from sam460ex
Now that shared PPC4xx devices are separated from PPC405 ones we can
drop this depencency.
Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Message-Id: <
cf6c1d280f830beeea41128595c8c026d5126d2b.
1660762465.git.balaton@eik.bme.hu>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
BALATON Zoltan [Wed, 17 Aug 2022 15:08:38 +0000 (17:08 +0200)]
ppc405: Move machine specific code to ppc405_boards.c
These are only used by the board code so move out from the shared SoC
model and put it in the boards file.
Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Message-Id: <
2b23bcaaf191f96b217cbd06a6038694024862c3.
1660746880.git.balaton@eik.bme.hu>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Cédric Le Goater [Wed, 17 Aug 2022 15:08:37 +0000 (17:08 +0200)]
ppc/ppc405: QOM'ify FPGA
Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
Message-Id: <
ed6ff1705dadb46b456e424aa0f0420f1d18d92c.
1660746880.git.balaton@eik.bme.hu>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Cédric Le Goater [Wed, 17 Aug 2022 15:08:36 +0000 (17:08 +0200)]
ppc/ppc405: Use an explicit I2C object
Having an explicit I2C model object will help if one day we want to
add I2C devices on the bus from the machine init routine.
Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
[balaton: Symplify sysbus device casts for readibility]
Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
Message-Id: <
68eb8b5ac408ca8cc981ebf53a3e154c0d34c7f6.
1660746880.git.balaton@eik.bme.hu>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
BALATON Zoltan [Wed, 17 Aug 2022 15:08:35 +0000 (17:08 +0200)]
hw/intc/ppc-uic: Convert ppc-uic to a PPC4xx DCR device
Make ppc-uic a subclass of ppc4xx-dcr-device which will handle the cpu
link and make it uniform with the other PPC4xx devices.
Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Message-Id: <
eb548130cf60aea8a6ea4dba4dee1686b3cabc3d.
1660746880.git.balaton@eik.bme.hu>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Cédric Le Goater [Wed, 17 Aug 2022 15:08:34 +0000 (17:08 +0200)]
ppc/ppc405: Use an embedded PPCUIC model in SoC state
Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
[balaton: Simplify sysbus device casts for readability]
Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
Message-Id: <
ac5f010f4eb3ade061c65bc39a049f231f75574a.
1660746880.git.balaton@eik.bme.hu>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
BALATON Zoltan [Wed, 17 Aug 2022 15:08:33 +0000 (17:08 +0200)]
ppc4xx: Rename ppc405-ebc to ppc4xx-ebc
This device is shared between different 4xx socs.
Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
Message-Id: <
63d9b14c8ff5f73e35bffca1036394b5235735ee.
1660746880.git.balaton@eik.bme.hu>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
BALATON Zoltan [Wed, 17 Aug 2022 15:08:32 +0000 (17:08 +0200)]
ppc4xx: Move EBC model to ppc4xx_devs.c
The EBC is shared between 405 and 440 so move it to shared file.
Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
Message-Id: <
10eae70509ca4bd74858fc2c0a0f0e4eb9330199.
1660746880.git.balaton@eik.bme.hu>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
BALATON Zoltan [Wed, 17 Aug 2022 15:08:31 +0000 (17:08 +0200)]
ppc4xx: Rename ppc405-plb to ppc4xx-plb
This device is shared between different 4xx socs.
Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
Message-Id: <
5b13ebfd12a71a28035bed5a915cbeee81cf21d1.
1660746880.git.balaton@eik.bme.hu>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
BALATON Zoltan [Wed, 17 Aug 2022 15:08:30 +0000 (17:08 +0200)]
ppc4xx: Move PLB model to ppc4xx_devs.c
The PLB is shared between 405 and 440 so move it to the shared file.
Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
Message-Id: <
2498384bf3e18959ee8cb984d72fb66b8a6ecadc.
1660746880.git.balaton@eik.bme.hu>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Cédric Le Goater [Wed, 17 Aug 2022 15:08:29 +0000 (17:08 +0200)]
ppc/ppc405: QOM'ify MAL
The Memory Access Layer (MAL) controller is currently modeled as a DCR
device with 4 IRQs. Also drop the ppc4xx_mal_init() helper and adapt
the sam460ex machine.
Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
[balaton: ppc4xx_dcr_register changes, add finalize method]
Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
Message-Id: <
d54a243dff94d95ba30dbcc09c27700a90ade932.
1660746880.git.balaton@eik.bme.hu>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Cédric Le Goater [Wed, 17 Aug 2022 15:08:28 +0000 (17:08 +0200)]
ppc/ppc405: QOM'ify PLB
PLB is currently modeled as a simple DCR device. Also drop the
ppc4xx_plb_init() helper and adapt the sam460ex machine.
Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
[balaton: ppc4xx_dcr_register changes]
Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
Message-Id: <
c4256d1bffca86fe1d696aa9c56732e5f563e114.
1660746880.git.balaton@eik.bme.hu>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Cédric Le Goater [Wed, 17 Aug 2022 15:08:27 +0000 (17:08 +0200)]
ppc/ppc405: QOM'ify POB
POB is currently modeled as a simple DCR device.
Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
[balaton: ppc4xx_dcr_register changes]
Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
Message-Id: <
2bb1a89182523059ecb0e8d20c22a293534dec17.
1660746880.git.balaton@eik.bme.hu>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Cédric Le Goater [Wed, 17 Aug 2022 15:08:26 +0000 (17:08 +0200)]
ppc/ppc405: QOM'ify OPBA
The OPB arbitrer is currently modeled as a simple SysBus device with a
unique memory region.
Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
[balaton: ppc4xx_dcr_register changes]
Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
Message-Id: <
38476bc43d2332db2f09dbede9eff5234d6ce217.
1660746880.git.balaton@eik.bme.hu>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Cédric Le Goater [Wed, 17 Aug 2022 15:08:25 +0000 (17:08 +0200)]
ppc/ppc405: QOM'ify EBC
EBC is currently modeled as a DCR device. Also drop the ppc405_ebc_init()
helper and adapt the sam460ex machine.
Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
[balaton: ppc4xx_dcr_register changes]
Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
Message-Id: <
51a0769ab605c5158f4f2f1c896725d5fe7a073b.
1660746880.git.balaton@eik.bme.hu>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Cédric Le Goater [Wed, 17 Aug 2022 15:08:24 +0000 (17:08 +0200)]
ppc/ppc405: QOM'ify DMA
The DMA controller is currently modeled as a DCR device with a couple
of IRQs.
Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
[balaton: ppc4xx_dcr_register changes]
Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
Message-Id: <
4738b3c7cf18c328f05aaaddc555a46219431335.
1660746880.git.balaton@eik.bme.hu>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Cédric Le Goater [Wed, 17 Aug 2022 15:08:23 +0000 (17:08 +0200)]
ppc/ppc405: QOM'ify GPIO
The GPIO controller is currently modeled as a simple SysBus device
with a unique memory region.
Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
[balaton: Simplify sysbus device casts for readability]
Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
Message-Id: <
e95d7849f3768e1f9a2846c4b282392750678b3e.
1660746880.git.balaton@eik.bme.hu>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Cédric Le Goater [Wed, 17 Aug 2022 15:08:22 +0000 (17:08 +0200)]
ppc/ppc405: QOM'ify OCM
The OCM controller is currently modeled as a simple DCR device with
a couple of memory regions.
Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
[balaton: ppc4xx_dcr_register changes]
Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
Message-Id: <
ecb93d2d5993bb7a970365744c7d342d4abcb017.
1660746880.git.balaton@eik.bme.hu>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Cédric Le Goater [Wed, 17 Aug 2022 15:08:21 +0000 (17:08 +0200)]
ppc/ppc405: QOM'ify GPT
The GPT controller is currently modeled as a SysBus device with a
unique memory region, a couple of IRQs and a timer.
Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
[balaton: ppc4xx_dcr_register changes, add finalize method]
Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
Message-Id: <
8950ab26e78173f94ba65bc61bcfd0631de1fe61.
1660746880.git.balaton@eik.bme.hu>
[danielhb: check if timer != NULL in ppc405_gpt_finalize()]
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Cédric Le Goater [Wed, 17 Aug 2022 15:08:20 +0000 (17:08 +0200)]
ppc/ppc405: QOM'ify CPC
The CPC controller is currently modeled as a DCR device.
Now that all clock settings are handled at the CPC level, change the
SoC "sys-clk" property to be an alias on the same property in the CPC
model.
Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
[balaton: ppc4xx_dcr_register changes]
Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
Message-Id: <
23393cb91a2c6c560a4461b3e9d1baa48ae28f74.
1660746880.git.balaton@eik.bme.hu>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Cédric Le Goater [Wed, 17 Aug 2022 15:08:18 +0000 (17:08 +0200)]
ppc/ppc4xx: Introduce a DCR device model
The Device Control Registers (DCR) of on-SoC devices are accessed by
software through the use of the mtdcr and mfdcr instructions. These
are converted in transactions on a side band bus, the DCR bus, which
connects the on-SoC devices to the CPU.
Ideally, we should model these accesses with a DCR namespace and DCR
memory regions but today the DCR handlers are installed in a DCR table
under the CPU. Instead, introduce a little device model wrapper to hold
a CPU link and handle registration of DCR handlers.
The DCR device inherits from SysBus because most of these devices also
have MMIO regions and/or IRQs. Being a SysBusDevice makes things easier
to install the device model in the overall SoC.
Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
[balaton: Explicit opaque parameter for dcr callbacks]
Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
Message-Id: <
9b21bdf55e0a728f093bad299e030d98f302ded0.
1660746880.git.balaton@eik.bme.hu>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Cédric Le Goater [Tue, 9 Aug 2022 15:38:47 +0000 (17:38 +0200)]
ppc/ppc405: QOM'ify CPU
Drop the use of ppc4xx_init() and duplicate a bit of code related to
clocks in the SoC realize routine. We will clean that up in the
following patches.
ppc_dcr_init() simply allocates default DCR handlers for the CPU. Maybe
this could be done in model initializer of the CPU families needing it.
Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: BALATON Zoltan <balaton@eik.bme.hu>
Message-Id: <
20220809153904.485018-8-clg@kaod.org>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Cédric Le Goater [Tue, 9 Aug 2022 15:38:46 +0000 (17:38 +0200)]
ppc/ppc405: Start QOMification of the SoC
This moves all the code previously done in the ppc405ep_init() routine
under ppc405_soc_realize(). We can also adjust the number of banks now
that we have control on ppc4xx_sdram_init().
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: BALATON Zoltan <balaton@eik.bme.hu>
Message-Id: <
20220809153904.485018-7-clg@kaod.org>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Cédric Le Goater [Tue, 9 Aug 2022 15:38:45 +0000 (17:38 +0200)]
ppc/ppc405: Introduce a PPC405 SoC
It is an initial model to start QOMification of the PPC405 board.
QOM'ified devices will be reintroduced one by one. Start with the
memory regions, which name prefix is changed to "ppc405".
Also, initialize only one RAM bank. The second bank is a dummy one
(zero size) which is here to match the hard coded number of banks in
ppc405ep_init().
Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: BALATON Zoltan <balaton@eik.bme.hu>
Message-Id: <
20220809153904.485018-6-clg@kaod.org>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Cédric Le Goater [Tue, 9 Aug 2022 15:38:44 +0000 (17:38 +0200)]
ppc/ppc405: Move SRAM under the ref405ep machine
It doesn't belong to the generic machine nor the SoC. Fix a typo in
the name while we are at it.
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: BALATON Zoltan <balaton@eik.bme.hu>
Message-Id: <
20220809153904.485018-5-clg@kaod.org>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Cédric Le Goater [Tue, 9 Aug 2022 15:38:43 +0000 (17:38 +0200)]
ppc/ppc405: Move devices under the ref405ep machine
Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Reviewed-by: BALATON Zoltan <balaton@eik.bme.hu>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Message-Id: <
20220809153904.485018-4-clg@kaod.org>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Cédric Le Goater [Tue, 9 Aug 2022 15:38:42 +0000 (17:38 +0200)]
ppc/ppc405: Introduce a PPC405 generic machine
We will use this machine as a base to define the ref405ep and possibly
the PPC405 hotfoot board as found in the Linux kernel.
Reviewed-by: BALATON Zoltan <balaton@eik.bme.hu>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Message-Id: <
20220809153904.485018-3-clg@kaod.org>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Cédric Le Goater [Tue, 9 Aug 2022 15:38:41 +0000 (17:38 +0200)]
ppc/ppc405: Remove taihu machine
It has been deprecated since 7.0.
Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Message-Id: <
20220809153904.485018-2-clg@kaod.org>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Daniel Henrique Barboza [Fri, 19 Aug 2022 09:47:48 +0000 (06:47 -0300)]
ppc/pnv: fix QOM parenting of user creatable root ports
User creatable root ports are being parented by the 'peripheral' or the
'peripheral-anon' container. This happens because this is the regular
QOM schema for sysbus devices that are added via the command line.
Let's make this QOM hierarchy similar to what we have with default root
ports, i.e. the root port must be parented by the pnv-root-bus. To do
that we change the qom and bus parent of the root port during
root_port_realize(). The realize() is shared by the default root port
code path, so we can remove the code inside pnv_phb_attach_root_port()
that was adding the root port as a child of the bus as well.
After all that, remove pnv_phb_attach_root_port() and create the root
port explictly in the 'default_enabled()' case of pnv_phb_realize().
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Frederic Barrat <fbarrat@linux.ibm.com>
Message-Id: <
20220819094748.400578-3-danielhb413@gmail.com>
Daniel Henrique Barboza [Fri, 19 Aug 2022 09:47:47 +0000 (06:47 -0300)]
ppc/pnv: consolidate pnv_parent_*_fixup() helpers
We have 2 helpers that amends the QOM and parent bus of a given object,
repectively. These 2 helpers are called together, and not by accident.
Due to QOM internals, doing an object_unparent() will result in the
device being removed from its parent bus. This means that changing the
QOM parent requires reassigning the parent bus again.
Create a single helper called pnv_parent_fixup(), documenting some of
the QOM specifics that we're dealing with the unparenting/parenting
mechanics, and handle both the QOM and the parent bus assignment.
Next patch will make use of this function to handle a case where we need
to change the QOM parent while keeping the same parent bus assigned
beforehand.
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Reviewed-by: Frederic Barrat <fbarrat@linux.ibm.com>
Message-Id: <
20220819094748.400578-2-danielhb413@gmail.com>
Daniel Henrique Barboza [Thu, 11 Aug 2022 16:39:49 +0000 (13:39 -0300)]
ppc/pnv: user creatable pnv-phb for powernv10
Given that powernv9 and powernv10 uses the same pnv-phb backend, the
logic to allow user created pnv-phbs for powernv10 is already in place.
Let's flip the switch.
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Reviewed-by: Frederic Barrat <fbarrat@linux.ibm.com>
Message-Id: <
20220811163950.578927-11-danielhb413@gmail.com>
Daniel Henrique Barboza [Thu, 11 Aug 2022 16:39:48 +0000 (13:39 -0300)]
ppc/pnv: change pnv_phb4_get_pec() to also retrieve chip10->pecs
The function assumes that we're always dealing with a PNV9_CHIP()
object. This is not the case when the pnv-phb device belongs to a
powernv10 machine.
Change pnv_phb4_get_pec() to be able to work with PNV10_CHIP() if
necessary.
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Frederic Barrat <fbarrat@linux.ibm.com>
Message-Id: <
20220811163950.578927-10-danielhb413@gmail.com>
Daniel Henrique Barboza [Thu, 11 Aug 2022 16:39:47 +0000 (13:39 -0300)]
ppc/pnv: enable user created pnv-phb for powernv9
Enable pnv-phb user created devices for powernv9 now that we have
everything in place.
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Reviewed-by: Frederic Barrat <fbarrat@linux.ibm.com>
Message-Id: <
20220811163950.578927-9-danielhb413@gmail.com>
Daniel Henrique Barboza [Thu, 11 Aug 2022 16:39:46 +0000 (13:39 -0300)]
ppc/pnv: add PHB4 helpers for user created pnv-phb
The PHB4 backend relies on a link with the corresponding PEC element.
This is trivial to do during machine_init() time for default devices,
but not so much for user created ones.
pnv_phb4_get_pec() is a small variation of the function that was
reverted by commit
9c10d86fee "ppc/pnv: Remove user-created PHB{3,4,5}
devices". We'll use it to determine the appropriate PEC for a given user
created pnv-phb that uses a PHB4 backend.
This is done during realize() time, in pnv_phb_user_device_init().
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Frederic Barrat <fbarrat@linux.ibm.com>
Message-Id: <
20220811163950.578927-8-danielhb413@gmail.com>
Daniel Henrique Barboza [Thu, 11 Aug 2022 16:39:45 +0000 (13:39 -0300)]
ppc/pnv: enable user created pnv-phb for powernv8
The bulk of the work was already done by previous patches.
Use defaults_enabled() to determine whether we need to create the
default devices or not.
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Reviewed-by: Frederic Barrat <fbarrat@linux.ibm.com>
Message-Id: <
20220811163950.578927-7-danielhb413@gmail.com>
Daniel Henrique Barboza [Thu, 11 Aug 2022 16:39:44 +0000 (13:39 -0300)]
ppc/pnv: turn chip8->phbs[] into a PnvPHB* array
When enabling user created PHBs (a change reverted by commit
9c10d86fee)
we were handling PHBs created by default versus by the user in different
manners. The only difference between these PHBs is that one will have a
valid phb3->chip that is assigned during pnv_chip_power8_realize(),
while the user created needs to search which chip it belongs to.
Aside from that there shouldn't be any difference. Making the default
PHBs behave in line with the user created ones will make it easier to
re-introduce them later on. It will also make the code easier to follow
since we are dealing with them in equal manner.
The first step is to turn chip8->phbs[] into a PnvPHB3 pointer array.
This will allow us to assign user created PHBs into it later on. The way
we initilize the default case is now more in line with that would happen
with the user created case: the object is created, parented by the chip
because pnv_xscom_dt() relies on it, and then assigned to the array.
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Frederic Barrat <fbarrat@linux.ibm.com>
Message-Id: <
20220811163950.578927-6-danielhb413@gmail.com>
Daniel Henrique Barboza [Thu, 11 Aug 2022 16:39:43 +0000 (13:39 -0300)]
ppc/pnv: add helpers for pnv-phb user devices
pnv_parent_qom_fixup() and pnv_parent_bus_fixup() are versions of the
helpers that were reverted by commit
9c10d86fee "ppc/pnv: Remove
user-created PHB{3,4,5} devices". They are needed to amend the QOM and
bus hierarchies of user created pnv-phbs, matching them with default
pnv-phbs.
A new helper pnv_phb_user_device_init() is created to handle
user-created devices setup. We're going to call it inside
pnv_phb_realize() in case we're realizing an user created device. This
will centralize all user device realated in a single spot, leaving the
realize functions of the phb3/phb4 backends untouched.
Another helper called pnv_chip_add_phb() was added to handle the
particularities of each chip version when adding a new PHB.
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Frederic Barrat <fbarrat@linux.ibm.com>
Message-Id: <
20220811163950.578927-5-danielhb413@gmail.com>
Daniel Henrique Barboza [Thu, 11 Aug 2022 16:39:42 +0000 (13:39 -0300)]
ppc/pnv: set root port chassis and slot using Bus properties
For default root ports we have a way of accessing chassis and slot,
before root_port_realize(), via pnv_phb_attach_root_port(). For the
future user created root ports this won't be the case: we can't use
this helper because we don't have access to the PHB phb-id/chip-id
values.
In earlier patches we've added phb-id and chip-id to pnv-phb-root-bus
objects. We're now able to use the bus to retrieve them. The bus is
reachable for both user created and default devices, so we're changing
all the code paths. This also allow us to validate these changes with
the existing default devices.
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Reviewed-by: Frederic Barrat <fbarrat@linux.ibm.com>
Message-Id: <
20220811163950.578927-4-danielhb413@gmail.com>
Daniel Henrique Barboza [Thu, 11 Aug 2022 16:39:41 +0000 (13:39 -0300)]
ppc/pnv: add phb-id/chip-id PnvPHB4RootBus properties
The same rationale provided in the PHB3 bus case applies here.
Note: we could have merged both buses in a single object, like we did
with the root ports, and spare some boilerplate. The reason we opted to
preserve both buses objects is twofold:
- there's not user side advantage in doing so. Unifying the root ports
presents a clear user QOL change when we enable user created devices back.
The buses objects, aside from having a different QOM name, is transparent
to the user;
- we leave a door opened in case we want to increase the root port limit
for phb4/5 later on without having to deal with phb3 code.
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Reviewed-by: Frederic Barrat <fbarrat@linux.ibm.com>
Message-Id: <
20220811163950.578927-3-danielhb413@gmail.com>
Daniel Henrique Barboza [Thu, 11 Aug 2022 16:39:40 +0000 (13:39 -0300)]
ppc/pnv: add phb-id/chip-id PnvPHB3RootBus properties
We rely on the phb-id and chip-id, which are PHB properties, to assign
chassis and slot to the root port. For default devices this is no big
deal: the root port is being created under pnv_phb_realize() and the
values are being passed on via the 'index' and 'chip-id' of the
pnv_phb_attach_root_port() helper.
If we want to implement user created root ports we have a problem. The
user created root port will not be aware of which PHB it belongs to,
unless we're willing to violate QOM best practices and access the PHB
via dev->parent_bus->parent. What we can do is to access the root bus
parent bus.
Since we're already assigning the root port as QOM child of the bus, and
the bus is initiated using PHB properties, let's add phb-id and chip-id
as properties of the bus. This will allow us trivial access to them, for
both user-created and default root ports, without doing anything too
shady with QOM.
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Reviewed-by: Frederic Barrat <fbarrat@linux.ibm.com>
Message-Id: <
20220811163950.578927-2-danielhb413@gmail.com>
Daniel Henrique Barboza [Fri, 24 Jun 2022 08:49:21 +0000 (05:49 -0300)]
ppc/pnv: move attach_root_port helper to pnv-phb.c
The helper is only used in this file.
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Reviewed-by: Frederic Barrat <fbarrat@linux.ibm.com>
Message-Id: <
20220624084921.399219-13-danielhb413@gmail.com>
Daniel Henrique Barboza [Fri, 24 Jun 2022 08:49:20 +0000 (05:49 -0300)]
ppc/pnv: remove PnvPHB4.version
It's unused.
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Reviewed-by: Frederic Barrat <fbarrat@linux.ibm.com>
Message-Id: <
20220624084921.399219-12-danielhb413@gmail.com>
Daniel Henrique Barboza [Fri, 24 Jun 2022 08:49:19 +0000 (05:49 -0300)]
ppc/pnv: remove pecc->rp_model
The attribute is unused.
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Reviewed-by: Frederic Barrat <fbarrat@linux.ibm.com>
Message-Id: <
20220624084921.399219-11-danielhb413@gmail.com>
Daniel Henrique Barboza [Fri, 24 Jun 2022 08:49:18 +0000 (05:49 -0300)]
ppc/pnv: remove root port name from pnv_phb_attach_root_port()
We support only a single root port, PNV_PHB_ROOT_PORT.
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Reviewed-by: Frederic Barrat <fbarrat@linux.ibm.com>
Message-Id: <
20220624084921.399219-10-danielhb413@gmail.com>
Daniel Henrique Barboza [Fri, 24 Jun 2022 08:49:17 +0000 (05:49 -0300)]
ppc/pnv: remove pnv-phb4-root-port
The unified pnv-phb-root-port can be used instead. The phb4-root-port
device isn't exposed to the user in any official QEMU release so there's
no ABI breakage in removing it.
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Reviewed-by: Frederic Barrat <fbarrat@linux.ibm.com>
Message-Id: <
20220624084921.399219-9-danielhb413@gmail.com>
Daniel Henrique Barboza [Fri, 24 Jun 2022 08:49:16 +0000 (05:49 -0300)]
ppc/pnv: remove pnv-phb3-root-port
The unified pnv-phb-root-port can be used in its place. There is no ABI
breakage in doing so because no official QEMU release introduced user
creatable pnv-phb3-root-port devices.
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Reviewed-by: Frederic Barrat <fbarrat@linux.ibm.com>
Message-Id: <
20220624084921.399219-8-danielhb413@gmail.com>
Daniel Henrique Barboza [Fri, 24 Jun 2022 08:49:15 +0000 (05:49 -0300)]
ppc/pnv: add pnv-phb-root-port device
We have two very similar root-port devices, pnv-phb3-root-port and
pnv-phb4-root-port. Both consist of a wrapper around the PCIESlot device
that, until now, has no additional attributes.
The main difference between the PHB3 and PHB4 root ports is that
pnv-phb4-root-port has the pnv_phb4_root_port_reset() callback. All
other differences can be merged in a single device without too much
trouble.
This patch introduces the unified pnv-phb-root-port that, in time, will
be used as the default root port for the pnv-phb device.
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Reviewed-by: Frederic Barrat <fbarrat@linux.ibm.com>
Message-Id: <
20220624084921.399219-7-danielhb413@gmail.com>
Daniel Henrique Barboza [Fri, 24 Jun 2022 08:49:14 +0000 (05:49 -0300)]
ppc/pnv: turn PnvPHB4 into a PnvPHB backend
Change the parent type of the PnvPHB4 device to TYPE_PARENT since the
PCI bus is going to be initialized by the PnvPHB parent. Functions that
needs to access the bus via a PnvPHB4 object can do so via the
phb4->phb_base pointer.
pnv_phb4_pec now creates a PnvPHB object.
The powernv9 machine class will create PnvPHB devices with version '4'.
powernv10 will create using version '5'. Both are using global machine
properties in their class_init() to do that.
These changes will benefit us when adding PnvPHB user creatable devices
for powernv9 and powernv10.
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Reviewed-by: Frederic Barrat <fbarrat@linux.ibm.com>
Message-Id: <
20220624084921.399219-6-danielhb413@gmail.com>
Daniel Henrique Barboza [Fri, 24 Jun 2022 08:49:13 +0000 (05:49 -0300)]
ppc/pnv: add PHB4 bus init helper
Similar to what we already did for the PnvPHB3 device, let's add a
helper to init the bus when using a PnvPHB4. This helper will be used by
PnvPHb when PnvPHB4 turns into a backend.
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Reviewed-by: Frederic Barrat <fbarrat@linux.ibm.com>
Message-Id: <
20220624084921.399219-5-danielhb413@gmail.com>
Daniel Henrique Barboza [Fri, 24 Jun 2022 08:49:12 +0000 (05:49 -0300)]
ppc/pnv: turn PnvPHB3 into a PnvPHB backend
We need a handful of changes that needs to be done in a single swoop to
turn PnvPHB3 into a PnvPHB backend.
In the PnvPHB3, since the PnvPHB device implements PCIExpressHost and
will hold the PCI bus, change PnvPHB3 parent to TYPE_DEVICE. There are a
couple of instances in pnv_phb3.c that needs to access the PCI bus, so a
phb_base pointer is added to allow access to the parent PnvPHB. The
PnvPHB3 root port will now be connected to a PnvPHB object.
In pnv.c, the powernv8 machine chip8 will now hold an array of PnvPHB
objects. pnv_get_phb3_child() needs to be adapted to return the PnvPHB3
backend from the PnvPHB child. A global property is added in
pnv_machine_power8_class_init() to ensure that all PnvPHBs are created
with phb->version = 3.
After all these changes we're still able to boot a powernv8 machine with
default settings. The real gain will come with user created PnvPHB
devices, coming up next.
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Reviewed-by: Frederic Barrat <fbarrat@linux.ibm.com>
Message-Id: <
20220624084921.399219-4-danielhb413@gmail.com>
Daniel Henrique Barboza [Fri, 24 Jun 2022 08:49:11 +0000 (05:49 -0300)]
ppc/pnv: add PnvPHB base/proxy device
The PnvPHB device is going to be the base device for all other powernv
PHBs. It consists of a device that has the same user API as the other
PHB, namely being a PCIHostBridge and having chip-id and index
properties. It also has a 'backend' pointer that will be initialized
with the PHB implementation that the device is going to use.
The initialization of the PHB backend is done by checking the PHB
version via a 'version' attribute that can be set via a global machine
property. The 'version' field will be used to make adjustments based on
the running version, e.g. PHB3 uses a 'chip' reference while PHB4 uses
'pec'. To init the PnvPHB bus we'll rely on helpers for each version.
The version 3 helper is already added (pnv_phb3_bus_init), the PHB4
helper will be added later on.
For now let's add the basic logic of the PnvPHB object, which consists
mostly of pnv_phb_realize() doing all the work of checking the
phb->version set, initializing the proper backend, passing through its
attributes to the chosen backend, finalizing the backend realize and
adding a root port in the end.
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Reviewed-by: Frederic Barrat <fbarrat@linux.ibm.com>
Message-Id: <
20220624084921.399219-3-danielhb413@gmail.com>
Daniel Henrique Barboza [Fri, 24 Jun 2022 08:49:10 +0000 (05:49 -0300)]
ppc/pnv: add PHB3 bus init helper
The PnvPHB3 bus init consists of initializing the pci_io and pci_mmio
regions, registering it via pci_register_root_bus() and then setup the
iommu.
We'll want to init the bus from outside pnv_phb3.c when the bus is
removed from the PnvPHB3 device and put into a new parent PnvPHB device.
The new pnv_phb3_bus_init() helper will be used by the parent to init
the bus when using the PHB3 backend.
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Reviewed-by: Frederic Barrat <fbarrat@linux.ibm.com>
Message-Id: <
20220624084921.399219-2-danielhb413@gmail.com>
Lucas Mateus Castro (alqotel) [Fri, 5 Aug 2022 14:15:22 +0000 (11:15 -0300)]
target/ppc: Bugfix FP when OE/UE are set
When an overflow exception occurs and OE is set the intermediate result
should be adjusted (by subtracting from the exponent) to avoid rounding
to inf. The same applies to an underflow exceptionion and UE (but adding
to the exponent). To do this set the fp_status.rebias_overflow when OE
is set and fp_status.rebias_underflow when UE is set as the FPU will
recalculate in case of a overflow/underflow if the according rebias* is
set.
Signed-off-by: Lucas Mateus Castro (alqotel) <lucas.araujo@eldorado.org.br>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <
20220805141522.412864-3-lucas.araujo@eldorado.org.br>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Lucas Mateus Castro (alqotel) [Fri, 5 Aug 2022 14:15:21 +0000 (11:15 -0300)]
fpu: Add rebias bool, value and operation
Added the possibility of recalculating a result if it overflows or
underflows, if the result overflow and the rebias bool is true then the
intermediate result should have 3/4 of the total range subtracted from
the exponent. The same for underflow but it should be added to the
exponent of the intermediate number instead.
Signed-off-by: Lucas Mateus Castro (alqotel) <lucas.araujo@eldorado.org.br>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <
20220805141522.412864-2-lucas.araujo@eldorado.org.br>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Nicholas Piggin [Thu, 11 Aug 2022 09:37:26 +0000 (19:37 +1000)]
ppc/pnv: Add initial P9/10 SBE model
The SBE (Self Boot Engine) are on-chip microcontrollers that perform
early boot steps, as well as provide some runtime facilities (e.g.,
timer, secure register access, MPIPL). The latter facilities are
accessed mostly via a message system called SBEFIFO.
This driver provides initial emulation for the SBE runtime registers
and a very basic SBEFIFO implementation that provides the timer
command. This covers the basic SBE behaviour expected by skiboot when
booting.
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Message-Id: <
20220811093726.
1442343-1-npiggin@gmail.com>
[danielhb: fixed SBE_HOST_RESPONSE_MASK long line]
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Nicholas Piggin [Sun, 31 Jul 2022 01:33:58 +0000 (11:33 +1000)]
target/ppc: Fix host PVR matching for KVM
ppc_cpu_compare_class_pvr_mask() should match the best CPU class in the
family, because it is used by the KVM subsystem to find the host CPU
class. Since commit
03ae4133ab8 ("target-ppc: Add pvr_match()
callback"), it matches any class in the family (the first one in the
comparison list).
Since commit
f30c843ced5 ("ppc/pnv: Introduce PowerNV machines with
fixed CPU models"), pnv has relied on pnv_match having these new
semantics to check machine compatibility with a CPU family.
Resolve this by adding a parameter to the pvr_match function to select
the best or any match, and restore the old behaviour for the KVM case.
Prior to this fix, e.g., a POWER9 DD2.3 KVM host matches to the
power9_v1.0 class (because that happens to be the first POWER9 family
CPU compared). After the patch, it matches the power9_v2.0 class.
This approach requires pnv_match contain knowledge of the CPU classes
implemented in the same family, which feels ugly. But pushing the 'best'
match down to the class would still require they know about one another
which is not obviously much better. For now this gets things working.
Fixes:
03ae4133ab8 ("target-ppc: Add pvr_match() callback")
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Message-Id: <
20220731013358.170187-1-npiggin@gmail.com>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Alexey Kardashevskiy [Tue, 19 Jul 2022 07:48:03 +0000 (17:48 +1000)]
pseries: Update SLOF firmware image
The only change is that now SLOF can also boot big endian zImage
but kernel-addr=0 is still required.
Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Richard Henderson [Tue, 30 Aug 2022 16:40:41 +0000 (09:40 -0700)]
Open 7.2 development tree
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Richard Henderson [Tue, 30 Aug 2022 16:40:11 +0000 (09:40 -0700)]
Update version for v7.1.0 release
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Thomas Huth [Mon, 29 Aug 2022 12:19:39 +0000 (14:19 +0200)]
tests/avocado/migration: Get find_free_port() from the ports
In upstream Avocado, the find_free_port() function is not available
from "network" anymore, but must be used via "ports", see:
https://github.com/avocado-framework/avocado/commit/
22fc98c6ff76cc55c48
To be able to update to a newer Avocado version later, let's use
the new way for accessing the find_free_port() function here.
Signed-off-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <
20220829121939.209329-1-thuth@redhat.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
Akihiko Odaki [Mon, 29 Aug 2022 08:33:01 +0000 (17:33 +0900)]
tests/qtest/ac97-test: Correct reference to driver
Signed-off-by: Akihiko Odaki <akihiko.odaki@daynix.com>
Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Message-Id: <
20220829083301.143527-1-akihiko.odaki@daynix.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
Thomas Huth [Tue, 23 Aug 2022 11:20:36 +0000 (13:20 +0200)]
gitlab-ci: Only use one process in Windows jobs for compilation
The Windows jobs are currently aborting at weird places - and
there's the suspicion that it's due to memory constraints in
the Windows containers. Let's switch to single-threaded compilation
to decrease the pressure on the memory load, and to make the
job more deterministic for further investigations.
Message-Id: <
20220825193323.104768-1-thuth@redhat.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
Matheus Tavares Bernardino [Tue, 23 Aug 2022 13:46:19 +0000 (10:46 -0300)]
docs/devel/testing: fix minor typo
Signed-off-by: Matheus Tavares Bernardino <quic_mathbern@quicinc.com>
Message-Id: <
421fb28678d1077c0b14978e359b4e1469cc0168.
1661262376.git.quic_mathbern@quicinc.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
Thomas Huth [Wed, 24 Aug 2022 08:09:26 +0000 (10:09 +0200)]
tests/avocado: Fix trivial typo
The intention was likely to use "intend" instead of "indent" here.
Message-Id: <
20220824080926.568935-1-thuth@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Thomas Huth <thuth@redhat.com>
Thomas Huth [Wed, 24 Aug 2022 15:11:21 +0000 (17:11 +0200)]
tests/avocado: Do not run tests that require libslirp if it is not available
Some avocado tests blindly assume that QEMU has been compiled with libslirp
enabled and fail badly if it is missing. Add a proper check to cancel the
tests in this case.
Message-Id: <
20220824151122.704946-6-thuth@redhat.com>
Acked-by: Samuel Thibault <samuel.thibault@ens-lyon.org>
Signed-off-by: Thomas Huth <thuth@redhat.com>
Thomas Huth [Wed, 24 Aug 2022 15:11:18 +0000 (17:11 +0200)]
tests/vm: Add libslirp to the VM tests
We are going to remove the slirp submodule from the QEMU repository, so
we should make sure to install the distro's libslirp to get the same
test coverage as before in the VMs.
Message-Id: <
20220824151122.704946-3-thuth@redhat.com>
Acked-by: Samuel Thibault <samuel.thibault@ens-lyon.org>
Signed-off-by: Thomas Huth <thuth@redhat.com>
Bin Meng [Wed, 24 Aug 2022 09:40:23 +0000 (17:40 +0800)]
tests/qtest: prom-env-test: Use double quotes to pass the prom-env option
Single quotes like -prom-env 'nvramrc=
cafec0de 4000 l!' in the arguments
are not removed in the Windows environment before it is passed to the
QEMU executable. Such argument causes a failure in the QEMU prom-env
option parser codes.
Change to use double quotes which works fine on all platforms.
Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Message-Id: <
20220824094029.
1634519-46-bmeng.cn@gmail.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
Bin Meng [Wed, 24 Aug 2022 09:40:21 +0000 (17:40 +0800)]
tests/qtest: npcm7xx_emc-test: Skip running test_{tx, rx} on win32
The test cases 'test_{tx,rx}' call socketpair() which does not exist
on win32. Exclude them.
Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Message-Id: <
20220824094029.
1634519-44-bmeng.cn@gmail.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
Bin Meng [Wed, 24 Aug 2022 09:40:14 +0000 (17:40 +0800)]
tests/qtest: machine-none-test: Use double quotes to pass the cpu option
Single quotes in the arguments (e.g.: -cpu 'qemu64,apic-id=0') are
not removed in the Windows environment before it is passed to the
QEMU executable. Such argument causes a failure in the QEMU CPU
option parser codes.
Change to use double quotes which works fine on all platforms.
Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Message-Id: <
20220824094029.
1634519-37-bmeng.cn@gmail.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
Bin Meng [Wed, 24 Aug 2022 09:40:13 +0000 (17:40 +0800)]
tests/qtest: device-plug-test: Reverse the usage of double/single quotes
The usage of double/single quotes in test_pci_unplug_json_request()
should be reversed to work on both win32 and non-win32 platforms:
- The value of -device parameter needs to be surrounded by "" as
Windows does not drop '' when passing it to QEMU which causes
QEMU command line option parser failure.
- The JSON key/value pairs need to be surrounded by '' to make the
JSON parser happy on Windows.
Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Message-Id: <
20220824094029.
1634519-36-bmeng.cn@gmail.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
Xuzhou Cheng [Wed, 24 Aug 2022 09:40:03 +0000 (17:40 +0800)]
tests/qtest: libqos: Rename malloc.h to libqos-malloc.h
The qtest/libqos directory is included via the "-I" option to search
for header files when building qtest. Unfortunately the malloc.h has
a name conflict with the standard libc header, leading to a build
failure on the Windows host, due to the MinGW libc stdlib.h header
file includes malloc.h and it now gets wrongly pointed to the one
in the qtest/libqos directory.
Rename "qtest/libqos/malloc.h" to "qtest/libqos/libqos-malloc.h" to
avoid the namespace pollution.
Signed-off-by: Xuzhou Cheng <xuzhou.cheng@windriver.com>
Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Message-Id: <
20220824094029.
1634519-26-bmeng.cn@gmail.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
Xuzhou Cheng [Wed, 24 Aug 2022 09:40:02 +0000 (17:40 +0800)]
tests/qtest: libqos: Drop inclusion of <sys/wait.h>
There is no <sys/wait.h> in the Windows build environment. Actually
this is not needed in the non-win32 builds too. Drop it.
Signed-off-by: Xuzhou Cheng <xuzhou.cheng@windriver.com>
Signed-off-by: Bin Meng <bin.meng@windriver.com>
Tested-by: Thomas Huth <thuth@redhat.com>
Message-Id: <
20220824094029.
1634519-25-bmeng.cn@gmail.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
Thomas Huth [Wed, 10 Aug 2022 12:57:20 +0000 (14:57 +0200)]
util/mmap-alloc: Remove qemu_mempath_getpagesize()
The last user of this function has just been removed, so we can
drop this function now, too.
Message-Id: <
20220810125720.
3849835-4-thuth@redhat.com>
Reviewed-by: David Hildenbrand <david@redhat.com>
Reviewed-by: Claudio Imbrenda <imbrenda@linux.ibm.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
Thomas Huth [Wed, 10 Aug 2022 12:57:19 +0000 (14:57 +0200)]
softmmu/physmem: Remove the ifdef __linux__ around the pagesize functions
Now that host_memory_backend_pagesize() is not depending on the hugetlb
memory path handling anymore, we can also remove the #ifdef and the
TOCTTOU comment from the calling functions - the code should now work
equally well on all host architectures.
Message-Id: <
20220810125720.
3849835-3-thuth@redhat.com>
Reviewed-by: Claudio Imbrenda <imbrenda@linux.ibm.com>
Acked-by: David Hildenbrand <david@redhat.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
Thomas Huth [Wed, 10 Aug 2022 12:57:18 +0000 (14:57 +0200)]
backends/hostmem: Fix support of memory-backend-memfd in qemu_maxrampagesize()
It is currently not possible yet to use "memory-backend-memfd" on s390x
with hugepages enabled. This problem is caused by qemu_maxrampagesize()
not taking memory-backend-memfd objects into account yet, so the code
in s390_memory_init() fails to enable the huge page support there via
s390_set_max_pagesize(). Fix it by generalizing the code, so that it
looks at qemu_ram_pagesize(memdev->mr.ram_block) instead of re-trying
to get the information from the filesystem.
Suggested-by: David Hildenbrand <david@redhat.com>
Buglink: https://bugzilla.redhat.com/show_bug.cgi?id=2116496
Message-Id: <
20220810125720.
3849835-2-thuth@redhat.com>
Reviewed-by: David Hildenbrand <david@redhat.com>
Reviewed-by: Claudio Imbrenda <imbrenda@linux.ibm.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
Ilya Leoshkevich [Wed, 17 Aug 2022 16:15:29 +0000 (18:15 +0200)]
target/s390x: Fix CLFIT and CLGIT immediate size
I2 is 16 bits, not 32.
Found by running valgrind's none/tests/s390x/traps.
Fixes:
1c2687518235 ("target-s390: Implement COMPARE AND TRAP")
Signed-off-by: Ilya Leoshkevich <iii@linux.ibm.com>
Message-Id: <
20220817161529.597414-1-iii@linux.ibm.com>
Reviewed-by: David Hildenbrand <david@redhat.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
Christian Borntraeger [Wed, 27 Jul 2022 13:51:20 +0000 (13:51 +0000)]
s390x/cpumodel: add stfl197 processor-activity-instrumentation extension 1
Add stfle 197 (processor-activity-instrumentation extension 1) to the
gen16 default model and fence it off for 7.1 and older.
Signed-off-by: Christian Borntraeger <borntraeger@linux.ibm.com>
Reviewed-by: David Hildenbrand <david@redhat.com>
Message-Id: <
20220727135120.12784-1-borntraeger@linux.ibm.com>
Acked-by: Cornelia Huck <cohuck@redhat.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
Cornelia Huck [Wed, 27 Jul 2022 12:17:55 +0000 (14:17 +0200)]
hw: Add compat machines for 7.2
Add 7.2 machine types for arm/i440fx/m68k/q35/s390x/spapr.
Signed-off-by: Cornelia Huck <cohuck@redhat.com>
Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Message-Id: <
20220727121755.395894-1-cohuck@redhat.com>
[thuth: fixed conflict with pcmc->legacy_no_rng_seed]
Signed-off-by: Thomas Huth <thuth@redhat.com>
Bin Meng [Wed, 24 Aug 2022 09:39:59 +0000 (17:39 +0800)]
tests/qtest: migration-test: Skip running test_migrate_fd_proto on win32
The test case 'test_migrate_fd_proto' calls socketpair() which does
not exist on win32. Exclude it. The helper function wait_command_fd()
is not needed anymore, hence exclude it too.
Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Dr. David Alan Gilbert <dgilbert@redhat.com>
Message-Id: <
20220824094029.
1634519-22-bmeng.cn@gmail.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
Bin Meng [Wed, 24 Aug 2022 09:39:58 +0000 (17:39 +0800)]
tests/qtest: i440fx-test: Skip running request_{bios, pflash} for win32
The request_{bios,pflash} test cases call mmap() which does not
exist on win32. Exclude them.
Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Message-Id: <
20220824094029.
1634519-21-bmeng.cn@gmail.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
Bin Meng [Wed, 24 Aug 2022 09:39:56 +0000 (17:39 +0800)]
tests/qtest: Build cases that use memory-backend-file for posix only
As backends/meson.build tells us, hostmem-file.c is only supported on
POSIX platforms, hence any test case that utilizes the memory backend
file should be guarded by CONFIG_POSIX too.
Signed-off-by: Bin Meng <bin.meng@windriver.com>
Acked-by: Thomas Huth <thuth@redhat.com>
Message-Id: <
20220824094029.
1634519-19-bmeng.cn@gmail.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
Bin Meng [Wed, 24 Aug 2022 09:39:54 +0000 (17:39 +0800)]
tests/qtest: Build e1000e-test for posix only
The whole e1000e-test test case relies on socketpair() which does
not exist on win32.
Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Message-Id: <
20220824094029.
1634519-17-bmeng.cn@gmail.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
Bin Meng [Wed, 24 Aug 2022 09:39:53 +0000 (17:39 +0800)]
tests/qtest: Adapt {m48t59,rtc}-test cases for win32
There is no tm_gmtoff member in 'struct tm' on Windows.
Update rtc-test.c and m48t59-test.c accordingly.
Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Message-Id: <
20220824094029.
1634519-16-bmeng.cn@gmail.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
Bin Meng [Wed, 24 Aug 2022 09:39:52 +0000 (17:39 +0800)]
backends/tpm: Exclude headers and macros that don't exist on win32
These headers and macros do not exist on Windows. Exclude them.
Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Stefan Berger <stefanb@linux.ibm.com>
Message-Id: <
20220824094029.
1634519-15-bmeng.cn@gmail.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>