OSDN Git Service
José Fonseca [Wed, 6 Oct 2010 09:11:15 +0000 (10:11 +0100)]
llvmpipe: Cleanup depth-stencil clears.
Only cosmetic changes. No actual practical difference.
José Fonseca [Wed, 6 Oct 2010 09:09:37 +0000 (10:09 +0100)]
util: Cleanup util_pack_z_stencil and friends.
- Handle PIPE_FORMAT_Z32_FLOAT packing correctly.
- In the integer version z shouldn't be passed as as double.
- Make it clear that the integer versions should only be used for masks.
- Make integer type sizes explicit (uint32_t for now, although
uint64_t will be necessary later to encode f32_s8_x24).
José Fonseca [Wed, 6 Oct 2010 17:44:51 +0000 (18:44 +0100)]
gallivm: Compute lod as integer whenever possible.
More accurate/faster results for PIPE_TEX_MIPFILTER_NEAREST. Less
FP <-> SI conversion overall.
José Fonseca [Wed, 6 Oct 2010 13:53:19 +0000 (14:53 +0100)]
gallivm: Only apply min/max_lod when necessary.
Keith Whitwell [Thu, 30 Sep 2010 15:43:56 +0000 (16:43 +0100)]
gallivm: don't apply zero lod_bias
José Fonseca [Wed, 6 Oct 2010 17:31:36 +0000 (18:31 +0100)]
gallivm: Combined ifloor & fract helper.
The only way to ensure we don't do redundant FP <-> SI conversions.
José Fonseca [Wed, 6 Oct 2010 16:44:05 +0000 (17:44 +0100)]
gallivm: Fast implementation of iround(log2(x))
Not tested yet, but should be correct.
José Fonseca [Wed, 6 Oct 2010 13:06:14 +0000 (14:06 +0100)]
gallivm: Use a faster (and less accurate) log2 in lod computation.
José Fonseca [Wed, 6 Oct 2010 11:09:32 +0000 (12:09 +0100)]
gallivm: Take the type signedness in consideration in round/ceil/floor.
Eric Anholt [Mon, 4 Oct 2010 22:08:03 +0000 (15:08 -0700)]
i965: Fix up IF/ELSE/ENDIF for gen6.
The jump delta is now in the part of the instruction where the
destination fields used to be, and the src args are ignored (or not,
for the new non-predicated IF that we don't use yet).
Eric Anholt [Mon, 4 Oct 2010 22:09:18 +0000 (15:09 -0700)]
i965: Gen6 no longer has the IFF instruction; always use IF.
Eric Anholt [Wed, 6 Oct 2010 16:57:55 +0000 (09:57 -0700)]
i965: Add back gen6 headerless FB writes to the new FS backend.
It's not that hard to detect when we need the header.
Jerome Glisse [Wed, 6 Oct 2010 16:56:53 +0000 (12:56 -0400)]
r600g: fix dirty state handling
Avoid having object ending up in dead list of dirty object.
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
Eric Anholt [Tue, 5 Oct 2010 17:25:22 +0000 (10:25 -0700)]
i965: Also do constant propagation for the second operand of CMP.
We could do the first operand as well by flipping the comparison, but
this covered several CMPs in code I was looking at.
Eric Anholt [Tue, 5 Oct 2010 17:20:16 +0000 (10:20 -0700)]
i965: Enable the constant propagation code.
A debug disable had slipped in.
Jerome Glisse [Wed, 6 Oct 2010 13:40:27 +0000 (09:40 -0400)]
r600g: avoid segfault due to unintialized list pointer
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
José Fonseca [Wed, 6 Oct 2010 08:40:51 +0000 (09:40 +0100)]
llvmpipe: Fix sprite coord perspective interpolation of Q.
Q coordinate's coefficients also need to be multiplied by w, otherwise
it will have 1/w, causing problems with TXP.
José Fonseca [Sun, 26 Sep 2010 10:22:20 +0000 (11:22 +0100)]
llvmpipe: Fix perspective interpolation for point sprites.
Once a fragment is generated with LP_INTERP_PERSPECTIVE set for an input,
it will do a divide by w for that input. Therefore it's not OK to treat LP_INTERP_PERSPECTIVE as
LP_INTERP_LINEAR or vice-versa, even if the attribute is known to not
vary.
A better strategy would be to take the primitive in consideration when
generating the fragment shader key, and therefore avoid the per-fragment
perspective divide.
José Fonseca [Tue, 5 Oct 2010 09:50:02 +0000 (10:50 +0100)]
llvmpipe: Dump a few missing shader key flags.
Keith Whitwell [Sun, 3 Oct 2010 10:39:02 +0000 (11:39 +0100)]
llvmpipe: make debug_fs_variant respect variant->nr_samplers
José Fonseca [Mon, 4 Oct 2010 16:05:03 +0000 (17:05 +0100)]
retrace: Handle clear_render_target and clear_depth_stencil.
Dave Airlie [Tue, 5 Oct 2010 23:21:16 +0000 (09:21 +1000)]
r600g: add evergreen stencil support.
this sets the stencil up for evergreen properly.
Jerome Glisse [Tue, 5 Oct 2010 20:14:11 +0000 (16:14 -0400)]
r600g: userspace fence to avoid kernel call for testing bo busy status
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
Brian Paul [Tue, 5 Oct 2010 20:32:59 +0000 (14:32 -0600)]
st/mesa: replace assertion w/ conditional in framebuffer invalidation
https://bugs.freedesktop.org/show_bug.cgi?id=30632
NOTE: this is a candidate for the 7.9 branch.
Jerome Glisse [Tue, 5 Oct 2010 19:23:07 +0000 (15:23 -0400)]
r600g: simplify block relocation
Since flush rework there could be only one relocation per
register in a block.
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
Bas Nieuwenhuizen [Tue, 5 Oct 2010 19:01:43 +0000 (21:01 +0200)]
r600g: use dirty list to track dirty blocks
Got a speed up by tracking the dirty blocks in a seperate list instead of looping through all blocks. This version should work with block that get their dirty state disabled again and I added a dirty check during the flush as some blocks were already dirty.
Ian Romanick [Tue, 5 Oct 2010 17:07:16 +0000 (10:07 -0700)]
docs: added news item for 7.9 release
Also fix link to release notes in 7.9-rc1 news item.
Ian Romanick [Mon, 27 Sep 2010 17:17:11 +0000 (10:17 -0700)]
docs: Import news updates from 7.9 branch
Partially cherry-picked from commit
61653b488da76ee1ca4f77363e222d3b717dd865
Ian Romanick [Wed, 16 Jun 2010 21:28:08 +0000 (14:28 -0700)]
docs: Update mailing lines from sf.net to freedesktop.org
(cherry picked from commit
c19bc5de961fe5e1f8a17131bcfae3dbcccaca29)
Ian Romanick [Wed, 16 Jun 2010 21:24:46 +0000 (14:24 -0700)]
docs: download.html does not need to be updated for each release
(cherry picked from commit
41e371e351cc4c77b2b20a545af2dfa2dab253d7)
Ian Romanick [Tue, 5 Oct 2010 16:55:54 +0000 (09:55 -0700)]
docs: Import 7.8.x release notes from 7.8 branch.
Ian Romanick [Tue, 5 Oct 2010 16:54:09 +0000 (09:54 -0700)]
docs: Import 7.9 release notes from 7.9 branch.
Nicolas Kaiser [Tue, 5 Oct 2010 09:26:43 +0000 (11:26 +0200)]
nv50: fix always true conditional in shader optimization
Jerome Glisse [Tue, 5 Oct 2010 14:29:30 +0000 (10:29 -0400)]
r600g: improve bo flushing
Flush read cache before writting register. Track flushing inside
of a same cs and avoid reflushing same bo if not necessary. Allmost
properly force flush if bo rendered too and then use as a texture
in same cs (missing pipeline flush dunno if it's needed or not).
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
Jerome Glisse [Tue, 5 Oct 2010 12:42:42 +0000 (08:42 -0400)]
r600g: store reloc information in bo structure
Allow fast lookup of relocation information & id which
was a CPU time consumming operation.
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
Dave Airlie [Tue, 5 Oct 2010 09:08:41 +0000 (19:08 +1000)]
pb: fix numDelayed accounting
we weren't decreasing when removing from the list.
Dave Airlie [Tue, 5 Oct 2010 06:00:48 +0000 (16:00 +1000)]
r600g: avoid unneeded bo wait
if we know the bo has gone not busy, no need to add another bo wait
thanks to Andre (taiu) on irc for pointing this out.
Dave Airlie [Tue, 5 Oct 2010 06:00:23 +0000 (16:00 +1000)]
r600g: drop use_mem_constant.
since we plan on using dx10 constant buffers everywhere.
Dave Airlie [Tue, 5 Oct 2010 05:57:57 +0000 (15:57 +1000)]
r600g: drop mman allocator
we don't use this since constant buffers are now being used on all gpus.
Dave Airlie [Tue, 5 Oct 2010 05:51:38 +0000 (15:51 +1000)]
r600g: add bo busy backoff.
When we go to do a lot of bos in one draw like constant bufs we need
to avoid bouncing off the busy ioctl, this mitigates by backing off
on busy bos for a short amount of times.
Dave Airlie [Tue, 5 Oct 2010 05:50:58 +0000 (15:50 +1000)]
pb: don't keep checking buffers after first busy
If we assume busy buffers are added to the list in order its unlikely
we'd fine one after the first busy one that isn't busy.
Dave Airlie [Tue, 5 Oct 2010 05:35:52 +0000 (15:35 +1000)]
r600g: add bo fenced list.
this just keeps a list of bos submitted together, and uses them to decide
bo busy state for the whole group.
Brian Paul [Tue, 5 Oct 2010 01:59:23 +0000 (19:59 -0600)]
swrast: fix choose_depth_texture_level() to respect mipmap filtering state
NOTE: this is a candidate for the 7.9 branch.
Marek Olšák [Mon, 4 Oct 2010 19:19:27 +0000 (21:19 +0200)]
r300g: fix microtiling for 16-bits-per-channel formats
These texture formats (like R16G16B16A16_UNORM) were untested until now
because st/mesa doesn't use them. I am testing this with a hacked st/mesa
here.
Marek Olšák [Tue, 5 Oct 2010 00:56:14 +0000 (02:56 +0200)]
update release notes for Gallium
I am trying to be exhaustive, but still I might have missed tons of other
changes to Gallium.
(cherry picked from commit
968a9ec76eadf55e8b58171884e1175d7b8cf59a)
Conflicts:
docs/relnotes-7.9.html
Ian Romanick [Mon, 4 Oct 2010 23:35:09 +0000 (16:35 -0700)]
docs: Add list of bugs fixed in 7.9
Eric Anholt [Mon, 4 Oct 2010 22:07:17 +0000 (15:07 -0700)]
i965: Add support for gen6 FB writes to the new FS.
This uses message headers for now, since we'll need it for MRT. We
can cut out the header later.
Eric Anholt [Mon, 4 Oct 2010 22:03:32 +0000 (15:03 -0700)]
i965: In disasm, gen6 fb writes don't put msg reg # in destreg_conditionalmod.
It instead sensibly appears in the src0 slot.
Eric Anholt [Mon, 4 Oct 2010 18:48:04 +0000 (11:48 -0700)]
i965: Add initial folding of constants into operand immediate slots.
We could try to detect this in expression handling and do it
proactively there, but it seems like less logic to do it in one
optional pass at the end.
Eric Anholt [Sun, 3 Oct 2010 22:15:18 +0000 (15:15 -0700)]
i965: Add trivial dead code elimination in the new FS backend.
The glsl core should be handling most dead code issues for us, but we
generate some things in codegen that may not get used, like the 1/w
value or pixel deltas. It seems a lot easier this way than trying to
work out up front whether we're going to use those values or not.
Eric Anholt [Sun, 3 Oct 2010 22:01:20 +0000 (15:01 -0700)]
i965: Be more conservative on live interval calculation.
This also means that our intervals now highlight dead code.
Vinson Lee [Mon, 4 Oct 2010 22:56:55 +0000 (15:56 -0700)]
r600g: Fix SCons build.
Jerome Glisse [Mon, 4 Oct 2010 14:40:07 +0000 (10:40 -0400)]
r600g: remove dead label & fix indentation
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
Jerome Glisse [Mon, 4 Oct 2010 14:38:50 +0000 (10:38 -0400)]
r600g: rename radeon_ws_bo to r600_bo
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
Jerome Glisse [Mon, 4 Oct 2010 14:37:32 +0000 (10:37 -0400)]
r600g: use r600_bo for relocation argument, simplify code
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
Jerome Glisse [Mon, 4 Oct 2010 14:25:23 +0000 (10:25 -0400)]
r600g: allow r600_bo to be a sub allocation of a big bo
Add bo offset everywhere needed if r600_bo is ever a sub bo
of a bigger bo.
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
Jerome Glisse [Mon, 4 Oct 2010 14:06:13 +0000 (10:06 -0400)]
r600g: rename radeon_ws_bo to r600_bo
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
Krzysztof Smiechowicz [Mon, 4 Oct 2010 18:43:29 +0000 (11:43 -0700)]
nvfx: Pair os_malloc_aligned() with os_free_aligned().
From AROS.
Dave Airlie [Mon, 4 Oct 2010 06:41:49 +0000 (16:41 +1000)]
r600g: TODO domain management
no wonder it was slow, the code is deliberately forcing stuff into GTT,
we used to have domain management but it seems to have disappeared.
Dave Airlie [Mon, 4 Oct 2010 06:26:46 +0000 (16:26 +1000)]
r600g: fix wwarning in bo_map function
Dave Airlie [Mon, 4 Oct 2010 06:24:59 +0000 (16:24 +1000)]
r600g: the code to check whether a new vertex shader is needed was wrong
this code was memcmp'ing two structs, but refcounting one of them afterwards,
so any subsequent memcmp was never going to work.
again this stops unnecessary uploads of vertex program,
Dave Airlie [Mon, 4 Oct 2010 05:58:39 +0000 (15:58 +1000)]
r600g: break out of search for reloc bo after finding it.
this function was taking quite a lot of pointless CPU.
Eric Anholt [Sun, 3 Oct 2010 07:24:09 +0000 (00:24 -0700)]
i965: Fix glean/texSwizzle regression in previous commit.
Easy enough patch, who needs a full test run. Oh, that's right. Me.
Eric Anholt [Sun, 3 Oct 2010 06:27:31 +0000 (23:27 -0700)]
i965: Set up swizzling of shadow compare results for GL_DEPTH_TEXTURE_MODE.
The brw_wm_surface_state.c handling of GL_DEPTH_TEXTURE_MODE doesn't
apply to shadow compares, which always return an intensity value. The
texture swizzles can do the job for us.
Fixes:
glsl1-shadow2D(): 1
glsl1-shadow2D(): 3
Eric Anholt [Sun, 3 Oct 2010 06:44:29 +0000 (23:44 -0700)]
i965: Add support for EXT_texture_swizzle to the new FS backend.
Marek Olšák [Sat, 2 Oct 2010 21:13:12 +0000 (23:13 +0200)]
r300g: add support for L8A8 colorbuffers
Blending with DST_ALPHA is undefined. SRC_ALPHA works, though.
I bet some other formats have similar limitations too.
Marek Olšák [Sat, 2 Oct 2010 19:42:22 +0000 (21:42 +0200)]
r300g: add support for R8G8 colorbuffers
The hw swizzles have been obtained by a brute force approach,
and only C0 and C2 are stored in UV88, the other channels are
ignored.
R16G16 is going to be a lot trickier.
Dave Airlie [Wed, 11 Aug 2010 09:04:05 +0000 (19:04 +1000)]
mesa/st: initial attempt at RG support for gallium drivers
passes all piglit RG tests with softpipe.
Kenneth Graunke [Sat, 2 Oct 2010 02:53:24 +0000 (19:53 -0700)]
i965: Fix incorrect batchbuffer size in gen6 clip state command.
FORCE_ZERO_RTAINDEX should be in the fourth (and final) dword.
Eric Anholt [Sat, 2 Oct 2010 00:18:07 +0000 (17:18 -0700)]
i965: Don't try to emit code if we failed register allocation.
Eric Anholt [Fri, 1 Oct 2010 23:36:17 +0000 (16:36 -0700)]
i965: Fix off-by-ones in handling the last members of register classes.
Luckily, one of them would result in failing out register allocation
when the other bugs were encountered. Applies to
glsl-fs-vec4-indexing-temp-dst-in-nested-loop-combined, which still
fails register allocation, but now legitimately.
Eric Anholt [Fri, 1 Oct 2010 23:35:55 +0000 (16:35 -0700)]
i965: Add a sanity check for register allocation sizes.
Eric Anholt [Fri, 1 Oct 2010 22:42:39 +0000 (15:42 -0700)]
i965: When producing a single channel swizzle, don't make a temporary.
This quickly cuts 8% of the instructions in my glsl demo.
Eric Anholt [Fri, 1 Oct 2010 22:11:09 +0000 (15:11 -0700)]
i965: Restore the forcing of aligned pairs for delta_xy on chips with PLN.
By doing so using the register allocator now, we avoid wasting a
register to make the alignment happen.
Alex Deucher [Sat, 2 Oct 2010 00:13:36 +0000 (20:13 -0400)]
r600c: fix segfault in evergreen stencil code
Fixes:
https://bugs.freedesktop.org/show_bug.cgi?id=30551
Vinson Lee [Sat, 2 Oct 2010 00:06:33 +0000 (17:06 -0700)]
r600g: Remove unnecessary headers.
Vinson Lee [Sat, 2 Oct 2010 00:00:43 +0000 (17:00 -0700)]
r600g: Remove unused variable.
Fixes this GCC warning.
r600_shader.c: In function 'tgsi_split_literal_constant':
r600_shader.c:818: warning: unused variable 'index'
Ian Romanick [Fri, 1 Oct 2010 23:40:14 +0000 (16:40 -0700)]
rgtc: Detect RGTC formats as color formats and as compressed formats
Ian Romanick [Fri, 1 Oct 2010 23:35:25 +0000 (16:35 -0700)]
mesa: Trivial correction to comment
Ian Romanick [Fri, 1 Oct 2010 23:23:06 +0000 (16:23 -0700)]
mesa: Fix misplaced #endif
If FEATURE_texture_s3tc is not defined, FXT1 formats would erroneously
fall through to the MESA_FORMAT_RGBA_FLOAT32 case.
Ian Romanick [Fri, 1 Oct 2010 23:21:12 +0000 (16:21 -0700)]
ARB_texture_rg: Add GL_COMPRESSED_{RED,RG} cases in _mesa_is_color_format
Ian Romanick [Fri, 1 Oct 2010 23:07:28 +0000 (16:07 -0700)]
mesa: Add ARB_texture_compression_rgtc as an alias for EXT_texture_compression_rgtc
Change the name in the extension tracking structure to ARB (from EXT).
Vinson Lee [Fri, 1 Oct 2010 23:57:19 +0000 (16:57 -0700)]
savage: Remove unnecessary header.
Vinson Lee [Fri, 1 Oct 2010 23:27:58 +0000 (16:27 -0700)]
glsl: Remove unnecessary header.
Ian Romanick [Fri, 20 Nov 2009 18:45:36 +0000 (10:45 -0800)]
i965: Enable GL_ARB_texture_rg
Ian Romanick [Thu, 30 Sep 2010 23:29:46 +0000 (16:29 -0700)]
mesa: Enable GL_ARB_texture_rg in software paths
Ian Romanick [Thu, 30 Sep 2010 23:30:09 +0000 (16:30 -0700)]
ARB_texture_rg: Allow RED and RG textures as FBO color buffer attachments
Ian Romanick [Wed, 29 Sep 2010 00:24:39 +0000 (17:24 -0700)]
ARB_texture_rg: Add R8, R16, RG88, and RG1616 internal formats
Ian Romanick [Tue, 28 Sep 2010 20:58:28 +0000 (13:58 -0700)]
ARB_texture_rg: Handle RED and RG the same as RGB for tex env
Ian Romanick [Tue, 28 Sep 2010 20:50:34 +0000 (13:50 -0700)]
ARB_texture_rg: Add GL_RED as a valid GL_DEPTH_TEXTURE_MODE
Ian Romanick [Tue, 28 Sep 2010 18:17:27 +0000 (11:17 -0700)]
ARB_texture_rg: Add GL_TEXTURE_{RED,GREEN}_SIZE query support
Ian Romanick [Tue, 28 Sep 2010 18:11:43 +0000 (11:11 -0700)]
ARB_texture_rg: Correct some errors in RED / RG internal format handling
Fixes several problems:
The half-float, float, and integer internal formats depend on
ARB_texture_rg and other extensions.
RG_INTEGER is not a valid internal format.
Generic compressed formats depend on ARB_texture_rg, not
EXT_texture_compression_rgtc.
Use GL_RED instead of GL_R.
Ian Romanick [Fri, 20 Nov 2009 19:03:31 +0000 (11:03 -0800)]
ARB_texture_rg: Add GLX protocol support
Nicolas Kaiser [Fri, 1 Oct 2010 20:39:20 +0000 (13:39 -0700)]
i965g: use Elements macro instead of manual sizeofs
Signed-off-by: Nicolas Kaiser <nikai@nikai.net>
Signed-off-by: Brian Paul <brianp@vmware.com>
Eric Anholt [Fri, 1 Oct 2010 21:09:00 +0000 (14:09 -0700)]
i965: Fix up copy'n'pasteo from moving coordinate setup around for gen4.
Eric Anholt [Fri, 1 Oct 2010 20:37:40 +0000 (13:37 -0700)]
i965: Add real support for pre-gen5 texture sampling to the new FS.
Fixes 36 testcases, including glsl-fs-shadow2d*-bias which fail on the
Mesa IR backend.
richard [Fri, 1 Oct 2010 20:10:02 +0000 (16:10 -0400)]
evergreen : fix z format setting, enable stencil.
Eric Anholt [Fri, 1 Oct 2010 19:15:48 +0000 (12:15 -0700)]
i965: Pre-gen6, map VS outputs (not FS inputs) to URB setup in the new FS.
We should fix the SF to actually give us just the data we need, but
this fixes regressions in the new FS until then.
Fixes:
glsl-kwin-blur
glsl-routing
Eric Anholt [Fri, 1 Oct 2010 18:44:27 +0000 (11:44 -0700)]
i965: Also increment attribute location when skipping unused slots.
Fixes glsl1-texcoord varying.
Eric Anholt [Fri, 1 Oct 2010 17:49:01 +0000 (10:49 -0700)]
i965: Fix the gen6 jump size for BREAK/CONT in new FS.
Since gen5, jumps are in increments of 64 bits instead of increments
of 128-bit instructions.