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Sanjay Patel [Fri, 7 Sep 2018 21:40:41 +0000 (21:40 +0000)]
[InstCombine][x86] add tests for possible blendv transform (PR38814); NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341715
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Philip Reames [Fri, 7 Sep 2018 21:36:11 +0000 (21:36 +0000)]
[AST] Generalize argument specific aliasing
AliasSetTracker has special case handling for memset, memcpy and memmove which pre-existed argmemonly on functions and readonly and writeonly on arguments. This patch generalizes it using the AA infrastructure to any call correctly annotated.
The motivation here is to cut down on confusion, not performance per se. For most instructions, there is a direct mapping to alias set. However, this is not guaranteed by the interface and was not in fact true for these three intrinsics *and only these three intrinsics*. I kept getting myself confused about this invariant, so I figured it would be good to clearly distinguish between a instructions and alias sets. Calls happened to be an easy target.
The nice side effect is that custom implementations of memset/memcpy/memmove - including wrappers discovered by IPO - can now be optimized the same as builts by LICM.
Note: The actual removal of the memset/memtransfer specific handling will happen in a follow on NFC patch. It was originally part of this one, but separate for ease of review and rebase.
Differential Revision: https://reviews.llvm.org/D50730
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341713
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Reid Kleckner [Fri, 7 Sep 2018 21:30:52 +0000 (21:30 +0000)]
[codeview] Add .cv_string directive for testing purposes
The main use case for this directive is to allow assembly writers to
write their own FPO data strings without going through the .cv_fpo*
directive family.
I'm experimenting with different RPN programs to fix PR38857, and I
figured I should go ahead and make this directive permanent.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341712
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Craig Topper [Fri, 7 Sep 2018 21:28:46 +0000 (21:28 +0000)]
[X86] Add codegen tests for narrow PADDUS/PSUBUS patterns for PR38691.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341711
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Alina Sbirlea [Fri, 7 Sep 2018 21:14:48 +0000 (21:14 +0000)]
[MemorySSA] Update MemoryPhi wiring for block splitting to consider if identical edges were merged.
Summary:
Block splitting is done with either identical edges being merged, or not.
Only critical edges can be split without merging identical edges based on an option.
Teach the memoryssa updater to take this into account: for the same edge between two blocks only move one entry from the Phi in Old to the new Phi in New.
Reviewers: george.burgess.iv
Subscribers: sanjoy, jlebar, Prazek, llvm-commits
Differential Revision: https://reviews.llvm.org/D51563
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341709
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Sanjay Patel [Fri, 7 Sep 2018 21:03:34 +0000 (21:03 +0000)]
[InstCombine] narrow vector select with padded condition and extracted result (PR38691)
shuf (sel (shuf NarrowCond, undef, WideMask), X, Y), undef, NarrowMask) -->
sel NarrowCond, (shuf X, undef, NarrowMask), (shuf Y, undef, NarrowMask)
The motivating case from:
https://bugs.llvm.org/show_bug.cgi?id=38691
...is the last regression test. In that case, we're just left with the narrow select.
Note that if we do create new shuffles, they use the existing extraction identity mask,
so there's no danger that this transform creates arbitrary shuffles.
Differential Revision: https://reviews.llvm.org/D51496
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341708
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Thomas Lively [Fri, 7 Sep 2018 20:59:50 +0000 (20:59 +0000)]
[WebAssembly] Change SIMD lane indices to vec_i8imm_op
Summary: To explicitly opt out of LEB encoding for these immediates.
Reviewers: aheejin, dschuff
Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits
Differential Revision: https://reviews.llvm.org/D51766
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341707
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Nick Desaulniers [Fri, 7 Sep 2018 20:58:57 +0000 (20:58 +0000)]
[AArch64] Support reserving x1-7 registers.
Summary:
Reserving registers x1-7 is used to support CONFIG_ARM64_LSE_ATOMICS in Linux kernel. This change adds support for reserving registers x1 through x7.
Reviewers: javed.absar, phosek, srhines, nickdesaulniers, efriedma
Reviewed By: nickdesaulniers, efriedma
Subscribers: niravd, jfb, manojgupta, nickdesaulniers, jyknight, efriedma, kristof.beyls, llvm-commits
Differential Revision: https://reviews.llvm.org/D48580
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341706
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Craig Topper [Fri, 7 Sep 2018 20:56:03 +0000 (20:56 +0000)]
[X86] Don't create ZERO_EXTEND_INREG/SIGN_EXTEND_INREG for v1iX vectors.
The generic type legalizer will scalarize vXi1 instructions getting rid of the vector entirely. Creating wider vector instructions is just going to prevent that.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341705
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Craig Topper [Fri, 7 Sep 2018 20:56:01 +0000 (20:56 +0000)]
[X86] Don't create X86ISD::AVG nodes from v1iX vectors.
The type legalizer will try to scalarize this and fail.
It looks like there's some other v1iX oddities out there too since we still generated some vector instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341704
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Fangrui Song [Fri, 7 Sep 2018 20:23:15 +0000 (20:23 +0000)]
[PGO] Fix some style issue of ControlHeightReduction
Reviewers: yamauchi
Reviewed By: yamauchi
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D51811
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341702
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Alexandre Ganea [Fri, 7 Sep 2018 20:07:36 +0000 (20:07 +0000)]
[CMake] Fix LLVM_ENABLE_LTO option on Windows
Differential Revision: https://reviews.llvm.org/D51804
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341701
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Craig Topper [Fri, 7 Sep 2018 19:14:15 +0000 (19:14 +0000)]
[X86] Modify the the rdtscp intrinsic to return values instead of taking a pointer argument
Similar to what was recently done for addcarry/subborrow and has been done for rdrand/rdseed for a while. It's better to use two results and an explicit store in IR when the store isn't part of the semantics of the instruction. This allows store->load forwarding to happen in the middle end. Or the store to be removed if its never loaded.
Differential Revision: https://reviews.llvm.org/D51803
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341698
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Reid Kleckner [Fri, 7 Sep 2018 18:48:27 +0000 (18:48 +0000)]
[codeview] Improve readobj FPO dumper and pdbutil register names
The improved dumping helps me investigate PR38857.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341695
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Hiroshi Yamauchi [Fri, 7 Sep 2018 18:44:53 +0000 (18:44 +0000)]
[PGO][CHR] Build/warning fix
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341692
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Ana Pazos [Fri, 7 Sep 2018 18:43:43 +0000 (18:43 +0000)]
[RISCV] Fix crash in decoding instruction with unknown floating point rounding mode
Summary:
Instead of crashing in printFRMArg, decode and warn about invalid instruction.
This bug was uncovered by a LLVM MC Disassembler Protocol Buffer Fuzzer
for the RISC-V assembly language.
Reviewers: asb
Reviewed By: asb
Subscribers: rbar, johnrusso, simoncook, sabuasal, niosHD, kito-cheng, shiva0217, zzheng, edward-jones, mgrang, rogfer01, MartinMosbeck, brucehoult, the_o, rkruppe, PkmX, jocewei, asb
Differential Revision: https://reviews.llvm.org/D51705
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341691
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Alexandre Ganea [Fri, 7 Sep 2018 18:32:59 +0000 (18:32 +0000)]
[Error] Reintroduce type validation in createFileError()
This prevents from using ErrorSuccess as an argument to createFileError().
Differential Revision: https://reviews.llvm.org/D51490
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341689
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Fangrui Song [Fri, 7 Sep 2018 18:29:20 +0000 (18:29 +0000)]
[llvm-dwp] Clean up tests X86/*.test
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341688
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Ana Pazos [Fri, 7 Sep 2018 18:23:19 +0000 (18:23 +0000)]
[RISCV] Fix AddressSanitizer heap-buffer-overflow in disassembling
Summary:
RISCVDisassembler should check number of bytes available before reading them.
Crash noticed when enabling -DLLVM_USE_SANITIZER=Address.
This bug was uncovered by a LLVM MC Disassembler Protocol Buffer Fuzzer for the RISC-V assembly language.
Reviewers: asb
Reviewed By: asb
Subscribers: rbar, johnrusso, simoncook, sabuasal, niosHD, kito-cheng, shiva0217, zzheng, edward-jones, mgrang, rogfer01, MartinMosbeck, brucehoult, the_o, rkruppe, PkmX, jocewei, asb
Differential Revision: https://reviews.llvm.org/D51708
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341686
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JF Bastien [Fri, 7 Sep 2018 18:17:59 +0000 (18:17 +0000)]
NFC: remove magic bool in LoopIdiomRecognize
Use an enum class instead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341684
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Hiroshi Yamauchi [Fri, 7 Sep 2018 18:00:58 +0000 (18:00 +0000)]
[PGO][CHR] Small cleanup.
Summary:
Do away with demangling. It wasn't really necessary.
Declared some local functions to be static.
Reviewers: davidxl
Reviewed By: davidxl
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D51740
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341681
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Kristina Brooks [Fri, 7 Sep 2018 17:33:43 +0000 (17:33 +0000)]
[Bindings][Go] Fixed go.test failure due to C-API argument type mismatch.
go.test was failing previously with error,
Command Output (stderr):
dibuilder.go:301: cannot use C.uint(t.Encoding) (type C.uint) as type
C.LLVMDWARFTypeEncoding in argument to func literal
This patch fixes the argument type.
Patch by Chirag (Chirag Patel)
Differential Revision: https://reviews.llvm.org/D51721
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341680
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Matthias Braun [Fri, 7 Sep 2018 17:08:44 +0000 (17:08 +0000)]
utils/abtest: Refactor and add bisection method
- Refactor/rewrite most of the code. Also make sure it passes
pycodestyle/pyflakes now
- Add a new mode that performs bisection on the search space. This
should be faster in the common case where there is only a small number
of files or functions actually leading to failure.
The previous sequential behavior can still be accessed via `--seq`.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341679
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Craig Topper [Fri, 7 Sep 2018 16:58:39 +0000 (16:58 +0000)]
[X86] Change the addcarry and subborrow intrinsics to return 2 results and remove the pointer argument.
We should represent the store directly in IR instead. This gives the middle end a chance to remove it if it can see a load from the same address.
Differential Revision: https://reviews.llvm.org/D51769
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341677
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Craig Topper [Fri, 7 Sep 2018 16:58:36 +0000 (16:58 +0000)]
[X86] Use regular expressions to make test immune to register allocation changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341676
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Craig Topper [Fri, 7 Sep 2018 16:27:55 +0000 (16:27 +0000)]
[X86] Teach X86DAGToDAGISel::foldLoadStoreIntoMemOperand to handle loads in operand 1 of commutable operations.
Previously we only handled loads in operand 0, but nothing guarantees the load will be operand 0 for commutable operations.
Differential Revision: https://reviews.llvm.org/D51768
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341675
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Craig Topper [Fri, 7 Sep 2018 16:19:50 +0000 (16:19 +0000)]
[InstCombine] Fold (min/max ~X, Y) -> ~(max/min X, ~Y) when Y is freely invertible
If the ~X wasn't able to simplify above the max/min, we might be able to simplify it by moving it below the max/min.
I had to modify the ~(min/max ~X, Y) transform to prevent getting stuck in a loop when we saw the new ~(max/min X, ~Y) before the ~Y had been folded away to remove the new not.
Differential Revision: https://reviews.llvm.org/D51398
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341674
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Anna Thomas [Fri, 7 Sep 2018 15:53:48 +0000 (15:53 +0000)]
[LV] Fix code gen for conditionally executed loads and stores
Fix a latent bug in loop vectorizer which generates incorrect code for
memory accesses that are executed conditionally. As pointed in review,
this bug definitely affects uniform loads and may affect conditional
stores that should have turned into scatters as well).
The code gen for conditionally executed uniform loads on architectures
that support masked gather instructions is broken.
Without this patch, we were unconditionally executing the *conditional*
load in the vectorized version.
This patch does the following:
1. Uniform conditional loads on architectures with gather support will
have correct code generated. In particular, the cost model
(setCostBasedWideningDecision) is fixed.
2. For the recipes which are handled after the widening decision is set,
we use the isScalarWithPredication(I, VF) form which is added in the
patch.
3. Fix the vectorization cost model for scalarization
(getMemInstScalarizationCost): implement and use isPredicatedInst to
identify *all* predicated instructions, not just scalar+predicated. So,
now the cost for scalarization will be increased for maskedloads/stores
and gather/scatter operations. In short, we should be choosing the
gather/scatter in place of scalarization on archs where it is
profitable.
4. We needed to weaken the assert in useEmulatedMaskMemRefHack.
Reviewers: Ayal, hsaito, mkuper
Differential Revision: https://reviews.llvm.org/D51313
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341673
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Aditya Kumar [Fri, 7 Sep 2018 15:03:49 +0000 (15:03 +0000)]
Hot cold splitting pass
Find cold blocks based on profile information (or optionally with static analysis).
Forward propagate profile information to all cold-blocks.
Outline a cold region.
Set calling conv and prof hint for the callsite of the outlined function.
Worked in collaboration with: Sebastian Pop <s.pop@samsung.com>
Differential Revision: https://reviews.llvm.org/D50658
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341669
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Florian Hahn [Fri, 7 Sep 2018 14:40:06 +0000 (14:40 +0000)]
[InstCombine] Do not fold scalar ops over select with vector condition.
If OtherOpT or OtherOpF have scalar types and the condition is a vector,
we would create an invalid select.
Reviewers: spatel, john.brawn, mssimpso, craig.topper
Reviewed By: spatel
Differential Revision: https://reviews.llvm.org/D51781
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341666
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David Stenberg [Fri, 7 Sep 2018 13:54:07 +0000 (13:54 +0000)]
[DebugInfo] Handle stack slot offsets for spilled sub-registers in LDV
Summary:
Extend LDV so that stack slot offsets for spilled sub-registers
are added to the emitted debug locations. This is accomplished
by querying InstrInfo::getStackSlotRange().
With this change, LDV will add a DW_OP_plus_uconst operation to
the expression if a sub-register is spilled. Later on, PEI will
add an offset operation for the stack slot, meaning that we will
get expressions of the forms:
* {DW_OP_constu #fp-offset, DW_OP_minus,
DW_OP_plus_uconst #subreg-offset}
* {DW_OP_plus_const #fp-offset,
DW_OP_minus, DW_OP_plus_uconst #subreg-offset}
The two offset operations should ideally be merged.
Reviewers: rnk, aprantl, stoklund
Reviewed By: aprantl
Subscribers: dblaikie, bjope, nemanjai, JDevlieghere, llvm-commits
Tags: #debug-info
Differential Revision: https://reviews.llvm.org/D51612
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341659
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Sid Manning [Fri, 7 Sep 2018 13:36:21 +0000 (13:36 +0000)]
Add support for getRegisterByName.
Support required to build the Hexagon Linux kernel.
Differential Revision: https://reviews.llvm.org/D51363
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341658
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Simon Pilgrim [Fri, 7 Sep 2018 13:27:07 +0000 (13:27 +0000)]
[X86][SSE] Add additional fadd/fsub(x, bitcast_fneg(y)) tests with different integer bitwidths
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341657
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Simon Pilgrim [Fri, 7 Sep 2018 12:13:45 +0000 (12:13 +0000)]
[DAGCombiner] foldBitcastedFPLogic - Add basic vector support
Add support for bitcasts from float type to an integer type of the same element bitwidth.
There maybe cases where we need to support different widths (e.g. as SSE __m128i is treated as v2i64) - but I haven't seen cases of this in the wild yet.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341652
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Florian Hahn [Fri, 7 Sep 2018 11:41:34 +0000 (11:41 +0000)]
[NewGVN] Mark function as changed if we erase instructions.
Currently eliminateInstructions only returns true if any instruction got
replaced. In the test case for this patch, we eliminate the trivially
dead calls, for which eliminateInstructions not do a replacement and the
function is not marked as changed, which is why the inliner crashes
while traversing the call graph.
Alternatively we could also change eliminateInstructions to return true
in case we mark instructions for deletion, but that's slightly more code
and doing it at the place where the replacement happens seems safer.
Fixes PR37517.
Reviewers: davide, mcrosier, efriedma, bjope
Reviewed By: bjope
Differential Revision: https://reviews.llvm.org/D51169
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341651
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Simon Pilgrim [Fri, 7 Sep 2018 11:24:43 +0000 (11:24 +0000)]
[X86][SSE] Add fadd/fsub(x, bitcast_fneg(y)) tests
Show missing vector support
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341650
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Jonas Devlieghere [Fri, 7 Sep 2018 10:29:22 +0000 (10:29 +0000)]
[dsymutil] Prevent non-determinism due to threading.
Before this patch, analyzeContext called getCanonicalDIEOffset(), for
which the result depends on the timings of the setCanonicalDIEOffset()
calls in the cloneLambda. This can lead to slightly different output
between runs due to threading.
To prevent this from happening, we now record the output debug info size
after importing the modules (before any concurrent processing takes
place). This value, named the ModulesEndOffset is used to compare the
canonical DIE offset against. If the value is greater than this offset,
the canonical DIE offset has been updated during cloning, and should
therefore not be considered for pruning.
Differential revision: https://reviews.llvm.org/D51443
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341649
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Alexander Potapenko [Fri, 7 Sep 2018 09:56:36 +0000 (09:56 +0000)]
[MSan] don't access MsanCtorFunction when using KMSAN
MSan has found a use of uninitialized memory in MSan, fix it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341646
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Tim Northover [Fri, 7 Sep 2018 09:21:25 +0000 (09:21 +0000)]
ARM: fix Thumb2 CodeGen for ldrex with folded frame-index.
Because t2LDREX (& t2STREX) were marked as AddrModeNone, but did allow a
FrameIndex operand, rewriteT2FrameIndex asserted. This gives them a
proper addressing-mode and tells the rewriter about it so that encodable
offsets are exploited and others are rejected.
Should fix PR38828.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341642
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Alexander Potapenko [Fri, 7 Sep 2018 09:10:30 +0000 (09:10 +0000)]
[MSan] Add KMSAN instrumentation to MSan pass
Introduce the -msan-kernel flag, which enables the kernel instrumentation.
The main differences between KMSAN and MSan instrumentations are:
- KMSAN implies msan-track-origins=2, msan-keep-going=true;
- there're no explicit accesses to shadow and origin memory.
Shadow and origin values for a particular X-byte memory location are
read and written via pointers returned by
__msan_metadata_ptr_for_load_X(u8 *addr) and
__msan_store_shadow_origin_X(u8 *addr, uptr shadow, uptr origin);
- TLS variables are stored in a single struct in per-task storage. A call
to a function returning that struct is inserted into every instrumented
function before the entry block;
- __msan_warning() takes a 32-bit origin parameter;
- local variables are poisoned with __msan_poison_alloca() upon function
entry and unpoisoned with __msan_unpoison_alloca() before leaving the
function;
- the pass doesn't declare any global variables or add global constructors
to the translation unit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341637
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Alexander Timofeev [Fri, 7 Sep 2018 09:05:34 +0000 (09:05 +0000)]
[AMDGPU] Preliminary patch for divergence driven instruction selection. Fold immediate SMRD offset.
Differential revision: https://reviews.llvm.org/D51610
Reviewer: rampitec
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341636
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Puyan Lotfi [Fri, 7 Sep 2018 08:10:22 +0000 (08:10 +0000)]
[llvm-objcopy] Dwarf .debug section compression support (zlib, zlib-gnu).
Third Attempt:
- Alignment issues resolved.
- zlib::isAvailable() detected.
- ArrayRef misuse fixed.
Usage:
llvm-objcopy --compress-debug-sections=zlib foo.o
llvm-objcopy --compress-debug-sections=zlib-gnu foo.o
In both cases the debug section contents is compressed with zlib. In the GNU
style case the header is the "ZLIB" magic string followed by the uint64 big-
endian decompressed size. In the non-GNU mode the header is the
Elf(32|64)_Chdr.
Decompression support is coming soon.
Differential Revision: https://reviews.llvm.org/D49678
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341635
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QingShan Zhang [Fri, 7 Sep 2018 07:56:05 +0000 (07:56 +0000)]
[PowerPC] Combine ADD to ADDZE
On the ppc64le platform, if ir has the following form,
define i64 @addze1(i64 %x, i64 %z) local_unnamed_addr #0 {
entry:
%cmp = icmp ne i64 %z, CONSTANT (-32767 <= CONSTANT <= 32768)
%conv1 = zext i1 %cmp to i64
%add = add nsw i64 %conv1, %x
ret i64 %add
}
we can optimize it to the form below.
when C == 0
--> addze X, (addic Z, -1))
/
add X, (zext(setne Z, C))--
\ when -32768 <= -C <= 32767 && C != 0
--> addze X, (addic (addi Z, -C), -1)
Patch By: HLJ2009 (Li Jia He)
Differential Revision: https://reviews.llvm.org/D51403
Reviewed By: Nemanjai
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341634
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Max Kazantsev [Fri, 7 Sep 2018 07:23:39 +0000 (07:23 +0000)]
[IndVars] Set Changed when we delete dead instructions. PR38855
IndVars does not set `Changed` flag when it eliminates dead instructions. As result,
it may make IR modifications and report that it has done nothing. It leads to inconsistent
preserved analyzes results.
Differential Revision: https://reviews.llvm.org/D51770
Reviewed By: skatkov
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341633
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Dean Michael Berris [Fri, 7 Sep 2018 03:38:26 +0000 (03:38 +0000)]
Revert "[XRay] Add a BlockVerifier visitor for FDR Records"
This reverts commit r341628.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341631
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Craig Topper [Fri, 7 Sep 2018 02:39:56 +0000 (02:39 +0000)]
[X86] Add more test cases for missed opportunities for using RMW form of ADC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341630
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Dean Michael Berris [Fri, 7 Sep 2018 02:25:06 +0000 (02:25 +0000)]
[XRay] Add a BlockVerifier visitor for FDR Records
Summary:
This patch implements a `BlockVerifier` type which enforces the
invariants of the log structure of FDR mode logs on a per-block basis.
This ensures that the data we encounter from an FDR mode log
semantically correct (i.e. that records follow the documented "grammar"
for FDR mode log records).
This is another part of the refactoring of D50441.
Reviewers: mboerger, eizan
Subscribers: mgorny, hiraditya, llvm-commits
Differential Revision: https://reviews.llvm.org/D51723
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341628
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Craig Topper [Fri, 7 Sep 2018 01:29:42 +0000 (01:29 +0000)]
[X86] Fix some incorrect comments. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341624
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Jordan Rupprecht [Fri, 7 Sep 2018 00:28:54 +0000 (00:28 +0000)]
[llvm-strip] -p test fix for windows buildbots
Windows ls prints dates as "1997-05-05" instead of "May 05 1997", so only check for a leading space.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341614
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Puyan Lotfi [Fri, 7 Sep 2018 00:28:25 +0000 (00:28 +0000)]
Revert: [llvm-objcopy] Dwarf .debug section compression (Second Attempt).
Various bots still fail for unknown reason.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341613
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Zachary Turner [Fri, 7 Sep 2018 00:12:56 +0000 (00:12 +0000)]
[PDB] Rename some files in the native reader.
By calling these NativeType<foo>.cpp, they will all be sorted
together, and it also distinguishes the types from the symbols.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341609
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Zachary Turner [Fri, 7 Sep 2018 00:12:34 +0000 (00:12 +0000)]
[PDB] Create a SymbolCache class.
Part of the responsibility of the native PDB reader is to cache
symbols the first time they are accessed, so they can then be
looked up by an ID. Furthermore, we need to resolve type indices
to records that we vend to the user, and other things. Previously
this code was all thrown together a bit haphazardly in the native
session class, but it makes sense to collect all of this into a
single class whose sole responsibility is to manage the collection
of known symbols.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341608
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Puyan Lotfi [Thu, 6 Sep 2018 23:59:50 +0000 (23:59 +0000)]
[llvm-objcopy] Dwarf .debug section compression support (zlib, zlib-gnu).
Second Attempt. Alignment issues resolved. zlib::isAvailable() detected.
Usage:
llvm-objcopy --compress-debug-sections=zlib foo.o
llvm-objcopy --compress-debug-sections=zlib-gnu foo.o
In both cases the debug section contents is compressed with zlib. In the GNU
style case the header is the "ZLIB" magic string followed by the uint64 big-
endian decompressed size. In the non-GNU mode the header is the
Elf(32|64)_Chdr.
Decompression support is coming soon.
Differential Revision: https://reviews.llvm.org/D49678
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341607
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Craig Topper [Thu, 6 Sep 2018 23:55:36 +0000 (23:55 +0000)]
[X86] Add RMW ADC patterns with load in operand 1.
ADC is commutable and the load could be in either operand, but we were only checking operand 0.
Ideally we'd mark X86adc_flag as commutable and tablegen would automatically do this, but the EFLAGS register mention is preventing it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341606
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Craig Topper [Thu, 6 Sep 2018 23:55:34 +0000 (23:55 +0000)]
[X86] Add a test case showing failure to use the RMW form of ADC when the load is in operand 1 going into isel.
The ADC instruction is commutable, but we only have RMW isel patterns with a load on the left hand side. Nothing will canonicalize loads to the LHS on these ops. So we need two patterns.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341605
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Reid Kleckner [Thu, 6 Sep 2018 23:35:58 +0000 (23:35 +0000)]
Fix SampleProf code on LLP64 platforms with stoull
Otherwise, stoul will throw an out of range exception if the integer
doesn't fit in a 32-bit number.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341604
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George Karpenkov [Thu, 6 Sep 2018 23:07:05 +0000 (23:07 +0000)]
Provide a method for generating deterministic IDs for pointers allocated in BumpPtrAllocator
Differential Revision: https://reviews.llvm.org/D51393
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341599
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Zachary Turner [Thu, 6 Sep 2018 22:47:32 +0000 (22:47 +0000)]
Fix error with SmallString implicit conversion.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341597
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Craig Topper [Thu, 6 Sep 2018 22:41:44 +0000 (22:41 +0000)]
[X86] Add isel patterns for commuting X86adc_flag with a load in the LHS.
The peephole pass likely gets this normally, but we should be doing it during isel.
Ideally we'd just make the X86adc_flag pattern SDNPCommutable, but the tablegen doesn't handle that when one of the operands is a register reference.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341596
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Jordan Rupprecht [Thu, 6 Sep 2018 22:34:48 +0000 (22:34 +0000)]
[llvm-strip] Fix -p test to check for explicit spaces around dates, to avoid when the filename happens to contain 1995/1997.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341595
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Eric Christopher [Thu, 6 Sep 2018 22:09:31 +0000 (22:09 +0000)]
The initial .text section generated in object files was missing the
SHF_ARM_PURECODE flag when being built with the -mexecute-only flag.
All code sections of an ELF must have the flag set for the final .text
section to be execute-only, otherwise the flag gets removed.
A HasData flag is added to MCSection to aid in the determination that
the section is empty. A virtual setTargetSectionFlags is added to
MCELFObjectTargetWriter to allow subclasses to set target specific
section flags to be added to sections which we then use in the ARM
backend to set SHF_ARM_PURECODE.
Patch by Ivan Lozano!
Reviewed By: echristo
Differential Revision: https://reviews.llvm.org/D48792
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341593
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Wei Mi [Thu, 6 Sep 2018 22:03:37 +0000 (22:03 +0000)]
[SampleFDO] Make sample profile loader unaware of compact format change.
The patch tries to make sample profile loader independent of profile format
change. It moves compact format related code into FunctionSamples and
SampleProfileReader classes, and sample profile loader only has to interact
with those two classes and will be unaware of profile format changes.
The cleanup also contain some fixes to further remove the difference between
compactbinary format and binary format. After the cleanup using different
formats originated from the same profile will generate the same binaries,
which we verified by compiling two large server benchmarks w/wo thinlto.
Differential Revision: https://reviews.llvm.org/D51643
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341591
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Zachary Turner [Thu, 6 Sep 2018 22:00:38 +0000 (22:00 +0000)]
Fix a configure issue with Visual Studio generators.
We can't put the unittest source dir map in the configuration
specific directory because VS doesn't have a configure-specific
directory, instead it only knows this at runtime. So we have
to remove this from the path. This in turn means that the path
will be slightly different in VS configurations vs non vs
configurations. In the former, the source map will be in the
parent directory of the executable, and in the latter it will
be in the same directory as the executable. So check both.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341590
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Scott Linder [Thu, 6 Sep 2018 21:38:56 +0000 (21:38 +0000)]
Revert r341413
Causes a regression in expensive checks.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341589
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Jessica Paquette [Thu, 6 Sep 2018 21:19:54 +0000 (21:19 +0000)]
Output per-function size-info remarks
This patch adds per-function size information remarks. Previously, passing
-Rpass-analysis=size-info would only give you per-module changes. By adding
the ability to do this per-function, it's easier to see which functions
contributed the most to size changes.
https://reviews.llvm.org/D51467
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341588
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Alina Sbirlea [Thu, 6 Sep 2018 20:54:24 +0000 (20:54 +0000)]
[LoopPassManager] MemorySSA should be preserved when enabled.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341587
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Fangrui Song [Thu, 6 Sep 2018 20:26:54 +0000 (20:26 +0000)]
Reland rL341509: "[llvm-dwp] Use buffer_stream if output file is not seekable (e.g. "-")"
It caused ambiguity between llvm::cl::Optional and llvm::Optional, which
has been fixed by dropping `using namespace cl;` in favor of explicit
cl:: qualified names.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341586
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Fangrui Song [Thu, 6 Sep 2018 20:23:34 +0000 (20:23 +0000)]
[llvm-dwp] Use cl:: instead of using namespace cl
`using namespace cl` makes llvm::cl::Optional (in Support/CommandLine.h) visible which will cause ambiguity when unqualified `Optional` is looked up (can also refer to llvm::Optional).
cl:: is used much more than `using namespace cl`, so let's not use the latter.
Also append \n to the argument of cl::ParseCommandLineOptions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341584
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Fangrui Song [Thu, 6 Sep 2018 20:01:06 +0000 (20:01 +0000)]
Add missing #include for Testing/Support/SupportHelpers.h
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341582
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Tatyana Krasnukha [Thu, 6 Sep 2018 19:58:26 +0000 (19:58 +0000)]
[ARC] Prevent InstPrinter from crashing on unknown condition codes.
Summary:
Instruction printer shouldn't crash with assertions due to incorrect input data. llvm_unreachable is not intended for runtime error handling.
Reviewers: petecoup
Reviewed By: petecoup
Differential Revision: https://reviews.llvm.org/D51728
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341581
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Fangrui Song [Thu, 6 Sep 2018 19:51:20 +0000 (19:51 +0000)]
Quick fix for -DBUILD_SHARED_LIBS=on build after rL341502
libLLVMTestingSupport.so references a symbol in utils/unittest/UnitTestMain/TestMain.cpp (a layering issue) and will cause a link error because of -Wl,-z,defs (cmake/modules/HandleLLVMOptions.cmake)
Waiting zturner for a better fix.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341580
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Lang Hames [Thu, 6 Sep 2018 19:39:26 +0000 (19:39 +0000)]
[ORC] Make RuntimeDyldObjectLinkingLayer2 take memory managers by unique_ptr.
The existing memory manager API can not be shared between objects when linking
concurrently (since there is no way to know which concurrent allocations were
performed on behalf of which object, and hence which allocations would be safe
to finalize when finalizeMemory is called). For now, we can work around this by
requiring a new memory manager for each object.
This change only affects the concurrent version of the ORC APIs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341579
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Lang Hames [Thu, 6 Sep 2018 19:39:22 +0000 (19:39 +0000)]
[ORC] Remove the mapSectionAddress method from RuntimeDyldObjectLinkingLayer2.
Section address mappings can be applied using the RuntimeDyld instance passed to
the RuntimeDyld::MemoryManager::notifyObjectLoaded method. Proving an alternate
route via RuntimeDyldObjectLinkingLayer2 is redundant.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341578
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Martin Storsjo [Thu, 6 Sep 2018 19:03:24 +0000 (19:03 +0000)]
[llvm-ar] Move a variable declaration closer to where it is needed. NFC.
This was from a missed review comment from D51338.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341577
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Sanjay Patel [Thu, 6 Sep 2018 18:42:55 +0000 (18:42 +0000)]
[x86] add tests for pow --> cbrt; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341575
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Scott Linder [Thu, 6 Sep 2018 18:40:35 +0000 (18:40 +0000)]
Move init code in AArch64SelectionDAGTest to SetUpTestCase (NFC)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341574
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Martin Storsjo [Thu, 6 Sep 2018 18:10:45 +0000 (18:10 +0000)]
[llvm-ar] Support * as comment char in MRI scripts
MRI scripts have two comment chars, * and ;, but only the latter was
supported before.
Also allow leading spaces before comment chars (and before any command
string), and allow comments after a command.
Differential Revision: https://reviews.llvm.org/D51338
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341571
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Jonas Devlieghere [Thu, 6 Sep 2018 17:31:59 +0000 (17:31 +0000)]
[dsymutil] Reduce peak memory usage for the single threaded execution.
Keeping the compile units in memory is expensive. For the single
threaded case we allocate them in the analyze part and deallocate them
again once we've finished cloning. This poses a problem in the single
threaded case where we did all the analysis first followed by all the
cloning. This meant we had all the link context in memory right after
analyzing finished.
This patch changes the way we order work in the single threaded case.
Instead of doing all the analysis and cloning in serial, we now
interleave the two so we can deallocate the memory as soon as a file is
processed. The result is binary identical and peak memory usage went
down from 13.43GB to 5.73GB for a debug build of trunk clang.
Differential revision: https://reviews.llvm.org/D51618
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341568
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Matt Arsenault [Thu, 6 Sep 2018 17:23:24 +0000 (17:23 +0000)]
AMDGPU: Remove old hack for function addresses
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341567
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Michael Berg [Thu, 6 Sep 2018 17:07:29 +0000 (17:07 +0000)]
[NFC] - in preparation for adding nsw, nuw and exact as flags to MI
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341565
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Zachary Turner [Thu, 6 Sep 2018 16:34:56 +0000 (16:34 +0000)]
Fix a warning.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341561
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Sanjay Patel [Thu, 6 Sep 2018 16:23:40 +0000 (16:23 +0000)]
[InstCombine] add xor+not folds
This fold is needed to avoid a regression when we try
to recommit rL300977.
We can't see the most basic win currently because
demanded bits changes the patterns:
https://rise4fun.com/Alive/plpp
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341559
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JF Bastien [Thu, 6 Sep 2018 16:03:32 +0000 (16:03 +0000)]
ARM64: improve non-zero memset isel by ~2x
Summary:
I added a few ARM64 memset codegen tests in r341406 and r341493, and annotated
where the generated code was bad. This patch fixes the majority of the issues by
requesting that a 2xi64 vector be used for memset of 32 bytes and above.
The patch leaves the former request for f128 unchanged, despite f128
materialization being suboptimal: doing otherwise runs into other asserts in
isel and makes this patch too broad.
This patch hides the issue that was present in bzero_40_stack and bzero_72_stack
because the code now generates in a better order which doesn't have the store
offset issue. I'm not aware of that issue appearing elsewhere at the moment.
<rdar://problem/
44157755>
Reviewers: t.p.northover, MatzeB, javed.absar
Subscribers: eraman, kristof.beyls, chrib, dexonsmith, llvm-commits
Differential Revision: https://reviews.llvm.org/D51706
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341558
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Sanjay Patel [Thu, 6 Sep 2018 15:35:01 +0000 (15:35 +0000)]
[InstCombine] add tests for xor-not; NFC
These tests demonstrate a missing fold that would
also be needed to avoid a regression when we try
to recommit rL300977.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341557
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Simon Pilgrim [Thu, 6 Sep 2018 15:15:28 +0000 (15:15 +0000)]
Remove unnecessary semicolon to silence -Wpedantic warning. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341555
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Alexander Potapenko [Thu, 6 Sep 2018 15:14:36 +0000 (15:14 +0000)]
[MSan] store origins for variadic function parameters in __msan_va_arg_origin_tls
Add the __msan_va_arg_origin_tls TLS array to keep the origins for variadic function parameters.
Change the instrumentation pass to store parameter origins in this array.
This is a reland of r341528.
test/msan/vararg.cc doesn't work on Mips, PPC and AArch64 (because this
patch doesn't touch them), XFAIL these arches.
Also turned out Clang crashed on i80 vararg arguments because of
incorrect origin type returned by getOriginPtrForVAArgument() - fixed it
and added a test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341554
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Alex Bradbury [Thu, 6 Sep 2018 13:41:04 +0000 (13:41 +0000)]
[RISCV][NFC] Rework test/MC/RISCV/rv{32,64}* to allow testing of symbol operands
Standardise on check lines:
* CHECK-ASM
* CHECK-OBJ
* CHECK-ASM-AND-OBJ
This allows for the addition of tests involving symbol operands, which will
not result in identical instructions in both assembly and disassembled object
output.
This commit doesn't exploit this reworking to increase test coverage of symbol
operands - that will come in a future patch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341546
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Sanjay Patel [Thu, 6 Sep 2018 13:19:22 +0000 (13:19 +0000)]
[InstCombine] fix formatting in SimplifyDemandedVectorElts->Select; NFCI
I'm preparing to add the same functionality both here and to the DAG
version of this code in D51696 / D51433, so try to make those cases
as similar as possible to avoid bugs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341545
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Alexander Potapenko [Thu, 6 Sep 2018 12:19:27 +0000 (12:19 +0000)]
[MSan] revert r341528 to unbreak the bots
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341541
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Florian Hahn [Thu, 6 Sep 2018 10:41:01 +0000 (10:41 +0000)]
[LoopInterchange] Cleanup unused variables.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341537
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Sven van Haastregt [Thu, 6 Sep 2018 10:25:59 +0000 (10:25 +0000)]
Fix argument type in MachineInstr::hasPropertyInBundle
The MCID::Flag enumeration now has more than 32 items, this means that
the hasPropertyBundle argument 'Mask' can overflow.
This patch changes the argument to be 64 bits instead.
Patch by Mikael Nilsson.
Differential Revision: https://reviews.llvm.org/D51596
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341536
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Florian Hahn [Thu, 6 Sep 2018 09:57:27 +0000 (09:57 +0000)]
[LoopInterchange] Move preheader creation to transform stage and simplify.
There is no need to create preheaders in the analysis stage, we only
need them when adjusting the branches. Also, the only cases we need to
create our own preheaders is when they have more than 1 predecessors or
PHI nodes (even with only 1 predecessor, we could have an LCSSA phi
node). I have simplified the conditions and added some assertions to be
sure. Because we know the inner and outer loop need to be tightly
nested, it is sufficient to check if the inner loop preheader is the
outer loop header to check if we need to create a new preheader.
Reviewers: efriedma, mcrosier, karthikthecool
Reviewed By: efriedma
Differential Revision: https://reviews.llvm.org/D51703
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341533
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Max Kazantsev [Thu, 6 Sep 2018 09:29:42 +0000 (09:29 +0000)]
[NFC] Simplify inner structure of InstructionPrecedenceTracking
Currently it has a set KnownBlocks that marks blocks as having cached
answers and a map FirstSpecialInsts that maps these blocks to first
special instructions in them. The value in the map is always non-null,
and for blocks that are known to have no special instructions the map
does not have an instance.
This patch removes KnownBlocks as obsolete. Instead, for blocks that
are known to have no special instructions, we just put a nullptr value.
This makes the code much easier to read.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341531
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Alexander Potapenko [Thu, 6 Sep 2018 08:50:11 +0000 (08:50 +0000)]
[MSan] store origins for variadic function parameters in __msan_va_arg_origin_tls
Add the __msan_va_arg_origin_tls TLS array to keep the origins for
variadic function parameters.
Change the instrumentation pass to store parameter origins in this array.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341528
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David Green [Thu, 6 Sep 2018 08:42:17 +0000 (08:42 +0000)]
[SLC] Add an alignment to CreateGlobalString
Previously the alignment on the newly created global strings was not set,
meaning that DataLayout::getPreferredAlignment was free to overalign it
to 16 bytes. This caused unnecessary code bloat with the padding between
variables.
The main example of this happening was the printf->puts optimisation in
SimplifyLibCalls, but as the change here is made in
IRBuilderBase::CreateGlobalString, other globals using this will now be
aligned too.
Differential Revision: https://reviews.llvm.org/D51410
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341527
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Max Kazantsev [Thu, 6 Sep 2018 08:33:02 +0000 (08:33 +0000)]
Return "[NFC] Add severe validation of InstructionPrecedenceTracking"
This validation patch has been reverted as rL341147 because of conserns raised by
@reames. This revision returns it as is to raise a discussion and address the concerns.
Differential Revision: https://reviews.llvm.org/D51523
Reviewed By: reames
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341526
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Alexander Potapenko [Thu, 6 Sep 2018 08:21:54 +0000 (08:21 +0000)]
[MSan] Make sure variadic function arguments do not overflow __msan_va_arg_tls
Turns out that calling a variadic function with too many (e.g. >100 i64's)
arguments overflows __msan_va_arg_tls, which leads to smashing other TLS
data with function argument shadow values.
getShadow() already checks for kParamTLSSize and returns clean shadow if
the argument does not fit, so just skip storing argument shadow for such
arguments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341525
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Dean Michael Berris [Thu, 6 Sep 2018 05:55:57 +0000 (05:55 +0000)]
[XRay] Add a BlockIndexer visitor for FDR Records.
Summary:
This change adds a `BlockIndexer` type which maintains pointers to
records that belong to the same process+thread pairs. The indexing
happens with order of appearance of records as they are visited.
This version of the indexer currently only supports FDR version 3 logs,
which contain `BufferExtent` records. We will add support for v2 and v1
logs in follow-up patches.
This is another part of D50441.
Reviewers: eizan, kpw, mboerger
Reviewed By: mboerger
Subscribers: mboerger, mgorny, hiraditya, llvm-commits
Differential Revision: https://reviews.llvm.org/D51673
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341518
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Max Kazantsev [Thu, 6 Sep 2018 05:52:47 +0000 (05:52 +0000)]
Revert "[IndVars] Turn isValidRewrite into an assertion" because it seems wrong
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341517
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Max Kazantsev [Thu, 6 Sep 2018 05:21:25 +0000 (05:21 +0000)]
[IndVars] Turn isValidRewrite into an assertion
Function rewriteLoopExitValues contains a check on isValidRewrite which
is needed to make sure that SCEV does not convert the pattern
`gep Base, (&p[n] - &p[0])` into `gep &p[n], Base - &p[0]`. This problem
has been fixed in SCEV long ago, so this check is just obsolete.
This patch converts it into an assertion to make sure that the SCEV will
not mess up this case in the future.
Differential Revision: https://reviews.llvm.org/D51582
Reviewed By: atrick
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341516
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