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Aditya Nandakumar [Tue, 26 Jan 2016 18:42:36 +0000 (18:42 +0000)]
Reassociate: Reprocess RedoInsts after each inst
Previously the RedoInsts was processed at the end of the block.
However it was possible that it left behind some instructions that
were not canonicalized.
This should guarantee that any previous instruction in the basic
block is canonicalized before we process a new instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@258830
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Sanjay Patel [Tue, 26 Jan 2016 18:22:50 +0000 (18:22 +0000)]
[x86, AVX] tighten checks
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@258828
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Benjamin Kramer [Tue, 26 Jan 2016 18:21:38 +0000 (18:21 +0000)]
Update wasm target for r258819.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@258827
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Kevin Enderby [Tue, 26 Jan 2016 18:20:49 +0000 (18:20 +0000)]
Update the comments for the macho-invalid-zero-ncmds test and fix
llvm-objdump when printing the Mach Header to print the unknown
cputype and cpusubtype fields as decimal instead of not printing
them at all. And change the test to check for that.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@258826
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Sanjay Patel [Tue, 26 Jan 2016 18:14:37 +0000 (18:14 +0000)]
fix formatting; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@258825
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Sanjay Patel [Tue, 26 Jan 2016 17:06:13 +0000 (17:06 +0000)]
don't repeat names in documentation comments; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@258820
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Benjamin Kramer [Tue, 26 Jan 2016 16:44:37 +0000 (16:44 +0000)]
Reflect the MC/MCDisassembler split on the include/ level.
No functional change, just moving code around.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@258818
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Sanjay Patel [Tue, 26 Jan 2016 16:17:24 +0000 (16:17 +0000)]
[LibCallSimplifier] fold memset(malloc(x), 0, x) --> calloc(1, x)
This is a step towards solving PR25892:
https://llvm.org/bugs/show_bug.cgi?id=25892
It won't handle the reported case. As noted by the 'TODO' comments in the patch,
we need to relax the hasOneUse() constraint and also match patterns that include
memset_chk() and the llvm.memset() intrinsic in addition to memset().
Differential Revision: http://reviews.llvm.org/D16337
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@258816
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Matthew Simpson [Tue, 26 Jan 2016 15:45:49 +0000 (15:45 +0000)]
Revert "Reapply commit r258404 with fix"
This commit exposes a crash in computeKnownBits on the Chromium buildbots.
Reverting to investigate.
Reference: https://llvm.org/bugs/show_bug.cgi?id=26307
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@258812
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Igor Laevsky [Tue, 26 Jan 2016 15:09:42 +0000 (15:09 +0000)]
Re-submit r256008 "Improve DWARFDebugFrame::parse to also handle __eh_frame."
Originally this change was causing failures on windows buildbots.
But those problems were fixed in r258806.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@258811
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Dan Gohman [Tue, 26 Jan 2016 14:55:17 +0000 (14:55 +0000)]
[WebAssembly] Fix a typo in a comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@258810
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Igor Laevsky [Tue, 26 Jan 2016 13:31:11 +0000 (13:31 +0000)]
[DebugInfo] Fix DWARFDebugFrame instruction operand ordering
We can't rely on the evalution order of function arguments.
Differential Revision: http://reviews.llvm.org/D16509
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@258806
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Simon Pilgrim [Tue, 26 Jan 2016 09:30:08 +0000 (09:30 +0000)]
[X86][SSE] Add zero element and general 64-bit VZEXT_LOAD support to EltsFromConsecutiveLoads
This patch adds support for trailing zero elements to VZEXT_LOAD loads (and checks that no zero elts occur within the consecutive load).
It also generalizes the 64-bit VZEXT_LOAD load matching to work for loads other than 2x32-bit loads.
After this patch it will also be easier to add support for other basic load patterns like 32-bit VZEXT_LOAD loads, PMOVZX and subvector load insertion.
Differential Revision: http://reviews.llvm.org/D16217
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@258798
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Craig Topper [Tue, 26 Jan 2016 06:10:15 +0000 (06:10 +0000)]
[X86] Mark LDS/LES as not being allowed in 64-bit mode.
Their opcodes are used as part of the VEX prefix in 64-bit mode. Clearly the disassembler implicitly decoded them as AVX instructions in 64-bit mode, but I think the AsmParser would have encoded them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@258793
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Matt Arsenault [Tue, 26 Jan 2016 04:49:24 +0000 (04:49 +0000)]
AMDGPU: Move AMDGPU intrinsics only used by R600
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@258790
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Matt Arsenault [Tue, 26 Jan 2016 04:49:22 +0000 (04:49 +0000)]
AMDGPU: Tidy minor td file issues
Make comments and indentation more consistent.
Rearrange a few things to be in a more consistent order,
such as organizing subtarget features from those describing
an actual device property, and those used as options.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@258789
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Matt Arsenault [Tue, 26 Jan 2016 04:43:48 +0000 (04:43 +0000)]
AMDGPU: Make v32i8/v64i8 illegal types
Old intrinsics were forcing these, but they have now all
been removed. This fixes large i8 vector operations generally
being broken.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@258788
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Matt Arsenault [Tue, 26 Jan 2016 04:38:08 +0000 (04:38 +0000)]
AMDGPU: Remove old sample intrinsics
I did my best to try to update all the uses in tests that
just happened to use the old ones to the newer intrinsics.
I'm not sure I got all of the immediate operand conversions
correct, since the value seems to have been ignored by the
old pattern but I don't think it really matters.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@258787
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Matt Arsenault [Tue, 26 Jan 2016 04:29:56 +0000 (04:29 +0000)]
AMDGPU: Add new amdgcn intrinsics for cube instructions
More cleanup to try to get all intrinsics using the correct
amdgcn prefix that are as close to the instruction as possible.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@258786
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Matt Arsenault [Tue, 26 Jan 2016 04:29:24 +0000 (04:29 +0000)]
AMDGPU: Implement read_register and write_register intrinsics
Some of the special intrinsics now that now correspond to a instruction
also have special setting of some registers, e.g. llvm.SI.sendmsg sets
m0 as well as use s_sendmsg. Using these explicit register intrinsics
may be a better option.
Reading the exec mask and others may be useful for debugging. For this
I'm not sure this is entirely correct because we would want this to
be convergent, although it's possible this is already treated
sufficently conservatively.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@258785
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Matt Arsenault [Tue, 26 Jan 2016 04:29:15 +0000 (04:29 +0000)]
AMDGPU: Note mesa version in release notes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@258784
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Matt Arsenault [Tue, 26 Jan 2016 04:14:16 +0000 (04:14 +0000)]
AMDGPU: Restore AMDGPU prefixed rsq intrinsic for now
Also move into backend intrinsics to discourage use of the old name.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@258783
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Dan Gohman [Tue, 26 Jan 2016 04:01:11 +0000 (04:01 +0000)]
[WebAssembly] Optimize memcpy/memmove/memcpy calls.
These calls return their first argument, but because LLVM uses an intrinsic
with a void return type, they can't use the returned attribute. Generalize
the store results pass to optimize these calls too.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@258781
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Dan Gohman [Tue, 26 Jan 2016 03:43:48 +0000 (03:43 +0000)]
[WebAssembly] Remove a completed entry from the README.txt.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@258780
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Dan Gohman [Tue, 26 Jan 2016 03:39:31 +0000 (03:39 +0000)]
[WebAssembly] Implement unaligned loads and stores.
Differential Revision: http://reviews.llvm.org/D16534
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@258779
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Haicheng Wu [Tue, 26 Jan 2016 02:27:47 +0000 (02:27 +0000)]
[LIR] Add support for structs and hand unrolled loops
This is a recommit of r258620 which causes PR26293.
The original message:
Now LIR can turn following codes into memset:
typedef struct foo {
int a;
int b;
} foo_t;
void bar(foo_t *f, unsigned n) {
for (unsigned i = 0; i < n; ++i) {
f[i].a = 0;
f[i].b = 0;
}
}
void test(foo_t *f, unsigned n) {
for (unsigned i = 0; i < n; i += 2) {
f[i] = 0;
f[i+1] = 0;
}
}
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@258777
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Reid Kleckner [Tue, 26 Jan 2016 02:06:41 +0000 (02:06 +0000)]
Use binary search for intrinsic ID lookups
This improves compile time of Function.cpp from 57s to 37s for me
locally. Intrinsic IDs are cached on the Function object, so this
shouldn't regress performance.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@258774
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Matthias Braun [Tue, 26 Jan 2016 01:40:48 +0000 (01:40 +0000)]
LiveIntervalAnalysis: Improve some comments
As recommended by Justin.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@258771
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Reid Kleckner [Tue, 26 Jan 2016 00:55:00 +0000 (00:55 +0000)]
Sort intrinsics by LLVM intrinsic name, rather than tablegen def name
Step one towards using a simple binary search to lookup intrinsic IDs
instead of our crazy table generated switch+memcmp+startswith code that
makes Function.cpp take about a minute to compile. See PR24785 and
PR11951 for why we should do this.
The X86 backend contains tables that need to be sorted on intrinsic ID,
so reorder those.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@258757
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Matthias Braun [Tue, 26 Jan 2016 00:43:50 +0000 (00:43 +0000)]
LiveIntervalAnalysis: Cleanup handleMove{Down|Up}() functions, NFC
These two functions are hard to reason about. This commit makes the code
more comprehensible:
- Use four distinct variables (OldIdxIn, OldIdxOut, NewIdxIn, NewIdxOut)
with a fixed value instead of a changing iterator I that points to
different things during the function.
- Remove the early explanation before the function in favor of more
detailed comments inside the function. Should have more/clearer comments now
stating which conditions are tested and which invariants hold at
different points in the functions.
The behaviour of the code was not changed.
I hope that this will make it easier to review the changes in
http://reviews.llvm.org/D9067 which I will adapt next.
Differential Revision: http://reviews.llvm.org/D16379
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@258756
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Dan Gohman [Tue, 26 Jan 2016 00:35:07 +0000 (00:35 +0000)]
Followup to 258750; update more tests to use .p2align .
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@258755
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Dan Gohman [Tue, 26 Jan 2016 00:27:59 +0000 (00:27 +0000)]
Followup to 258750; update all MC tests to use .p2align .
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@258754
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Dan Gohman [Tue, 26 Jan 2016 00:17:24 +0000 (00:17 +0000)]
Followup to 258750; update this test to use .p2align .
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@258752
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Dan Gohman [Tue, 26 Jan 2016 00:03:25 +0000 (00:03 +0000)]
[MC] Use .p2align instead of .align
For historic reasons, the behavior of .align differs between targets.
Fortunately, there are alternatives, .p2align and .balign, which make the
interpretation of the parameter explicit, and which behave consistently across
targets.
This patch teaches MC to use .p2align instead of .align, so that people reading
code for multiple architectures don't have to remember which way each platform
does its .align directive.
Differential Revision: http://reviews.llvm.org/D16549
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@258750
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Philip Reames [Mon, 25 Jan 2016 23:37:53 +0000 (23:37 +0000)]
[GVN] Rearrange code to make local vs non-local cases more obvious [NFCI]
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@258747
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Evgeniy Stepanov [Mon, 25 Jan 2016 23:35:03 +0000 (23:35 +0000)]
[cfi] Cross-DSO CFI diagnostic mode (LLVM part).
* __cfi_check gets a 3rd argument: ubsan handler data
* Instead of trapping on failure, call __cfi_check_fail which must be
present in the module (generated in the frontend).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@258746
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Philip Reames [Mon, 25 Jan 2016 23:19:12 +0000 (23:19 +0000)]
[GVN] Factor out common code [NFCI]
We had the same code duplicated for each type of Def. We also have the entire block duplicated between the local and non-local case, but let's start with local cleanup.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@258740
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Vedant Kumar [Mon, 25 Jan 2016 22:47:54 +0000 (22:47 +0000)]
[docs] Document how to merge patches into release branches
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@258736
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Matthias Braun [Mon, 25 Jan 2016 22:08:25 +0000 (22:08 +0000)]
X86ISelLowering: Fix cmov(cmov) special lowering bug
There's a special case in EmitLoweredSelect() that produces an improved
lowering for cmov(cmov) patterns. However this special lowering is
currently broken if the inner cmov has multiple users so this patch
stops using it in this case.
If you wonder why this wasn't fixed by continuing to use the special
lowering and inserting a 2nd PHI for the inner cmov: I believe this
would incur additional copies/register pressure so the special lowering
does not improve upon the normal one anymore in this case.
This fixes http://llvm.org/PR26256 (= rdar://
24329747)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@258729
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Teresa Johnson [Mon, 25 Jan 2016 22:04:56 +0000 (22:04 +0000)]
[ThinLTO] Find all needed metadata when linking metadata as postpass
For metadata postpass linking, after importing all functions, we need
to recursively walk through any nodes reached via imported functions to
locate needed subprogram metadata. Some might only be reached indirectly
via the variable list for an inlined function.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@258728
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Simon Pilgrim [Mon, 25 Jan 2016 21:51:34 +0000 (21:51 +0000)]
[X86][AVX] Add commutation support for VPERM2X128 instructions
Its main use is to allow memory folding of the 1st operand
Differential Revision: http://reviews.llvm.org/D16521
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@258726
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Teresa Johnson [Mon, 25 Jan 2016 21:29:55 +0000 (21:29 +0000)]
[ThinLTO] Handle DISubprogram reached indirectly from DIImportedEntity
Extend fix for PR26037 to identify DISubprogram reached from a
DIImportedEntity via a DILexicalBlock.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@258722
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Xinliang David Li [Mon, 25 Jan 2016 20:38:13 +0000 (20:38 +0000)]
Fix a typo
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@258716
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Lawrence Hu [Mon, 25 Jan 2016 19:43:45 +0000 (19:43 +0000)]
Enable loopreroll to rerool loop with pointer induction variable.
Example:
while (buf !=end ) {
S += buf[0];
S += buf[1];
buf +=2;
};
Differential Revision: http://reviews.llvm.org/D13151
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@258709
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Lawrence Hu [Mon, 25 Jan 2016 19:36:30 +0000 (19:36 +0000)]
Undo commit 258700 due to missing commit message
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@258708
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Matthew Simpson [Mon, 25 Jan 2016 19:24:29 +0000 (19:24 +0000)]
Reapply commit r25804 with fix
We were hitting an assertion because we were computing smaller type sizes for
instructions that cannot be demoted. The fix first determines the instructions
that will be demoted, and then applies the smaller type size to only those
instructions.
This should fix PR26239.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@258705
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Quentin Colombet [Mon, 25 Jan 2016 19:12:49 +0000 (19:12 +0000)]
Speculatively revert r258620 as it is the likely culprid of PR26293.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@258703
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Ivan Krasin [Mon, 25 Jan 2016 19:05:45 +0000 (19:05 +0000)]
Temporary disable broken fuzzer/timeout tests.
Reviewers: kcc
Differential Revision: http://reviews.llvm.org/D16543
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@258702
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Rafael Espindola [Mon, 25 Jan 2016 19:02:20 +0000 (19:02 +0000)]
Add a test showing we can write a vector of floats.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@258701
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Lawrence Hu [Mon, 25 Jan 2016 18:53:39 +0000 (18:53 +0000)]
Differential Revision: reviews.llvm.org/D13151
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@258700
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Sanjay Patel [Mon, 25 Jan 2016 18:38:38 +0000 (18:38 +0000)]
don't repeat function names in documentation comments; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@258699
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Dan Gohman [Mon, 25 Jan 2016 16:48:44 +0000 (16:48 +0000)]
[WebAssembly] Fix unbalanced register stack code in the case of late DCE.
Instructions can be DCE'd after the RegStackify pass. If the instruction which
would be the pop for what would be a push is removed, don't use a push.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@258694
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Dan Gohman [Mon, 25 Jan 2016 15:19:39 +0000 (15:19 +0000)]
[WebAssembly] Add tests for negative offsets with global variable addresses.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@258693
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Dan Gohman [Mon, 25 Jan 2016 15:12:05 +0000 (15:12 +0000)]
[WebAssembly] Minor code formatting cleanups. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@258692
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Dan Gohman [Mon, 25 Jan 2016 15:05:56 +0000 (15:05 +0000)]
[SelectionDAG] Use the correct return type for memcpy, memmove, and memset.
When generating calls to memcpy, memmove, and memset, use void* as the return
type rather than void, to match the standard signatures for these functions.
This has no practical effect for most targets, since the return values of
these calls aren't being used anyway, and most calling conventions tolerate
this kind of mismatch. However, this change will help support future
optimizations to utilize the return value to avoid holding the argument
value live across a call.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@258691
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James Molloy [Mon, 25 Jan 2016 14:49:36 +0000 (14:49 +0000)]
[DemandedBits] Fix computation of demanded bits for ICmps
The computation of ICmp demanded bits is independent of the individual operand being evaluated. We simply return a mask consisting of the minimum leading zeroes of both operands.
We were incorrectly passing "I" to ComputeKnownBits - this should be "UserI->getOperand(0)". In cases where we were evaluating the 1th operand, we were taking the minimum leading zeroes of it and itself.
This should fix PR26266.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@258690
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Michael Zuckerman [Mon, 25 Jan 2016 14:43:23 +0000 (14:43 +0000)]
[AVX512] Adding PTESTNMB/D/W/Q instruction
Differential Revision: http://reviews.llvm.org/D16520
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@258688
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Aaron Ballman [Mon, 25 Jan 2016 14:17:39 +0000 (14:17 +0000)]
Reapplying r256836 with a fix for MSVC 14 support.
Enable more strict standards conformance in MSVC for rvalue casting and string literal type conversion to non-const types. Also enables generation of intrinsics for more functions.
Patch by Alexander Riccio
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@258687
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Michael Zuckerman [Mon, 25 Jan 2016 13:27:32 +0000 (13:27 +0000)]
[AVX512] Adding PTESTMB/W/D/Q instruction
Differential Revision: http://reviews.llvm.org/D16519
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@258686
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Bradley Smith [Mon, 25 Jan 2016 11:26:11 +0000 (11:26 +0000)]
[ARM] Add DSP build attribute and extension targeting
This patch was originally committed as r257885, but was reverted due to windows
failures. The cause of these failures has been fixed under r258677, hence
re-committing the original patch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@258683
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Bradley Smith [Mon, 25 Jan 2016 11:25:36 +0000 (11:25 +0000)]
[ARM] Add new system registers to ARMv8-M Baseline/Mainline
This patch was originally committed as r257884, but was reverted due to windows
failures. The cause of these failures has been fixed under r258677, hence
re-committing the original patch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@258682
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Bradley Smith [Mon, 25 Jan 2016 11:24:47 +0000 (11:24 +0000)]
[ARM] Add ARMv8-M security extension instructions to ARMv8-M Baseline/Mainline
This patch was originally committed as r257883, but was reverted due to windows
failures. The cause of these failures has been fixed under r258677, hence
re-committing the original patch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@258681
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Asaf Badouh [Mon, 25 Jan 2016 11:14:24 +0000 (11:14 +0000)]
[X86][IFMA] adding intrinsics and encoding for multiply and add of unsigned 52bit integer
VPMADD52LUQ - Packed Multiply of Unsigned 52-bit Integers and Add the Low 52-bit Products to Qword Accumulators
VPMADD52HUQ - Packed Multiply of Unsigned 52-bit Unsigned Integers and Add High 52-bit Products to 64-bit Accumulators
Differential Revision: http://reviews.llvm.org/D16407
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@258680
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Oliver Stannard [Mon, 25 Jan 2016 10:26:26 +0000 (10:26 +0000)]
[ARM] Add ARMv8.2-A FP16 scalar instructions
This was originally committed as r255762, but reverted as it broke windows
bots. Re-commitiing the exact same patch, as the underlying cause was fixed by
r258677.
ARMv8.2-A adds 16-bit floating point versions of all existing VFP
floating-point instructions. This is an optional extension, so all of
these instructions require the FeatureFullFP16 subtarget feature.
The assembly for these instructions uses S registers (AArch32 does not
have H registers), but the instructions have ".f16" type specifiers
rather than ".f32" or ".f64". The top 16 bits of each source register
are ignored, and the top 16 bits of the destination register are set to
zero.
These instructions are mostly the same as the 32- and 64-bit versions,
but they use coprocessor 9 rather than 10 and 11.
Two new instructions, VMOVX and VINS, have been added to allow packing
and extracting two 16-bit floats stored in the top and bottom halves of
an S register.
New fixup kinds have been added for the PC-relative load and store
instructions, but no ELF relocations have been added as they have a
range of 512 bytes.
Differential Revision: http://reviews.llvm.org/D15038
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@258678
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Oliver Stannard [Mon, 25 Jan 2016 10:20:19 +0000 (10:20 +0000)]
[TableGen] Fix sort order of asm operand classes
This is a fix for https://llvm.org/bugs/show_bug.cgi?id=22796.
The previous implementation of ClassInfo::operator< allowed cycles of classes
such that x < y < z < x, meaning that a list of them cannot be correctly
sorted, and the sort order could differ with different standard libraries.
The original implementation sorted classes by ValueName if they were otherwise
equal. This isn't strictly necessary, but some backends seem to accidentally
rely on it. If I reverse this comparison I get 8 test failures spread across
the AArch64, Mips and X86 backends, so I have left it in until those backends
can be fixed.
There was one case in the X86 backend where the observable behaviour of the
assembler is changed by this patch. This was because some of the memory asm
operands were not marked as children of X86MemAsmOperand.
Differential Revision: http://reviews.llvm.org/D16141
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@258677
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Junmo Park [Mon, 25 Jan 2016 10:17:17 +0000 (10:17 +0000)]
Silence a -Wparentheses warning; NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@258676
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Igor Breger [Mon, 25 Jan 2016 10:17:11 +0000 (10:17 +0000)]
AVX1 : Enable vector masked_load/store to AVX1.
Use AVX1 FP instructions (vmaskmovps/pd) in place of the AVX2 int instructions (vpmaskmovd/q).
Differential Revision: http://reviews.llvm.org/D16528
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@258675
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Michael Zuckerman [Mon, 25 Jan 2016 08:43:26 +0000 (08:43 +0000)]
[AVX512] [CMPPS ][ CMPPD ] Adding full Comparison Predicate names
X86AsmParser.cpp is missing full comparison predicate names for CMPPD and CMPPS Instructions.
X86AsmParser.cpp defines only the short names of the Comparison predicate that you can find in the following pdf:
https://software.intel.com/sites/default/files/managed/07/b7/319433-023.pdf
Page 5-61 table 5-3
Differential Revision: http://reviews.llvm.org/D16518
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@258671
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Davide Italiano [Mon, 25 Jan 2016 01:24:15 +0000 (01:24 +0000)]
[llvm-size] Use stderr instead of stdout for error messages.
This matches the behavior of other tools: objdump, readobj etc..
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@258667
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Lang Hames [Mon, 25 Jan 2016 01:21:45 +0000 (01:21 +0000)]
[Object][COFF] Revert r258665 - It doesn't do what I had intended.
I'm discussing the right approach for tracking visibility for COFF symbols on
the llvm-dev list.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@258666
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Lang Hames [Sun, 24 Jan 2016 21:56:40 +0000 (21:56 +0000)]
[Object][COFF] Set the generic SF_Exported flag on COFF exported symbols.
The ORC ObjectLinkingLayer uses this flag during symbol lookup. Failure to set
it causes all symbols to behave as if they were non-exported, which has caused
failures in the kaleidoscope tutorials on Windows. Raising the flag should
un-break the tutorials.
No test case yet - none of the existing command line tools for printing symbol
tables (llvm-nm, llvm-objdump) show the status of this flag, and I don't want to
change the format from these tools without consulting their owners. I'll send an
email to the dev-list to figure out the right way forward.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@258665
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David Majnemer [Sun, 24 Jan 2016 20:46:11 +0000 (20:46 +0000)]
[COFF] Simplify SetSectionName
Consolidate the code which handles string table offsets less than 999999
with the code for offsets less than
9999999. While we are here,
simplify the code by not using sprintf to generate the string.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@258664
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David Majnemer [Sun, 24 Jan 2016 19:32:52 +0000 (19:32 +0000)]
[LoopSimplify] Reuse changeToUnreachable
Use existing functionality provided in changeToUnreachable instead of
reinventing it in LoopSimplify.
No functionality change is intended.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@258663
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David Majnemer [Sun, 24 Jan 2016 16:46:53 +0000 (16:46 +0000)]
Fix build bot breakage
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@258661
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Elena Demikhovsky [Sun, 24 Jan 2016 10:41:28 +0000 (10:41 +0000)]
Added Skylake client to X86 targets and features
Changes in X86.td:
I set features of Intel processors in incremental form: IVB = SNB + X HSW = IVB + X ..
I added Skylake client processor and defined it's features
FeatureADX was missing on KNL
Added some new features to appropriate processors SMAP, IFMA, PREFETCHWT1, VMFUNC and others
Differential Revision: http://reviews.llvm.org/D16357
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@258659
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Amjad Aboud [Sun, 24 Jan 2016 08:18:55 +0000 (08:18 +0000)]
Fixed few comments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@258658
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Igor Breger [Sun, 24 Jan 2016 08:04:33 +0000 (08:04 +0000)]
AVX512: VMOVDQU8/16/32/64 (load) intrinsic implementation.
Differential Revision: http://reviews.llvm.org/D16137
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@258657
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Craig Topper [Sun, 24 Jan 2016 07:13:28 +0000 (07:13 +0000)]
[TableGen] In AsmWriterEmitter unique command search, rather than storing a mapping from instruction to unique command, instead store a list of which instructions each unique command corresponds to.
This simplifies the complexity of the code that tries to find further operands to merge into the unique command.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@258656
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David Majnemer [Sun, 24 Jan 2016 06:40:37 +0000 (06:40 +0000)]
Fix buildbot failures
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@258655
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David Majnemer [Sun, 24 Jan 2016 06:26:47 +0000 (06:26 +0000)]
[SCCP] Remove duplicate code
SCCP has code identical to changeToUnreachable's behavior, switch it
over to just call changeToUnreachable.
No functionality change intended.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@258654
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David Majnemer [Sun, 24 Jan 2016 05:26:18 +0000 (05:26 +0000)]
[InstCombine, SCCP] Consolidate code used to remove instructions
InstCombine and SCCP both want to remove dead code in a very particular
way but using identical means to do so. Share the code between the two.
No functionality change is intended.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@258653
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David Majnemer [Sat, 23 Jan 2016 23:54:33 +0000 (23:54 +0000)]
[WinEH] Don't miscompile cleanups which conditionally unwind to caller
A cleanup can have paths which unwind or end up in unreachable.
If there is an unreachable path *and* a path which unwinds to caller,
we would mistakenly inject an unwind path to a catchswitch on the
unreachable path. This results in a verifier assertion firing because
the cleanup unwinds to two different places: to the caller and to the
catchswitch.
This occured because we used getCleanupRetUnwindDest to determine if the
cleanuppad had no cleanuprets.
This is incorrect, getCleanupRetUnwindDest returns null for cleanuprets
which unwind to caller.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@258651
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Manuel Jacob [Sat, 23 Jan 2016 22:49:54 +0000 (22:49 +0000)]
Remove duplicate documentation in ConstantFolding.cpp. NFC.
The documentation for these functions is already present in the header file.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@258649
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Manuel Jacob [Sat, 23 Jan 2016 22:42:24 +0000 (22:42 +0000)]
Remove duplicate documentation in Attributes.cpp. NFC.
The documentation for these methods is already present in the header.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@258648
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Manuel Jacob [Sat, 23 Jan 2016 22:38:39 +0000 (22:38 +0000)]
Update outdated method documention in Attributes.h. NFC.
Nowadays the alignment attribute is not the only integer attribute.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@258647
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Simon Pilgrim [Sat, 23 Jan 2016 22:27:54 +0000 (22:27 +0000)]
[SelectionDAG] Generalised the CONCAT_VECTORS creation to support BUILD_VECTOR and UNDEF folding.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@258646
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Simon Pilgrim [Sat, 23 Jan 2016 22:02:48 +0000 (22:02 +0000)]
[X86][SSE] Generalised TRUNC -> PACKSS/PACKUS code. NFC.
Generalised mask generation / subvector extraction to use the input/output types directly instead of an if/else through all the currently accepted types.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@258645
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Simon Pilgrim [Sat, 23 Jan 2016 21:50:40 +0000 (21:50 +0000)]
Tidied up TRUNC combine code. NFC.
Make use of DAG.getBitcast and use clang-format to reduce number of lines (and make it more readable).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@258644
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Justin Lebar [Sat, 23 Jan 2016 21:12:22 +0000 (21:12 +0000)]
[CUDA] Add Target::isNVPTX().
Summary: Helper so we don't have to enumerate nvptx && nvptx64 everywhere.
Reviewers: echristo
Subscribers: llvm-commits, jhen, tra
Differential Revision: http://reviews.llvm.org/D16494
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@258639
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Justin Lebar [Sat, 23 Jan 2016 21:12:20 +0000 (21:12 +0000)]
[CUDA] Die gracefully when trying to output an LLVM alias.
Summary:
Previously, we would just output "foo = bar" in the assembly, and then
ptxas would choke. Now we die before emitting any invalid code.
Reviewers: echristo
Subscribers: jholewinski, llvm-commits, jhen, tra
Differential Revision: http://reviews.llvm.org/D16490
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@258638
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Justin Lebar [Sat, 23 Jan 2016 21:12:17 +0000 (21:12 +0000)]
[CUDA] Make empty parameter lists in nvptx function decls easier to read.
Summary:
Before:
.func (.param .b32 func_retval0) _ZL21__nvvm_reflect_anchorv(
)
{
After:
.func (.param .b32 func_retval0) _ZL21__nvvm_reflect_anchorv()
{
Reviewers: bkramer
Subscribers: llvm-commits, tra, jhen, echristo, jholewinski
Differential Revision: http://reviews.llvm.org/D16512
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@258637
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Benjamin Kramer [Sat, 23 Jan 2016 20:58:09 +0000 (20:58 +0000)]
Don't check if a list is empty with ilist::size.
ilist::size() is O(n) while ilist::empty() is O(1)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@258636
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NAKAMURA Takumi [Sat, 23 Jan 2016 20:48:50 +0000 (20:48 +0000)]
ObjectTransformLayerTest.cpp: Rework r258633. [-Winconsistent-missing-override]
Sorry for the noise.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@258635
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NAKAMURA Takumi [Sat, 23 Jan 2016 20:45:55 +0000 (20:45 +0000)]
ObjectTransformLayerTest.cpp: Fix a warning. [-Wredundant-move]
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@258634
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NAKAMURA Takumi [Sat, 23 Jan 2016 20:45:50 +0000 (20:45 +0000)]
ObjectTransformLayerTest.cpp: Fix a warning. [-Winconsistent-missing-override]
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@258633
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Kostya Serebryany [Sat, 23 Jan 2016 19:34:19 +0000 (19:34 +0000)]
[libFuzzer] add -abort_on_timeout option
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@258631
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Joseph Tremoulet [Sat, 23 Jan 2016 18:36:01 +0000 (18:36 +0000)]
[ORC] Update ObjectTransformLayer signature
Summary:
Update ObjectTransformLayer::addObjectSet to take the object set by
value rather than reference and pass it to the base layer with move
semantics rather than copy, to match r258185's changes to
ObjectLinkingLayer.
Update the unit test to verify that ObjectTransformLayer's signature stays
in sync with ObjectLinkingLayer's.
Reviewers: lhames
Subscribers: llvm-commits
Differential Revision: http://reviews.llvm.org/D16414
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@258630
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Sanjay Patel [Sat, 23 Jan 2016 17:52:56 +0000 (17:52 +0000)]
regenerate checks and note some near-term improvements
For the moment, this file takes way too long to run (see inline comments), but
that should be a temporary problem. The fact that the compile time is so slow
for a target that doesn't support maskmov may be a bug worth investigating too.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@258629
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Akira Hatanaka [Sat, 23 Jan 2016 16:02:10 +0000 (16:02 +0000)]
[Bitcode] Insert the darwin wrapper at the beginning of a file when the
target is macho.
It looks like the check for macho was accidentally dropped in r132959.
I don't have a test case, but I'll add one if anyone knows how this can
be tested.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@258627
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Aaron Ballman [Sat, 23 Jan 2016 15:42:21 +0000 (15:42 +0000)]
Silence a -Wparentheses warning; NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@258626
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