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Olof Johansson [Wed, 19 Apr 2017 13:45:59 +0000 (06:45 -0700)]
Merge tag 'imx-dt-4.12' of git://git./linux/kernel/git/shawnguo/linux into next/dt
i.MX device tree updates for 4.12:
- New board support: I2SE's i.MX28 Duckbill-2 boards, Gateworks Ventana
i.MX6 GW5903/GW5904, Zodiac Inflight Innovations RDU2 board, Engicam
i.CoreM6 Quad/Dual OpenFrame modules, Boundary Device i.MX6 Quad Plus
SOM.
- Improve compatible string for i.MX50 eSDHC, i.MX7S SRC devices and
i.MX6SX UART device.
- Add interrupts for switch and PHY devices on VF610 ZII Devel C board.
- Add LVDS, LCD backlight, touchscreen and SAI2 support for i.MX6
icore, geam, and isiot boards.
- A series from Lucas Stach to improve i.MX6Q Plus device tree and add
PRE/PRG devices.
- A series from Stefan Agner to update imx7-colibri device tree
regarding to display, PMIC/regulator support.
- Fix PCI bus DTC warnings seen with the latest compiler.
- Set default phy_type and dr_mode for i.MX25 USBOTG port.
- A couple of small improvements on i.MX25 pin function DT header.
- Add audio support for imx6q-cm-fx6 board using Wolfson wm8731 codec
which is muxed to SSI2 device.
- Other random updates, small fixes and trivial cleanups.
* tag 'imx-dt-4.12' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (56 commits)
ARM: dts: imx6q-utilite-pro: add hpd gpio
ARM: dts: imx6qp-sabresd: Set reg_arm regulator supply
ARM: dts: imx6qdl-sabresd: Set LDO regulator supply
ARM: dts: imx: add Gateworks Ventana GW5903 support
ARM: dts: i.MX25: add AIPS control registers
ARM: dts: imx7-colibri: add Carrier Board 3.3V/5V regulators
ARM: dts: imx7-colibri: remove 1.8V fixed regulator
ARM: dts: imx7-colibri: allow to disable Ethernet rail
ARM: dts: imx7-colibri: fix PMIC voltages
ARM: dts: imx7-colibri: use OF graph to describe the display
ARM: dts: imx6qp-nitrogen6_som2: add Quad Plus variant of the SOM
ARM: dts: imx6q-icore: Add touchscreen node
ARM: dts: vf610-zii-dev-rev-b: change switch2 label
ARM: dts: imx6ul-[geam|isiot]: Add sai2 node
ARM: dts: imx6ul-isiot-common: Add touchscreen node
ARM: dts: imx6ul-isiot: Add i2c nodes
ARM: dts: imx6ul-isiot: Add imx6ul-isiot-common.dtsi
ARM: dts: imx6ul-isiot: Add backlight support for lcdif
ARM: dts: imx6ul-geam: Add backlight support for lcdif
ARM: dts: imx6: add ZII RDU2 boards
...
Signed-off-by: Olof Johansson <olof@lixom.net>
Olof Johansson [Wed, 19 Apr 2017 13:45:10 +0000 (06:45 -0700)]
Merge tag 'v4.12-rockchip-dts32-2' of git://git./linux/kernel/git/mmind/linux-rockchip into next/dt
Support for the usb-sata controller on the rock2 and another new rk3288
board, the phyCORE som and its PCM-947 carrier board from Phytec.
* tag 'v4.12-rockchip-dts32-2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
ARM: dts: rockchip: Add support for PCM-947 carrier board
dt-bindings: Document Phytec phyCORE-RK3288 RDK
ARM: dts: rockchip: Add support for phyCORE-RK3288 SoM
ARM: dts: rockchip: Enable sata support on rock2 square
Signed-off-by: Olof Johansson <olof@lixom.net>
Olof Johansson [Wed, 19 Apr 2017 13:44:37 +0000 (06:44 -0700)]
Merge tag 'samsung-dt-4.12' of git://git./linux/kernel/git/krzk/linux into next/dt
Samsung DeviceTree ARM update for v4.12:
1. Enhancements to PCIe nodes on Exynos5440.
2. Fix thermal values on some of Exynos5420 boards like Odroid XU3.
3. Add proper clock frequency properties to DSI nodes.
4. Fix watchdog reset on Exynos4412.
5. Fix watchdog infinite interrupt in soft mode on Exynos4210,
Exynos5440, S3C64xx and S5Pv210.
6. Enable watchdog on Exynos4 and S3C SoCs.
* tag 'samsung-dt-4.12' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
ARM: dts: exynos: add HDMI controller phandle to exynos4.dtsi
ARM: dts: s5pv210: Fix infinite interrupt in soft mode
ARM: dts: s3c64xx: Fix infinite interrupt in soft mode
ARM: dts: exynos: Fix infinite interrupt in soft mode on Exynos4210 and Exynos5440
ARM: dts: exynos: Enable watchdog on all Exynos4 boards
ARM: dts: s3c64xx: Enable watchdog on all S3C64xx boards
ARM: dts: exynos: Fix watchdog reset on Exynos4412
ARM: dts: exynos: Add the burst and esc clock frequency properties to DSI node
ARM: dts: exynos: Do not ignore real-world fuse values for thermal zone 0 on Exynos5420
ARM: dts: exynos: Add phy-pcie node for pcie to Exynos5440
Signed-off-by: Olof Johansson <olof@lixom.net>
Olof Johansson [Wed, 19 Apr 2017 13:43:54 +0000 (06:43 -0700)]
Merge tag 'mvebu-dt-4.12-2' of git://git.infradead.org/linux-mvebu into next/dt
mvebu dt for 4.12 (part 2)
Use disk-activity trigger for armada-385-linksys
Keep dts alphabetically ordered for clearfog (Armada 388)
* tag 'mvebu-dt-4.12-2' of git://git.infradead.org/linux-mvebu:
ARM: dts: armada-385-linksys: disk-activity trigger for all
ARM: dts: clearfog: keep dts alphabetically ordered
Signed-off-by: Olof Johansson <olof@lixom.net>
Olof Johansson [Wed, 19 Apr 2017 13:43:08 +0000 (06:43 -0700)]
Merge tag 'renesas-dt2-for-v4.12' of https://git./linux/kernel/git/horms/renesas into next/dt
Second Round of Renesas ARM Based SoC DT Updates for v4.12
Corrections:
* Correct clock frequency of X2 DU clock input for r8a7791/koelsch board
* Correct Z clock for r8a7792 SoC
* Correct parent of SSI[0-9] clocks for r8a779[013] SoCs
* Correct ethernet clock parent on r7s72100 SoC
* Correct DU clock for r8a7794/silk board
Cleanups:
* Drop _clk suffix from external CAN clock node name on r8a779[01] SoCs
Enhancements:
* Enable rtc r7s72100/genmai board
* Add Z2 clock for r8a7794 SoC
* Add DU clock for r8a7794 SoC
* Add power-domains to SDHI for r8a7794 and r7s72100 SoCs
* Add reset control properties for r8a774[35] SoCs
* tag 'renesas-dt2-for-v4.12' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (22 commits)
ARM: dts: r8a7791: Drop _clk suffix from external CAN clock node name
ARM: dts: r8a7790: Drop _clk suffix from external CAN clock node name
ARM: dts: genmai: Enable rtc and rtc_x1 clock
ARM: dts: rskrza1: add rtc DT support
ARM: dts: rskrza1: set rtc_x1 clock value
ARM: dts: r7s72100: add rtc to device tree
ARM: dts: r7s72100: add RTC_X clock inputs to device tree
ARM: dts: r7s72100: add rtc clock to device tree
ARM: dts: koelsch: Correct clock frequency of X2 DU clock input
ARM: dts: r8a7794: Add Z2 clock
ARM: dts: r8a7792: Correct Z clock
ARM: dts: r8a7793: Correct parent of SSI[0-9] clocks
ARM: dts: r8a7791: Correct parent of SSI[0-9] clocks
ARM: dts: r8a7790: Correct parent of SSI[0-9] clocks
ARM: dts: r7s72100: fix ethernet clock parent
ARM: dts: silk: Correct clock of DU1
ARM: dts: alt: Correct clock of DU1
ARM: dts: r8a7794: Correct clock of DU1
ARM: dts: r8a7794: Add DU1 clock to device tree
ARM: dts: r7s72100: add power-domains to sdhi
...
Signed-off-by: Olof Johansson <olof@lixom.net>
Olof Johansson [Wed, 19 Apr 2017 13:42:08 +0000 (06:42 -0700)]
Merge tag 'qcom-dts-for-4.12' of git://git./linux/kernel/git/agross/linux into next/dt
Qualcomm Device Tree Changes for v4.12
* Add Coresight components for MSM8974
* Fixup MSM8974 ADSP XO clk and add RPMCC node
* Fix typo in APQ8060
* Add SDCs on MSM8660
* Revert MSM8974 USB gadget change due to issues
* tag 'qcom-dts-for-4.12' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux:
Revert "ARM: dts: qcom: msm8974: Add USB gadget nodes"
ARM: dts: qcom: msm8974: Add RPMCC DT node
ARM: dts: fix typo on APQ8060 Dragonboard
ARM: dts: add SDC2 and SDC4 to the MSM8660 family
ARM: dts: msm8974: Hook up adsp-pil's xo clock
ARM: dts: qcom: Add msm8974 CoreSight components
Signed-off-by: Olof Johansson <olof@lixom.net>
Olof Johansson [Wed, 19 Apr 2017 13:28:42 +0000 (06:28 -0700)]
Merge tag 'tegra-for-4.12-dt-bindings' of git://git./linux/kernel/git/tegra/linux into next/dt
dt-bindings: Updates for v4.12-rc1
This contains an update for the flow controller device tree binding as
well as the addition of the binding for the GP10B GPU found on the new
Tegra186 (Parker) SoC.
* tag 'tegra-for-4.12-dt-bindings' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
dt-bindings: Add documentation for GP10B GPU
dt-bindings: tegra: Update compatible strings for Tegra flowctrl
Signed-off-by: Olof Johansson <olof@lixom.net>
Olof Johansson [Wed, 19 Apr 2017 12:39:05 +0000 (05:39 -0700)]
Merge tag 'sunxi-dt-h3-for-4.12' of https://git./linux/kernel/git/sunxi/linux into next/dt
Allwinner H3 DT changes for 4.12
H3 patches for 4.12, which are mostly related to reworking the H3 DTSI to
be usable on the arm64 H5 DTSI, that shares almost everything with the H3
but the CPU cores.
We also have some new device addition (USB, mostly) that would conflict
otherwise.
* tag 'sunxi-dt-h3-for-4.12' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
ARM: sun8i: h2+: enable USB OTG for Orange Pi Zero board
ARM: sun8i: h3: enable USB OTG on Orange Pi One
ARM: sunxi: h3/h5: add usb_otg and OHCI/EHCI for usbc0 on H3/H5
arm: sun8i: h3: split Allwinner H3 .dtsi
arm: sun8i: h3: correct the GIC compatible in H3 to gic-400
arm: sun8i: h3: drop pinctrl-a10.h inclusion for H3 DTSI
arm: sun8i: h3: drop skeleton.dtsi inclusion in H3 DTSI
Signed-off-by: Olof Johansson <olof@lixom.net>
Olof Johansson [Wed, 19 Apr 2017 12:37:06 +0000 (05:37 -0700)]
Merge tag 'sunxi-dt-for-4.12' of https://git./linux/kernel/git/sunxi/linux into next/dt
Allwinner DT changes for 4.12
As usual a number of changes, among which:
- All the sun5i DTSI has been reworked based on the new documentation and
the IPs that are actually found in all those SoCs. Part of that rework
also brought the GR8 DTSI to include sun5i.dtsi
- Mali devfreq and thermal throttling support on the A33
- AC power supplies for the AXP209 and AXP22X PMIC
- CAN support for the A20
- CPUFreq-based thermal throttling for the A33
- New board: NanoPi NEO Air
* tag 'sunxi-dt-for-4.12' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux: (38 commits)
ARM: sun8i: sina33: add highest OPP of CPUs
ARM: sun8i: a33: Add devfreq-based GPU cooling
ARM: sun8i: a33: add CPU thermal throttling
ARM: sun8i: a33: add thermal sensor
ARM: dts: sun7i: fix device node ordering
ARM: dts: sun4i: fix device node ordering
ARM: dts: sun7i: Add can0_pins_a pinctrl settings
ARM: dts: sun7i: Add CAN node
ARM: dts: sun4i: Add can0_pins_a pinctrl settings
ARM: dts: sun4i: Add CAN node
ARM: sun7i: cubietruck: enable ACIN und USB power supply subnode
ARM: dts: sun5i: Add interrupt for display backend
dt-bindings: display: sun4i: Add display backend interrupt to device tree binding
ARM: dts: sun7i: Use axp209.dtsi on A20-OLinuXino-Micro
ARM: dts: sun6i: sina31s: Enable SPDIF out
ARM: sun8i: sina33: add cpu-supply
ARM: sun8i: a33: add all operating points
ARM: sun5i: chip: enable ACIN power supply subnode
ARM: dts: sun8i: sina33: enable ACIN power supply subnode
ARM: dtsi: axp22x: add AC power supply subnode
...
Signed-off-by: Olof Johansson <olof@lixom.net>
Olof Johansson [Wed, 19 Apr 2017 12:31:20 +0000 (05:31 -0700)]
Merge tag 'socfpga_dts_for_v4.12' of git://git./linux/kernel/git/dinguyen/linux into next/dt
SoCFPGA DTS updates for v4.12
- Clean-up:
- Add clock/memory nodes
- Add labels for CPU nodes
- Remove unused unit names and reg
- Remove unused skeleton.dtsi
- Add support for PMU
- Add QSPI for sodia board
- Add Reset controller for Arria10
* tag 'socfpga_dts_for_v4.12' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux:
ARM: dts: socfpga: Add Devkit A10-SR Reset Controller
ARM: dts: socfpga: sodia: enable qspi
ARM: dts: socfpga: Add support for PMU
ARM: dts: socfpga: Add labels for CPU nodes
ARM: dts: socfpga: Do not include skeleton.dtsi
ARM: dts: socfpga: Remove unit name for LEDs in EBV SOCrates
ARM: dts: socfpga: Remove unneeded reg from stmpe_touchscreen
ARM: dts: socfpga: Remove unneeded unit names
ARM: dts: socfpga: Add unit name to memory nodes
ARM: dts: socfpga: Add unit name to clock nodes
Signed-off-by: Olof Johansson <olof@lixom.net>
Olof Johansson [Wed, 19 Apr 2017 12:28:30 +0000 (05:28 -0700)]
Merge tag 'davinci-for-v4.12/dt-2' of git://git./linux/kernel/git/nsekhar/linux-davinci into next/dt
A clean-up device-tree patch to ensure pinmux entry reuse.
* tag 'davinci-for-v4.12/dt-2' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci:
ARM: dts: da850: move spi0_cs3_pin pinconf node
Signed-off-by: Olof Johansson <olof@lixom.net>
Olof Johansson [Wed, 19 Apr 2017 12:22:29 +0000 (05:22 -0700)]
Merge tag 'stm32-dt-for-v4.12-1' of git://git./linux/kernel/git/atorgue/stm32 into next/dt
STM32 DT updates for v4.12, round 1
Highlights:
----------
- ADD RTC support on STM32F746 MCU
- Enable RTC on STM32F746 Eval board
- Enable clocks on STM32F746 MCU
- Enable DMA, pwm1 and pwm3 on STM32F429I Eval
- Add support of STM32H743 MCU and his Eval board
- Enable USB HS and FS on STM32F469 Disco board
* tag 'stm32-dt-for-v4.12-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32:
dt-bindings: Document the STM32 USB OTG DWC2 core binding
ARM: dts: stm32: Enable USB HS in FS mode (embedded phy) on stm32f429-disco
ARM: dts: stm32: Enable USB FS on stm32f469-disco
ARM: dts: stm32: Add USB FS support for STM32F429 MCU
ARM: dts: stm32: Add STM32H743 MCU and STM32H743i-EVAL board
ARM: dts: stm32: Enable pwm1 and pwm3 on stm32f429i-eval
ARM: dts: stm32: Enable dma by default on stm32f4 adc
ARM: dts: stm32: enable RTC on stm32746g-eval
ARM: dts: stm32: Add RTC support for STM32F746 MCU
ARM: dts: stm32: set HSE_RTC clock frequency to 1 MHz on stm32f746
dt-bindings: mfd: Add STM32F7 RCC numeric constants into DT include file
ARM: dts: stm32: Enable clocks for STM32F746 MCU
Signed-off-by: Olof Johansson <olof@lixom.net>
Olof Johansson [Wed, 19 Apr 2017 12:20:54 +0000 (05:20 -0700)]
Merge branch 'sti-dt-for-v4.12-round1' of git://git./linux/kernel/git/pchotard/sti into next/dt
* 'sti-dt-for-v4.12-round1' of git://git.kernel.org/pub/scm/linux/kernel/git/pchotard/sti:
ARM: dts: STiH407-family: update rproc node names to avoid conflict
ARM: dts: STiH407-family: fix spi nodes
Signed-off-by: Olof Johansson <olof@lixom.net>
Christopher Spinrath [Tue, 4 Apr 2017 19:41:30 +0000 (21:41 +0200)]
ARM: dts: imx6q-utilite-pro: add hpd gpio
The hpd pin of the second hdmi connector of the Utilite Pro is wired
up to a gpio pin of the SoC. Reflect this in the device tree.
Signed-off-by: Christopher Spinrath <christopher.spinrath@rwth-aachen.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Leonard Crestez [Tue, 4 Apr 2017 17:04:14 +0000 (20:04 +0300)]
ARM: dts: imx6qp-sabresd: Set reg_arm regulator supply
On imx6qp-sabresd LDO_ARM is connected to a different PMIC output than
the other imx6qdl-sabresd boards.
Setting cpu0 arm-supply to sw2_reg is wrong, this must have mistakenly
slipped out of the vendor tree where this is are used for LDO bypass.
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Leonard Crestez [Tue, 4 Apr 2017 17:04:13 +0000 (20:04 +0300)]
ARM: dts: imx6qdl-sabresd: Set LDO regulator supply
Setting the supply is optional but beneficial, it will cause PMIC
voltages to be dynamically changed with cpu frequency.
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Tim Harvey [Mon, 3 Apr 2017 21:18:21 +0000 (14:18 -0700)]
ARM: dts: imx: add Gateworks Ventana GW5903 support
The Gateworks Ventana GW5903 is a single-board computer based on the NXP
IMX6 SoC with the following features:
* IMX6 DualLite Soc (supports IMX6S,IMX6DL,IMX6Q)
* 4GiB DDR3 DRAM
* 32GB eMMC
* 1x microSD connector
* Gateworks System Controller:
- hardware watchdog
- hardware monitor
- pushbutton controller
- EEPROM storage
- power control
* JTAG programmable
* Inertial Module
* uBlox EMMY-W1 (bluetooth/nfc/802.11ac)
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Martin Kaiser [Mon, 3 Apr 2017 19:47:04 +0000 (21:47 +0200)]
ARM: dts: i.MX25: add AIPS control registers
The i.MX25 contains two AHB to IP bridges (AIPS), each of which has a set of
control registers. Add the memory regions for the control registers to
the Device Tree.
Signed-off-by: Martin Kaiser <martin@kaiser.cx>
Reviewed-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Stefan Agner [Wed, 29 Mar 2017 23:21:13 +0000 (16:21 -0700)]
ARM: dts: imx7-colibri: add Carrier Board 3.3V/5V regulators
Model the Carrier Board power distribution by adding a fixed 3.3V
and 5V regulator. The 3.3V regulator is connected to the backlight
as well as the display supply. The 5V regulator is used to supply
USB VBUS.
Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Stefan Agner [Wed, 29 Mar 2017 23:21:12 +0000 (16:21 -0700)]
ARM: dts: imx7-colibri: remove 1.8V fixed regulator
The ADC is directly supplied by the PMIC 1.8V rail, remove the
superfluous fixed regulator.
Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Stefan Agner [Wed, 29 Mar 2017 23:21:11 +0000 (16:21 -0700)]
ARM: dts: imx7-colibri: allow to disable Ethernet rail
The regulator-always-on property on the Ethernet rail prevents Linux
from disabling the rail when Ethernet is shut down (suspend or simply
link down). With this change the regulator framework will disable the
rail when the Ethernet PHY is not used, saving power especially on
carrier board not using Ethernet.
Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Stefan Agner [Wed, 29 Mar 2017 23:21:10 +0000 (16:21 -0700)]
ARM: dts: imx7-colibri: fix PMIC voltages
Fix wrong voltage of PWR_EN_+V3.3 rail. The error had no noticeable
effect since no consumer explicitly requested a specific voltage.
Also use round voltages as it is common in other device trees.
Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Stefan Agner [Wed, 29 Mar 2017 23:21:09 +0000 (16:21 -0700)]
ARM: dts: imx7-colibri: use OF graph to describe the display
To make use of the new eLCDIF DRM driver OF graph description is
required. Describe the display using OF graph nodes.
Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Gary Bisson [Wed, 29 Mar 2017 08:45:23 +0000 (10:45 +0200)]
ARM: dts: imx6qp-nitrogen6_som2: add Quad Plus variant of the SOM
https://boundarydevices.com/product/nit6x-som-v2/
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Gary Bisson <gary.bisson@boundarydevices.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Jagan Teki [Wed, 22 Mar 2017 19:05:18 +0000 (00:35 +0530)]
ARM: dts: imx6q-icore: Add touchscreen node
max11801 touchscreen on Engicam iCoreM6 Quad module is
connected via i2c1, so add max11801: touchscreen@48 on i2c1.
Cc: Dmitry Torokhov <dmitry.torokhov@gmail.com>
Cc: Domenico Acri <domenico.acri@engicam.com>
Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Vivien Didelot [Tue, 28 Mar 2017 19:24:26 +0000 (15:24 -0400)]
ARM: dts: vf610-zii-dev-rev-b: change switch2 label
Rename the switch2@0 label of the switch2 node to switch@0 to respect
the general unit@address DTS rule, and be consistent with the other
switch nodes of the DTS file.
Signed-off-by: Vivien Didelot <vivien.didelot@savoirfairelinux.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Jagan Teki [Fri, 24 Mar 2017 16:18:41 +0000 (21:48 +0530)]
ARM: dts: imx6ul-[geam|isiot]: Add sai2 node
Add Synchronous Audio Interface(SAI) node for Engicam GEAM6UL
and Is.IoT MX6UL variant module boards.
Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Jagan Teki [Fri, 24 Mar 2017 16:18:40 +0000 (21:48 +0530)]
ARM: dts: imx6ul-isiot-common: Add touchscreen node
Add touchscreen node as i2c1 slave device on Engicam Is.IoT MX6UL
modules, the touchscreen controlled 'st,stmpe-ts' connected via
i2c with st,stmpe811 mfd interface.
Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Jagan Teki [Fri, 24 Mar 2017 16:18:39 +0000 (21:48 +0530)]
ARM: dts: imx6ul-isiot: Add i2c nodes
Add support for i2c nodes i2c1 and i2c2 on Is.IoT MX6UL
eMMC variant boards.
Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Jagan Teki [Fri, 24 Mar 2017 16:18:38 +0000 (21:48 +0530)]
ARM: dts: imx6ul-isiot: Add imx6ul-isiot-common.dtsi
lcdif nodes are differ wrt specific LCD connected on Is.IoT MX6UL
module, so create separate file 'imx6ul-isiot-common.dtsi' for common
lcdif node structure and include the same on respective dts.
More common nodes will add in future patches.
Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Jagan Teki [Fri, 24 Mar 2017 16:18:37 +0000 (21:48 +0530)]
ARM: dts: imx6ul-isiot: Add backlight support for lcdif
This patch add support for lcdif backlight on Is.IoT MX6UL
variant boards.
Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Jagan Teki [Fri, 24 Mar 2017 16:18:36 +0000 (21:48 +0530)]
ARM: dts: imx6ul-geam: Add backlight support for lcdif
This patch add support for lcdif backlight on GEAM6UL
variant boards.
Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Lucas Stach [Thu, 23 Mar 2017 14:24:29 +0000 (15:24 +0100)]
ARM: dts: imx6: add ZII RDU2 boards
This adds support for the Zodiac Inflight Innovations RDU2 board,
which has both a Quad and a QuadPlus variant.
The board supports different panels, with the bootloader patching
in the correct compatible, depending on the hardware configuration.
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Tested-by: Nikita Yushchenko <nikita.yoush@cogentembedded.com>
Tested-by: Chris Healy <cphealy@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Lucas Stach [Thu, 23 Mar 2017 14:13:13 +0000 (15:13 +0100)]
ARM: dts: imx6qp: add PRG nodes and hook up to IPUs
Add the DT nodes for the Prefetch Resolve Gaskets found on i.MX6QP
and hook them up to the assigned IPU nodes.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Lucas Stach [Thu, 23 Mar 2017 14:13:12 +0000 (15:13 +0100)]
ARM: dts: imx6qp: add PRE nodes
Add the DT nodes for the Prefetch Resolve Engines found on i.MX6QP.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Rob Herring [Wed, 22 Mar 2017 02:03:03 +0000 (21:03 -0500)]
ARM: dts: imx: fix PCI bus dtc warnings
dtc recently added PCI bus checks. Fix these warnings.
Signed-off-by: Rob Herring <robh@kernel.org>
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Uwe Kleine-König [Mon, 20 Mar 2017 08:21:11 +0000 (09:21 +0100)]
ARM: dts: imx25-pinfunc: Move MX25_PAD_TDO__TDO to a more sensible place
The pinfunc definitions are ordered by mux_reg and so automatically by
conf_reg, too. PAD_TDO is the only pad that has a conf_reg but no
mux_reg. Put it to the place where it its in the order of conf_regs
instead of the top.
Signed-off-by: Uwe Kleine-König <uwe@kleine-koenig.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Uwe Kleine-König [Mon, 20 Mar 2017 08:21:10 +0000 (09:21 +0100)]
ARM: dts: imx25-pinfunc: remove duplicate definition
This was introduced in commit
18e2b50407fb ("ARM: dts: imx25-pinfunc:
more defines").
Signed-off-by: Uwe Kleine-König <uwe@kleine-koenig.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Tim Harvey [Thu, 16 Mar 2017 14:27:19 +0000 (07:27 -0700)]
ARM: dts: imx: add Gateworks Ventana GW5904 support
The Gateworks Ventana GW5904 is a single-board computer based on the NXP
IMX6 SoC with the following features:
* IMX6 DualLite Soc (supports IMX6S,IMX6DL,IMX6Q)
* 2048MB DDR3 DRAM (4x64bit) (options up to 4GiB)
* 8GB eMMC
* Gateworks System Controller:
- hardware watchdog
- hardware monitor
- pushbutton controller
- EEPROM storage
- power control
* JTAG programmable
* 1x miniPCIe socket (with PCIe, USB)
* 1x miniPCIe socket (USB)
* 1x M.2 socket (USB, 2x SIM)
* Inertial Module (LSM9DS1 9DOF: 3x acc, 3x rate, 3x mag)
* GPS (optional uBlox EVA-M8M)
* Application headers:
- 2x RS232 UART (TX/RX/CTS/RTS)
- 8x TTL GPIO (3x configurable as PWM)
- 1x LVDS display 3D+C with i2c touch and PWM backlight
* MV88E6176 GbE Switch (uplink to IMX FEC)
* Front panel connectors:
- 1x user programmable LED
- 1x configurable user pushbutton
- 1x USB OTG
- 4x GbE LAN
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Andrey Smirnov [Tue, 14 Mar 2017 15:33:57 +0000 (08:33 -0700)]
ARM: dts: imx7s: Do not claim i.MX51 compatibility for SRC
System Reset Controller in i.MX7 doesn't have any commonality with IP
block found in i.MX5 and i.MX6 SoC families. Given that and the new
upstream driver for i.MX7 variant (see
https://lkml.org/lkml/2017/2/21/466) remove "fsl,imx51-src" from
compatibility string.
Cc: yurovsky@gmail.com
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Russell King <linux@armlinux.org.uk>
Cc: devicetree@vger.kernel.org
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Jagan Teki [Tue, 14 Mar 2017 09:48:13 +0000 (15:18 +0530)]
ARM: dts: imx6q-icore: Add LVDS support
Add LVDS display support for OpenFrame Capacitive touch 7 inc
display which is supported by Engicam i.CoreM6 QDL Starter Kit.
Cc: Domenico Acri <domenico.acri@engicam.com>
Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Jagan Teki [Tue, 14 Mar 2017 09:48:12 +0000 (15:18 +0530)]
ARM: dts: imx6q: Add Engicam i.CoreM6 Quad/Dual OpenFrame Cap 12.3 initial support
i.CoreM6 Quad/Dual OpenFrame modules are "system on modules plus
openframe display carriers" which are good solution for develop
user friendly graphic user interface.
General features:
CPU NXP i.MX6Q rev1.2 at 792 MHz
RAM 1GB, 32, 64 bit, DDR3-800/1066
NAND SLC,512MB
LVDS Display TFT 12.3" industrial, 1280x480 resolution
Backlight LED backlight, brightness 350 Cd/m2
Power supply 15 to 30 Vdc
Cc: Domenico Acri <domenico.acri@engicam.com>
Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Jagan Teki [Tue, 14 Mar 2017 09:48:11 +0000 (15:18 +0530)]
ARM: dts: imx6q: Add Engicam i.CoreM6 Quad/Dual OpenFrame Cap 10.1 initial support
i.CoreM6 Quad/Dual OpenFrame modules are "system on modules plus
openframe display carriers" which are good solution for develop
user friendly graphic user interface.
General features:
CPU NXP i.MX6Q rev1.2 at 792 MHz
RAM 1GB, 32, 64 bit, DDR3-800/1066
NAND SLC,512MB
LVDS Display TFT 10.1" industrial, 1280x800 resolution
Backlight LED backlight, brightness 350 Cd/m2
Power supply 15 to 30 Vdc
Cc: Domenico Acri <domenico.acri@engicam.com>
Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Jagan Teki [Tue, 14 Mar 2017 09:48:10 +0000 (15:18 +0530)]
ARM: dts: imx6qdl-icore: Add backlight support for lvds
This patch add support for lvds backlight on i.CoreM6 QDL
variant boards.
Cc: Domenico Acri <domenico.acri@engicam.com>
Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Peter Senna Tschudin [Tue, 14 Mar 2017 09:23:02 +0000 (10:23 +0100)]
ARM: dts: imx6q-b850v3: Use megachips-stdpxxxx-ge-b850v3-fw bridges (LVDS-DP++)
Configures the megachips-stdpxxxx-ge-b850v3-fw bridges on the GE
B850v3 dts file.
Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Cc: Martyn Welch <martyn.welch@collabora.co.uk>
Cc: Martin Donnelly <martin.donnelly@ge.com>
Cc: Javier Martinez Canillas <javier@dowhile0.org>
Cc: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Cc: Philipp Zabel <p.zabel@pengutronix.de>
Cc: Rob Herring <robh@kernel.org>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Peter Senna Tschudin <peter.senna@collabora.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Marco Franchi [Wed, 8 Mar 2017 18:32:29 +0000 (15:32 -0300)]
ARM: dts: imx7d-sdb: Add sht11 Click Board support
The imx7d-sdb has a mickro bus connector that can be connected to a
Sensirion SHT11 click board (temperature and humidity sensor):
https://shop.mikroe.com/click/sensors/sht1x
Add a new device tree file to describe such hardware.
Signed-off-by: Marco Franchi <marco.franchi@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Andrew Lunn [Wed, 8 Mar 2017 02:50:13 +0000 (03:50 +0100)]
ARM: dts: vf610-zii-dev-c: Wire up PHY interrupts
The PHYs embedded in the switch direct there interrupts through the
switch interrupt controllers. Now that devel C has its switch
interrupts connected to the SoC, the PHY interrupts can be used by
phylib. Explicitly include MDIO nodes in the switch device tree nodes,
and link the PHY interrupts back to the switch interrupt
controller. Also, link the ports to the PHYs on the MDIO bus.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Andrew Lunn [Wed, 8 Mar 2017 02:50:12 +0000 (03:50 +0100)]
ARM: dts: vf610-zii-dev: Wire up devel C switch interrupts
The devel B and devel C board use the same GPIO lines for interrupts
from the two switches. Move the pinmux nodes from devel B into the
shared .dtsi file, and wire up the interrupts on devel C.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Fabio Estevam [Mon, 6 Mar 2017 16:18:36 +0000 (13:18 -0300)]
ARM: dts: imx6sx: Make UART compatible to 'imx6q-uart'
UART on i.MX6SX (like all other i.MX6 SoC variants) has the same
programming model as the 'imx6q-uart' type, so add it to the compatible
UART string.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Ken Lin [Fri, 3 Mar 2017 21:20:32 +0000 (05:20 +0800)]
ARM: dts: imx6q-bx50v3: fix at25 spi-clk frequency issue
Change the maxium spi clock frequency from 20MHz to 10MHz to meet the
operation voltage range requirement recommended in AT25 datasheet.
Signed-off-by: Ken Lin <yungching0725@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Alexander Kurz [Thu, 2 Mar 2017 21:03:48 +0000 (22:03 +0100)]
ARM: dts: imx50: imx50-esdhc use imx53-esdhc
According to the reference manuals, both imx50/imx53 SOC seem to share
the same eSDHC controller, especially the section on "Multi-block Read"
mentioned in commit
361b8482026c ("mmc: sdhci-esdhc-imx: fix multiblock
reads on i.MX53") is identical for both SOC.
Hence, let imx50 use imx53-esdhc.
Signed-off-by: Alexander Kurz <akurz@blala.de>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Peng Fan [Wed, 1 Mar 2017 06:40:53 +0000 (14:40 +0800)]
ARM: dts: imx7s: enable ocotp
Enable ocotp for i.mx7D/S.
Correct the clock entry and compatible string.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Lucas Stach [Fri, 17 Feb 2017 13:48:37 +0000 (14:48 +0100)]
ARM: dts: imx6qp: correct IPU nodes
Reference them by handle and remove the changed clocks that are copied
from the downstream DT and are not part of the mainline binding.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Lucas Stach [Fri, 17 Feb 2017 13:48:36 +0000 (14:48 +0100)]
ARM: dts: imx6qp: reference MMDC node by handle and remove duplication
Referencing the node by handle make the QP DT more resilent against
changes of the base DT. Also remove the duplicated reg property, it's
not needed as it the same as in the base DT, just the compatible is
actually different.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Lucas Stach [Fri, 17 Feb 2017 13:48:35 +0000 (14:48 +0100)]
ARM: dts: imx6qp: reference PCIe node by handle
By using the handle, we can avoid some duplication of the base DT
and so avoid any maintenance overhead in the QP DT if the referenced
node changes.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Uwe Kleine-König [Thu, 16 Feb 2017 21:18:58 +0000 (22:18 +0100)]
ARM: imx25: set default phy_type and dr_mode for usbotg port
All currently supported i.MX25-based machines use phy_type = "utmi" and
dr_mode = "otg". So this seems to be a sensible default.
This also doesn't hurt out-of-tree machines because up to now they had
to specify these two properties in the machine.dts which still takes
precedence by just overwriting the defaults added here.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Michael Heimpold [Thu, 9 Feb 2017 07:42:49 +0000 (08:42 +0100)]
ARM: dts: add support for I2SE Duckbill 2 SPI
This machine is based on I2SE's Duckbill 2 board and is sold as part
of I2SE's PLC Bundle for IoT. This is a development kit for Homeplug
Green PHY based powerline products based on Qualcomms QCA7000 chip.
Signed-off-by: Michael Heimpold <mhei@heimpold.de>
Cc: Stefan Wahren <stefan.wahren@i2se.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Michael Heimpold [Thu, 9 Feb 2017 07:42:48 +0000 (08:42 +0100)]
ARM: dts: add support for I2SE Duckbill 2 EnOcean
This machine is based on I2SE's Duckbill 2 board and features a
EnOcean daugther board based on the popular TCM310 chipset.
This product is intended to be used for e.g. home automation purposes.
Signed-off-by: Michael Heimpold <mhei@heimpold.de>
Cc: Stefan Wahren <stefan.wahren@i2se.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Michael Heimpold [Thu, 9 Feb 2017 07:42:47 +0000 (08:42 +0100)]
ARM: dts: add support for I2SE Duckbill 2 485
This machine is based on I2SE's Duckbill 2 board and features a
RS-485 daugther board. This device is intended to be used for
e.g. home automation purposes.
Signed-off-by: Michael Heimpold <mhei@heimpold.de>
Cc: Stefan Wahren <stefan.wahren@i2se.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Michael Heimpold [Thu, 9 Feb 2017 07:42:46 +0000 (08:42 +0100)]
ARM: dts: add support for I2SE Duckbill 2 boards
This machine is an USB pen drive sized development board,
based on NXP's i.MX28 CPU. In contrast to the previous
model "Duckbill", the "Duckbill 2" series has internal
eMMC storage.
Signed-off-by: Michael Heimpold <mhei@heimpold.de>
Cc: Stefan Wahren <stefan.wahren@i2se.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Andy Gross [Wed, 5 Apr 2017 14:50:59 +0000 (09:50 -0500)]
Revert "ARM: dts: qcom: msm8974: Add USB gadget nodes"
This reverts commit
769907ae6e6c2871c2ba4f578814d86fbfbe8d91.
This change caused issues with people using USB gadget for serial
consoles. In addition, with the other USB changes coming in, it
makes sense to revert this patch and apply the new set as it
becomes ready.
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Wadim Egorov [Thu, 6 Apr 2017 13:04:25 +0000 (15:04 +0200)]
ARM: dts: rockchip: Add support for PCM-947 carrier board
Add basic support for the PCM-947 carrier board, a RK3288 based development
board made by PHYTEC. This board works in a combination with
the phyCORE-RK3288 System on Module.
Following interfaces and devices are available on the PCM-947 carrier board:
- 2x UART
- micro SDMMC
- USB host and USB otg
- USB 3503 HSIC hub
- Ethernet
- 2nd alternative KSZ9031 ethernet phy
- Display connectors: PHYTEC LVDS, DDG LVDS, parallel signals, HDMI
- Parallel Camera CIF
- SGTL5000-32QFN audio codec
- 4x LEDs connected via PCA9533
- 2 user buttons
- Expansion connectors for WiFi and other modules
- RTC RV-4162-C7
- Resistive touch STMPE811
- EEPROM M24C32
Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Wadim Egorov [Thu, 6 Apr 2017 13:04:26 +0000 (15:04 +0200)]
dt-bindings: Document Phytec phyCORE-RK3288 RDK
Add documentation for the PCM-947 carrier board, a RK3288 based
development board made by PHYTEC.
Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Wadim Egorov [Mon, 3 Apr 2017 10:23:03 +0000 (12:23 +0200)]
ARM: dts: rockchip: Add support for phyCORE-RK3288 SoM
The phyCORE-RK3288 is a SoM (System on Module) containing a RK3288 SoC.
The module can be connected to different carrier boards.
It can be also equipped with different RAM, SPI flash and eMMC variants.
The Rapid Development Kit option is using the following setup:
- 1 GB DDR3 RAM (2 Banks)
- 1x 4 KB EEPROM
- DP83867 Gigabit Ethernet PHY
- 16 MB SPI Flash
- 4 GB eMMC Flash
Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Geert Uytterhoeven [Mon, 3 Apr 2017 10:08:08 +0000 (12:08 +0200)]
ARM: dts: r8a7791: Drop _clk suffix from external CAN clock node name
The current practice is to not add _clk suffixes to clock node names in
DT, as these names are used as the actual clock names.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Geert Uytterhoeven [Mon, 3 Apr 2017 10:08:07 +0000 (12:08 +0200)]
ARM: dts: r8a7790: Drop _clk suffix from external CAN clock node name
The current practice is to not add _clk suffixes to clock node names in
DT, as these names are used as the actual clock names.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Jacopo Mondi [Mon, 3 Apr 2017 16:03:18 +0000 (18:03 +0200)]
ARM: dts: genmai: Enable rtc and rtc_x1 clock
Enable the 32.768 kHz RTC_X1 clock by setting the frequency value to
non-zero and enable the realtime clock.
Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Ralph Sennhauser [Thu, 30 Mar 2017 16:54:04 +0000 (18:54 +0200)]
ARM: dts: armada-385-linksys: disk-activity trigger for all
Commit
a4ee7e18d808 ("ARM: dts: armada: Add default trigger for sata
led") adds the default trigger to individual boards, move it to
armada-385-linksys.dtsi which effectively enables the definition for
the WRT1900ACS (Shelby) as well as for future boards.
Signed-off-by: Ralph Sennhauser <ralph.sennhauser@gmail.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Quentin Schulz [Wed, 5 Apr 2017 09:06:34 +0000 (11:06 +0200)]
ARM: sun8i: sina33: add highest OPP of CPUs
The A33 supports 1.1GHz and 1.2GHz frequencies at 1.32V and the Sinlinx
SinA33 has its cpu-supply property set in the cpu DT node.
Therefore, CPUfreq knows how to handle the regulator in charge of the
CPU and can adjust its voltage to match the OPP.
Add these two CPU frequencies to the CPU OPP table of the Sinlinx
SinA33.
Signed-off-by: Quentin Schulz <quentin.schulz@free-electrons.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Maxime Ripard [Wed, 5 Apr 2017 09:06:33 +0000 (11:06 +0200)]
ARM: sun8i: a33: Add devfreq-based GPU cooling
This adds GPU thermal throttling for the Allwinner A33.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Quentin Schulz <quentin.schulz@free-electrons.com>
Quentin Schulz [Wed, 5 Apr 2017 09:06:32 +0000 (11:06 +0200)]
ARM: sun8i: a33: add CPU thermal throttling
This adds CPU thermal throttling for the Allwinner A33. It uses the
thermal sensor present in the SoC's GPADC.
Signed-off-by: Quentin Schulz <quentin.schulz@free-electrons.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Quentin Schulz [Wed, 5 Apr 2017 09:06:31 +0000 (11:06 +0200)]
ARM: sun8i: a33: add thermal sensor
This adds the DT node for the thermal sensor present in the Allwinner
A33 GPADC.
Signed-off-by: Quentin Schulz <quentin.schulz@free-electrons.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Patrick Menschel [Tue, 4 Apr 2017 18:36:30 +0000 (20:36 +0200)]
ARM: dts: sun7i: fix device node ordering
This patch changes the device node position of ps20 and ps21 to fix
ordering by rising physical address.
From
uart7: serial@
01c29c00
i2c0: i2c@
01c2ac00
i2c1: i2c@
01c2b000
i2c2: i2c@
01c2b400
i2c3: i2c@
01c2b800
i2c4: i2c@
01c2c000
gmac: ethernet@
01c50000
hstimer@
01c60000
gic: interrupt-controller@
01c81000
ps20: ps2@
01c2a000
ps21: ps2@
01c2a400
to
uart7: serial@
01c29c00
ps20: ps2@
01c2a000
ps21: ps2@
01c2a400
i2c0: i2c@
01c2ac00
i2c1: i2c@
01c2b000
i2c2: i2c@
01c2b400
i2c3: i2c@
01c2b800
i2c4: i2c@
01c2c000
gmac: ethernet@
01c50000
hstimer@
01c60000
gic: interrupt-controller@
01c81000
Signed-off-by: Patrick Menschel <menschel.p@posteo.de>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Patrick Menschel [Tue, 4 Apr 2017 18:36:27 +0000 (20:36 +0200)]
ARM: dts: sun4i: fix device node ordering
This patch changes the device node position of ps20 and ps21 to fix
ordering by rising physical address.
From
uart7: serial@
01c29c00
i2c0: i2c@
01c2ac00
i2c1: i2c@
01c2b000
i2c2: i2c@
01c2b400
ps20: ps2@
01c2a000
ps21: ps2@
01c2a400
to
uart7: serial@
01c29c00
ps20: ps2@
01c2a000
ps21: ps2@
01c2a400
i2c0: i2c@
01c2ac00
i2c1: i2c@
01c2b000
i2c2: i2c@
01c2b400
Signed-off-by: Patrick Menschel <menschel.p@posteo.de>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Chris Brandt [Wed, 29 Mar 2017 17:30:35 +0000 (10:30 -0700)]
ARM: dts: rskrza1: add rtc DT support
Enable the realtime clock.
Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Chris Brandt [Wed, 29 Mar 2017 17:30:34 +0000 (10:30 -0700)]
ARM: dts: rskrza1: set rtc_x1 clock value
Enable the 32.768 kHz RTC_X1 clock by setting the frequency value to
non-zero.
Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Chris Brandt [Wed, 29 Mar 2017 17:30:33 +0000 (10:30 -0700)]
ARM: dts: r7s72100: add rtc to device tree
Add the realtime clock device node.
Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Chris Brandt [Wed, 29 Mar 2017 17:30:32 +0000 (10:30 -0700)]
ARM: dts: r7s72100: add RTC_X clock inputs to device tree
Add the RTC clocks to device tree. The frequencies must be fixed values
according to the hardware manual.
Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Chris Brandt [Wed, 29 Mar 2017 17:30:31 +0000 (10:30 -0700)]
ARM: dts: r7s72100: add rtc clock to device tree
Add the realtime clock functional clock source.
Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Geert Uytterhoeven [Mon, 3 Apr 2017 09:55:19 +0000 (11:55 +0200)]
ARM: dts: koelsch: Correct clock frequency of X2 DU clock input
The X2 crystal oscillator on the Koelsch development board provides a
74.25 MHz clock, not a 148.5 MHz clock.
Fixes:
cd21cb46e14aae3a ("ARM: shmobile: koelsch: Add DU external pixel clocks to DT")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Tested-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Patrick Menschel [Mon, 3 Apr 2017 17:00:14 +0000 (19:00 +0200)]
ARM: dts: sun7i: Add can0_pins_a pinctrl settings
The A20 SoC has an on-board CAN controller. This patch adds
the pinctrl settings for pins PH20 and PH21.
This patch is adapted from the description in
Documentation/devicetree/bindings/net/can/sun4i_can.txt
Signed-off-by: Patrick Menschel <menschel.p@posteo.de>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Patrick Menschel [Mon, 3 Apr 2017 17:00:13 +0000 (19:00 +0200)]
ARM: dts: sun7i: Add CAN node
The A20 SoC has an on-board CAN controller.
This patch adds the device node.
The CAN controller is inherited from the A10 SoC and uses the same driver.
This patch is adapted from the description in
Documentation/devicetree/bindings/net/can/sun4i_can.txt
Signed-off-by: Patrick Menschel <menschel.p@posteo.de>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Patrick Menschel [Mon, 3 Apr 2017 17:00:12 +0000 (19:00 +0200)]
ARM: dts: sun4i: Add can0_pins_a pinctrl settings
The A10 SoC has an on-board CAN controller. This patch adds the
pinctrl settings for pins PH20 and PH21.
This patch is adapted from the description in
Documentation/devicetree/bindings/net/can/sun4i_can.txt
Signed-off-by: Patrick Menschel <menschel.p@posteo.de>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Patrick Menschel [Mon, 3 Apr 2017 17:00:11 +0000 (19:00 +0200)]
ARM: dts: sun4i: Add CAN node
The A10 SoC has an on-board CAN controller.
This patch adds the device node.
This patch is adapted from the description in
Documentation/devicetree/bindings/net/can/sun4i_can.txt
Signed-off-by: Patrick Menschel <menschel.p@posteo.de>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Alexandre Courbot [Thu, 30 Mar 2017 09:26:44 +0000 (18:26 +0900)]
dt-bindings: Add documentation for GP10B GPU
GP10B's definition is mostly similar to GK20A's and GM20B's. The only
noticeable difference is the use of power domains instead of a regulator
for power supply.
Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Jon Hunter [Tue, 28 Mar 2017 12:42:56 +0000 (13:42 +0100)]
dt-bindings: tegra: Update compatible strings for Tegra flowctrl
Update the compatible strings for Tegra Flow Control driver to match
the device-tree source files for Tegra.
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Alexander Syring [Mon, 3 Apr 2017 09:12:45 +0000 (11:12 +0200)]
ARM: sun7i: cubietruck: enable ACIN und USB power supply subnode
The Cubietruck has an AXP209 PMIC and can be power-supplied by ACIN via
the CHG-IN pin or by USB.
This enables the ACIN and the USB power supply subnode in the DT.
Signed-off-by: Alexander Syring <alex@asyring.de>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Geert Uytterhoeven [Mon, 3 Apr 2017 09:54:14 +0000 (11:54 +0200)]
ARM: dts: r8a7794: Add Z2 clock
Add the Z2 clock (Cortex-A7 CPU core clock), which uses a fixed divider,
and link the first CPU node to it.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Geert Uytterhoeven [Mon, 3 Apr 2017 09:53:08 +0000 (11:53 +0200)]
ARM: dts: r8a7792: Correct Z clock
Unlike other R-Car Gen2 SoCs with Cortex-A15 CPU cores, R-Car V2H does
not have a programmable Z clock (Cortex-A15 CPU core clock), but uses a
fixed divider.
This is similar to the Z2 clock (Cortex-A7 CPU core clock) on R-Car E2.
Hence:
- Remove the Z clock output from the cpg_clocks node, as this implied
a programmable clock,
- Add the Z clock as a fixed factor clock,
- Let the first CPU node point to the new Z clock,
- Remove the Z clock index from the bindings (this definition was used
by r8a7792.dtsi only, and was not a contract between DT and driver).
Fixes:
7c4163aae3d8e5b9 ("ARM: dts: r8a7792: initial SoC device tree")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Geert Uytterhoeven [Mon, 3 Apr 2017 09:45:43 +0000 (11:45 +0200)]
ARM: dts: r8a7793: Correct parent of SSI[0-9] clocks
The SSI-ALL gate clock is located in between the P clock and the
individual SSI[0-9] clocks, hence the former should be listed as their
parent.
Fixes:
072d326542e49187 ("ARM: dts: r8a7793: add MSTP10 clocks to device tree")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Geert Uytterhoeven [Mon, 3 Apr 2017 09:45:42 +0000 (11:45 +0200)]
ARM: dts: r8a7791: Correct parent of SSI[0-9] clocks
The SSI-ALL gate clock is located in between the P clock and the
individual SSI[0-9] clocks, hence the former should be listed as their
parent.
Fixes:
ee9141522dcf13f8 ("ARM: shmobile: r8a7791: add MSTP10 support on DTSI")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Geert Uytterhoeven [Mon, 3 Apr 2017 09:45:41 +0000 (11:45 +0200)]
ARM: dts: r8a7790: Correct parent of SSI[0-9] clocks
The SSI-ALL gate clock is located in between the P clock and the
individual SSI[0-9] clocks, hence the former should be listed as their
parent.
Fixes:
bcde372254386872 ("ARM: shmobile: r8a7790: add MSTP10 support on DTSI")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Chris Brandt [Thu, 30 Mar 2017 21:16:09 +0000 (14:16 -0700)]
ARM: dts: r7s72100: fix ethernet clock parent
Technically, the Ethernet block is run off the 133MHz Bus (B) clock, not
the 33MHz Peripheral 0 (P0) clock.
Fixes:
969244f9c720 ("ARM: dts: r7s72100: add ethernet clock to device tree")
Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Bruno Herrera [Wed, 1 Feb 2017 01:25:00 +0000 (02:25 +0100)]
dt-bindings: Document the STM32 USB OTG DWC2 core binding
This patch adds the documentation for STM32F4x9 USB OTG FS/HS compatible
strings.
Signed-off-by: Bruno Herrera <bruherrera@gmail.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com>
Bruno Herrera [Wed, 1 Feb 2017 01:25:00 +0000 (02:25 +0100)]
ARM: dts: stm32: Enable USB HS in FS mode (embedded phy) on stm32f429-disco
This patch enables USB HS working in FS mode on stm32f429-disco
with 5V VBUS enable.
Signed-off-by: Bruno Herrera <bruherrera@gmail.com>
Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com>
Bruno Herrera [Wed, 1 Feb 2017 01:25:00 +0000 (02:25 +0100)]
ARM: dts: stm32: Enable USB FS on stm32f469-disco
This patch enables USB FS on stm32f469-disco with 5V VBUS enable.
Signed-off-by: Bruno Herrera <bruherrera@gmail.com>
Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com>
Bruno Herrera [Wed, 1 Feb 2017 01:25:00 +0000 (02:25 +0100)]
ARM: dts: stm32: Add USB FS support for STM32F429 MCU
This patch adds the USB pins and nodes for USB FS core.
Signed-off-by: Bruno Herrera <bruherrera@gmail.com>
Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com>
Arnd Bergmann [Fri, 31 Mar 2017 10:19:39 +0000 (12:19 +0200)]
Merge tag 'arm-soc/for-4.11/devicetree-fixes' of github.com/Broadcom/stblinux into fixes
There was a little conflict between the v4.11 bugfixes and the new changes for 4.12,
this merges the fixes into the 4.12 branch to avoid having to resolve it again.
* Broadcom fixes in mainline
ARM: dts: BCM5301X: Correct GIC_PPI interrupt flags
ARM: dts: BCM5301X: Fix memory start address
ARM: dts: BCM5301X: Fix UARTs on bcm953012k
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Fri, 31 Mar 2017 10:11:03 +0000 (12:11 +0200)]
Merge tag 'omap-for-v4.12/dt-v2-signed' of git://git./linux/kernel/git/tmlind/linux-omap into next/dt
Pull "Devicetree changes for omaps for v4.12 merge window" from Tony Lindgren:
- Add hecc node for am35x
- Add onenand support for omap3-igep
- Add bluetooth binding for n900/n9/n950
- Configure clocks and SATA for dm81xx
- Update operating points tables for am33xx, am43xx and dra7
- Update SPI flash documentation for w25q64
- Configure SPI NOR for am335x-icev2
- Mux uart0 for am437x-gp-evm
- Add thermal zones for omap3, omap4, omap5, dra7
- Configure LEDs for am335x-baltos
- A series of droid 4 changes to configure various devices
such as keypad, regulators, gpio-keys, rtc, power button,
compass, accelerometer, touchscreen, backlight, poweroff,
tmp105, HDMI, LCD panel and LEDs, EHCI, and micro-SD
* tag 'omap-for-v4.12/dt-v2-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: (35 commits)
ARM: dts: am335x-baltos: add LED support
ARM: dts: omap4-droid4: Fix MMC1 card for detect GPIO and regulator
ARM: dts: OMAP4460: Thermal: Add slope and offset values
ARM: dts: OMAP443x: Thermal: Add slope and offset values
ARM: dts: OMAP5: Thermal: Add slope and offset values
ARM: dts: DRA7: Thermal: Add slope and offset values
ARM: dts: omap3: Add cpu_thermal zone
ARM: dts: am437x-gp-evm: Add pinmux for uart0
ARM: dts: am335x-icev2: Add SPI based NOR
Documentation: devicetree: mtd: add w25q64 to list of supported SPI flashes
ARM: dts: dra7: Add updated operating-points-v2 table for cpu
ARM: dts: am4372: Update operating-points-v2 table for cpu
ARM: dts: am335x-boneblack: Enable 1GHz OPP for cpu
ARM: dts: am33xx: Add updated operating-points-v2 table for cpu
ARM: dts: dm8168-evm: add SATA node
ARM: dts: dm8168-evm: add the external reference clock for SATA
ARM: dts: N9/N950: add bluetooth
ARM: dts: N900: Add bluetooth
ARM: dts: omap4-droid4: Configure EHCI so modems can be accessed
ARM: dts: motorola-cpcap-mapphone: add LEDs
...
Arnd Bergmann [Fri, 31 Mar 2017 10:09:39 +0000 (12:09 +0200)]
Merge tag 'v4.12-rockchip-dts32-1' of git://git./linux/kernel/git/mmind/linux-rockchip into next/dt
Pull "Rockchip dts32 updates for 4.12 part1" from Heiko Stübner:
Contains one new board, the Tinkerboard from Asus based on the rk3288,
definitions for the mmc resets in the socs reset controller, sound
support for the Rock2, dma support for mmc controllers on the rk3188
and a led-fix for the MiQi board and and irq-fix for older Cortex-A9 socs.
* tag 'v4.12-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
ARM: dts: rockchip: setup DMA-channels for mmc0 and emmc for rk3188
ARM: dts: rockchip: fix PPI misconfiguration on Cortex-A9 socs
ARM: dts: rockchip: add rk322x dw-mmc resets
ARM: dts: rockchip: add rk3066/rk3188 dw-mmc resets
ARM: dts: rockchip: add rk3036 dw-mmc resets
ARM: dts: rockchip: add rk3288 dw-mmc resets
ARM: dts: rockchip: add dts for RK3288-Tinker board
dt-bindings: add rk3288-based Asus Tinker board
ARM: dts: rockchip: fix the MiQi board's LED definition
ARM: dts: rockchip: Add support for ES8388 to the Radxa Rock 2