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Mandeep Singh Grang [Wed, 28 Jun 2017 23:15:16 +0000 (23:15 +0000)]
[NFC] Remove multiple semicolons
Reviewers: bogner, whitequark, mgrang
Reviewed By: mgrang
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D34785
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306613
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Adrian McCarthy [Wed, 28 Jun 2017 22:47:40 +0000 (22:47 +0000)]
Introduce symbol cache to PDB NativeSession
Instead of creating symbols directly in the findChildren methods of the native
symbol implementations, they will rely on the NativeSession to act as a factory
for these types. This lets NativeSession cache the NativeRawSymbols in its
new symbol cache and makes that cache the source of unique IDs for the symbols.
Right now, this affects only NativeCompilandSymbols. There's no external
change yet, so I think the existing tests are still sufficient. Coming soon
are patches to extend this to built-in types and enums.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306610
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Xin Tong [Wed, 28 Jun 2017 22:35:54 +0000 (22:35 +0000)]
Revert "Make OrderedInstructions and OrderedBasicBlock use AssertingVH, to try and catch mistakes"
This reverts commit
50ec560f05dcb8a1be18be442660d0305bc7de25.
It catches some bug in NewGVN it seems. I am in middle of something and will not be able to investigate
Revert for now.
http://lab.llvm.org:8011/builders/clang-atom-d525-fedora-rel/builds/6268
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306608
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Xin Tong [Wed, 28 Jun 2017 22:12:22 +0000 (22:12 +0000)]
Make OrderedInstructions and OrderedBasicBlock use AssertingVH, to try and catch mistakes
Summary: Make OrderedInstructions and OrderedBasicBlock use AssertingVH to try and catch mistakes
Reviewers: efriedma
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D34780
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306605
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Matt Arsenault [Wed, 28 Jun 2017 21:38:50 +0000 (21:38 +0000)]
AMDGPU: Remove SITypeRewriter
This was an old workaround for using v16i8 in some old intrinsics
for resource descriptors.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306603
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David L. Jones [Wed, 28 Jun 2017 21:14:13 +0000 (21:14 +0000)]
[lit] Remove dead code (not referenced anywhere), and clarify some function names.
Summary:
The dead code seems to be unreferenced, according to textual search across the
LLVM SVN repo.
The clarification part of this change alters the name of a module-level function
so that it is different from the name of the class-methods that call it.
Currently, there are no erroneous references, but stylistically (c.f. PEP-8),
internal "helper" functions should generally be named accordingly by prepending
an underscore. (I also chose to add '_impl', which isn't necessary, but helps me
at least to mentally disambiguate the interface and implementation functions.)
Reviewers: zturner, modocache
Subscribers: sanjoy, llvm-commits
Differential Revision: https://reviews.llvm.org/D34775
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306600
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Eric Christopher [Wed, 28 Jun 2017 21:10:31 +0000 (21:10 +0000)]
Fix a typo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306599
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Stanislav Mekhanoshin [Wed, 28 Jun 2017 20:25:50 +0000 (20:25 +0000)]
Fold fneg and fabs like multiplications
Given no NaNs and no signed zeroes it folds:
(fmul X, (select (fcmp X > 0.0), -1.0, 1.0)) -> (fneg (fabs X))
(fmul X, (select (fcmp X > 0.0), 1.0, -1.0)) -> (fabs X)
Differential Revision: https://reviews.llvm.org/D34579
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306592
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Sanjay Patel [Wed, 28 Jun 2017 20:02:35 +0000 (20:02 +0000)]
[InstCombine] add tests for icmp with bitreversed ops; NFC
This is similar enough to bswap that we might as well handle them together in one patch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306591
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Mandeep Singh Grang [Wed, 28 Jun 2017 19:37:38 +0000 (19:37 +0000)]
[AArch64] Make assert messages uniform and general [NFC]
Summary: Make assert messages related to Darwin, ELF and COFF uniform.
Reviewers: rnk, ruiu, compnerd, t.p.northover
Reviewed By: t.p.northover
Subscribers: t.p.northover, aemerson, rengolin, javed.absar, llvm-commits, kristof.beyls
Differential Revision: https://reviews.llvm.org/D34730
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306589
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Geoff Berry [Wed, 28 Jun 2017 19:36:10 +0000 (19:36 +0000)]
[AArch64][Falkor] Attempt to fix Windows buildbots
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306588
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Rafael Espindola [Wed, 28 Jun 2017 19:26:37 +0000 (19:26 +0000)]
Reuse existing variables. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306586
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Krzysztof Parzyszek [Wed, 28 Jun 2017 18:59:18 +0000 (18:59 +0000)]
Break up long lines, NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306585
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Geoff Berry [Wed, 28 Jun 2017 18:53:09 +0000 (18:53 +0000)]
[AArch64][Falkor] Try to avoid exhausting HW prefetcher resources when unrolling.
Reviewers: t.p.northover, mcrosier
Subscribers: aemerson, rengolin, javed.absar, kristof.beyls, llvm-commits
Differential Revision: https://reviews.llvm.org/D34533
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306584
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Rafael Espindola [Wed, 28 Jun 2017 18:24:02 +0000 (18:24 +0000)]
Reuse existing variable. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306582
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Jakub Kuderski [Wed, 28 Jun 2017 18:15:45 +0000 (18:15 +0000)]
[Dominators] Move helper functions into SemiNCAInfo
Summary: Helper functions (DFSPass, ReverseDFSPass, Eval) need SemiNCAInfo anyway, so it's simpler to have them there as member functions. This also makes them simpler by removing template boilerplate.
Reviewers: dberlin, sanjoy, chandlerc
Reviewed By: dberlin
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D34427
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306579
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Simon Pilgrim [Wed, 28 Jun 2017 18:08:40 +0000 (18:08 +0000)]
[BBVectorize][X86] Regenerate simple tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306578
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Craig Topper [Wed, 28 Jun 2017 18:07:29 +0000 (18:07 +0000)]
[InstCombine] Remove 64-bit bit width restriction from m_ConstantInt(uint64_t*&)
I think we only need to make sure the value fits in 64-bits not that bit width is 64-bit.
This helps places that use this for shift amounts since the shift amount needs to be the same bitwidth as the LHS, but can't be larger than the bit width.
Differential Revision: https://reviews.llvm.org/D34737
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306577
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Jakub Kuderski [Wed, 28 Jun 2017 18:00:36 +0000 (18:00 +0000)]
[Dominators] Move SemiNCAInfo and helper functions out of DominatorTreeBase
Summary:
This moves SemiNCAInfo from DeminatorTreeBase to GenericDomTreeConstruction. It also put helper functions used during tree constructions in the same file.
The point of this change is to further clean up DominatorTreeBase and make it easier to construct and verify (in future patches).
Reviewers: dberlin, sanjoy, chandlerc
Reviewed By: dberlin
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D34420
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306576
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Ayal Zaks [Wed, 28 Jun 2017 17:59:33 +0000 (17:59 +0000)]
[LV] Fix PR33613 - retain order of insertelement per part
r306381 caused PR33613, by reversing the order in which insertelements were
generated per unroll part. This patch fixes PR33613 by retraining this order,
placing each set of insertelements per part immediately after the last scalar
being packed for this part. Includes a test case derived from PR33613.
Reference: https://bugs.llvm.org/show_bug.cgi?id=33613
Differential Revision: https://reviews.llvm.org/D34760
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306575
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Jakub Kuderski [Wed, 28 Jun 2017 17:56:09 +0000 (17:56 +0000)]
[Dominators] Move IDoms out of DominatorTreeBase and put them in SNCAInfo
Summary: The temporary IDoms map was used only during DomTree calculation. We can move it to SNCAInfo so that it's no longer a DominatorTreeBase member.
Reviewers: sanjoy, dberlin, chandlerc
Reviewed By: dberlin
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D34317
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306574
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Rafael Espindola [Wed, 28 Jun 2017 17:56:07 +0000 (17:56 +0000)]
Fix PR33625.
We were failing to convert this expression to pcrel.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306573
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Jakub Kuderski [Wed, 28 Jun 2017 17:43:54 +0000 (17:43 +0000)]
[Dominators] Move InfoRec outside of DominatorTreeBase
Summary:
The InfoRec struct is used only during tree construction, so there is no point having it as a DominatorTreeBase member.
This patch moves it into the Calculate function instead and makes it pass it to its helper functions.
Reviewers: sanjoy, dberlin, chandlerc
Reviewed By: dberlin
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D34305
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306572
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Simon Pilgrim [Wed, 28 Jun 2017 17:40:20 +0000 (17:40 +0000)]
[BBVectorize] Regenerate simple tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306571
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Rafael Espindola [Wed, 28 Jun 2017 17:23:13 +0000 (17:23 +0000)]
Don't repeat name in comment and format. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306568
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Chih-Hung Hsieh [Wed, 28 Jun 2017 17:12:51 +0000 (17:12 +0000)]
Another test commit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306567
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Geoff Berry [Wed, 28 Jun 2017 17:01:15 +0000 (17:01 +0000)]
[LoopUnroll] Fix bug in computeUnrollCount causing it to not honor MaxCount
Reviewers: sanjoy, anna, reames, apilipenko, igor-laevsky, mkuper
Subscribers: mcrosier, llvm-commits, mzolotukhin
Differential Revision: https://reviews.llvm.org/D34532
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306564
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Sanjay Patel [Wed, 28 Jun 2017 16:56:45 +0000 (16:56 +0000)]
[InstCombine] add tests for icmp with bswapped operands; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306563
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Jakub Kuderski [Wed, 28 Jun 2017 16:54:34 +0000 (16:54 +0000)]
[Dominators] Move number to node mapping out of DominatorTreeBase
Summary: Number to node mapping in DominatorTreeBase is used only during calculation, so there is no point keeping is as a member variable. This patch moves this mapping to Calculate function and passes it to helper functions. It also makes the name more descriptive.
Reviewers: sanjoy, dberlin, davide, chandlerc
Reviewed By: dberlin
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D34295
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306562
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Sanjay Patel [Wed, 28 Jun 2017 16:39:06 +0000 (16:39 +0000)]
[InstCombine] use local variable to reduce code; NFCI
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306560
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Krzysztof Parzyszek [Wed, 28 Jun 2017 16:02:00 +0000 (16:02 +0000)]
Rangify loops, formatting changes, use bool instead of unsigned, NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306557
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Rafael Espindola [Wed, 28 Jun 2017 16:00:16 +0000 (16:00 +0000)]
Don't repeat names and reformat. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306556
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Geoff Berry [Wed, 28 Jun 2017 15:53:17 +0000 (15:53 +0000)]
[LoopUnroll] Pass SCEV to getUnrollingPreferences hook. NFCI.
Reviewers: sanjoy, anna, reames, apilipenko, igor-laevsky, mkuper
Subscribers: jholewinski, arsenm, mzolotukhin, nemanjai, nhaehnle, javed.absar, mcrosier, llvm-commits
Differential Revision: https://reviews.llvm.org/D34531
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306554
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Krzysztof Parzyszek [Wed, 28 Jun 2017 15:46:16 +0000 (15:46 +0000)]
Missed a check for UndefVI in r306466
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306553
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Daniel Sanders [Wed, 28 Jun 2017 15:16:03 +0000 (15:16 +0000)]
[globalisel][tablegen] Post-commit review nits for r306388. NFC
One early exit and a missing assert string.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306552
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Alexandros Lamprineas [Wed, 28 Jun 2017 15:09:11 +0000 (15:09 +0000)]
[AArch64] AArch64CondBrTuningPass generates wrong branch instructions
Some conditional branch instructions generated by this pass are checking
the wrong condition code. The instructions TBZ and TBNZ are transformed
into B.GE and B.LT instead of B.PL and B.MI respectively. They should
only be checking the Negative bit.
Differential Revision: https://reviews.llvm.org/D34743
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306550
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Rafael Espindola [Wed, 28 Jun 2017 14:59:30 +0000 (14:59 +0000)]
Don't repeat name in comments. 80 columns. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306548
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John Brawn [Wed, 28 Jun 2017 14:11:15 +0000 (14:11 +0000)]
[ARM] Improve if-conversion for M-class CPUs without branch predictors
The current heuristic in isProfitableToIfCvt assumes we have a branch predictor,
and so gives the wrong answer in some cases when we don't. This patch adds a
subtarget feature to indicate that a subtarget has no branch predictor, and
changes the heuristic in isProfitableToiIfCvt when it's present. This gives a
slight overall improvement in a set of embedded benchmarks on Cortex-M4 and
Cortex-M33.
Differential Revision: https://reviews.llvm.org/D34398
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306547
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Simon Pilgrim [Wed, 28 Jun 2017 14:07:50 +0000 (14:07 +0000)]
[X86] Added BSWAP tests for illegal i64/i128/i256 'wide' scalar integers
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306546
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Simon Pilgrim [Wed, 28 Jun 2017 13:59:15 +0000 (13:59 +0000)]
[X86][SSE] Dropped -mcpu from vector bswap tests
Use triple and attribute only for consistency
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306545
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Daniel Sanders [Wed, 28 Jun 2017 13:50:04 +0000 (13:50 +0000)]
[globalisel][tablegen] Multiple 80-col corrections.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306544
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Michael Zuckerman [Wed, 28 Jun 2017 13:42:45 +0000 (13:42 +0000)]
[X86][LLVM][test]Expanding Supports lowerInterleavedStore() in X86InterleavedAccess test.
Exapnding the test to include AVX target.
Adding base tast (to trunk) for Store strid=4 vf=32.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306543
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Easwaran Raman [Wed, 28 Jun 2017 13:33:49 +0000 (13:33 +0000)]
Create inliner params based on size and opt levels.
Differential revision: https://reviews.llvm.org/D34309
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306542
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Teresa Johnson [Wed, 28 Jun 2017 13:07:37 +0000 (13:07 +0000)]
Add zero-length check to memcpy/memset load store loop expansion
Summary:
I was testing using this expansion logic in other cases besides
NVPTX, and found some runtime failures due to the lack of a check
for a zero length memcpy/memset before the loop. There is already
such a check in the memmove expansion code though.
Reviewers: hfinkel
Subscribers: jholewinski, wdng, llvm-commits
Differential Revision: https://reviews.llvm.org/D34707
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306541
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Igor Breger [Wed, 28 Jun 2017 12:43:21 +0000 (12:43 +0000)]
[GlobalISel][X86] Test G_CONSTANT i32 0 TableGen'erated selection.NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306537
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Nikolai Bozhenov [Wed, 28 Jun 2017 12:15:13 +0000 (12:15 +0000)]
Revert r306528
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306536
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Igor Breger [Wed, 28 Jun 2017 11:39:04 +0000 (11:39 +0000)]
[GlobalISel][X86] Support bitwise operations : G_AND, G_OR, G_XOR
Summary: Support G_AND, G_OR, G_XOR for i8/i16/i32/i64. Selection done via TableGen'erated code.
Reviewers: zvi, guyblank, aymanmus, m_zuckerman
Reviewed By: aymanmus
Subscribers: rovka, kristof.beyls, llvm-commits
Differential Revision: https://reviews.llvm.org/D34605
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306533
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Michael Zuckerman [Wed, 28 Jun 2017 11:23:31 +0000 (11:23 +0000)]
Reverting commit 306414 on behalf of @gadi.haber
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306532
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Simon Pilgrim [Wed, 28 Jun 2017 10:54:54 +0000 (10:54 +0000)]
[X86][AVX2] Dropped -mcpu from avx2 arithmetic/intrinsics tests
Use triple and attribute only for consistency
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306531
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Petar Jovanovic [Wed, 28 Jun 2017 10:21:17 +0000 (10:21 +0000)]
[X86] Correct dwarf unwind information in function epilogue
CFI instructions that set appropriate cfa offset and cfa register are now
inserted in emitEpilogue() in X86FrameLowering.
Majority of the changes in this patch:
1. Ensure that CFI instructions do not affect code generation.
2. Enable maintaining correct information about cfa offset and cfa register
in a function when basic blocks are reordered, merged, split, duplicated.
These changes are target independent and described below.
Changed CFI instructions so that they:
1. are duplicable
2. are not counted as instructions when tail duplicating or tail merging
3. can be compared as equal
Add information to each MachineBasicBlock about cfa offset and cfa register
that are valid at its entry and exit (incoming and outgoing CFI info). Add
support for updating this information when basic blocks are merged, split,
duplicated, created. Add a verification pass (CFIInfoVerifier) that checks
that outgoing cfa offset and register of predecessor blocks match incoming
values of their successors.
Incoming and outgoing CFI information is used by a late pass
(CFIInstrInserter) that corrects CFA calculation rule for a basic block if
needed. That means that additional CFI instructions get inserted at basic
block beginning to correct the rule for calculating CFA. Having CFI
instructions in function epilogue can cause incorrect CFA calculation rule
for some basic blocks. This can happen if, due to basic block reordering,
or the existence of multiple epilogue blocks, some of the blocks have wrong
cfa offset and register values set by the epilogue block above them.
Patch by Violeta Vukobrat.
Differential Revision: https://reviews.llvm.org/D18046
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306529
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Nikolai Bozhenov [Wed, 28 Jun 2017 10:08:08 +0000 (10:08 +0000)]
[ValueTracking] Enabling existing ValueTracking patch by default.
The original patch was an improvement to IR ValueTracking on non-negative
integers. It has been checked in to trunk (D18777, r284022). But was disabled by
default due to performance regressions.
Perf impact has improved. The patch would be enabled by default.
Reviewers: reames
Differential Revision: https://reviews.llvm.org/D34101
Patch by: Olga Chupina <olga.chupina@intel.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306528
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Nikolai Bozhenov [Wed, 28 Jun 2017 09:26:20 +0000 (09:26 +0000)]
[InstCombine] Canonicalize clamp of float types to minmax in fast mode.
Summary:
This commit allows matchSelectPattern to recognize clamp of float
arguments in the presence of FMF the same way as already done for
integers.
This case is a little different though. With integers, given the
min/max pattern is recognized, DAGBuilder starts selecting MIN/MAX
"automatically". That is not the case for float, because for them only
full FMINNAN/FMINNUM/FMAXNAN/FMAXNUM ISD nodes exist and they do care
about NaNs. On the other hand, some backends (e.g. X86) have only
FMIN/FMAX nodes that do not care about NaNS and the former NAN/NUM
nodes are illegal thus selection is not happening. So I decided to do
such kind of transformation in IR (InstCombiner) instead of
complicating the logic in the backend.
Reviewers: spatel, jmolloy, majnemer, efriedma, craig.topper
Reviewed By: efriedma
Subscribers: hiraditya, javed.absar, n.bozhenov, llvm-commits
Patch by Andrei Elovikov <andrei.elovikov@intel.com>
Differential Revision: https://reviews.llvm.org/D33186
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306525
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Nikolai Bozhenov [Wed, 28 Jun 2017 09:22:58 +0000 (09:22 +0000)]
Add tests to document current InstCombine behavior for clamp pattern.
Summary:
This commit adds the tests for clamp pattern as a prerequisite of
D33186 to make the impact of that fix more clear and also to document
current behavior.
Reviewers: spatel, jmolloy
Reviewed By: spatel
Subscribers: n.bozhenov, llvm-commits
Patch by Andrei Elovikov <andrei.elovikov@intel.com>
Differential Revision: https://reviews.llvm.org/D34350
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306524
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George Rimar [Wed, 28 Jun 2017 08:26:57 +0000 (08:26 +0000)]
[DebugInfo] - Removed trailing whitespaces. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306518
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George Rimar [Wed, 28 Jun 2017 08:21:19 +0000 (08:21 +0000)]
Recommit "[ELF] - Add ability for DWARFContextInMemory to exit early when any error happen."
With fix in include folder character case:
#include "llvm/Codegen/AsmPrinter.h" -> #include "llvm/CodeGen/AsmPrinter.h"
Original commit message:
Change introduces error reporting policy for DWARFContextInMemory.
New callback provided by client is able to handle error on it's
side and return Halt or Continue.
That allows to either keep current behavior when parser prints all errors
but continues parsing object or implement something very different, like
stop parsing on a first error and report an error in a client style.
Differential revision: https://reviews.llvm.org/D34328
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306517
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Kristof Beyls [Wed, 28 Jun 2017 07:07:03 +0000 (07:07 +0000)]
[ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8).
The benchmarking summarized in
http://lists.llvm.org/pipermail/llvm-dev/2017-May/113525.html showed
this is beneficial for a wide range of cores.
As is to be expected, quite a few small adaptations are needed to the
regressions tests, as the difference in scheduling results in:
- Quite a few small instruction schedule differences.
- A few changes in register allocation decisions caused by different
instruction schedules.
- A few changes in IfConversion decisions, due to a difference in
instruction schedule and/or the estimated cost of a branch mispredict.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306514
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George Rimar [Wed, 28 Jun 2017 07:06:17 +0000 (07:06 +0000)]
Revert r306512 "[ELF] - Add ability for DWARFContextInMemory to exit early when any error happen."
It broke BB:
[13/106] 13 0.022 Generating VCSRevision.h
[25/106] 24 1.209 Building CXX object unittests/DebugInfo/DWARF/CMakeFiles/DebugInfoDWARFTests.dir/DWARFDebugInfoTest.cpp.o
FAILED: unittests/DebugInfo/DWARF/CMakeFiles/DebugInfoDWARFTests.dir/DWARFDebugInfoTest.cpp.o
/home/bb/bin/g++ -DGTEST_HAS_RTTI=0 -DLLVM_BUILD_GLOBAL_ISEL -D_DEBUG -D_GNU_SOURCE -D__STDC_CONSTANT_MACROS -D__STDC_FORMAT_MACROS -D__STDC_LIMIT_MACROS -Iunittests/DebugInfo/DWARF -I../llvm-project/llvm/unittests/DebugInfo/DWARF -Iinclude -I../llvm-project/llvm/include -I../llvm-project/llvm/utils/unittest/googletest/include -I../llvm-project/llvm/utils/unittest/googlemock/include -fPIC -fvisibility-inlines-hidden -m32 -std=c++11 -Wall -W -Wno-unused-parameter -Wwrite-strings -Wcast-qual -Wno-missing-field-initializers -pedantic -Wno-long-long -Wno-maybe-uninitialized -Wdelete-non-virtual-dtor -Wno-comment -ffunction-sections -fdata-sections -O3 -UNDEBUG -Wno-variadic-macros -fno-exceptions -fno-rtti -MD -MT unittests/DebugInfo/DWARF/CMakeFiles/DebugInfoDWARFTests.dir/DWARFDebugInfoTest.cpp.o -MF unittests/DebugInfo/DWARF/CMakeFiles/DebugInfoDWARFTests.dir/DWARFDebugInfoTest.cpp.o.d -o unittests/DebugInfo/DWARF/CMakeFiles/DebugInfoDWARFTests.dir/DWARFDebugInfoTest.cpp.o -c ../llvm-project/llvm/unittests/DebugInfo/DWARF/DWARFDebugInfoTest.cpp
../llvm-project/llvm/unittests/DebugInfo/DWARF/DWARFDebugInfoTest.cpp:18:37: fatal error: llvm/Codegen/AsmPrinter.h: No such file or directory
#include "llvm/Codegen/AsmPrinter.h"
^
compilation terminated.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306513
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George Rimar [Wed, 28 Jun 2017 06:57:20 +0000 (06:57 +0000)]
[ELF] - Add ability for DWARFContextInMemory to exit early when any error happen.
Change introduces error reporting policy for DWARFContextInMemory.
New callback provided by client is able to handle error on it's
side and return Halt or Continue.
That allows to either keep current behavior when parser prints all errors
but continues parsing object or implement something very different, like
stop parsing on a first error and report an error in a client style.
Differential revision: https://reviews.llvm.org/D34328
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306512
91177308-0d34-0410-b5e6-
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Craig Topper [Wed, 28 Jun 2017 06:45:36 +0000 (06:45 +0000)]
[InstCombine] Add test case demonstrating that we don't handle icmp eq (trunc (lshr(X, cst1)), cst->icmp (and X, mask), cst when the shift type is larger than 64-bits. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306510
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Craig Topper [Wed, 28 Jun 2017 06:43:58 +0000 (06:43 +0000)]
Revert r306508 "[InstCombine] Add test case demonstrating that we don't handle icmp eq (trunc (lshr(X, cst1)), cst->icmp (and X, mask), cst when the shift type is larger than 64-bits. NFC"
I accidentally had a extra change in there.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306509
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Craig Topper [Wed, 28 Jun 2017 06:42:48 +0000 (06:42 +0000)]
[InstCombine] Add test case demonstrating that we don't handle icmp eq (trunc (lshr(X, cst1)), cst->icmp (and X, mask), cst when the shift type is larger than 64-bits. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306508
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Hiroshi Inoue [Wed, 28 Jun 2017 06:14:30 +0000 (06:14 +0000)]
Add missing library dependency to fix build break in llvm-lto2
error message
CMakeFiles/llvm-lto2.dir/llvm-lto2.cpp.o: In function `dumpSymtab(int, char**)':
llvm-lto2.cpp:(.text._ZL10dumpSymtabiPPc+0x238): undefined reference to `llvm::getBitcodeFileContents(llvm::MemoryBufferRef)'
collect2: error: ld returned 1 exit status
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306507
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Max Kazantsev [Wed, 28 Jun 2017 04:57:45 +0000 (04:57 +0000)]
[IRCE][NFC] Better get SCEV for 1 in calculateSubRanges
A slightly more efficient way to get constant, we avoid resolving in getSCEV and excessive
invocations, and we don't create a ConstantInt if 'true' branch is taken.
Differential Revision: https://reviews.llvm.org/D34672
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306503
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Nirav Dave [Wed, 28 Jun 2017 03:20:04 +0000 (03:20 +0000)]
Revert "[DAG] Fold FrameIndex offset into BaseIndexOffset analysis. NFCI."
This reverts commit r306498 which appears to cause a compilrt-rt test failures
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306501
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Stanislav Mekhanoshin [Wed, 28 Jun 2017 02:52:39 +0000 (02:52 +0000)]
[AMDGPU] Add pattern for v_alignbit_b32 with immediate
If immediate in shift is less than 32 we can use alignbit too.
Differential Revision: https://reviews.llvm.org/D34729
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306500
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Stanislav Mekhanoshin [Wed, 28 Jun 2017 02:37:11 +0000 (02:37 +0000)]
Allow to truncate left shift with non-constant shift amount
That is pretty common for clang to produce code like
(shl %x, (and %amt, 31)). In this situation we can still perform
trunc (shl) into shl (trunc) conversion given the known value
range of shift amount.
Differential Revision: https://reviews.llvm.org/D34723
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306499
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Nirav Dave [Wed, 28 Jun 2017 02:09:50 +0000 (02:09 +0000)]
[DAG] Fold FrameIndex offset into BaseIndexOffset analysis. NFCI.
Pull FrameIndex comparision reasoning from DAGCombiner::isAlias to
general BaseIndexOffset.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306498
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Kyle Butt [Wed, 28 Jun 2017 01:41:25 +0000 (01:41 +0000)]
Inlining: Don't re-map simplified cloned instructions.
When simplifying an instruction that has been re-mapped, it should never
simplify to an instruction in the original function. In the edge case
where we are inlining a function into itself, the existing code led to
incorrect behavior. Replace the incorrect code with an assert verifying
that we never expect simplification to produce an instruction in the old
function, unless the functions are the same.
Differential Revision: https://reviews.llvm.org/D33850
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306495
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Joel Jones [Wed, 28 Jun 2017 00:06:40 +0000 (00:06 +0000)]
[TableGen] Improve Debug Output for --debug-only=subtarget-emitter NFCI
Add headers for each section of output, with white space and "+++" to
improve readability.
Differential Revision: https://reviews.llvm.org/D34713
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306492
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Peter Collingbourne [Wed, 28 Jun 2017 00:05:27 +0000 (00:05 +0000)]
Add missing library dependency.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306491
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Mandeep Singh Grang [Tue, 27 Jun 2017 23:58:19 +0000 (23:58 +0000)]
[COFF, ARM64] Add support for Windows ARM64 COFF format
Summary:
This is the llvm part of the initial implementation to support Windows ARM64 COFF format.
I will gradually add more functionality in subsequent patches.
Reviewers: ruiu, rnk, t.p.northover, compnerd
Reviewed By: ruiu, compnerd
Subscribers: aemerson, mgorny, javed.absar, llvm-commits, kristof.beyls
Differential Revision: https://reviews.llvm.org/D34705
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306490
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Peter Collingbourne [Tue, 27 Jun 2017 23:50:24 +0000 (23:50 +0000)]
Object: Teach irsymtab::read() to try to use the irsymtab that we wrote to disk.
Fixes PR27551.
Differential Revision: https://reviews.llvm.org/D33974
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306488
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Peter Collingbourne [Tue, 27 Jun 2017 23:50:11 +0000 (23:50 +0000)]
Bitcode: Write the irsymtab to disk.
Differential Revision: https://reviews.llvm.org/D33973
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306487
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Peter Collingbourne [Tue, 27 Jun 2017 23:49:58 +0000 (23:49 +0000)]
Object: Add version and producer fields to the irsymtab header. NFCI.
These will be necessary in order to handle upgrades from old bitcode
files.
Differential Revision: https://reviews.llvm.org/D33972
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306486
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Sanjay Patel [Tue, 27 Jun 2017 23:15:01 +0000 (23:15 +0000)]
[CGP] add specialization for memcmp expansion with only one basic block
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306485
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Easwaran Raman [Tue, 27 Jun 2017 23:11:18 +0000 (23:11 +0000)]
[NewPM/Inliner] Reduce threshold for cold callsites in the non-PGO case
Differential Revision: https://reviews.llvm.org/D34312
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306484
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Tim Northover [Tue, 27 Jun 2017 22:45:35 +0000 (22:45 +0000)]
GlobalISel: add some more sanity-checking to MachineInstrBuilder. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306481
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Florian Hahn [Tue, 27 Jun 2017 22:27:32 +0000 (22:27 +0000)]
[AArch64] Inline callee if its target-features are a subset of the caller
Summary:
Similar to X86, it should be safe to inline callees if their target-features
are a subset of the caller. This change matches GCC's inlining behavior
with respect to attributes [1].
[1] https://gcc.gnu.org/onlinedocs/gcc/AArch64-Function-Attributes.html#AArch64-Function-Attributes
Reviewers: kristof.beyls, javed.absar, rengolin, t.p.northover
Reviewed By: t.p.northover
Subscribers: aemerson, eraman, llvm-commits
Differential Revision: https://reviews.llvm.org/D34698
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306478
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Geoff Berry [Tue, 27 Jun 2017 22:25:02 +0000 (22:25 +0000)]
[EarlyCSE][MemorySSA] Enable MemorySSA in function-simplification pass of EarlyCSE.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306477
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Eugene Zelenko [Tue, 27 Jun 2017 22:20:38 +0000 (22:20 +0000)]
[Analysis] Revert r306472 changes in LoopInfo headers to fix broken builds.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306476
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Aditya Nandakumar [Tue, 27 Jun 2017 22:19:32 +0000 (22:19 +0000)]
[GISel]: Add G_FEXP, G_FEXP2 opcodes
Also add IRTranslator support.
https://reviews.llvm.org/D34710
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306475
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Rafael Espindola [Tue, 27 Jun 2017 22:14:20 +0000 (22:14 +0000)]
clang-format a file.
It had a few inconsistent indentations that made a followup patch
hard to read.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306474
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Dehao Chen [Tue, 27 Jun 2017 22:05:58 +0000 (22:05 +0000)]
re-commit r306336: Enable vectorizer-maximize-bandwidth by default.
Differential Revision: https://reviews.llvm.org/D33341
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306473
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Eugene Zelenko [Tue, 27 Jun 2017 21:52:05 +0000 (21:52 +0000)]
[Analysis] Fix some Clang-tidy modernize-use-using and Include What You Use warnings; other minor fixes (NFC).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306472
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Sanjay Patel [Tue, 27 Jun 2017 21:46:34 +0000 (21:46 +0000)]
[CGP] eliminate a sub instruction in memcmp expansion
As noted in D34071, there are some IR optimization opportunities that could be
handled by normal IR passes if this expansion wasn't happening so late in CGP.
Regardless of that, it seems wasteful to knowingly produce suboptimal IR here,
so I'm proposing this change:
%s = sub i32 %x, %y
%r = icmp ne %s, 0
=>
%r = icmp ne %x, %y
Changing the predicate to 'eq' mimics what InstCombine would do, so that's just
an efficiency improvement if we decide this expansion should happen sooner.
The fact that the PowerPC backend doesn't eliminate the 'subf.' might be
something for PPC folks to investigate separately.
Differential Revision: https://reviews.llvm.org/D34416
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306471
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Tim Northover [Tue, 27 Jun 2017 21:41:40 +0000 (21:41 +0000)]
GlobalISel: verify that a COPY is trivial when created.
Without this check, COPY instructions can actually be one of the generic casts
in disguise. That's confusing and bad.
At some point during ISel this restriction has to be relaxed since the fully
selected instructions will usually use COPY for those purposes. Right now I
think it's possible that relaxation occurs during RegBankSelect (hence the
change there). I'm not convinced that's where it belongs long-term though.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306470
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Xinliang David Li [Tue, 27 Jun 2017 21:35:49 +0000 (21:35 +0000)]
Clean up a test case
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306468
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Krzysztof Parzyszek [Tue, 27 Jun 2017 21:30:46 +0000 (21:30 +0000)]
Create a PHI value when merging with a known undef live-in
Differential Revision: https://reviews.llvm.org/D34640
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306466
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Sam Clegg [Tue, 27 Jun 2017 21:19:27 +0000 (21:19 +0000)]
[WebAssembly] Only run WebAssembly objdump tests if it is enabled as a target
Differential Revision: https://reviews.llvm.org/D34712
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306464
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Joel Jones [Tue, 27 Jun 2017 20:44:55 +0000 (20:44 +0000)]
[AArch64] Performance enhancements for Cavium ThunderX2 T99
This patch enables significant performance enhancements to the
Cavium ThunderX2T99 LLVM backend, as observed by running SPEC2K6,
by adding more detailed scheduling information.
Related Bugzilla bug: http://bugs.llvm.org/show_bug.cgi?id=32562
Patch by: steleman
Differential Revision: https://reviews.llvm.org/D31801
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306462
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Sam Clegg [Tue, 27 Jun 2017 20:40:53 +0000 (20:40 +0000)]
[WebAssembly] Add support for printing relocations with llvm-objdump
Differential Revision: https://reviews.llvm.org/D34658
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306461
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Sam Clegg [Tue, 27 Jun 2017 20:27:59 +0000 (20:27 +0000)]
[WebAssembly] Add data size and alignement to linking section
The overal size of the data section (including BSS)
is otherwise not included in the wasm binary.
Differential Revision: https://reviews.llvm.org/D34657
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306459
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Krzysztof Parzyszek [Tue, 27 Jun 2017 19:59:46 +0000 (19:59 +0000)]
[Hexagon] Use proper predicate register state when expanding PS_vselect
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306458
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Craig Topper [Tue, 27 Jun 2017 19:57:53 +0000 (19:57 +0000)]
[InstCombine] Propagate nsw flag when turning mul by pow2 into shift when the constant is a vector splat or the scalar bit width is larger than 64-bits
The check to see if we can propagate the nsw flag used m_ConstantInt(uint64_t*&) which doesn't work with splat vectors and has a restriction that the bitwidth of the ConstantInt must be 64-bits are less.
This patch changes it to use m_APInt to remove both these issues
Differential Revision: https://reviews.llvm.org/D34699
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306457
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Craig Topper [Tue, 27 Jun 2017 19:57:51 +0000 (19:57 +0000)]
[Constants] Fix copy-pasto in llvm_unreachable message. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306456
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Sanjay Patel [Tue, 27 Jun 2017 19:31:35 +0000 (19:31 +0000)]
[CGP] simplify code to get bswap in memcmp expansion; NFCI
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306452
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Stanislav Mekhanoshin [Tue, 27 Jun 2017 19:10:47 +0000 (19:10 +0000)]
[AMDGPU] Add 2 new alignbit patterns
Differential Revision: https://reviews.llvm.org/D34655
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306449
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Serge Guelton [Tue, 27 Jun 2017 18:57:53 +0000 (18:57 +0000)]
[CodeExtractor] Prevent extraction of block involving blockaddress
BlockAddress are only valid within their function context, which does not
interact well with CodeExtractor. Detect this case and prevent it.
Differential Revision: https://reviews.llvm.org/D33839
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306448
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Stanislav Mekhanoshin [Tue, 27 Jun 2017 18:53:03 +0000 (18:53 +0000)]
[AMDGPU] Simplify setcc (sext from i1 b), -1|0, cc
Depending on the compare code that can be either an argument of
sext or negate of it. This helps to avoid v_cndmask_b64 instruction
for sext. A reversed value can be further simplified and folded into
its parent comparison if possible.
Differential Revision: https://reviews.llvm.org/D34545
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306446
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Krzysztof Parzyszek [Tue, 27 Jun 2017 18:37:16 +0000 (18:37 +0000)]
[Hexagon] Update kills in hexagon-nvj even more properly than before
Account for the fact that both, the feeder and the compare can be moved
over instructions that kill registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306443
91177308-0d34-0410-b5e6-
96231b3b80d8