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Jonas Devlieghere [Tue, 13 Mar 2018 10:52:49 +0000 (10:52 +0000)]
[dsymutil] Introduce LinkContext. NFC.
This patch introduces the LinkContext which is necessary to have
dsymutil perform analysis and cloning of DIEs in parallel. As requested
in D43945, I'm landing this as two separate commits.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327382
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Eugene Leviant [Tue, 13 Mar 2018 10:19:50 +0000 (10:19 +0000)]
[Evaluator] Evaluate load/store with bitcast
Differential revision: https://reviews.llvm.org/D43457
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327381
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Jonas Paulsson [Tue, 13 Mar 2018 08:36:20 +0000 (08:36 +0000)]
[CodeGenPrepare] Respect endianness in splitMergedValStore.
splitMergedValStore will split a store into two if target prefers this, or if
-force-split-store is passed.
This patch adds the missing handling for endianness in this function along
with a test case.
Review: Eli Friedman
https://reviews.llvm.org/D44396
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327375
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Max Kazantsev [Tue, 13 Mar 2018 07:46:06 +0000 (07:46 +0000)]
[SCEV][NFC] Smarter implementation of isAvailableAtLoopEntry
isAvailableAtLoopEntry duplicates logic of `properlyDominates` after checking invariance.
This patch replaces this logic with invocation of this method which is more profitable
because it supports caching.
Differential Revision: https://reviews.llvm.org/D43997
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327373
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Clement Courbet [Tue, 13 Mar 2018 07:05:55 +0000 (07:05 +0000)]
[MergeICmps] Make sure that the comparison only has one use.
Summary: Fixes PR36557.
Reviewers: trentxintong, spatel
Subscribers: mstorsjo, llvm-commits
Differential Revision: https://reviews.llvm.org/D44083
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327372
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Yonghong Song [Tue, 13 Mar 2018 06:47:07 +0000 (06:47 +0000)]
bpf: Enhance debug information for peephole optimization passes
Add more debug information for peephole optimization passes.
These would only be enabled for debug version binary and could help
analyzing why some optimization opportunities were missed.
Signed-off-by: Jiong Wang <jiong.wang@netronome.com>
Signed-off-by: Yonghong Song <yhs@fb.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327371
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Yonghong Song [Tue, 13 Mar 2018 06:47:06 +0000 (06:47 +0000)]
bpf: New post-RA peephole optimization pass to eliminate bad RA codegen
This new pass eliminate identical move:
MOV rA, rA
This is particularly possible to happen when sub-register support
enabled. The special type cast insn MOV_32_64 involves different
register class on src (i32) and dst (i64), RA could generate useless
instruction due to this.
This pass also could serve as the bast for further post-RA optimization.
Signed-off-by: Jiong Wang <jiong.wang@netronome.com>
Signed-off-by: Yonghong Song <yhs@fb.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327370
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Yonghong Song [Tue, 13 Mar 2018 06:47:05 +0000 (06:47 +0000)]
bpf: Don't expand BSWAP on i32, promote it
Currently, there is no ALU32 bswap support in eBPF ISA.
BSWAP on i32 was set to EXPAND which would need about eight instructions
for single BSWAP.
It would be more efficient to promote it to i64, then doing BSWAP on i64.
For eBPF programs, most of the promotion are zero extensions which are
likely be elimiated later by peephole optimizations.
Signed-off-by: Jiong Wang <jiong.wang@netronome.com>
Signed-off-by: Yonghong Song <yhs@fb.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327369
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Yonghong Song [Tue, 13 Mar 2018 06:47:04 +0000 (06:47 +0000)]
bpf: Support subregister definition check on PHI node
This patch relax the subregister definition check on Phi node.
Previously, we just cancel the optimizatoin when the definition is Phi
node while actually we could further check the definitions of incoming
parameters of PHI node.
This helps catch more elimination opportunities.
Signed-off-by: Jiong Wang <jiong.wang@netronome.com>
Signed-off-by: Yonghong Song <yhs@fb.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327368
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Yonghong Song [Tue, 13 Mar 2018 06:47:03 +0000 (06:47 +0000)]
bpf: Extends zero extension elimination beyond comparison instructions
The current zero extension elimination was restricted to operands of
comparison. It actually could be extended to more cases.
For example:
int *inc_p (int *p, unsigned a)
{
return p + a;
}
'a' will be promoted to i64 during addition, and the zero extension could
be eliminated as well.
For the elimination optimization, it should be much better to start
recognizing the candidate sequence from the SRL instruction instead of J*
instructions.
This patch makes it an generic zero extension elimination pass instead of
one restricted with comparison.
Signed-off-by: Jiong Wang <jiong.wang@netronome.com>
Signed-off-by: Yonghong Song <yhs@fb.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327367
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Yonghong Song [Tue, 13 Mar 2018 06:47:02 +0000 (06:47 +0000)]
bpf: J*_RR should check both operands
There is a mistake in current code that we "break" out the optimization
when the first operand of J*_RR doesn't qualify the elimination. This
caused some elimination opportunities missed, for example the one in the
testcase.
The code should just fall through to handle the second operand.
Signed-off-by: Jiong Wang <jiong.wang@netronome.com>
Signed-off-by: Yonghong Song <yhs@fb.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327366
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Yonghong Song [Tue, 13 Mar 2018 06:47:00 +0000 (06:47 +0000)]
bpf: Tighten subregister definition check
The current subregister definition check stops after the MOV_32_64
instruction.
This means we are thinking all the following instruction sequences
are safe to be eliminated:
MOV_32_64 rB, wA
SLL_ri rB, rB, 32
SRL_ri rB, rB, 32
However, this is *not* true. The source subregister wA of MOV_32_64 could
come from a implicit truncation of 64-bit register in which case the high
bits of the 64-bit register is not zeroed, therefore we can't eliminate
above sequence.
For example, for i32_val, we shouldn't do the elimination:
long long bar ();
int foo (int b, int c)
{
unsigned int i32_val = (unsigned int) bar();
if (i32_val < 10)
return b;
else
return c;
}
Signed-off-by: Jiong Wang <jiong.wang@netronome.com>
Signed-off-by: Yonghong Song <yhs@fb.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327365
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Yonghong Song [Tue, 13 Mar 2018 06:46:59 +0000 (06:46 +0000)]
bpf: Add more check directives in peephole testcase
Improve the test accuracy by adding more check directives.
Shifts are expected to be eliminated for zero extension but not for signed
extension.
Signed-off-by: Jiong Wang <jiong.wang@netronome.com>
Signed-off-by: Yonghong Song <yhs@fb.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327364
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Serguei Katkov [Tue, 13 Mar 2018 06:36:00 +0000 (06:36 +0000)]
Revert [SCEV] Fix isKnownPredicate
It is a revert of rL327362 which causes build bot failures with assert like
Assertion `isAvailableAtLoopEntry(RHS, L) && "RHS is not available at Loop Entry"' failed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327363
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Serguei Katkov [Tue, 13 Mar 2018 06:10:27 +0000 (06:10 +0000)]
[SCEV] Fix isKnownPredicate
IsKnownPredicate is updated to implement the following algorithm
proposed by @sanjoy and @mkazantsev :
isKnownPredicate(Pred, LHS, RHS) {
Collect set S all loops on which either LHS or RHS depend.
If S is non-empty
a. Let PD be the element of S which is dominated by all other elements of S
b. Let E(LHS) be value of LHS on entry of PD.
To get E(LHS), we should just take LHS and replace all AddRecs that
are attached to PD on with their entry values.
Define E(RHS) in the same way.
c. Let B(LHS) be value of L on backedge of PD.
To get B(LHS), we should just take LHS and replace all AddRecs that
are attached to PD on with their backedge values.
Define B(RHS) in the same way.
d. Note that E(LHS) and E(RHS) are automatically available on entry of PD,
so we can assert on that.
e. Return true if isLoopEntryGuardedByCond(Pred, E(LHS), E(RHS)) &&
isLoopBackedgeGuardedByCond(Pred, B(LHS), B(RHS))
Return true if Pred, L, R is known from ranges, splitting etc.
}
This is follow-up for https://reviews.llvm.org/D42417.
Reviewers: sanjoy, mkazantsev, reames
Reviewed By: sanjoy, mkazantsev
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D43507
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327362
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Vlad Tsyrklevich [Tue, 13 Mar 2018 05:08:48 +0000 (05:08 +0000)]
Reland r327041: [ThinLTO] Keep available_externally symbols live
Summary:
This change fixes PR36483. The bug was originally introduced by a change
that marked non-prevailing symbols dead. This broke LowerTypeTests
handling of available_externally functions, which are non-prevailing.
LowerTypeTests uses liveness information to avoid emitting thunks for
unused functions.
Marking available_externally functions dead is incorrect, the functions
are used though the function definitions are not. This change keeps them
live, and lets the EliminateAvailableExternally/GlobalDCE passes remove
them later instead.
(Reland with a suspected fix for a unit test failure I haven't been able
to reproduce locally)
Reviewers: pcc, tejohnson
Reviewed By: tejohnson
Subscribers: grimar, mehdi_amini, inglorion, eraman, llvm-commits
Differential Revision: https://reviews.llvm.org/D43690
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327360
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Adam Nemet [Tue, 13 Mar 2018 04:37:01 +0000 (04:37 +0000)]
[LTO] Return proper error object rather than null LTOModule
This caused a crash in LTOModule::createInLocalContext.
rdar://
37926841
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327359
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Taewook Oh [Tue, 13 Mar 2018 04:26:58 +0000 (04:26 +0000)]
[ThinLTO] Add funtions in callees metadata to CallGraphEdges
Summary:
If there's a callees metadata attached to the indirect call instruction, add CallGraphEdges to the callees mentioned in the metadata when computing FunctionSummary.
* Why this is necessary:
Consider following code example:
```
(foo.c)
static int f1(int x) {...}
static int f2(int x);
static int (*fptr)(int) = f2;
static int f2(int x) {
if (x) fptr=f1; return f1(x);
}
int foo(int x) {
(*fptr)(x); // !callees metadata of !{i32 (i32)* @f1, i32 (i32)* @f2} would be attached to this call.
}
(bar.c)
int bar(int x) {
return foo(x);
}
```
At LTO time when `foo.o` is imported into `bar.o`, function `foo` might be inlined into `bar` and PGO-guided indirect call promotion will run after that. If the profile data tells that the promotion of `@f1` or `@f2` is beneficial, the optimizer will check if the "promoted" `@f1` or `@f2` (such as `@f1.llvm.0` or `@f2.llvm.0`) is available. Without this patch, importing `!callees` metadata would only add promoted declarations of `@f1` and `@f2` to the `bar.o`, but still the optimizer will assume that the function is available and perform the promotion. The result of that is link failure with `undefined reference to @f1.llvm.0`.
This patch fixes this problem by adding callees in the `!callees` metadata to CallGraphEdges so that their definition would be properly imported into.
One may ask that there already is a logic to add indirect call promotion targets to be added to CallGraphEdges. However, if profile data says "indirect call promotion is only beneficial under a certain inline context", the logic wouldn't work. In the code example above, if profile data is like
```
bar:
1000000:100000
1:100000
1: foo:100000
1: 100000 f1:100000
```
, Computing FunctionSummary for `foo.o` wouldn't add `foo->f1` to CallGraphEdges. (Also, it is at least "possible" that one can provide profile data to only link step but not to compilation step).
Reviewers: tejohnson, mehdi_amini, pcc
Reviewed By: tejohnson
Subscribers: inglorion, eraman, llvm-commits
Differential Revision: https://reviews.llvm.org/D44399
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327358
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Craig Topper [Tue, 13 Mar 2018 01:17:40 +0000 (01:17 +0000)]
[LegalizeTypes] In SplitVecOp_TruncateHelper, use GetSplitVector on the input instead of creating new extract_subvectors.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327355
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Saleem Abdulrasool [Mon, 12 Mar 2018 23:48:20 +0000 (23:48 +0000)]
ObjCARC: address review comments from majnemer
I forgot to incorporate these comments into the original revision. This
is just code cleanup addressing the feedback, NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327351
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Alexander Shaposhnikov [Mon, 12 Mar 2018 23:36:25 +0000 (23:36 +0000)]
[llvm] Fix mc tests
This diff adjusts the mc tests after changing the format
of llvm-readobj output for .group sections.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327349
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Sanjay Patel [Mon, 12 Mar 2018 23:10:08 +0000 (23:10 +0000)]
[InstCombine] add test to show fmul transform creates extra fdiv; NFC
Also, move fmul reassociation tests to the same file as other fmul transforms.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327342
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Alexander Shaposhnikov [Mon, 12 Mar 2018 22:40:09 +0000 (22:40 +0000)]
[llvm-readobj] Extend the output of -elf-section-groups
This diff extends the output of -elf-section-groups
(llvm style, gnu style is unchanged since it's meant to be
compatible with binutils readelf) with sh_link and sh_info.
This change will enable us to use llvm-readobj -elf-section-groups
for testing llvm-objcopy's support for .group sections.
Test plan: make check-all
Differential revision: https://reviews.llvm.org/D44280
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327341
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Volkan Keles [Mon, 12 Mar 2018 22:28:18 +0000 (22:28 +0000)]
BlockExtractor: Don’t delete functions directly
Blocks may have function calls, so don’t erase functions
directly to avoid erasing a function that has a user.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327340
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Sanjay Patel [Mon, 12 Mar 2018 22:18:47 +0000 (22:18 +0000)]
[PatternMatch] enhance m_NaN() to ignore undef elements in vectors
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327339
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Saleem Abdulrasool [Mon, 12 Mar 2018 21:46:09 +0000 (21:46 +0000)]
ObjCARC: teach the cloner about funclets
In the case that the CallInst that is being moved has an associated
operand bundle which is a funclet, the move will construct an invalid
instruction. The new site will have a different token and needs to be
reassociated with the new instruction.
Unfortunately, there is no way to alter the bundle after the
construction of the instruction. Replace the call instruction cloning
with a custom helper to clone the instruction and reassociate the
funclet token.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327336
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Sanjay Patel [Mon, 12 Mar 2018 21:44:17 +0000 (21:44 +0000)]
[InstSimplify] add fcmp tests for constant NaN vector with undef elt; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327335
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Simon Pilgrim [Mon, 12 Mar 2018 21:35:12 +0000 (21:35 +0000)]
[X86][Btver2] Clean up formatting/comments in scheduler model. NFCI.
Moved 'special cases' to be closer to other system classes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327332
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Vedant Kumar [Mon, 12 Mar 2018 20:49:42 +0000 (20:49 +0000)]
Remove the LoopInstSimplify pass (-loop-instsimplify)
LoopInstSimplify is unused and untested. Reading through the commit
history the pass also seems to have a high maintenance burden.
It would be best to retire the pass for now. It should be easy to
recover if we need something similar in the future.
Differential Revision: https://reviews.llvm.org/D44053
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327329
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Michael Zolotukhin [Mon, 12 Mar 2018 20:36:25 +0000 (20:36 +0000)]
Improve caching scheme in ProvenanceAnalysis.
Summary:
ProvenanceAnalysis::related(A, B) currently memoizes its results, and on big
tests the cache grows too large, and we're spending most of the time
growing/looking through DenseMap.
This patch reduces the size of the cache by normalizing keys first: we do that
by calling GetUnderlyingObjCPtr on the input values. The results of
GetUnderlyingObjCPtr are also memoized in a separate cache.
The patch doesn't bring noticable changes to compile time on CTMark, however
significantly helps one of our internal tests.
Reviewers: gottesmm
Subscribers: hiraditya, llvm-commits
Differential Revision: https://reviews.llvm.org/D44270
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327328
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Scott Linder [Mon, 12 Mar 2018 19:28:50 +0000 (19:28 +0000)]
[llvm-readobj][ELF] Move ELF note parsing into libObject
Clean up the parsing of notes in llvm-readobj, improve bounds checking, and
allow the parsing code to be reused.
Differential Revision: https://reviews.llvm.org/D43958
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327320
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Lei Huang [Mon, 12 Mar 2018 19:26:18 +0000 (19:26 +0000)]
[PowerPC][NFC] Explicitly state types on FP SDAG patterns in anticipation of adding the f128 type
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327319
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Martin Storsjo [Mon, 12 Mar 2018 18:47:43 +0000 (18:47 +0000)]
[AArch64] Fold adds with tprel_lo12_nc and secrel_lo12 into a following ldr/str
Differential Revision: https://reviews.llvm.org/D44355
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327316
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Craig Topper [Mon, 12 Mar 2018 18:46:05 +0000 (18:46 +0000)]
[InstCombine] Replace calls to getNumUses with hasNUses or hasNUsesOrMore
getNumUses is a linear time operation. It traverses the user linked list to the end and counts as it goes. Since we are only interested in small constant counts, we should use hasNUses or hasNUsesMore more that terminate the traversal as soon as it can provide the answer.
There are still two other locations in InstCombine, but changing those would force a rebase of D44266 which if accepted would remove them.
Differential Revision: https://reviews.llvm.org/D44398
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327315
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Craig Topper [Mon, 12 Mar 2018 18:40:59 +0000 (18:40 +0000)]
[CallSiteSplitting] Use !Instruction::use_empty instead of checking for a non-zero return from getNumUses
getNumUses is a linear operation. It walks a linked list to get a count. So in this case its better to just ask if there are any users rather than how many.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327314
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Jan Korous [Mon, 12 Mar 2018 18:31:07 +0000 (18:31 +0000)]
[NFC] Replace iterators in PrintHelp with range-based for
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327312
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Jan Korous [Mon, 12 Mar 2018 18:30:47 +0000 (18:30 +0000)]
[NFC] PrintHelp cleanup
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327311
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Krzysztof Parzyszek [Mon, 12 Mar 2018 18:29:47 +0000 (18:29 +0000)]
[Hexagon] Fix typo in testcase
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327310
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Krzysztof Parzyszek [Mon, 12 Mar 2018 18:18:23 +0000 (18:18 +0000)]
[Hexagon] Counting leading/trailing bits is cheap
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327308
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Sanjay Patel [Mon, 12 Mar 2018 18:17:01 +0000 (18:17 +0000)]
[PatternMatch, InstSimplify] allow undef elements when matching vector -0.0
This is the FP equivalent of D42818. Use it for the few cases in InstSimplify
with -0.0 folds (that's the only current use of m_NegZero()).
Differential Revision: https://reviews.llvm.org/D43792
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327307
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Simon Pilgrim [Mon, 12 Mar 2018 18:12:46 +0000 (18:12 +0000)]
[X86][Btver2] FSqrt/FDiv reg-reg instructions don't use the AGU.
I love you llvm-mca.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327306
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Justin Bogner [Mon, 12 Mar 2018 18:06:58 +0000 (18:06 +0000)]
update_mir_test_checks: Fix handling of IR input after r326284
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327305
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Bjorn Pettersson [Mon, 12 Mar 2018 18:02:39 +0000 (18:02 +0000)]
[SelectionDAG] Improve handling of dangling debug info
Summary:
1) Make sure to discard dangling debug info if the variable (or
variable fragment) is mapped to something new before we had a
chance to resolve the dangling debug info.
2) When resolving debug info, make sure to bump the associated
SDNodeOrder to ensure that the DBG_VALUE is emitted after the
instruction that defines the value used in the DBG_VALUE.
This will avoid a debug-use before def scenario as seen in
https://bugs.llvm.org/show_bug.cgi?id=36417.
The new test case, test/DebugInfo/X86/sdag-dangling-dbgvalue.ll,
show some other limitations in how dangling debug info is
handled in the SelectionDAG. Since we currently only support
having one dangling dbg.value per Value, we will end up dropping
debug info when there are more than one variable that is described
by the same "dangling value".
Reviewers: aprantl
Reviewed By: aprantl
Subscribers: aprantl, eraman, llvm-commits, JDevlieghere
Tags: #debug-info
Differential Revision: https://reviews.llvm.org/D44369
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327303
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Krzysztof Parzyszek [Mon, 12 Mar 2018 17:47:46 +0000 (17:47 +0000)]
[Hexagon] Subtarget feature to emit one instruction per packet
This adds two features: "packets", and "nvj".
Enabling "packets" allows the compiler to generate instruction packets,
while disabling it will prevent it and disable all optimizations that
generate them. This feature is enabled by default on all subtargets.
The feature "nvj" allows the compiler to generate new-value jumps and it
implies "packets". It is enabled on all subtargets.
The exception is made for packets with endloop instructions, since they
require a certain minimum number of instructions in the packets to which
they apply. Disabling "packets" will not prevent hardware loops from
being generated.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327302
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Roman Lebedev [Mon, 12 Mar 2018 17:43:02 +0000 (17:43 +0000)]
[InstCombine] [NFC] Add tests for peeking through FP casts for sign-bit compares (PR36682)
Summary:
This pattern came up in PR36682:
https://bugs.llvm.org/show_bug.cgi?id=36682
https://godbolt.org/g/LhuD9A
Tests for proposed fix in D44367.
Looking at the IR pattern in question, as per [[ https://github.com/rutgers-apl/alive-nj | alive-nj ]], for all the type combinations i checked
(input: `i16`, `i32`, `i64`; intermediate: `half`/`i16`, `float`/`i32`, `double`/`i64`)
for the following `icmp` comparisons the `sitofp`+`bitcast` can be dropped:
* `eq 0`
* `ne 0`
* `slt 0`
* `sle 0`
* `sge 0`
* `sgt 0`
* `slt 1`
* `sge 1`
* `sle -1`
* `sgt -1`
I did not check vectors, but i'm guessing it's the same there.
{
F5887419}
Thus all these cases are in the testcase (along with the vector variant with additional `undef` element in the middle).
There are no negative patterns here (unless alive-nj lied/is broken), all of these should be optimized.
Generated with {
F5887551}
Reviewers: spatel, majnemer, efriedma, arsenm
Reviewed By: spatel
Subscribers: nlopes, wdng, llvm-commits
Differential Revision: https://reviews.llvm.org/D44390
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327301
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Simon Pilgrim [Mon, 12 Mar 2018 17:29:54 +0000 (17:29 +0000)]
[X86] Deleting README-MMX.txt now that all tasks have been completed.
MMX buildvectors were improved at rL327247 - new MMX bugs should be raised on bugzilla
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327300
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Dmitry Preobrazhensky [Mon, 12 Mar 2018 17:29:24 +0000 (17:29 +0000)]
[AMDGPU][MC][GFX8] Added BUFFER_STORE_LDS_DWORD Instruction
See bug 36558: https://bugs.llvm.org/show_bug.cgi?id=36558
Differential Revision: https://reviews.llvm.org/D43950
Reviewers: artem.tamazov, arsenm
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327299
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Craig Topper [Mon, 12 Mar 2018 17:24:50 +0000 (17:24 +0000)]
[X86] Add all of the MRM_C0-MRM_FF forms to the switch in RecognizableInstr::emitInstructionSpecifier. NFC
Remove the special casing for MRM_F8 by using HANDLE_OPTIONAL.
This should be NFC as the forms that were missing aren't used by any instructions today. They exist in the enum so that we didn't have to put them in one at a time when instructions are added. But looks like we failed here.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327298
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Simon Pilgrim [Mon, 12 Mar 2018 17:07:08 +0000 (17:07 +0000)]
[X86][Btver2] Prefix all scheduler defs. NFCI.
These are all global, so prefix with 'J' to help prevent accidental name clashes with other models.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327296
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Craig Topper [Mon, 12 Mar 2018 16:43:11 +0000 (16:43 +0000)]
[X86] Remove use of MVT class from the ShuffleDecode library.
MVT belongs to the CodeGen layer, but ShuffleDecode is used by the X86 InstPrinter which is part of the MC layer. This only worked because MVT is completely implemented in a header file with no other library dependencies.
Differential Revision: https://reviews.llvm.org/D44353
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327292
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Yaxun Liu [Mon, 12 Mar 2018 16:34:06 +0000 (16:34 +0000)]
[AMDGPU] Fix lowering enqueue kernel when kernel has no name
Since the enqueued kernels have internal linkage, their names may be dropped.
In this case, give them unique names __amdgpu_enqueued_kernel or
__amdgpu_enqueued_kernel.n where n is a sequential number starting from 1.
Differential Revision: https://reviews.llvm.org/D44322
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327291
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Simon Pilgrim [Mon, 12 Mar 2018 16:02:56 +0000 (16:02 +0000)]
[X86][Btver2] Extend JWriteResFpuPair to accept resource/uop counts. NFCI.
This allows the single resource classes (VarBlend, MPSAD, VarVecShift) to use the JWriteResFpuPair macro.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327289
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Dmitry Preobrazhensky [Mon, 12 Mar 2018 15:55:08 +0000 (15:55 +0000)]
[AMDGPU][MC][DOC] Updated AMD GPU assembler description
See bug 36572: https://bugs.llvm.org/show_bug.cgi?id=36572
Differential Revision: https://reviews.llvm.org/D44020
Reviewers: artem.tamazov, vpykhtin
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327288
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Sanjay Patel [Mon, 12 Mar 2018 15:47:32 +0000 (15:47 +0000)]
[InstSimplify] add test for m_NegZero with undef elt; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327287
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Simon Pilgrim [Mon, 12 Mar 2018 15:29:00 +0000 (15:29 +0000)]
[X86][Btver2] Use JWriteResFpuPair wrapper for AES/CLMUL/HADD scheduler cases. NFCI.
These are single pipe and have the default resource/uop counts like JWriteResFpuPair so there's no need to handle them separately.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327283
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Krzysztof Parzyszek [Mon, 12 Mar 2018 15:20:36 +0000 (15:20 +0000)]
[Hexagon] Add REQUIRES: asserts to testcases that use -stats
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327281
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Krzysztof Parzyszek [Mon, 12 Mar 2018 15:11:16 +0000 (15:11 +0000)]
[Hexagon] Add REQUIRES: asserts to testcases that use -debug-only
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327279
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Dmitry Preobrazhensky [Mon, 12 Mar 2018 15:03:34 +0000 (15:03 +0000)]
[AMDGPU][MC] Corrected GATHER4 opcodes
See bug 36252: https://bugs.llvm.org/show_bug.cgi?id=36252
Differential Revision: https://reviews.llvm.org/D43874
Reviewers: artem.tamazov, arsenm
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327278
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Benjamin Kramer [Mon, 12 Mar 2018 15:02:59 +0000 (15:02 +0000)]
[llvm-readobj] Make header self-contained
Patch by Dean Sturtevant!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327277
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Puyan Lotfi [Mon, 12 Mar 2018 14:51:19 +0000 (14:51 +0000)]
Updating MIR Language Reference to include new syntax for symbols and physregs.
External symbols now get the sigil '&' while physical registers get the sigil
'$' for their prefix.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327276
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Jonas Devlieghere [Mon, 12 Mar 2018 14:45:08 +0000 (14:45 +0000)]
[DebugInfo] Replace unreachable with None
Invalid user input should not trigger assertions and unreachables. We
already return an Option so we should just return None here.
Fixes https://bugs.chromium.org/p/oss-fuzz/issues/detail?id=5532
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327274
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Sam McCall [Mon, 12 Mar 2018 14:40:48 +0000 (14:40 +0000)]
[Hexagon] fix 'must explicitly initialize the const member' error which clang 3.8 emits
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327273
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Krzysztof Parzyszek [Mon, 12 Mar 2018 14:01:28 +0000 (14:01 +0000)]
[Hexagon] Add more lit tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327271
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Matt Arsenault [Mon, 12 Mar 2018 13:35:53 +0000 (13:35 +0000)]
AMDGPU/GlobalISel: Legality and RegBankInfo for G_{INSERT|EXTRACT}_VECTOR_ELT
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327269
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Matt Arsenault [Mon, 12 Mar 2018 13:35:49 +0000 (13:35 +0000)]
AMDGPU/GlobalISel: InstrMapping for G_MERGE_VALUES
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327268
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Matt Arsenault [Mon, 12 Mar 2018 13:35:43 +0000 (13:35 +0000)]
AMDGPU/GlobalISel: Make some G_MERGE_VALUEs legal
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327267
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Hans Wennborg [Mon, 12 Mar 2018 13:22:12 +0000 (13:22 +0000)]
Revert r326710 "Fuzzer: remove temporary files after we're done with them."
This broke some Windows buildbots; see llvm-commits thread.
> These were just copies of the relevant fuzzer binary with (presumably)
> meaningful suffixes, but accounted for more than 10% of my build
> directory (> 8GB). Hard drive space is cheap, but not that cheap.
(Also reverts follow-up r326710 which didn't help.)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327266
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Simon Dardis [Mon, 12 Mar 2018 13:16:12 +0000 (13:16 +0000)]
[mips] Split out ASEPredicate from InsnPredicates (NFC)
This simplifies tagging instructions with the correct ISA and ASE, albeit making
instruction definitions a bit more verbose.
Reviewers: atanasyan, abeserminji
Differential Revision: https://reviews.llvm.org/D44299
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327265
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Nico Weber [Mon, 12 Mar 2018 12:47:27 +0000 (12:47 +0000)]
MC intel asm parser: Allow @ at the start of function names.
Ports parts of r193000 to the intel parser. Fixes part of PR36676.
https://reviews.llvm.org/D44359
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327262
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Simon Pilgrim [Mon, 12 Mar 2018 12:30:04 +0000 (12:30 +0000)]
[X86][SSE] createVariablePermute - PSHUFB requires SSSE3 not just SSE3
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327259
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Jonas Devlieghere [Mon, 12 Mar 2018 11:01:05 +0000 (11:01 +0000)]
Fix compilation on Darwin with expensive checks.
After r327219 was landed, the bot with expensive checks on GreenDragon
started failing. The problem was missing symbols `regex_t` and
`regmatch_t` in `xlocale/_regex.h`. The latter was included because
after the change in r327219, `random` is needed, which transitively
includes `xlocale.h.` which in turn conditionally includes
`xlocale/_regex.h` when _REGEX_H_ is defined. Because this is the header
guard in `regex_impl.h` and because `regex_impl.h` was included before
the other LLVM includes, `xlocale/_regex.h` was included without the
necessary types being available.
This commit fixes this by moving the include of `regex_impl.h` all the
way down. I also added a comment to stress the significance of its
position.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327256
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Eugene Leviant [Mon, 12 Mar 2018 10:30:50 +0000 (10:30 +0000)]
[ThinLTO] Recommit of import global variables
This wasreverted in r326638 due to link problems and fixed
afterwards
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327254
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Justin Lebar [Mon, 12 Mar 2018 09:26:09 +0000 (09:26 +0000)]
Back out "Re-land: Teach CorrelatedValuePropagation to reduce the width of udiv/urem instructions."
This reverts r326908, originally landed as D44102.
Reverted for causing performance regressions on x86. (These regressions
are not yet understood.)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327252
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Craig Topper [Mon, 12 Mar 2018 05:35:02 +0000 (05:35 +0000)]
[X86] Don't compute known bits twice for the same SDValue in LowerMUL.
We called MaskedValueIsZero with two different masks, but underneath that calls computeKnownBits before applying the mask. This means we compute the same known bits twice due to the two calls. Instead just call computeKnownBits directly and apply the two masks ourselves.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327251
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Serguei Katkov [Mon, 12 Mar 2018 03:50:07 +0000 (03:50 +0000)]
[CGP] Fix the remove of matched phis in complex addressing mode
When we replace the Phi we created with matched ones it is possible that
there are two identical phi nodes in IR. And matcher is smart enough to find that
new created phi matches both of them. So we try to replace our phi node with
matched ones twice and what is bad we delete our phi node twice causing a crash.
As soon as we found that we have two identical Phi nodes it makes sense to do
a clean-up and replace one phi node by other one.
The patch implements it.
Reviewers: john.brawn, reames
Reviewed By: john.brawn
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D43758
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327250
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Simon Pilgrim [Sun, 11 Mar 2018 19:22:13 +0000 (19:22 +0000)]
[X86][MMX] Support MMX build vectors to avoid SSE usage (PR29222)
64-bit MMX vector generation usually ends up lowering into SSE instructions before being spilled/reloaded as a MMX type.
This patch creates a MMX vector from MMX source values, taking the lowest element from each source and constructing broadcasts/build_vectors with direct calls to the MMX PUNPCKL/PSHUFW intrinsics.
We're missing a few consecutive load combines that could be handled in a future patch if that would be useful - my main interest here is just avoiding a lot of the MMX/SSE crossover.
Differential Revision: https://reviews.llvm.org/D43618
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327247
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Simon Pilgrim [Sun, 11 Mar 2018 18:28:37 +0000 (18:28 +0000)]
[X86][AVX512] Added more non-VLX test cases
Cleaned up check prefixes so that they actually share a bit more
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327246
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Simon Pilgrim [Sun, 11 Mar 2018 17:23:54 +0000 (17:23 +0000)]
[X86][AVX] createVariablePermute - scale v16i16 variable permutes to use v32i8 codegen
XOP was already doing this, and now AVX performs v32i8 variable permutes as well.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327245
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Simon Pilgrim [Sun, 11 Mar 2018 17:00:46 +0000 (17:00 +0000)]
[X86][AVX] createVariablePermute - widen permutes for cases where the source vector is wider than the destination type
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327244
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Sanjay Patel [Sun, 11 Mar 2018 16:45:31 +0000 (16:45 +0000)]
[InstCombine] add tests for casted sign-bit cmp (PR36682); NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327243
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Simon Pilgrim [Sun, 11 Mar 2018 16:28:11 +0000 (16:28 +0000)]
[X86][AVX] createVariablePermute - use PSHUFB+PCMPGT+SELECT for v32i8 variable permutes
Same as the VPERMILPS/VPERMILPD approach for v8f32/v4f64 cases, rely on PSHUFB using bits[3:0] for indexing - we can ignore the sign bit (zero element) as those index vector values are considered undefined. The select between the lo/hi permute results based on the index size.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327242
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Simon Pilgrim [Sun, 11 Mar 2018 14:31:55 +0000 (14:31 +0000)]
Fix for buildbots which didn't like makeArrayRef with initializer lists.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327241
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Simon Pilgrim [Sun, 11 Mar 2018 14:04:53 +0000 (14:04 +0000)]
[X86][SSE] Generalized SplitBinaryOpsAndApply to SplitOpsAndApply to support any number of ops.
I've kept SplitBinaryOpsAndApply as a wrapper to avoid a lot of makeArrayRef code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327240
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Simon Pilgrim [Sun, 11 Mar 2018 11:52:26 +0000 (11:52 +0000)]
[X86][AVX] createVariablePermute - use 2xVPERMIL+PCMPGT+SELECT for v8i32/v8f32 and v4i64/v4f64 variable permutes
As VPERMILPS/VPERMILPD only selects elements based on the bits[1:0]/bit[1] then we can permute both the (repeated) lo/hi 128-bit vectors in each case and then select between these results based on whether the index was for for lo/hi.
For v4i64/v4f64 this avoids some rather nasty v4i64 multiples on the AVX2 implementation, which seems to be worse than the extra port5 pressure from the additional shuffles/blends.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327239
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Simon Pilgrim [Sun, 11 Mar 2018 11:19:19 +0000 (11:19 +0000)]
[X86][AVX512] createVariablePermute - Non-VLX targets can widen v4i64/v8f64 variable permutes to v8i64/v8f64
Permutes in the upper elements will be undefined, but they will be discarded anyway.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327238
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Simon Pilgrim [Sun, 11 Mar 2018 10:50:48 +0000 (10:50 +0000)]
[x86][SSE] Add widenSubVector helper. NFCI.
Helper function to insert a subvector into the bottom elements of a larger zero/undef vector with the same scalar type.
I've converted a couple of INSERT_SUBVECTOR calls to use it, there are plenty more although in some cases I was worried it might make the code more ambiguous.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327236
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George Burgess IV [Sun, 11 Mar 2018 04:16:12 +0000 (04:16 +0000)]
[MemorySSA] Fix comment + remove redundant dyn_casts; NFC
StartingAccess is already a MemoryUseOrDef.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327235
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Michael Bedy [Sun, 11 Mar 2018 03:27:50 +0000 (03:27 +0000)]
Test commit - change comment slightly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327234
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Nico Weber [Sun, 11 Mar 2018 03:17:34 +0000 (03:17 +0000)]
Add REQUIRES: arm-registered-target to test using an arm-apple-ios triple.
Else, the test fails in LLVM_TARGETS_TO_BUILD=X86 builds like so:
bin/llvm-mc: : error: unable to get target for 'arm64-apple-ios7.0.0'
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327233
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Andrea Di Biagio [Sun, 11 Mar 2018 00:51:33 +0000 (00:51 +0000)]
[TargetSchedule] Minor refactor in computeInstrLatency. NFC
The intent of revision r300311 was to add a check for invalid scheduling class
descriptors. However, it ended up adding a redundant call in a basic block that
should not be reachable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327231
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George Burgess IV [Sat, 10 Mar 2018 23:22:46 +0000 (23:22 +0000)]
Revert r327199: "Clean up a temp file on the buildbots"
"I'll revert this tomorrow," I said yesterday. This should've reached
all the bots it can by now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327230
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Craig Topper [Sat, 10 Mar 2018 21:30:46 +0000 (21:30 +0000)]
[X86] Add comments to the end of FMA3 instructions to make the operation clear
Summary:
There are 3 different operand orders for FMA instructions so figuring out the exact operation being performed requires a lot of thought.
This patch adds a comment to the end of the assembly line to print the exact operation.
I think I've got all the instructions in here except the ones with builtin rounding.
I didn't update all tests, but I assume we can get them as we regenerate tests in the future.
Reviewers: spatel, v_klochkov, RKSimon
Reviewed By: spatel
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D44345
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327225
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Andrea Di Biagio [Sat, 10 Mar 2018 20:52:59 +0000 (20:52 +0000)]
[llvm-mca] Fix use-of-uninitialized-value error reported by the MemorySanitizer.
This should make the buildbots green again.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327223
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Simon Pilgrim [Sat, 10 Mar 2018 19:49:59 +0000 (19:49 +0000)]
[X86][XOP] createVariablePermute - use VPERMIL2 for v8i32/v4i64 variable permutes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327222
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Martin Storsjo [Sat, 10 Mar 2018 19:05:21 +0000 (19:05 +0000)]
[AArch64] Implement native TLS for Windows
Differential Revision: https://reviews.llvm.org/D43971
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327220
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Mandeep Singh Grang [Sat, 10 Mar 2018 18:59:14 +0000 (18:59 +0000)]
[ADT] Shuffle containers before sorting to uncover non-deterministic behavior
Summary:
std::sort and array_pod_sort both use non-stable sorting algorithms.
This means that the relative order of elements with the same key is
undefined. This patch is an attempt to uncover such scenarios by
randomly shuffling all containers before sorting, if EXPENSIVE_CHECKS
is enabled.
Here's the bugzilla for this: https://bugs.llvm.org/show_bug.cgi?id=35135
Reviewers: dblaikie, dexonsmith, chandlerc, efriedma, RKSimon
Reviewed By: RKSimon
Subscribers: fhahn, davide, RKSimon, vsk, mgorny, llvm-commits
Differential Revision: https://reviews.llvm.org/D39245
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327219
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Simon Pilgrim [Sat, 10 Mar 2018 18:33:29 +0000 (18:33 +0000)]
[X86][XOP] createVariablePermute - use VPPERM for v16i16 variable permutes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327218
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Simon Pilgrim [Sat, 10 Mar 2018 18:12:35 +0000 (18:12 +0000)]
[X86][SSE] createVariablePermute - create index scaling helper. NFCI.
This will help in some future changes for custom lowering.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327217
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Andrea Di Biagio [Sat, 10 Mar 2018 17:40:25 +0000 (17:40 +0000)]
[llvm-mca] BackendStatistics: early exit from method printSchedulerUsage if the
no scheduler resources were consumed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327215
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Andrea Di Biagio [Sat, 10 Mar 2018 16:55:07 +0000 (16:55 +0000)]
[llvm-mca] Views are now independent from resource masks. NFCI
This change removes method Backend::getProcResourceMasks() and simplifies some
logic in the Views. This effectively removes yet another dependency between the
views and the Backend.
No functional change intended.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327214
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