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Tim Northover [Mon, 8 May 2017 20:00:14 +0000 (20:00 +0000)]
ARM: use divmod libcalls on embedded MachO platforms too.
The separated libcalls are implemented in terms of __divmodsi4 and __udivmodsi4
anyway, so we should always use them if possible.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302462
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Reid Kleckner [Mon, 8 May 2017 19:58:15 +0000 (19:58 +0000)]
Don't add DBG_VALUE instructions for static allocas in dbg.declare
Summary:
An llvm.dbg.declare of a static alloca is always added to the
MachineFunction dbg variable map, so these values are entirely
redundant. They survive all the way through codegen to be ignored by
DWARF emission.
Effectively revert r113967
Two bugpoint-reduced test cases from 2012 broke as a result of this
change. Despite my best efforts, I haven't been able to rewrite the test
case using dbg.value. I'm not too concerned about the lost coverage
because these were reduced from the test-suite, which we still run.
Reviewers: aprantl, dblaikie
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D32920
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302461
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Zachary Turner [Mon, 8 May 2017 19:46:37 +0000 (19:46 +0000)]
Add some useful helper methods / operators to TypeIndex.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302460
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Reid Kleckner [Mon, 8 May 2017 19:45:57 +0000 (19:45 +0000)]
Update instructions for using the experimental monorepo
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302459
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Zachary Turner [Mon, 8 May 2017 19:45:55 +0000 (19:45 +0000)]
[BitVector] Make find_prev member function const.
NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302458
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Sanjoy Das [Mon, 8 May 2017 19:15:06 +0000 (19:15 +0000)]
Add a blurb to the release notes about the WeakVH -> WeakTrackingVH transition
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302456
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Zachary Turner [Mon, 8 May 2017 18:38:43 +0000 (18:38 +0000)]
[CodeView] Add support for random access type visitors.
Previously type visitation was done strictly sequentially, and
TypeIndexes were computed by incrementing the TypeIndex of the
last visited record. This works fine for situations like dumping,
but not when you want to visit types in random order. For example,
in a debug session someone might lookup a symbol by name, find that
it has TypeIndex 10,000 and then want to go straight to TypeIndex
10,000.
In order to make this work, the visitation framework needs a mode
where it can plumb TypeIndices through the callback pipeline. This
patch adds such a mode. In doing so, it is necessary to provide
an alternative implementation of TypeDatabase that supports random
access, so that is done as well.
Nothing actually uses these random access capabilities yet, but
this will be done in subsequent patches.
Differential Revision: https://reviews.llvm.org/D32928
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302454
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Quentin Colombet [Mon, 8 May 2017 18:16:31 +0000 (18:16 +0000)]
[AArch64][RegisterBankInfo] Change the default mapping of fp loads.
This fixes PR32550, in a way that does not imply running the greedy
mode at O0.
The fix consists in checking if a load is used by any floating point
instruction and if yes, we return a default mapping with FPR instead
of GPR.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302453
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Quentin Colombet [Mon, 8 May 2017 18:16:23 +0000 (18:16 +0000)]
[AArch64][RegisterBankInfo] Fix mapping cost for GPR.
In r292478, we changed the order of the enum that is referenced by
PMI_FirstXXX. This had the side effect of changing the cost of the
mapping of all the loads, instead of just the FPRs ones.
Reinstate the higher cost for all but GPR loads.
Note: This did not have any external visible effects:
- For Fast mode, the cost would have been higher, but we don't care
because we don't try to use alternative mappings.
- For Greedy mode, the higher cost of the GPR loads, would have
triggered the use of the supposedly alternative mapping, that
would be in fact the same GPR mapping but with a lower cost.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302452
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Sanjay Patel [Mon, 8 May 2017 18:16:04 +0000 (18:16 +0000)]
[InstCombine] move/add tests for not(shr (not X), Y); NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302451
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Craig Topper [Mon, 8 May 2017 18:02:51 +0000 (18:02 +0000)]
[ARM] Use a Changed flag to avoid making a pass's return value dependent on a compare with a Statistic object.
Statistic compile to always be 0 in release build so this compare would always return false. And in the debug builds Statistic are global variables and remember their values across pass runs. So this compare returns true anytime the pass runs after the first time it modifies something.
This was found after reviewing all usages of comparison operators on a Statistic object. We had some internal code that did a compare with a statistic that caused a mismatch in output between debug and release builds. So we did an audit out of paranoia.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302450
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Craig Topper [Mon, 8 May 2017 17:39:08 +0000 (17:39 +0000)]
[SCEV] Make setRange take ConstantRange by value instead of rvalue reference so we don't force anything on the caller.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302449
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Craig Topper [Mon, 8 May 2017 17:39:01 +0000 (17:39 +0000)]
[SCEV] Don't use std::move on both inputs to APInt::operator+ or operator-. It might be confusing to the reader. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302448
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Daniel Berlin [Mon, 8 May 2017 17:37:33 +0000 (17:37 +0000)]
ConstantFold: Handle gep nonnull, undef as well
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302447
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Daniel Berlin [Mon, 8 May 2017 17:37:29 +0000 (17:37 +0000)]
ConstantFold: Fold getelementptr (i32, i32* null, i64 undef) to null.
Transforms/IndVarSimplify/2011-10-27-lftrnull will fail if this regresses.
Transforms/GVN/PRE/2011-06-01-NonLocalMemdepMiscompile.ll has been changed to still test what it was
trying to test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302446
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Craig Topper [Mon, 8 May 2017 17:22:34 +0000 (17:22 +0000)]
[ValueTracking] Use KnownOnes to provide a better bound on known zeros for ctlz/cttz intrinics
This patch uses KnownOnes of the input of ctlz/cttz to bound the value that can be returned from these intrinsics. This makes these intrinsics more similar to the handling for ctpop which already uses known bits to produce a similar bound.
Differential Revision: https://reviews.llvm.org/D32521
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302444
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Zvi Rackover [Mon, 8 May 2017 16:54:25 +0000 (16:54 +0000)]
[X86] Split test configurations. NFC.
Split test that includes reproducer for pr32967 to KNL and SKX.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302442
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Sanjay Patel [Mon, 8 May 2017 16:35:02 +0000 (16:35 +0000)]
[InstSimplify] fix typo; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302439
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Sanjay Patel [Mon, 8 May 2017 16:33:42 +0000 (16:33 +0000)]
[InstCombine] use local variable to reduce code duplication; NFCI
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302438
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Craig Topper [Mon, 8 May 2017 16:22:48 +0000 (16:22 +0000)]
[ValueTracking] Introduce a version of computeKnownBits that returns a KnownBits struct. Begin using it to replace internal usages of ComputeSignBit
This introduces a new interface for computeKnownBits that returns the KnownBits object instead of requiring it to be pre-constructed and passed in by reference.
This is a much more convenient interface as it doesn't require the caller to figure out the BitWidth to pre-construct the object. It's so convenient that I believe we can use this interface to remove the special ComputeSignBit flavor of computeKnownBits.
As a step towards that idea, this patch replaces all of the internal usages of ComputeSignBit with this new interface. As you can see from the patch there were a couple places where we called ComputeSignBit which really called computeKnownBits, and then called computeKnownBits again directly. I've reduced those places to only making one call to computeKnownBits. I bet there are probably external users that do it too.
A future patch will update the external users and remove the ComputeSignBit interface. I'll also working on moving more locations to the KnownBits returning interface for computeKnownBits.
Differential Revision: https://reviews.llvm.org/D32848
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302437
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Sanjay Patel [Mon, 8 May 2017 16:21:55 +0000 (16:21 +0000)]
[InstCombine/InstSimplify] add comments about code duplication; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302436
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Sanjay Patel [Mon, 8 May 2017 15:58:57 +0000 (15:58 +0000)]
[InstCombine] add another test for PR32949; NFC
A patch for the InstSimplify variant of this bug is up for review here:
https://reviews.llvm.org/D32954
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302434
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Zvi Rackover [Mon, 8 May 2017 15:46:58 +0000 (15:46 +0000)]
InstructionSimplify: Refactor foldIdentityShuffles. NFC.
Summary:
Minor refactoring of foldIdentityShuffles() which allows the removal of a
ConstantDataVector::get() in SimplifyShuffleVectorInstruction.
Reviewers: spatel
Reviewed By: spatel
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D32955
Conflicts:
lib/Analysis/InstructionSimplify.cpp
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302433
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Geoff Berry [Mon, 8 May 2017 15:33:08 +0000 (15:33 +0000)]
Fix comment typos.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302432
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Zvi Rackover [Mon, 8 May 2017 14:47:32 +0000 (14:47 +0000)]
Adding reproducer for pr32967. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302426
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Simon Pilgrim [Mon, 8 May 2017 14:16:39 +0000 (14:16 +0000)]
[X86][SSE] Improve combineLogicBlendIntoPBLENDV to use general masks.
Currently combineLogicBlendIntoPBLENDV can only match ASHR to detect sign splatting of a bit mask, this patch generalises this to use computeNumSignBits instead.
This is a first step in several things we can do to improve PBLENDV support:
* Better matching of X86ISD::ANDNP patterns.
* Handle floating point cases.
* Better vector and bitcast support in computeNumSignBits.
* Recognise that PBLENDV only uses the sign bit of the mask, we should be able strip away sign splats (ASHR, PCMPGT isNeg tests etc.).
Differential Revision: https://reviews.llvm.org/D32953
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302424
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Simon Pilgrim [Mon, 8 May 2017 13:32:34 +0000 (13:32 +0000)]
Normalize line endings. NFCI,
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302422
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Zvi Rackover [Mon, 8 May 2017 12:40:18 +0000 (12:40 +0000)]
IR: Add a shufflevector mask commutation helper function. NFC.
Summary:
Following up on Sanjay's suggetion in D32955, move this functionality
into ShuffleVectornstruction.
Reviewers: spatel, RKSimon
Reviewed By: RKSimon
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D32956
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302420
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Simon Pilgrim [Mon, 8 May 2017 10:37:34 +0000 (10:37 +0000)]
[ARM][NEON] Add support for ISD::ABS lowering
Update NEON int_arm_neon_vabs intrinsic to use the ISD::ABS opcode directly
Added constant folding tests.
Differential Revision: https://reviews.llvm.org/D32938
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302417
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Martin Storsjo [Mon, 8 May 2017 10:26:24 +0000 (10:26 +0000)]
[ARM] Clear the constant pool cache on explicit .ltorg directives
Multiple ldr pseudoinstructions with the same constant value will
reuse the same constant pool entry. However, if the constant pool
is explicitly flushed with a .ltorg directive, we should not try
to reference constants in the previous pool any longer, since they
may be out of range.
This fixes assembling hand-written assembler source which repeatedly
loads the same constant value, across a binary size larger than the
pc-relative fixup range for ldr instructions (4096 bytes). Such
assembler source already uses explicit .ltorg instructions to emit
constant pools with regular intervals. However if we try to reuse
constants emitted in earlier pools, they end up out of range.
This makes the output of the testcase match what binutils gas does
(prior to this patch, it would fail to assemble).
Differential Revision: https://reviews.llvm.org/D32847
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302416
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Simon Pilgrim [Mon, 8 May 2017 10:25:18 +0000 (10:25 +0000)]
[AARCH64][NEON] Add support for ISD::ABS lowering
Update int_aarch64_neon_abs intrinsic to use the ISD::ABS opcode directly
Differential Revision: https://reviews.llvm.org/D32940
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302415
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Igor Breger [Mon, 8 May 2017 09:40:43 +0000 (09:40 +0000)]
[GlobalISel][X86] G_GEP selection support.
Summary: [GlobalISel][X86] G_GEP selection support.
Reviewers: zvi, guyblank
Reviewed By: guyblank
Subscribers: dberris, rovka, llvm-commits, kristof.beyls
Differential Revision: https://reviews.llvm.org/D32396
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302412
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Igor Breger [Mon, 8 May 2017 09:03:37 +0000 (09:03 +0000)]
[GlobalISel][X86] G_MUL legalizer/selector support.
Summary:
G_MUL legalizer/selector/regbank support.
Use only Tablegen-erated instruction selection.
This patch dealing with legal operations only.
Reviewers: zvi, guyblank
Reviewed By: guyblank
Subscribers: krytarowski, rovka, kristof.beyls, llvm-commits
Differential Revision: https://reviews.llvm.org/D32698
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302410
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Andrew Ng [Mon, 8 May 2017 08:55:38 +0000 (08:55 +0000)]
[Lit] Fix to prevent creation of "%SystemDrive%" directory on Windows.
This patch propogates the environment variable SYSTEMDRIVE on Windows when
running the unit tests. This prevents the creation of a directory named
"%SystemDrive%" when running the unit tests from FileSystemTest that use the
function llvm::sys::fs::remove_directories which in turn uses SHFileOperationW.
It is within SHFileOperationW that this environment variable may be used and if
undefined causes the creation of a "%SystemDrive%" directory in the current
directory.
Differential Revision: https://reviews.llvm.org/D32910
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302409
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Craig Topper [Mon, 8 May 2017 06:34:41 +0000 (06:34 +0000)]
[APInt] Modify tcMultiplyPart's overflow detection to not depend on 'i' from the earlier loop. NFC
The value of 'i' is always the smaller of DstParts and SrcParts so we can just use that fact to write all the code in terms of SrcParts and DstParts.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302408
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Craig Topper [Mon, 8 May 2017 06:34:39 +0000 (06:34 +0000)]
[APInt] Use std::min instead of writing the same thing with the ternary operator. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302407
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Craig Topper [Mon, 8 May 2017 06:34:36 +0000 (06:34 +0000)]
[APInt] Remove 'else' after 'return' in tcMultiply methods. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302406
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Dean Michael Berris [Mon, 8 May 2017 05:45:21 +0000 (05:45 +0000)]
[XRay] Custom event logging intrinsic
This patch introduces an LLVM intrinsic and a target opcode for custom event
logging in XRay. Initially, its use case will be to allow users of XRay to log
some type of string ("poor man's printf"). The target opcode compiles to a noop
sled large enough to enable calling through to a runtime-determined relative
function call. At runtime, when X-Ray is enabled, the sled is replaced by
compiler-rt with a trampoline to the logic for creating the custom log entries.
Future patches will implement the compiler-rt parts and clang-side support for
emitting the IR corresponding to this intrinsic.
Reviewers: timshen, dberris
Subscribers: igorb, pelikan, rSerge, timshen, echristo, dberris, llvm-commits
Differential Revision: https://reviews.llvm.org/D27503
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302405
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Craig Topper [Mon, 8 May 2017 04:55:13 +0000 (04:55 +0000)]
[SCEV] Use APInt::operator*=(uint64_t) to avoid a temporary APInt for a constant.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302404
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Craig Topper [Mon, 8 May 2017 04:55:12 +0000 (04:55 +0000)]
[APInt] Take advantage of new operator*=(uint64_t) to remove a temporary APInt.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302403
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Craig Topper [Mon, 8 May 2017 04:55:09 +0000 (04:55 +0000)]
[APInt] Add support for multiplying by a uint64_t.
This makes multiply similar to add, sub, xor, and, and or.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302402
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Eric Beckmann [Mon, 8 May 2017 02:47:42 +0000 (02:47 +0000)]
Hopefully one last commit to fix this patch, addresses string reference
issues.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302401
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Eric Beckmann [Mon, 8 May 2017 02:47:25 +0000 (02:47 +0000)]
Quick fix to D32609, it seems .o files are not transferred in all cases.
Therefore the .o file in question is renamed to .obj.coff.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302400
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Eric Beckmann [Mon, 8 May 2017 02:47:07 +0000 (02:47 +0000)]
Update llvm-readobj -coff-resources to display tree structure.
Summary: Continue making updates to llvm-readobj to display resource sections. This is necessary for testing the up and coming cvtres tool.
Reviewers: zturner
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D32609
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302399
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Craig Topper [Mon, 8 May 2017 02:29:15 +0000 (02:29 +0000)]
[SCEV] Have getRangeForAffineARHelper take StartRange by const reference to avoid a copy in many of the cases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302398
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Eric Beckmann [Mon, 8 May 2017 02:25:03 +0000 (02:25 +0000)]
Revert "Hopefully one last commit to fix this patch, addresses string reference"
Summary:
This reverts commit
56beec1b1cfc6d263e5eddb7efff06117c0724d2.
Revert "Quick fix to D32609, it seems .o files are not transferred in all cases."
This reverts commit
7652eecd29cfdeeab7f76f687586607a99ff4e36.
Revert "Update llvm-readobj -coff-resources to display tree structure."
This reverts commit
422b62c4d302cfc92401418c2acd165056081ed7.
Reviewers: zturner
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D32958
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302397
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Eric Beckmann [Mon, 8 May 2017 01:48:55 +0000 (01:48 +0000)]
Hopefully one last commit to fix this patch, addresses string reference
issues.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302395
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Eric Beckmann [Sun, 7 May 2017 23:31:14 +0000 (23:31 +0000)]
Quick fix to D32609, it seems .o files are not transferred in all cases.
Therefore the .o file in question is renamed to .obj.coff.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302388
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Eric Beckmann [Sun, 7 May 2017 22:47:22 +0000 (22:47 +0000)]
Update llvm-readobj -coff-resources to display tree structure.
Summary: Continue making updates to llvm-readobj to display resource sections. This is necessary for testing the up and coming cvtres tool.
Reviewers: zturner
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D32609
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302386
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Craig Topper [Sun, 7 May 2017 22:22:11 +0000 (22:22 +0000)]
[ConstantRange][SimplifyCFG] Add a helper method to allow SimplifyCFG to determine if a ConstantRange has more than 8 elements without requiring an allocation if the ConstantRange is 64-bits wide.
Previously SimplifyCFG used getSetSize which returns an APInt that is 1 bit wider than the ConstantRange's bit width. In the reasonably common case that the ConstantRange is 64-bits wide, this requires returning a 65-bit APInt. APInt's can only store 64-bits without a memory allocation so this is inefficient.
The new method takes the 8 as an input and tells if the range contains more than that many elements without requiring any wider math.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302385
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Craig Topper [Sun, 7 May 2017 21:48:08 +0000 (21:48 +0000)]
[ConstantRange] Remove 'Of' from name of ConstantRange::isSizeStrictlySmallerThanOf so that it reads better. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302383
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Simon Pilgrim [Sun, 7 May 2017 20:58:55 +0000 (20:58 +0000)]
[X86][AVX1] Improve 256-bit vector costs for integer unary intrinsics.
Account for subvector extraction/insertion, helps prevent the vectorizers from selecting 256-bit vectors that will have to be split anyhow on AVX1 targets.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302378
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Lang Hames [Sun, 7 May 2017 20:39:46 +0000 (20:39 +0000)]
[Orc] Remove trailing whitespace.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302377
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Sanjay Patel [Sun, 7 May 2017 18:19:13 +0000 (18:19 +0000)]
[InstSimplify] add tests for PR32949 miscompile; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302374
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Zvi Rackover [Sun, 7 May 2017 18:16:37 +0000 (18:16 +0000)]
InstructionSimplify: Relanding r301766
Summary:
Re-applying r301766 with a fix to a typo and a regression test.
The log message for r301766 was:
==================================================================================
InstructionSimplify: Canonicalize shuffle operands. NFC-ish.
Summary:
Apply canonicalization rules:
1. Input vectors with no elements selected from can be replaced with undef.
2. If only one input vector is constant it shall be the second one.
This allows constant-folding to cover more ad-hoc simplifications that
were in place and avoid duplication for RHS and LHS checks.
There are more rules we may want to add in the future when we see a
justification. e.g. mask elements that select undef elements can be
replaced with undef.
==================================================================================
Reviewers: spatel, RKSimon
Reviewed By: spatel
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D32863
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302373
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Lang Hames [Sun, 7 May 2017 17:19:53 +0000 (17:19 +0000)]
Make llvm-rtdlyd -check preserve automatic address mappings made by RuntimeDyld.
Currently llvm-rtdyld in -check mode will map sections to back-to-back 4k
aligned slabs starting at 0x1000. Automatically remapping sections by default is
helpful because it quickly exposes relocation bugs due to use of local addresses
rather than load addresses (these would silently pass if the load address was
not remapped). These mappings can be explicitly overridden on a per-section
basis using llvm-rtdlyd's -map-section option. This patch extends this scheme to
also preserve any mappings made by RuntimeDyld itself. Preserving RuntimeDyld's
automatic mappings allows us to write test cases to verify that these automatic
mappings have been applied.
This will allow the fix in https://reviews.llvm.org/D32899 to be tested with
llvm-rtdyld -check.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302372
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Craig Topper [Sun, 7 May 2017 16:28:17 +0000 (16:28 +0000)]
[SCEV] Use move semantics in ScalarEvolution::setRange
Summary: This makes setRange take ConstantRange by rvalue reference since most callers were passing an unnamed temporary ConstantRange. We can then move that ConstantRange into the DenseMap caches. For the callers that weren't passing a temporary, I've added std::move to to the local variable being passed.
Reviewers: sanjoy, mzolotukhin, efriedma
Reviewed By: sanjoy
Subscribers: takuto.ikuta, llvm-commits
Differential Revision: https://reviews.llvm.org/D32943
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302371
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Sanjay Patel [Sun, 7 May 2017 15:11:40 +0000 (15:11 +0000)]
[InstSimplify] use ConstantRange to simplify or-of-icmps
We can simplify (or (icmp X, C1), (icmp X, C2)) to 'true' or one of the icmps in many cases.
I had to check some of these with Alive to prove to myself it's right, but everything seems
to check out. Eg, the deleted code in instcombine was completely ignoring predicates with
mismatched signedness.
This is a follow-up to:
https://reviews.llvm.org/rL301260
https://reviews.llvm.org/D32143
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302370
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Peter Szecsi [Sun, 7 May 2017 11:00:01 +0000 (11:00 +0000)]
[Kaleidoscope] toy.cpp use after move fix
The variable Proto is moved at the beginning of the codegen() function.
According to the comment above, the pointed object should be used due the
reference P.
Differential Revision: https://reviews.llvm.org/D32939
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302369
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Sanjoy Das [Sun, 7 May 2017 05:29:36 +0000 (05:29 +0000)]
Remove unnecessary const_cast
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302368
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Sanjoy Das [Sun, 7 May 2017 05:29:34 +0000 (05:29 +0000)]
Use array_pod_sort instead of std::sort
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302367
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Lang Hames [Sun, 7 May 2017 03:54:53 +0000 (03:54 +0000)]
Fix comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302366
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Saleem Abdulrasool [Sat, 6 May 2017 23:48:02 +0000 (23:48 +0000)]
COFF: add ARM64 relocation types
Add the ARM64 COFF relocation types. This will be needed to add support
for the AArch64 Windows object file emission support.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302365
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Simon Pilgrim [Sat, 6 May 2017 20:53:52 +0000 (20:53 +0000)]
[X86][AVX512] Relax assertion and just exit combine for unsupported types (PR32907)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302361
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Simon Pilgrim [Sat, 6 May 2017 19:11:59 +0000 (19:11 +0000)]
[X86][AVX512] Move v2i64/v4i64 VPABS lowering to tablegen
Extend NoVLX targets to use the 512-bit versions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302359
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Simon Pilgrim [Sat, 6 May 2017 18:17:56 +0000 (18:17 +0000)]
[X86] Reduce code for setting operations actions by merging into loops across multiple types/ops. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302357
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Simon Pilgrim [Sat, 6 May 2017 17:42:09 +0000 (17:42 +0000)]
[NVPTX] Add support for ISD::ABS lowering
Use the ISD::ABS opcode directly
Differential Revision: https://reviews.llvm.org/D32944
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302356
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Simon Pilgrim [Sat, 6 May 2017 17:30:39 +0000 (17:30 +0000)]
[X86][SSE] Break register dependencies on v16i8/v8i16 BUILD_VECTOR on SSE41
rL294581 broke unnecessary register dependencies on partial v16i8/v8i16 BUILD_VECTORs, but on SSE41 we (currently) use insertion for full BUILD_VECTORs as well. By allowing full insertion to occur on SSE41 targets we can break register dependencies here as well.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302355
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Brian Gesiak [Sat, 6 May 2017 16:22:53 +0000 (16:22 +0000)]
[Analysis] Print out unreachable loops
Summary:
When writing a loop pass I made a mistake and hit the assertion
"Unreachable block in loop". Later, I hit an assertion when I called
`BasicBlock::eraseFromParent()` incorrectly: "Use still stuck around
after Def is destroyed". This latter assertion, however, printed out
exactly which value is being deleted and what uses remain, which helped
me debug the issue.
To help people debugging their loop passes in the future, print out
exactly which basic block is unreachable in a loop.
Reviewers: sanjoy, hfinkel, mehdi_amini
Reviewed By: mehdi_amini
Subscribers: mzolotukhin
Differential Revision: https://reviews.llvm.org/D32878
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302354
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Simon Pilgrim [Sat, 6 May 2017 13:46:09 +0000 (13:46 +0000)]
[X86][AVX2] Add scheduling latency/throughput tests for some AVX2 instructions
Many more to come...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302338
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Simon Pilgrim [Sat, 6 May 2017 13:44:42 +0000 (13:44 +0000)]
[DAGCombiner] If ISD::ABS is legal/custom, use it directly instead of canonicalizing first.
Remove an extra canonicalization step if ISD::ABS is going to be used anyway.
Updated x86 abs combine to check that we are lowering from both canonicalizations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302337
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Craig Topper [Sat, 6 May 2017 06:03:07 +0000 (06:03 +0000)]
[SCEV] Remove extra APInt copies from getRangeForAffineARHelper.
This changes one parameter to be a const APInt& since we only read from it. Use std::move on local APInts once they are no longer needed so we can reuse their allocations. Lastly, use operator+=(uint64_t) instead of adding 1 to an APInt twice creating a new APInt each time.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302335
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Craig Topper [Sat, 6 May 2017 05:22:56 +0000 (05:22 +0000)]
[SCEV] Use std::move to avoid some APInt copies.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302334
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Craig Topper [Sat, 6 May 2017 05:15:11 +0000 (05:15 +0000)]
[SCEV] Use APInt's uint64_t operations instead of creating a temporary APInt to hold 1.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302333
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Craig Topper [Sat, 6 May 2017 05:15:09 +0000 (05:15 +0000)]
[SCEV] Avoid a couple APInt copies by capturing by reference since the method returns a reference.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302332
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Craig Topper [Sat, 6 May 2017 03:35:15 +0000 (03:35 +0000)]
[LazyValueInfo] Avoid unnecessary copies of ConstantRanges
Summary:
ConstantRange contains two APInts which can allocate memory if their width is larger than 64-bits. So we shouldn't copy it when we can avoid it.
This changes LVILatticeVal::getConstantRange() to return its internal ConstantRange by reference. This allows many places that just need a ConstantRange reference to avoid making a copy.
Several places now capture the return value of getConstantRange() by reference so they can call methods on it that don't need a new object.
Lastly it adds std::move in one place to capture to move a local ConstantRange into an LVILatticeVal.
Reviewers: reames, dberlin, sanjoy, anna
Reviewed By: reames
Subscribers: grandinj, llvm-commits
Differential Revision: https://reviews.llvm.org/D32884
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302331
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Kamil Rytarowski [Sat, 6 May 2017 02:45:42 +0000 (02:45 +0000)]
Note addition of NetBSD support in googletest
Recreated patch for __NetBSD__ has been pushed upstream to Google.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302329
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Kostya Serebryany [Fri, 5 May 2017 23:14:40 +0000 (23:14 +0000)]
[sanitizer-coverage] implement -fsanitize-coverage=no-prune,... instead of a hidden -mllvm flag. llvm part.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302319
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Quentin Colombet [Fri, 5 May 2017 22:48:22 +0000 (22:48 +0000)]
[RegisterBankInfo] Uniquely allocate instruction mapping.
This is a step toward having statically allocated instruciton mapping.
We are going to tablegen them eventually, so let us reflect that in
the API.
NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302316
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Craig Topper [Fri, 5 May 2017 22:46:40 +0000 (22:46 +0000)]
[BitVector] Improve the description of the BitVector::clear to say it removes the bits rather than clearing since clearing could be interpreted as just zeroing. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302315
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Craig Topper [Fri, 5 May 2017 22:31:11 +0000 (22:31 +0000)]
Fix spelling error in command line option description. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302311
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Eugene Zelenko [Fri, 5 May 2017 22:30:37 +0000 (22:30 +0000)]
[IR] Fix some Clang-tidy modernize-use-using warnings; other minor fixes (NFC).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302310
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Easwaran Raman [Fri, 5 May 2017 22:15:09 +0000 (22:15 +0000)]
Override invalidate of ProfileSummaryInfo to return false.
Differential revision: https://reviews.llvm.org/D32775
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302308
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Krzysztof Parzyszek [Fri, 5 May 2017 22:13:57 +0000 (22:13 +0000)]
[Hexagon] Disable predicated calls by default
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302307
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Krzysztof Parzyszek [Fri, 5 May 2017 22:12:12 +0000 (22:12 +0000)]
[Hexagon] Remove C6 and C7 as separate registers
These are M0 and M1. Removing duplicated registers reduces the number
of explicit register aliasing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302306
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Krzysztof Parzyszek [Fri, 5 May 2017 22:10:32 +0000 (22:10 +0000)]
[RDF] Remove covered parts of reached uses for phi and use in same block
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302305
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Matthias Braun [Fri, 5 May 2017 22:04:05 +0000 (22:04 +0000)]
ARM: Compute MaxCallFrame size early
This exposes a method in MachineFrameInfo that calculates
MaxCallFrameSize and calls it after instruction selection in the ARM
target.
This avoids
ARMBaseRegisterInfo::canRealignStack()/ARMFrameLowering::hasReservedCallFrame()
giving different answers in early/late phases of codegen.
The testcase shows a particular nasty example result of that where we
would fail to properly align an alloca.
Differential Revision: https://reviews.llvm.org/D32622
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302303
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Zachary Turner [Fri, 5 May 2017 22:02:37 +0000 (22:02 +0000)]
[CodeView] Reserve TypeDatabase records up front.
Most of the time we know exactly how many type records we
have in a list, and we want to use the visitor to deserialize
them into actual records in a database. Previously we were
just using push_back() every time without reserving the space
up front in the vector. This is obviously terrible from a
performance standpoint, and it's not uncommon to have PDB
files with half a million type records, where the performance
degredation was quite noticeable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302302
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Matthias Braun [Fri, 5 May 2017 21:50:26 +0000 (21:50 +0000)]
Add missing target triple to test
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302301
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Zachary Turner [Fri, 5 May 2017 21:25:31 +0000 (21:25 +0000)]
Fix -Wreorder warning.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302294
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Zachary Turner [Fri, 5 May 2017 21:15:31 +0000 (21:15 +0000)]
[StreamArray] Pipe the Offset through the constructor.
When randomly accessing an element by offset, we weren't passing
the offset through so if you called .offset() it would return a
value of 0.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302292
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Kannan Narayanan [Fri, 5 May 2017 21:10:17 +0000 (21:10 +0000)]
[AMDGPU] In the new waitcnt insertion pass, use getHeader
instead of getTopBlock to find the loop header.
Differential Revision: https://reviews.llvm.org/D32831
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302290
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Matthias Braun [Fri, 5 May 2017 21:09:30 +0000 (21:09 +0000)]
MIParser/MIRPrinter: Compute block successors if not explicitely specified
- MIParser: If the successor list is not specified successors will be
added based on basic block operands in the block and possible
fallthrough.
- MIRPrinter: Adds a new `simplify-mir` option, with that option set:
Skip printing of block successor lists in cases where the
parser is guaranteed to reconstruct it. This means we still print the
list if some successor cannot be determined (happens for example for
jump tables), if the successor order changes or branch probabilities
being unequal.
Differential Revision: https://reviews.llvm.org/D31262
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302289
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Simon Pilgrim [Fri, 5 May 2017 20:53:52 +0000 (20:53 +0000)]
[X86] Use SDValue::getConstantOperandVal helper. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302286
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Matthias Braun [Fri, 5 May 2017 20:25:50 +0000 (20:25 +0000)]
TargetLibraryInfo: Introduce wcslen
wcslen is part of the C99 and C++98 standards.
- This introduces the function to TargetLibraryInfo.
- Also set attributes for wcslen in llvm::inferLibFuncAttributes().
Differential Revision: https://reviews.llvm.org/D32837
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302278
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Konstantin Zhuravlyov [Fri, 5 May 2017 20:13:55 +0000 (20:13 +0000)]
AMDGPU/AMDHSA: Set COMPUTE_PGM_RSRC2:LDS_SIZE to 0
This field is populated by the CP
Differential Revision: https://reviews.llvm.org/D32619
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302277
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Reid Kleckner [Fri, 5 May 2017 18:30:34 +0000 (18:30 +0000)]
Simplify dbg.value handling in SDISel with early returns
No functional change other than improving dbgs logging accuracy on
constant dbg values. Previously we would add things like "i32 42" as
debug values, and then log that we were dropping the debug info, which
is silly.
Delete some dead code that was checking for static allocas. This
remained after r207165, but served no purpose. Currently, static alloca
dbg.values are always sent through the DanglingDebugInfoMap, and are
usually made valid the first time the alloca is used.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302267
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Sam Clegg [Fri, 5 May 2017 18:12:34 +0000 (18:12 +0000)]
[WebAssembly] Add ObjectYAML support for wasm name section
Differential Revision: https://reviews.llvm.org/D32841
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302266
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Alexei Starovoitov [Fri, 5 May 2017 18:05:00 +0000 (18:05 +0000)]
[bpf] fix a bug which causes incorrect big endian reloc fixup
o Add bpfeb support in BPF dwarfdump unit test case
Signed-off-by: Yonghong Song <yhs@fb.com>
Signed-off-by: Alexei Starovoitov <ast@fb.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302265
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Joerg Sonnenberger [Fri, 5 May 2017 17:57:45 +0000 (17:57 +0000)]
Add NetBSD to the list of platforms supporting death tests. Two unit
tests require this for compilation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302264
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