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Reid Kleckner [Tue, 11 Sep 2018 22:02:31 +0000 (22:02 +0000)]
Apply local fixes intended to be part of r341999.'
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342000
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Reid Kleckner [Tue, 11 Sep 2018 22:00:50 +0000 (22:00 +0000)]
[codeview] Decode and dump FP regs from S_FRAMEPROC records
Summary:
There are two registers encoded in the S_FRAMEPROC flags: one for locals
and one for parameters. The encoding is described by the
ExpandEncodedBasePointerReg function in cvinfo.h. Two bits are used to
indicate one of four possible values:
0: no register - Used when there are no variables.
1: SP / standard - Variables are stored relative to the standard SP
for the ISA.
2: FP - Variables are addressed relative to the ISA frame
pointer, i.e. EBP on x86. If realignment is required, parameters
use this. If a dynamic alloca is used, locals will be EBP relative.
3: Alternative - Variables are stored relative to some alternative
third callee-saved register. This is required to address highly
aligned locals when there are dynamic stack adjustments. In this
case, both the incoming SP saved in the standard FP and the current
SP are at some dynamic offset from the locals. LLVM uses ESI in
this case, MSVC uses EBX.
Most of the changes in this patch are to pass around the CPU so that we
can decode these into real, named architectural registers.
Subscribers: hiraditya
Differential Revision: https://reviews.llvm.org/D51894
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341999
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Alexander Shaposhnikov [Tue, 11 Sep 2018 22:00:47 +0000 (22:00 +0000)]
[object] Improve the performance of getSymbols used by ArchiveWriter
In this diff we adjust the code of getSymbols to avoid creating LLVMContext when it's not necessary.
Without this patch when the function getSymbols was called on a MachO object with a __bitcode section
it was parsing the embedded bitcode and then ignoring the result.
Test plan: make check-all
Differential revision: https://reviews.llvm.org/D51759
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341998
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Sanjay Patel [Tue, 11 Sep 2018 22:00:15 +0000 (22:00 +0000)]
[InstCombine] add folds for icmp with xor mask constant
These are the folds in Alive;
Name: xor_ult
Pre: isPowerOf2(-C1)
%xor = xor i8 %x, C1
%r = icmp ult i8 %xor, C1
=>
%r = icmp ugt i8 %x, ~C1
Name: xor_ugt
Pre: isPowerOf2(C1+1)
%xor = xor i8 %x, C1
%r = icmp ugt i8 %xor, C1
=>
%r = icmp ugt i8 %x, C1
https://rise4fun.com/Alive/Vty
The ugt case in its simplest form was already handled by DemandedBits,
but that's not ideal as shown in the multi-use test.
I'm not sure if these are all of the symmetrical folds, but I adjusted
the existing code for one of the folds to try to show the similarities.
There's no obvious connection, but this is another preliminary step
for PR14613...
https://bugs.llvm.org/show_bug.cgi?id=14613
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341997
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Michael Berg [Tue, 11 Sep 2018 21:35:32 +0000 (21:35 +0000)]
add IR flags to MI
Summary: Initial support for nsw, nuw and exact flags in MI
Reviewers: spatel, hfinkel, wristow
Reviewed By: spatel
Subscribers: nlopes
Differential Revision: https://reviews.llvm.org/D51738
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341996
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Matt Morehouse [Tue, 11 Sep 2018 21:15:41 +0000 (21:15 +0000)]
Revert "[SanitizerCoverage] Create comdat for global arrays."
This reverts r341987 since it will cause trouble when there's a module
ID collision.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341995
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Sanjay Patel [Tue, 11 Sep 2018 21:13:20 +0000 (21:13 +0000)]
[InstCombine] add tests for icmp with xor; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341993
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Reid Kleckner [Tue, 11 Sep 2018 21:02:03 +0000 (21:02 +0000)]
[Support] Quote arguments containing \n on Windows
Fixes at_file.c test failure caused by r341988. We may want to change
how we treat \n in our tokenizer, but this is probably a good fix
regardless, since we can invoke all kinds of programs with different
interpretations of the command line quoting rules.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341992
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Reid Kleckner [Tue, 11 Sep 2018 20:22:39 +0000 (20:22 +0000)]
[Support] Avoid calling CommandLineToArgvW from shell32.dll
Summary:
Shell32.dll depends on gdi32.dll and user32.dll, which are mostly DLLs
for Windows GUI functionality. LLVM's utilities don't typically need GUI
functionality, and loading these DLLs seems to be slowing down startup.
Also, we already have an implementation of Windows command line
tokenization in cl::TokenizeWindowsCommandLine, so we can just use it.
The goal is to get the original argv in UTF-8, so that it can pass
through most LLVM string APIs. A Windows process starts life with a
UTF-16 string for its command line, and it can be retreived with
GetCommandLineW from kernel32.dll.
Previously, we would:
1. Get the wide command line
2. Call CommandLineToArgvW to handle quoting rules and separate it into
arguments.
3. For each wide argument, expand wildcards (* and ?) using
FindFirstFileW.
4. Convert each argument to UTF-8
Now we:
1. Get the wide command line, convert the whole thing to UTF-8
2. Tokenize the UTF-8 command line with cl::TokenizeWindowsCommandLine
3. For each argument, expand wildcards if present
- This requires converting back to UTF-16 to call FindFirstFileW
- Results of FindFirstFileW must be converted back to UTF-8
Reviewers: zturner
Subscribers: hiraditya, llvm-commits
Differential Revision: https://reviews.llvm.org/D51941
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341988
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Matt Morehouse [Tue, 11 Sep 2018 20:10:40 +0000 (20:10 +0000)]
[SanitizerCoverage] Create comdat for global arrays.
Summary:
Place global arrays in comdat sections with their associated functions.
This makes sure they are stripped along with the functions they
reference, even on the BFD linker.
Reviewers: eugenis
Reviewed By: eugenis
Subscribers: eraman, hiraditya, llvm-commits
Differential Revision: https://reviews.llvm.org/D51902
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341987
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Alina Sbirlea [Tue, 11 Sep 2018 19:19:21 +0000 (19:19 +0000)]
Update MemorySSA in LoopUnswitch.
Summary:
Update MemorySSA in old LoopUnswitch pass.
Actual dependency and update is disabled by default.
Subscribers: sanjoy, jlebar, Prazek, llvm-commits
Differential Revision: https://reviews.llvm.org/D45301
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341984
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Konstantin Zhuravlyov [Tue, 11 Sep 2018 18:56:51 +0000 (18:56 +0000)]
AMDGPU: Move isa version and EF_AMDGPU_MACH_* determination
into TargetParser.
Also switch away from target features to CPU string when
determining isa version. This fixes an issue when we
output wrong isa version in the object code when features
of a particular CPU are altered (i.e. gfx902 w/o xnack
used to result in gfx900).
Differential Revision: https://reviews.llvm.org/D51890
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341982
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Sanjay Patel [Tue, 11 Sep 2018 18:49:00 +0000 (18:49 +0000)]
[InstCombine] enhance vector demanded elements to look at a vector select condition operand
I noticed that we were not back-propagating undef lanes to shuffle masks when we have a
shuffle that reduces the vector width. This is part of investigating/solving PR38691:
https://bugs.llvm.org/show_bug.cgi?id=38691
The DAG equivalent was proposed with:
D51696
Differential Revision: https://reviews.llvm.org/D51433
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341981
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Matt Davis [Tue, 11 Sep 2018 18:47:48 +0000 (18:47 +0000)]
[llvm-mca] Delay calculation of Cycles per Resources, separate the cycles and resource quantities.
Summary:
This patch removes the storing of accumulated floating point data
within the llvm-mca library.
This patch splits-up the two quantities: cycles and number of resource units.
By splitting-up these two quantities, we delay the calculation of "cycles per resource unit"
until that value is read, reducing the chance of accumulating floating point error.
I considered using the APFloat, but after measuring performance, for a large (many iteration)
sample, I decided to go with this faster solution.
Reviewers: andreadb, courbet, RKSimon
Reviewed By: andreadb
Subscribers: llvm-commits, javed.absar, tschuett, gbedwell
Differential Revision: https://reviews.llvm.org/D51903
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341980
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Sanjay Patel [Tue, 11 Sep 2018 18:45:28 +0000 (18:45 +0000)]
[InstCombine] add tests for add-with-overflow compares; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341979
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Vedant Kumar [Tue, 11 Sep 2018 18:38:34 +0000 (18:38 +0000)]
[gcov] Fix branch counters with switch statements (fix PR38821)
Right now, the counters are added in regards of the number of successors
for a given BasicBlock: it's good when we've only 1 or 2 successors (at
least with BranchInstr). But in the case of a switch statement, the
BasicBlock after switch has several predecessors and we need know from
which BB we're coming from.
So the idea is to revert what we're doing: add a PHINode in each block
which will select the counter according to the incoming BB. They're
several pros for doing that:
- we fix the "switch" bug
- we remove the function call to "__llvm_gcov_indirect_counter_increment"
and the lookup table stuff
- we replace by PHINodes, so the optimizer will probably makes a better
job.
Patch by calixte!
Differential Revision: https://reviews.llvm.org/D51619
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341977
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Xin Tong [Tue, 11 Sep 2018 18:06:03 +0000 (18:06 +0000)]
Add some context to fatal verifier errors
Summary: Add function name when verification fails as an initial breadcrumb for debugging.
Patch by David Callahan.
Reviewers: mehdi_amini, modocache
Reviewed By: modocache
Subscribers: llvm-commits, modocache
Differential Revision: https://reviews.llvm.org/D51386
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341974
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Craig Topper [Tue, 11 Sep 2018 17:57:27 +0000 (17:57 +0000)]
[X86] Prefer unpckhpd over movhlps in isel for fake unary cases
In r337348, I changed lowering to prefer X86ISD::UNPCKL/UNPCKH opcodes over MOVLHPS/MOVHLPS for v2f64 {0,0} and {1,1} shuffles when we have SSE2. This enabled the removal of a bunch of weirdly bitcasted isel patterns in r337349. To avoid changing the tests I placed a gross hack in isel to still emit movhlps instructions for fake unary unpckh nodes. A similar hack was not needed for unpckl and movlhps because we do execution domain switching for those. But unpckh and movhlps have swapped operand order.
This patch removes the hack.
This is a code size increase since unpckhpd requires a 0x66 prefix and movhlps does not. But if that's a big concern we should be using movhlps for all unpckhpd opcodes and let commuteInstruction turnit into unpckhpd when its an advantage.
Differential Revision: https://reviews.llvm.org/D49499
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341973
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Craig Topper [Tue, 11 Sep 2018 17:57:23 +0000 (17:57 +0000)]
[X86] Teach X86FastISel::X86SelectRet to use EAX for the sret pointer in GNUX32
GNUX32 uses 32-bit pointers despite is64BitMode being true. So we should use EAX to return the value.
Fixes ones of the failures from PR38865.
Differential Revision: https://reviews.llvm.org/D51940
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341972
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Craig Topper [Tue, 11 Sep 2018 17:57:20 +0000 (17:57 +0000)]
[InstCombine] Fix incorrect usage of getPrimitiveSizeInBits when we should be using the element size for vectors
For vectors, getPrimitiveSizeInBits returns the full vector width. This code should using the element size for vectors. This could be fixed by calling getScalarSizeInBits, but its even easier to just get it from the APInt we're checking.
Differential Revision: https://reviews.llvm.org/D51938
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341971
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Florian Hahn [Tue, 11 Sep 2018 17:55:58 +0000 (17:55 +0000)]
[CallSiteSplitting] Add debug location to created PHI nodes.
There are 2 cases when we create PHI nodes:
* For the result of the call that was duplicated in the split blocks.
Those PHI nodes should have the debug location of the call.
* For values produced before the call. Those instructions need to be
duplicated in the split blocks and the PHI nodes should have the
debug locations of those instructions.
Fixes PR37962.
Reviewers: junbuml, gbedwell, vsk
Reviewed By: junbuml
Tags: #debug-info
Differential Revision: https://reviews.llvm.org/D51919
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341970
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Josh Stone [Tue, 11 Sep 2018 17:52:01 +0000 (17:52 +0000)]
[GlobalISel] Lower dbg.declare into indirect DBG_VALUE
Summary:
D31439 changed the semantics of dbg.declare to take the address of a
variable as the first argument, making it indirect. It specifically
updated FastISel for this change here:
https://reviews.llvm.org/D31439#change-WVArzi177jPl
GlobalISel needs to follow suit, or else it will be missing a level of
indirection in the generated debuginfo. This problem was seen in a Rust
debuginfo test on aarch64, since GlobalISel is used at -O0 for aarch64.
https://github.com/rust-lang/rust/issues/49807
https://bugzilla.redhat.com/show_bug.cgi?id=
1611597
https://bugzilla.redhat.com/show_bug.cgi?id=
1625768
Reviewers: dblaikie, aprantl, t.p.northover, javed.absar, rnk
Reviewed By: rnk
Subscribers: #debug-info, rovka, kristof.beyls, JDevlieghere, llvm-commits, tstellar
Differential Revision: https://reviews.llvm.org/D51749
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341969
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Johannes Doerfert [Tue, 11 Sep 2018 17:49:43 +0000 (17:49 +0000)]
[LoopInfo][FIX] Remove leftover dump in unit test
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341968
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Josh Stone [Tue, 11 Sep 2018 17:28:43 +0000 (17:28 +0000)]
Test commit: remove trailing whitespace
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341966
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Matt Morehouse [Tue, 11 Sep 2018 17:20:14 +0000 (17:20 +0000)]
Revert "[SanitizerCoverage] Create comdat for global arrays."
This reverts r341951 due to bot breakage.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341965
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Craig Topper [Tue, 11 Sep 2018 16:51:26 +0000 (16:51 +0000)]
[InstCombine] Use dyn_cast instead of match(m_Constant). NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341962
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Craig Topper [Tue, 11 Sep 2018 16:51:24 +0000 (16:51 +0000)]
[InstCombine] Support (mul (sext x), cst) --> (sext (mul x, cst')) and (mul (zext x), cst) --> (zext (mul x, cst')) for vectors constants.
Similar to D51236, but for mul instead of add.
Differential Revision: https://reviews.llvm.org/D51900
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341961
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Jessica Paquette [Tue, 11 Sep 2018 16:38:46 +0000 (16:38 +0000)]
[NFC] Fix typo in comment
Fore -> For
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341960
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Jessica Paquette [Tue, 11 Sep 2018 16:33:46 +0000 (16:33 +0000)]
[MachineOutliner][NFC] Factor out instruction mapping into its own function
Just some tidy-up. Pull the mapper stuff into `populateMapper`. This makes it
a bit easier to read what's going on in `runOnModule`.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341959
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Craig Topper [Tue, 11 Sep 2018 16:05:03 +0000 (16:05 +0000)]
[X86] Correct the one use check from r341915.
The one use check should be on the bitcast, not the input to the bitcast.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341956
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Alexandros Lamprineas [Tue, 11 Sep 2018 15:55:45 +0000 (15:55 +0000)]
[GVNHoist] Re-enable GVNHoist by default
Rebase rL340922 since https://bugs.llvm.org/show_bug.cgi?id=38807
has been fixed by rL341947.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341954
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Roman Lebedev [Tue, 11 Sep 2018 15:34:26 +0000 (15:34 +0000)]
[DagCombine][NFC] Some more tests fo for X % C == 0 (UREM case) transform
For https://reviews.llvm.org/D50222
Patch by: hermord (Dmytro Shynkevych)!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341953
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Simon Atanasyan [Tue, 11 Sep 2018 15:32:47 +0000 (15:32 +0000)]
[MIPS] Fix illegal type assert in single-float mode
An fp_to_sint node would be incorrectly lowered to a TruncIntFP node in
single-float mode. This would trigger an "Unexpected illegal type!"
assert.
Patch by Dan Ravensloft.
Differential revision: https://reviews.llvm.org/D51810
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341952
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Matt Morehouse [Tue, 11 Sep 2018 15:23:14 +0000 (15:23 +0000)]
[SanitizerCoverage] Create comdat for global arrays.
Summary:
Place global arrays in comdat sections with their associated functions.
This makes sure they are stripped along with the functions they
reference, even on the BFD linker.
Reviewers: eugenis
Reviewed By: eugenis
Subscribers: eraman, hiraditya, llvm-commits
Differential Revision: https://reviews.llvm.org/D51902
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341951
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Alexandros Lamprineas [Tue, 11 Sep 2018 14:29:59 +0000 (14:29 +0000)]
[MemorySSAUpdater] Avoid creating self-referencing MemoryDefs
Fix for https://bugs.llvm.org/show_bug.cgi?id=38807, which occurred
while compiling SemaTemplateInstantiate.cpp with clang and GVNHoist
enabled. In the following example:
1=def(entry)
/ \
2=def(1) 4=def(1)
3=def(2) 5=def(4)
When removing the MemoryDef 2=def(1) from its basic block, and just
before adding it to the end of the parent basic block, we first
replace all its uses with the defining memory access:
3=def(2) -> 3=def(1)
Then we call insertDef for adding 2=def(1) to the parent basic block,
where we replace the uses of 1=def(entry) with 2=def(1). Doing so we
create a self reference:
2=def(1) -> 2=def(2) (bad)
3=def(1) -> 3=def(2) (ok)
4=def(1) -> 4=def(2) (ok)
Differential Revision: https://reviews.llvm.org/D51801
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341947
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Nico Weber [Tue, 11 Sep 2018 14:11:52 +0000 (14:11 +0000)]
pdb output: Initialize padding in PublicsStreamHeader.
Makes the produced pdbs more deterministic; before they'd contain 2 arbitary
bytes where this padding was.
Also reorder initialization to match the order of the fields in the struct (nfc)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341945
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Nico Weber [Tue, 11 Sep 2018 14:10:33 +0000 (14:10 +0000)]
Make malformed-machos.test pass on my Mac.
For some reason, llvm-objdump defaults to -arch=i386 on this system while
the test checks x86_64 output. Explicitly pass -arch=x86_64.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341944
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Roman Lebedev [Tue, 11 Sep 2018 14:06:14 +0000 (14:06 +0000)]
[Hexagon] [Test] Remove undef and infinite loop from test
Summary:
The undef and the infinite loop at the end cause this test to be translated
unpredictably. In particular, the checked-for `mpy` disappears under
certain legal optimizations (e.g. the one in D50222).
Since the use of these constructs is not relevant to the behavior tested,
according to the header comment, this change, suggested by @kparzysz,
eliminates them.
Was initially committed in r341046, but was reverted.
Patch by: hermord (Dmytro Shynkevych)!
Reviewers: kparzysz
Reviewed By: kparzysz
Subscribers: lebedev.ri, llvm-commits, kparzysz
Differential Revision: https://reviews.llvm.org/D50944
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341943
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Sam Parker [Tue, 11 Sep 2018 14:01:22 +0000 (14:01 +0000)]
[ARM] Add smlald support in ARMParallelDSP
Search from i64 reducing phis, as well as i32, to allow the
generation of smlald instructions.
Differential Revision: https://reviews.llvm.org/D51101
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341941
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Sanjay Patel [Tue, 11 Sep 2018 13:21:28 +0000 (13:21 +0000)]
[AArch64] test codegen for unsigned saturated add; NFC
This is identical to the tests added for x86 at rL341845.
A semi-generic DAGCombine should improve things universally.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341935
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Petar Jovanovic [Tue, 11 Sep 2018 13:10:04 +0000 (13:10 +0000)]
[MIPS] ORC JIT support
This patch adds support for ORC JIT for mips/mips64 architecture.
In common code $static is changed to __ORCstatic because on MIPS
architecture "$" is a reserved character.
Patch by Luka Ercegovcevic
Differential Revision: https://reviews.llvm.org/D49665
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341934
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Sam Parker [Tue, 11 Sep 2018 12:45:43 +0000 (12:45 +0000)]
[ARM] Enable ARMCodeGenPrepare by default
We've had the pass enabled downstream for a couple of weeks and it
seems to be okay, so enable it by default.
Differential Revision: https://reviews.llvm.org/D51920
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341932
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Alexander Timofeev [Tue, 11 Sep 2018 11:56:50 +0000 (11:56 +0000)]
[AMDGPU] Preliminary patch for divergence driven instruction selection. Immediate selection predicate changed
Differential revision: https://reviews.llvm.org/D51734
Reviewers: rampitec
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341928
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Johannes Doerfert [Tue, 11 Sep 2018 11:51:29 +0000 (11:51 +0000)]
[FuncAttrs] Remove "access range attributes" for read-none functions
The presence of readnone and an access range attribute (argmemonly,
inaccessiblememonly, inaccessiblemem_or_argmemonly) is considered an
error by the verifier. This seems strict but also not wrong. This
patch makes sure function attribute detection will remove all access
range attributes for readnone functions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341927
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Johannes Doerfert [Tue, 11 Sep 2018 11:44:17 +0000 (11:44 +0000)]
[LoopInfo] Fix Loop::getLoopID() for loops with multiple latches
The previous implementation traversed all loop blocks and bailed if one
was not a latch block. Since we are only interested in latch blocks, we
should only traverse those.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341926
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Simon Atanasyan [Tue, 11 Sep 2018 09:57:25 +0000 (09:57 +0000)]
[mips] Add a pattern for 64-bit GPR variant of the `rdhwr` instruction
MIPS ISAs start to support third operand for the `rdhwr` instruction
starting from Revision 6. But LLVM generates assembler code with
three-operands version of this instruction on any MIPS64 ISA. The third
operand is always zero, so in case of direct code generation we get
correct code.
This patch fixes the bug by adding an instruction alias. The same alias
already exists for 32-bit ISA.
Ideally, we also need to reject three-operands version of the `rdhwr`
instruction in an assembler code if ISA revision is less than 6. That is
a task for a separate patch.
This fixes PR38861 (https://bugs.llvm.org/show_bug.cgi?id=38861)
Differential revision: https://reviews.llvm.org/D51773
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341919
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Max Kazantsev [Tue, 11 Sep 2018 08:46:19 +0000 (08:46 +0000)]
[NFC] Sanitizing asserts for OrderedBasicBlock
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341917
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Craig Topper [Tue, 11 Sep 2018 08:20:02 +0000 (08:20 +0000)]
[X86] In combineMOVMSK, look through int->fp bitcasts before callling SimplifyDemandedBits.
MOVMSKPS and MOVMSKPD both take FP types, but likely the operations before it are on integer types with just a int->fp bitcast between them. If the bitcast isn't used by anything else and doesn't change the element width we can look through it to simplify the integer ops.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341915
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Dean Michael Berris [Tue, 11 Sep 2018 08:03:30 +0000 (08:03 +0000)]
[XRay] Ensure lambda outlives llvm::function_ref
Follow-up to D51912.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341912
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Dean Michael Berris [Tue, 11 Sep 2018 07:27:59 +0000 (07:27 +0000)]
[XRay] Write the TSC along with CPUID
Fixes builds in non-little-endian systems.
This is a follow-up to D51911.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341909
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Craig Topper [Tue, 11 Sep 2018 07:23:29 +0000 (07:23 +0000)]
[X86] Add test cases inspired by PR38840.
These are test cases inspired by sequences like below for extracting the same bit from every vector element and checking for all zeros/ones.
define i1 @and256_x8(<8 x i32>) {
%a = trunc <8 x i32> %0 to <8 x i1>
%b = bitcast <8 x i1> %a to i8
%d = icmp eq i8 %b, -1
ret i1 %d
}
This is what the above looks like after InstCombine.
define i1 @and256_x8_opt(<8 x i32>) {
%2 = and <8 x i32> %0, <i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1>
%a = icmp ne <8 x i32> %2, zeroinitializer
%b = bitcast <8 x i1> %a to i8
%d = icmp eq i8 %b, -1
ret i1 %d
}
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341908
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Dean Michael Berris [Tue, 11 Sep 2018 06:45:59 +0000 (06:45 +0000)]
[XRay] Use FDR Records+Visitors for Trace Loading
Summary:
In this change, we overhaul the implementation for loading
`llvm::xray::Trace` objects from files by using the combination of
specific FDR Record types and visitors breaking up the logic to
reconstitute an execution trace from flight-data recorder mode traces.
This change allows us to handle out-of-temporal order blocks as written
in files, and more consistently recreate an execution trace spanning
multiple blocks and threads. To do this, we use the `WallclockRecord`
associated with each block to maintain temporal order of blocks, before
attempting to recreate an execution trace.
The new addition in this change is the `TraceExpander` type which can be
thought of as a decompression/decoding routine. This allows us to
maintain the state of an execution environment (thread+process) and
create `XRayRecord` instances that fit nicely into the `Trace`
container. We don't have a specific unit test for the TraceExpander
type, since the end-to-end tests for the `llvm-xray convert` tools
already cover precisely this codepath.
This change completes the refactoring started with D50441.
Depends on D51911.
Reviewers: mboerger, eizan
Subscribers: mgorny, hiraditya, mgrang, llvm-commits
Differential Revision: https://reviews.llvm.org/D51912
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341906
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Dean Michael Berris [Tue, 11 Sep 2018 06:36:51 +0000 (06:36 +0000)]
[XRay] Add TSC to NewCPUId Records
Summary:
This more correctly reflects the data written by the FDR mode runtime.
This is a continuation of the work in D50441.
Reviewers: mboerger, eizan
Subscribers: hiraditya, llvm-commits
Differential Revision: https://reviews.llvm.org/D51911
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341905
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Max Kazantsev [Tue, 11 Sep 2018 06:34:43 +0000 (06:34 +0000)]
[NFC] Specify test's option to reduce reliance on defaults
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341904
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Max Kazantsev [Tue, 11 Sep 2018 05:10:01 +0000 (05:10 +0000)]
[NFC] Rename variable
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341901
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JF Bastien [Tue, 11 Sep 2018 04:52:21 +0000 (04:52 +0000)]
NCF: use bit_cast in IntervalMap
This use is sketchy because it basically reinterprets a pointer to another pointer, but right now it's hiding in a union. After this change it'll be easy to grep for bit_cast of a pointer and un-sketch things if we want. This patch therefore obeys the law of conservation of sketch, with minor improvement.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341900
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Heejin Ahn [Tue, 11 Sep 2018 04:48:08 +0000 (04:48 +0000)]
[XRay] Add missing LLVMTestingSupport target_link_libraries
Without this builds with `-DLLVM_LINK_LLVM_DYLIB=ON` fail.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341899
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Matt Arsenault [Tue, 11 Sep 2018 04:39:16 +0000 (04:39 +0000)]
AMDGPU: Fix r600 test
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341898
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JF Bastien [Tue, 11 Sep 2018 04:08:05 +0000 (04:08 +0000)]
NFC: use bit_cast more in AArch64AddressingModes
The was previously committed as r341749 then reverted as r341750 because
bit_cast needed to do its own thing to check is_trivially_copyable on GCC 4.x.
This is now done and std;:array should now get accepted.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341897
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Serguei Katkov [Tue, 11 Sep 2018 04:07:36 +0000 (04:07 +0000)]
[LICM] Avoid duplicate work during building AliasSetTracker
Currently we re-use cached info from sub loops or traverse them
to populate AliasSetTracker. But after that we traverse all basic blocks
from the current loop. This is redundant work.
All what we need is traversing the all basic blocks from the loop except
those which are used to get the data from the cache.
This should improve compile time only.
Reviewers: mkazantsev, reames, kariddi, anna
Reviewed By: reames
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D51715
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341896
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Matt Arsenault [Tue, 11 Sep 2018 04:00:49 +0000 (04:00 +0000)]
AMDGPU: Remove leftovers from configurable address spaces
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341895
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Matt Arsenault [Tue, 11 Sep 2018 04:00:41 +0000 (04:00 +0000)]
AMDGPU: Don't error on out of bounds address spaces
We should never abort on valid IR. The most reasonable
interpretation of an arbitrary address space pointer is
probably some kind of special subset of global memory.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341894
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Max Kazantsev [Tue, 11 Sep 2018 03:57:22 +0000 (03:57 +0000)]
[IndVars][NFC] Refactor to make modifications of Changed transparent
IndVarSimplify's design is somewhat odd in the way how it reports that
some transform has made a change. It has a `Changed` field which can
be set from within any function, which makes it hard to track whether or
not it was set properly after a transform was made. It leads to oversights
in setting this flag where needed, see example in PR38855.
This patch removes the `Changed` field, turns it into a local and unifies
the signatures of all relevant transform functions to return boolean value
which designates whether or not this transform has made a change.
Differential Revision: https://reviews.llvm.org/D51850
Reviewed By: skatkov
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341893
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Philip Reames [Tue, 11 Sep 2018 03:28:28 +0000 (03:28 +0000)]
[LICM] (re-)simplify code using MemoryLocation API [NFC]
I'd made exactly this same change before, but it appears to have been accidentally reverted in another change. (I'm assuming accidental since it was without comment or test case, and in an unrelated change.)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341892
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David Blaikie [Tue, 11 Sep 2018 02:04:45 +0000 (02:04 +0000)]
llvm-symbolizer: Fix bug related to TUs interfering with symbolizing
With the merge of TUs and CUs into a single container, some code that
relied on the CU range having an ordered range of contiguous addresses
(for locating a CU at a given offset) broke. But the units from
debug_info (currently only CUs, but CUs and TUs in DWARFv5) are in a
contiguous sub-range of that container - searching only through that
subrange is still valid & so do that.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341889
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Peter Collingbourne [Tue, 11 Sep 2018 01:53:36 +0000 (01:53 +0000)]
Prevent Constant Folding From Optimizing inrange GEP
This patch does the following things:
1. update SymbolicallyEvaluateGEP so that it bails out if it cannot preserve inrange arribute;
2. update llvm/test/Analysis/ConstantFolding/gep.ll to remove UB in it;
3. remove inaccurate comment above ConstantFoldInstOperandsImpl in llvm/lib/Analysis/ConstantFolding.cpp;
4. add a new regression test that makes sure that no optimizations change an inrange GEP in an unexpected way.
Patch by Zhaomo Yang!
Differential Revision: https://reviews.llvm.org/D51698
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341888
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Dean Michael Berris [Tue, 11 Sep 2018 00:22:53 +0000 (00:22 +0000)]
[XRay] Add the `llvm-xray fdr-dump` implementation
Summary:
In this change, we implement a `BlockPrinter` which orders records in a
Block that's been indexed by the `BlockIndexer`. This is used in the
`llvm-xray fdr-dump` tool which ties together the various types and
utilities we've been working on, to allow for inspection of XRay FDR
mode traces both with and without verification.
This change is the final step of the refactoring of D50441.
Reviewers: mboerger, eizan
Subscribers: mgorny, hiraditya, llvm-commits
Differential Revision: https://reviews.llvm.org/D51846
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341887
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Jessica Paquette [Mon, 10 Sep 2018 23:53:08 +0000 (23:53 +0000)]
Add REQUIRES line to machine-size-remarks
Just was made aware that this is necessary for tests outside of
the X86 subdirectory. Add a REQUIRES line to make sure bots that
don't enable x86 are happy.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341885
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Craig Topper [Mon, 10 Sep 2018 23:48:21 +0000 (23:48 +0000)]
[InstCombine] Add testcases for (mul (sext x), cst) --> (sext (mul x, cst')) and (mul (zext x), cst) --> (zext (mul x, cst')) for vectors constants.
If the multiply won't overflow in the original type we can use a smaller mul and sign extend afterwards. We don't currently support this for vector constants.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341884
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Alina Sbirlea [Mon, 10 Sep 2018 23:47:21 +0000 (23:47 +0000)]
[InstCombine] Partially revert rL341674 due to PR38897.
Summary:
Revert min/max changes in rL341674 dues to high compile times causing timeouts (PR38897).
Checking in to unblock failing builds. Patch available for post-commit review and re-revert once resolved.
Working on a smaller reproducer for PR38897.
Reviewers: craig.topper, spatel
Subscribers: sanjoy, jlebar, llvm-commits
Differential Revision: https://reviews.llvm.org/D51897
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341883
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Jessica Paquette [Mon, 10 Sep 2018 23:30:53 +0000 (23:30 +0000)]
Explicitly state triple in machine-size-remarks.ll
A bot was unhappy with the x86 triple there before. Set it explicitly to
x86_64-apple-darwin just to get something consistent.
Example failure:
http://lab.llvm.org:8011/builders/llvm-hexagon-elf/builds/16846
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341882
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Philip Reames [Mon, 10 Sep 2018 23:14:30 +0000 (23:14 +0000)]
[AST] Add test coverage of memsets
Immediately after posting https://reviews.llvm.org/D51895, I noticed a small bug. These tests would have caught that.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341880
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Jessica Paquette [Mon, 10 Sep 2018 22:24:10 +0000 (22:24 +0000)]
Add size remarks to MachineFunctionPass
This adds per-function size remarks to codegen, similar to what we have in the
IR layer as of r341588. This only impacts MachineFunctionPasses.
This does the same thing, but for `MachineInstr`s instead of just
`Instructions`. After this, when a `MachineFunctionPass` modifies the number of
`MachineInstr`s in the function it ran on, you'll get a remark.
To enable this, use the size-info analysis remark as before.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341876
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Lang Hames [Mon, 10 Sep 2018 22:09:11 +0000 (22:09 +0000)]
[ORC] Render unresolved symbol addresses as "<not resolved>" in JITDylib::dump.
This is easier to spot among the real addresses than "0x0000000000000000".
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341873
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Lang Hames [Mon, 10 Sep 2018 22:08:57 +0000 (22:08 +0000)]
[ORC] Simplify LLJIT::Create by removing the ExecutionSession parameter.
The Create method can just construct the ExecutionSession, rather than having the
client pass it in.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341872
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Craig Topper [Mon, 10 Sep 2018 21:49:01 +0000 (21:49 +0000)]
[X89] Explicitly enable aes in aes-schedule.ll to fix failures after r341861.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341868
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JF Bastien [Mon, 10 Sep 2018 21:43:17 +0000 (21:43 +0000)]
Fix bit_cast properly
Mismatched braces.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341867
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JF Bastien [Mon, 10 Sep 2018 21:41:14 +0000 (21:41 +0000)]
Fix bit_cast __is_trivially_copyable
It's a function-like builtin, not a template.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341866
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JF Bastien [Mon, 10 Sep 2018 21:33:45 +0000 (21:33 +0000)]
[ADT] bit_cast: check for is_trivially_copyable more portably
Summary:
It turns out that isPodLike isn't a good workaround for is_trivially_copyable for bit_cast's purpose. In D51872 Louis points out that tuple and pair really aren't a good fit, and for bit_cast I want to capture array. This patch instead checks is_trivially_copyable directly in bit_cast for all but GCC 4.x. In GCC 4.x developers only check for sizeof match, which means any mistake they make will succeed locally and fail on the bots. Realistically that's few developers and they'll be left behind once we upgrade past C++11.
This will allow using bit_cast with std::array.
Subscribers: dexonsmith, llvm-commits, ldionne, rsmith
Differential Revision: https://reviews.llvm.org/D51888
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341865
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Zachary Turner [Mon, 10 Sep 2018 21:31:21 +0000 (21:31 +0000)]
Re-run clang-format on one file.
clang-format was getting confused due to the presence of a macro
invocation that was not terminated by a semicolon. Fixed this by
terminating the macro lines with semicolons and re-ran clang-format
on the file.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341864
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Zachary Turner [Mon, 10 Sep 2018 21:30:59 +0000 (21:30 +0000)]
[PDB] Change uint32_t to SymIndex wherever it makes sense.
Although it's just a typedef, it helps for readability. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341863
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Erich Keane [Mon, 10 Sep 2018 21:12:19 +0000 (21:12 +0000)]
Move FeatureAES from SLM, WSM and SNB to GLM and SKL
Complements https://reviews.llvm.org/D51510 and matches
https://gcc.gnu.org/ml/gcc-patches/2018-08/msg01940.html
GoldmontProc already has FeatureAES.
Patch By: thiagomacieira
Differential Revision: https://reviews.llvm.org/D51565
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341861
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Craig Topper [Mon, 10 Sep 2018 20:31:27 +0000 (20:31 +0000)]
[X86] Mark the ISD::SETLT/SETLE condition codes as illegal for v32i16/v64i8 to match the other vector types.
I'm having a hard time finding a test case for this, but we should be consistent here. The fact that we canonicalize all zeros and all ones constants to vXi32 and all other constants to loads makes this hard to hit the easy DAG combine infinite loop we get for some of the other types.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341859
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Stella Stamenova [Mon, 10 Sep 2018 20:24:05 +0000 (20:24 +0000)]
[lit] Disable shtest-timeout on Windows
Summary: This is the only test that is still failing on Windows - or rather, it is expected to fail on the bots, but passes on the new bot that we're preparing causing a failure, so I'm going to disable it. Since the test has rarely, if ever, passed on the bots, this should have the same effect and it will unblock the creation of the new bot.
Reviewers: asmith, delcypher, zturner
Subscribers: stella.stamenova, llvm-commits
Differential Revision: https://reviews.llvm.org/D51871
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341856
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Alina Sbirlea [Mon, 10 Sep 2018 20:13:01 +0000 (20:13 +0000)]
API to update MemorySSA for cloned blocks and added CFG edges.
Summary:
End goal is to update MemorySSA in all loop passes. LoopUnswitch clones all blocks in a loop. SimpleLoopUnswitch clones some blocks. LoopRotate clones some instructions.
Some of these loop passes also make CFG changes.
This is an API based on what I found needed in LoopUnswitch, SimpleLoopUnswitch, LoopRotate, LoopInstSimplify, LoopSimplifyCFG.
Adding dependent patches using this API for context.
Reviewers: george.burgess.iv, dberlin
Subscribers: sanjoy, jlebar, Prazek, llvm-commits
Differential Revision: https://reviews.llvm.org/D45299
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341855
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JF Bastien [Mon, 10 Sep 2018 19:56:42 +0000 (19:56 +0000)]
NFC: bit.h don't warn on strict aliasing for GCC <= 7.1
Summary: Addressed https://bugs.llvm.org/show_bug.cgi?id=38885
Subscribers: dexonsmith, llvm-commits, rsmith, steven_wu, RKSimon, Abhilash, srhines
Differential Revision: https://reviews.llvm.org/D51869
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341853
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Petr Hosek [Mon, 10 Sep 2018 19:34:44 +0000 (19:34 +0000)]
[ADT] Support converting to lowercase string in toHex
This is useful in certain use-cases such as D51833.
Differential Revision: https://reviews.llvm.org/D51835
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341852
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Krzysztof Parzyszek [Mon, 10 Sep 2018 18:49:16 +0000 (18:49 +0000)]
[Hexagon] Split large offsets into properly aligned addends
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341851
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Sanjay Patel [Mon, 10 Sep 2018 18:37:59 +0000 (18:37 +0000)]
[InstCombine] use SelectInst operand names to make code clearer; NFC
Cleanup step for D51433.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341850
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Sanjay Patel [Mon, 10 Sep 2018 17:40:15 +0000 (17:40 +0000)]
[x86] test codegen for unsigned saturated add; NFC
All of the ISA holes are going to make this difficult,
but we can't canonicalize the IR and try to solve PR14613
until we have backend support to get this right.
https://bugs.llvm.org/show_bug.cgi?id=14613
https://rise4fun.com/Alive/Guv
https://rise4fun.com/Alive/AADG
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341845
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Tatyana Krasnukha [Mon, 10 Sep 2018 17:09:09 +0000 (17:09 +0000)]
[ARC] Fix macro usage (DEBUG -> LLVM_DEBUG)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341844
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Alexander Timofeev [Mon, 10 Sep 2018 16:42:49 +0000 (16:42 +0000)]
[AMDGPU] Preliminary patch for divergence driven instruction selection. Inline immediate move to V_MADAK_F32.
Differential revision: https://reviews.llvm.org/D51586
Reviewer: rampitec
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341843
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Philip Reames [Mon, 10 Sep 2018 16:00:27 +0000 (16:00 +0000)]
[AST] Visit memtransfer arguments in order
The only point to this change is the test diffs. When I remove this code entirely (in favor of the recently added generic handling), I don't want there to be any confusion due to spurious test diffs.
As an aside, the fact out tests are AST construction order dependent is not great. I thought about fixing that, but the reasonable schemes I might want (e.g. sort by name) need the test diffs anyways.
Philip
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341841
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Petar Jovanovic [Mon, 10 Sep 2018 15:56:52 +0000 (15:56 +0000)]
[MIPS GlobalISel] Select icmp
Select 32bit integer compare instructions for MIPS32.
Patch by Petar Avramovic.
Differential Revision: https://reviews.llvm.org/D51489
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341840
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Sebastian Pop [Mon, 10 Sep 2018 15:42:17 +0000 (15:42 +0000)]
HotColdSplitting: fix test failing because of last commit
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341839
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Sebastian Pop [Mon, 10 Sep 2018 15:08:02 +0000 (15:08 +0000)]
HotColdSplitting: check that target supports cold calling convention
Before tagging a function with coldcc make sure the target supports cold calling
convention. Without this patch HotColdSplitting pass fails on aarch64 with:
fatal error: error in backend: Unsupported calling convention.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341838
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Sebastian Pop [Mon, 10 Sep 2018 15:07:59 +0000 (15:07 +0000)]
add flag instead of using a constant [NFC]
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341837
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Sebastian Pop [Mon, 10 Sep 2018 15:07:56 +0000 (15:07 +0000)]
make flag name more specific to gvn [NFC]
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341836
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Gil Rapaport [Mon, 10 Sep 2018 14:56:24 +0000 (14:56 +0000)]
[LSR] Add tests for small constants; NFC
LSR reassociates small constants that fit into add immediate operands as
unfolded offset. Since unfolded offset is not combined with loop-invariant
registers, LSR does not consider solutions that bump invariant registers by
these constants outside the loop.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341835
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Tim Northover [Mon, 10 Sep 2018 14:26:44 +0000 (14:26 +0000)]
InstCombine: move hasOneUse check to the top of foldICmpAddConstant
There were two combines not covered by the check before now, neither of which
actually differed from normal in the benefit analysis.
The most recent seems to be because it was just added at the top of the
function (naturally). The older is from way back in 2008 (r46687) when we just
didn't put those checks in so routinely, and has been diligently maintained
since.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341831
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