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Miki Mishael [Wed, 15 Jan 2014 09:33:44 +0000 (04:33 -0500)]
qemu-ga: isa-serial support on Windows
Add support for isa-serial method for qemu-ga on Windows,
Added -p command line parameter for serial port name
specification, e.g. "-p COM15".
Signed-off-by: Miki Mishael <mmishael@redhat.com>
Signed-off-by: Dmitry Fleytman <dfleytma@redhat.com>
*added default isa-serial path to help output
Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
Markus Armbruster [Fri, 21 Feb 2014 12:36:49 +0000 (13:36 +0100)]
qga: Fix memory allocation pasto
qmp_guest_file_seek() allocates memory for a GuestFileRead object
instead of the GuestFileSeek object it actually uses. Harmless,
because the GuestFileRead is slightly larger.
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Reviewed-by: Eric Blake <eblake@redhat.com>
Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
Michal Privoznik [Fri, 31 Jan 2014 10:29:51 +0000 (11:29 +0100)]
qga: Don't require 'time' argument in guest-set-time command
As the description to the guest-set-time states, the command is
there to ease time synchronization after resume. If guest was
suspended for longer period of time, its system time can go off
so badly, that even NTP refuses to set it. That's why the command
was invented: to give users chance to set the time (not
necessarily 100% correct). However, there's is no real need for
us to require users to pass an arbitrary time. Especially if we
can read the correct value from RTC (boiling down to reading
host's time). Hence this commit enables logic:
guest-set-time() == guest-set-time($now_from_rtc)
Signed-off-by: Michal Privoznik <mprivozn@redhat.com>
Reviewed-by: Eric Blake <eblake@redhat.com>
Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
Tomoki Sekiyama [Mon, 13 Jan 2014 17:25:39 +0000 (12:25 -0500)]
qga: vss-win32: Fix interference with snapshot deletion by other VSS request
When a VSS requester such as vshadow.exe or diskshadow.exe requests to
delete snapshots, qemu-ga VSS provider's DeleteSnapshots() is also called
and returns E_NOTIMPL, that makes the deletion fail.
To avoid this issue, return S_OK and set values that represent no snapshots
are deleted by qemu-ga VSS provider.
Signed-off-by: Tomoki Sekiyama <tomoki.sekiyama@hds.com>
Reviewed-by: Gal Hammer <ghammer@redhat.com>
Reviewed-by: Yan Vugenfirer <yvugenfi@redhat.com>
Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
Tomoki Sekiyama [Mon, 13 Jan 2014 17:25:29 +0000 (12:25 -0500)]
qga: vss-win32: Fix interference with snapshot creation by other VSS requesters
When a VSS requester such as vshadow.exe or diskshadow.exe requests to
create disk snapshots, Windows may choose qemu-ga VSS provider if it is
only provider registered on the system. However, because it provides only a
function to freeze the filesystem, the snapshotting fails.
This patch adds a check into CQGAVssProvider::IsVolumeSupported() to reject
the request from other VSS requesters, so that the other provider is chosen.
The check of requester is done by confirming event channels between
qemu-ga's requester and provider established. To ensure that the events are
initialized when CQGAVssProvider::IsVolumeSupported() is called, it moves
the initialization earlier.
Signed-off-by: Tomoki Sekiyama <tomoki.sekiyama@hds.com>
Reviewed-by: Gal Hammer <ghammer@redhat.com>
Reviewed-by: Yan Vugenfirer <yvugenfi@redhat.com>
Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
Tomoki Sekiyama [Mon, 13 Jan 2014 17:25:23 +0000 (12:25 -0500)]
qga: vss-win32: Use NULL as an invalid pointer for OpenEvent and CreateEvent
OpenEvent and CreateEvent WinAPI return NULL when failed to open/create
events handles, instead of INVALID_HANDLE_VALUE (although their return
types are HANDLE).
This replaces INVALID_HANDLE_VALUE related to event handles with NULL.
Signed-off-by: Tomoki Sekiyama <tomoki.sekiyama@hds.com>
Reviewed-by: Gal Hammer <ghammer@redhat.com>
Reviewed-by: Yan Vugenfirer <yvugenfi@redhat.com>
Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
Peter Maydell [Fri, 21 Feb 2014 15:04:57 +0000 (15:04 +0000)]
Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-
20140220' into staging
target-arm queue:
* Fix a bug causing an assertion in the NVIC on ARMv7M models
* More A64 Neon instructions
* Refactor cpreg API to separate out access check functions, as
groundwork for AArch64 system mode
* Fix bug in linux-user A64 store-exclusive of XZR
# gpg: Signature made Thu 20 Feb 2014 11:12:57 GMT using RSA key ID
14360CDE
# gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>"
* remotes/pmaydell/tags/pull-target-arm-
20140220: (30 commits)
linux-user: AArch64: Fix exclusive store of the zero register
target-arm: A64: Implement unprivileged load/store
target-arm: A64: Implement narrowing three-reg-diff operations
target-arm: A64: Implement the wide 3-reg-different operations
target-arm: A64: Add most remaining three-reg-diff widening ops
target-arm: A64: Add opcode comments to disas_simd_three_reg_diff
target-arm: A64: Implement store-exclusive for system mode
target-arm: Fix incorrect type for value argument to write_raw_cp_reg
target-arm: Remove failure status return from read/write_raw_cp_reg
target-arm: Remove unnecessary code now read/write fns can't fail
target-arm: Drop success/fail return from cpreg read and write functions
target-arm: Convert miscellaneous reginfo structs to accessfn
target-arm: Convert generic timer reginfo to accessfn
target-arm: Convert performance monitor reginfo to accessfn
target-arm: Split cpreg access checks out from read/write functions
target-arm: Stop underdecoding ARM946 PRBS registers
target-arm: Log bad system register accesses with LOG_UNIMP
target-arm: Remove unused ARMCPUState sr substruct
target-arm: Restrict check_ap() use of S and R bits to v6 and earlier
target-arm: Define names for SCTLR bits
...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Peter Maydell [Fri, 21 Feb 2014 14:54:04 +0000 (14:54 +0000)]
Merge remote-tracking branch 'remotes/stefanha/tags/qtest-monitor-process-pull-request' into staging
qtest resource cleanup pull request
# gpg: Signature made Wed 19 Feb 2014 14:46:34 GMT using RSA key ID
81AB73C8
# gpg: Good signature from "Stefan Hajnoczi <stefanha@redhat.com>"
# gpg: aka "Stefan Hajnoczi <stefanha@gmail.com>"
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg: There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 8695 A8BF D3F9 7CDA AC35 775A 9CA4 ABB3 81AB 73C8
* remotes/stefanha/tags/qtest-monitor-process-pull-request:
qtest: kill QEMU process on g_assert() failure
qtest: make QEMU our direct child process
qtest: drop unused child_pid field
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Peter Maydell [Fri, 21 Feb 2014 14:38:23 +0000 (14:38 +0000)]
Merge remote-tracking branch 'remotes/stefanha/tags/tracing-pull-request' into staging
Tracing pull request
# gpg: Signature made Wed 19 Feb 2014 15:42:20 GMT using RSA key ID
81AB73C8
# gpg: Good signature from "Stefan Hajnoczi <stefanha@redhat.com>"
# gpg: aka "Stefan Hajnoczi <stefanha@gmail.com>"
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg: There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 8695 A8BF D3F9 7CDA AC35 775A 9CA4 ABB3 81AB 73C8
* remotes/stefanha/tags/tracing-pull-request:
trace-events: Fix typo in "offset"
Add ust generated files to .gitignore
Update documentation for LTTng ust tracing
Adapt Makefiles to the new LTTng ust interface
Modified the tracetool framework for LTTng 2.x
Fix configure script for LTTng 2.x
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Peter Maydell [Fri, 21 Feb 2014 14:31:05 +0000 (14:31 +0000)]
Merge remote-tracking branch 'remotes/kevin/tags/for-upstream' into staging
This fixes a target-i386 emulation regression
# gpg: Signature made Wed 19 Feb 2014 15:42:12 GMT using RSA key ID
C88F2FD6
# gpg: Good signature from "Kevin Wolf <kwolf@redhat.com>"
* remotes/kevin/tags/for-upstream:
target-i386: Fix I/O bitmap checks for in/out
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Peter Maydell [Fri, 21 Feb 2014 11:47:28 +0000 (11:47 +0000)]
Merge remote-tracking branch 'remotes/riku/linux-user-for-upstream' into staging
* remotes/riku/linux-user-for-upstream:
linux-user: Fix error handling in target_to_host_semarray()
linux-user: Implement BLKPG ioctl
linux-user: Fix error handling in lock_iovec()
linux-user/signal.c: Don't pass sigaction uninitialised sa_flags
linux-user/elfload.c: Avoid calling g_free() on uninitialized data
linux-user: sync syscall numbers upto 3.13
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Peter Maydell [Thu, 20 Feb 2014 19:42:53 +0000 (19:42 +0000)]
tcg/i386: Fix build for systems without working cpuid.h (MacOSX, Win32)
Win32 doesn't have a cpuid.h, and MacOSX may have one but without
the __cpuid() function we use, which means that commit
9d2eec20
broke the build for those platforms. Fix this by tightening up
our configure cpuid.h check to test that the functions we need
are present, and adding some missing #ifdef guards in
tcg/i386/tcg-target.c.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Peter Maydell [Thu, 20 Feb 2014 15:25:05 +0000 (15:25 +0000)]
Merge remote-tracking branch 'remotes/kraxel/tags/pull-usb-3' into staging
- xhci improvements and fixes.
- uhci bugfix.
- cleanups.
# gpg: Signature made Tue 18 Feb 2014 15:48:10 GMT using RSA key ID
D3E87138
# gpg: Good signature from "Gerd Hoffmann (work) <kraxel@redhat.com>"
# gpg: aka "Gerd Hoffmann <gerd@kraxel.org>"
# gpg: aka "Gerd Hoffmann (private) <kraxel@gmail.com>"
* remotes/kraxel/tags/pull-usb-3:
xhci: use DPRINTF() instead of fprintf(stderr, ...)
xhci: switch debug printf to tracepoint
xhci iso: allow for some latency
xhci iso: fix time calculation
uhci: invalidate queue on device address changes
xhci: fix overflow in usb_xhci_post_load
usb: Remove magic constants from device bmAttributes
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Peter Maydell [Thu, 20 Feb 2014 15:02:06 +0000 (15:02 +0000)]
Merge remote-tracking branch 'remotes/rth/tcg-next' into staging
* remotes/rth/tcg-next:
tcg/i386: Use SHLX/SHRX/SARX instructions
tcg/i386: Use ANDN instruction
tcg/i386: Add tcg_out_vex_modrm
tcg/i386: Move TCG_CT_CONST_* to tcg-target.c
disas/i386: Disassemble ANDN/SHLX/SHRX/SHAX
tcg/optimize: Add more identity simplifications
tcg/optimize: Optmize ANDC X,Y,Y to MOV X,0
tcg/optimize: Simply some logical ops to NOT
tcg/optimize: Handle known-zeros masks for ANDC
tcg/optimize: add known-zero bits compute for load ops
tcg/optimize: improve known-zero bits for 32-bit ops
tcg/optimize: fix known-zero bits optimization
tcg/optimize: fix known-zero bits for right shift ops
tcg-arm: The shift count of op_rotl_i32 is in args[2] not args[1].
TCG: Fix 32-bit host allocation typo
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Peter Maydell [Thu, 20 Feb 2014 13:05:47 +0000 (13:05 +0000)]
Merge remote-tracking branch 'remotes/afaerber/tags/qom-devices-for-peter' into staging
QOM infrastructure fixes and device conversions
* QTest cleanups and test cases for PCI NICs
* NAND fix for "info qtree"
* Cleanup and extension of QOM machine tests
* IndustryPack test cases and conversion to QOM realize
* I2C cleanups
* Cleanups of legacy qdev properties
# gpg: Signature made Mon 17 Feb 2014 22:15:37 GMT using RSA key ID
3E7E013F
# gpg: Good signature from "Andreas Färber <afaerber@suse.de>"
# gpg: aka "Andreas Färber <afaerber@suse.com>"
* remotes/afaerber/tags/qom-devices-for-peter: (49 commits)
qtest: Include system headers before user headers
qapi: Refine human printing of sizes
qdev: Use QAPI type names for properties
qdev: Add enum property types to QAPI schema
block: Handle "rechs" and "large" translation options
qdev: Remove hex8/32/64 property types
qdev: Remove most legacy printers
qdev: Use human mode in "info qtree"
qapi: Add human mode to StringOutputVisitor
qdev: Inline qdev_prop_parse()
qdev: Legacy properties are just strings
qdev: Legacy properties are now read-only
qdev: Remove legacy parsers for hex8/32/64
qdev: Sizes are now parsed by StringInputVisitor
qapi: Add size parser to StringInputVisitor
qtest: Don't segfault with invalid -qtest option
ipack: Move IndustryPack out of hw/char/
ipoctal232: QOM parent field cleanup
ipack: QOM parent field cleanup for IPackDevice
ipack: QOM parent field cleanup for IPackBus
...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Peter Maydell [Thu, 20 Feb 2014 12:04:02 +0000 (12:04 +0000)]
Merge remote-tracking branch 'remotes/qmp-unstable/queue/qmp' into staging
* remotes/qmp-unstable/queue/qmp:
monitor: Add object_add class argument completion.
monitor: Add object_del id argument completion.
monitor: Add device_add device argument completion.
monitor: Add device_del id argument completion.
qmp: expose list of supported character device backends
Use error_is_set() only when necessary
QMP: allow JSON dict arguments in qmp-shell
hmp: migrate command (without -d) now blocks correctly
Conflicts:
blockdev.c
[PMM: resolved trivial conflict in blockdev.c]
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Janne Grunau [Thu, 20 Feb 2014 10:35:56 +0000 (10:35 +0000)]
linux-user: AArch64: Fix exclusive store of the zero register
Signed-off-by: Janne Grunau <j@jannau.net>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Peter Maydell [Thu, 20 Feb 2014 10:35:56 +0000 (10:35 +0000)]
target-arm: A64: Implement unprivileged load/store
Implement the unprivileged load and store instructions.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Peter Maydell [Thu, 20 Feb 2014 10:35:56 +0000 (10:35 +0000)]
target-arm: A64: Implement narrowing three-reg-diff operations
Implement the narrowing three-reg-diff operations: ADDHN,
RADDHN, SUBHN and RSUBHN.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Peter Maydell [Thu, 20 Feb 2014 10:35:56 +0000 (10:35 +0000)]
target-arm: A64: Implement the wide 3-reg-different operations
Implement the wide three-reg-different operations:
SADDW, UADDW, SSUBW and USUBW.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Peter Maydell [Thu, 20 Feb 2014 10:35:55 +0000 (10:35 +0000)]
target-arm: A64: Add most remaining three-reg-diff widening ops
Add the remainder of the 64x64->128 operations in the three-reg-diff
category except for PMULL, PMULL2.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Peter Maydell [Thu, 20 Feb 2014 10:35:55 +0000 (10:35 +0000)]
target-arm: A64: Add opcode comments to disas_simd_three_reg_diff
The opcode switch in disas_simd_three_reg_diff() is missing the
customary comments indicating which cases correspond to which
instructions. Add them.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Peter Maydell [Thu, 20 Feb 2014 10:35:55 +0000 (10:35 +0000)]
target-arm: A64: Implement store-exclusive for system mode
System mode store-exclusive use a different code path to usermode ones;
implement this missing code, in a similar way to the 32 bit version.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Peter Maydell [Thu, 20 Feb 2014 10:35:54 +0000 (10:35 +0000)]
target-arm: Fix incorrect type for value argument to write_raw_cp_reg
The write_raw_cp_reg's value argument should be a uint64_t, since
that's what all its callers hand it and what all the functions it
calls take. A (harmless) typo meant we were accidentally declaring
it as int64_t.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Peter Maydell [Thu, 20 Feb 2014 10:35:54 +0000 (10:35 +0000)]
target-arm: Remove failure status return from read/write_raw_cp_reg
The read_raw_cp_reg and write_raw_cp_reg functions can now never
fail (in fact they should never have failed previously unless
there was a bug in a reginfo that meant no raw accessor was
provided for a might-trap register). This allows us to clean up
their prototypes so the write function returns void and the
read function returns the value read, which in turn lets us
simplify the callers.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Peter Maydell [Thu, 20 Feb 2014 10:35:54 +0000 (10:35 +0000)]
target-arm: Remove unnecessary code now read/write fns can't fail
Now that cpreg read and write functions can't fail and throw an
exception, we can remove the code from the translator that synchronises
the guest PC in case an exception is thrown.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Peter Maydell [Thu, 20 Feb 2014 10:35:54 +0000 (10:35 +0000)]
target-arm: Drop success/fail return from cpreg read and write functions
All cpreg read and write functions now return 0, so we can clean up
their prototypes:
* write functions return void
* read functions return the value rather than taking a pointer
to write the value to
This is a fairly mechanical change which makes only the bare
minimum set of changes to the callers of read and write functions.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Peter Maydell [Thu, 20 Feb 2014 10:35:53 +0000 (10:35 +0000)]
target-arm: Convert miscellaneous reginfo structs to accessfn
Convert the remaining miscellaneous cases of reginfo read/write
functions returning EXCP_UDEF to use an accessfn instead:
TEEHBR, and the ATS address-translation operations.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Peter Maydell [Thu, 20 Feb 2014 10:35:53 +0000 (10:35 +0000)]
target-arm: Convert generic timer reginfo to accessfn
Convert the reginfo structs for the generic timer registers
to use access functions rather than returning EXCP_UDEF from
their read handlers. In some cases this allows us to remove
a read handler completely.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Peter Maydell [Thu, 20 Feb 2014 10:35:52 +0000 (10:35 +0000)]
target-arm: Convert performance monitor reginfo to accessfn
Convert the performance monitor reginfo definitions to use
an accessfn rather than returning EXCP_UDEF from read and
write functions. This also allows us to fix a couple of XXX
cases where we weren't imposing the access restrictions on
RAZ/WI or constant registers.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Peter Maydell [Thu, 20 Feb 2014 10:35:52 +0000 (10:35 +0000)]
target-arm: Split cpreg access checks out from read/write functions
Several of the system registers handled via the ARMCPRegInfo
mechanism have access trap control bits controlling whether the
registers are accessible to lower privilege levels. Replace
the existing mechanism (allowing the read and write functions
to return EXCP_UDEF if access is denied) with a dedicated
"check access rights" function pointer in the ARMCPRegInfo.
This will allow us to simplify some of the register definitions,
which no longer need read/write functions purely to handle
the access checks.
We take the opportunity to define the return value from the
access checking function in a way that allows us to set the
correct exception syndrome information for exceptions taken
to AArch64 (which may need to distinguish access failures due
to a configurable trap or enable from other kinds of access
failure).
This commit defines the new mechanism but does not move any
of the registers across to use it.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Peter Maydell [Thu, 20 Feb 2014 10:35:52 +0000 (10:35 +0000)]
target-arm: Stop underdecoding ARM946 PRBS registers
The ARM946 has 8 PRBS (protection region base and size) registers.
Currently we implement these with a CP_ANY reginfo; however this
underdecodes (since there are 16 possible values of CRm but only
8 registers) and we catch the invalid values in the read and
write functions. However this causes issues with migration since
we only migrate the first of a wildcard register set, so we only
migrate c6_region[0]. It also makes it awkward to pull reginfo
access checks out into their own function.
Avoid all these problems by just defining separate reginfo structs
for each of the 8 registers; this also lets us avoid having any
read or write functions and will result in more efficient direct
field accesses from generated code.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Peter Maydell [Thu, 20 Feb 2014 10:35:52 +0000 (10:35 +0000)]
target-arm: Log bad system register accesses with LOG_UNIMP
Log guest attempts to access unimplemented system registers via
the LOG_UNIMP reporting mechanism (for both the 32 bit and 64 bit
instruction sets). This is particularly useful for debugging
problems where the guest is trying to use a system register that
QEMU doesn't implement.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Peter Maydell [Thu, 20 Feb 2014 10:35:51 +0000 (10:35 +0000)]
target-arm: Remove unused ARMCPUState sr substruct
Remove the 'struct sr' from ARMCPUState -- it isn't actually used and is
a hangover from the original separate system register implementation used
by the SuSE linux-user-mode-only AArch64 target.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Peter Maydell [Thu, 20 Feb 2014 10:35:51 +0000 (10:35 +0000)]
target-arm: Restrict check_ap() use of S and R bits to v6 and earlier
The SCTLR bits S and R (8 and 9) only exist in ARMv6 and earlier.
In ARMv7 these bits RAZ, and in ARMv8 they are reassigned. Guard
the use of them in check_ap() so that we don't get incorrect results
for ARMv8 CPUs.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Peter Maydell [Thu, 20 Feb 2014 10:35:51 +0000 (10:35 +0000)]
target-arm: Define names for SCTLR bits
The SCTLR is full of bits for enabling or disabling various things, and so
there are many places in the code which check if certain bits are set.
Define some named constants for the SCTLR bits so these checks are easier
to read.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Peter Maydell [Thu, 20 Feb 2014 10:35:50 +0000 (10:35 +0000)]
target-arm/kvm-consts.h: Define QEMU constants for known KVM CPUs
Extend the set of CPUs for which we provide a QEMU_KVM_ARM_TARGET_*
constant to include all the ones currently supported by the kernel
headers we are using.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Peter Maydell [Thu, 20 Feb 2014 10:35:50 +0000 (10:35 +0000)]
target-arm: A64: Implement remaining 3-same instructions
Implement the remaining instructions in the SIMD 3-reg-same
and scalar-3-reg-same groups: FMULX, FRECPS, FRSQRTS, FACGE,
FACGT, FMLA and FMLS.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Peter Maydell [Thu, 20 Feb 2014 10:35:50 +0000 (10:35 +0000)]
softfloat: Support halving the result of muladd operation
The ARMv8 instruction set includes a fused floating point
reciprocal square root step instruction which demands an
"(x * y + z) / 2" fused operation. Support this by adding
a flag to the softfloat muladd operations which requests
that the result is halved before rounding.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Alex Bennée [Thu, 20 Feb 2014 10:35:50 +0000 (10:35 +0000)]
target-arm: A64: Implement floating point pairwise insns
Add support for the floating-point pairwise operations
FADDP, FMAXP, FMAXNMP, FMINP and FMINNMP. To do this we use the
code which was previously handling only integer pairwise operations,
and push the integer-specific decode and handling of unallocated
cases up one level in the call tree, so we can also call it from
the floating-point section of the decoder.
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Alex Bennée [Thu, 20 Feb 2014 10:35:49 +0000 (10:35 +0000)]
target-arm: A64: Implement SIMD FP compare and set insns
This adds all forms of the SIMD floating point and set instructions:
FCM(GT|GE|EQ|LE|LT)
Most of the heavy lifting is done by either the existing neon helpers or
some new helpers for the 64bit double cases. Most of the code paths are
common although the 2misc versions are a little special as they compare
against zero.
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
[PMM: fixed some minor bugs, added the 2-misc-scalar encoding]
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Peter Maydell [Thu, 20 Feb 2014 10:35:49 +0000 (10:35 +0000)]
target-arm: A64: Implement scalar three different instructions
Implement the scalar three different instruction group:
it only has three instructions in it.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Peter Maydell [Thu, 20 Feb 2014 10:35:49 +0000 (10:35 +0000)]
target-arm: A64: Implement SIMD scalar indexed instructions
Implement the SIMD scalar indexed instructions. The encoding
here is nearly identical to the vector indexed grouping, so
we combine the two.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Peter Maydell [Thu, 20 Feb 2014 10:35:49 +0000 (10:35 +0000)]
target-arm: A64: Implement long vector x indexed insns
Implement the 'long' operations in the vector x indexed
element category.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Peter Maydell [Thu, 20 Feb 2014 10:35:48 +0000 (10:35 +0000)]
target-arm: A64: Implement plain vector SIMD indexed element insns
Implement all the SIMD vector x indexed element instructions
in the subcategory which are not 'long' ops.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Peter Maydell [Thu, 20 Feb 2014 10:35:48 +0000 (10:35 +0000)]
hw/intc/arm_gic: Fix NVIC assertion failure
Commit
40d225009ef accidentally changed the behaviour of
gic_acknowledge_irq() for the NVIC. The NVIC doesn't have SGIs,
so this meant we hit an assertion:
gic_acknowledge_irq: Assertion `s->sgi_pending[irq][cpu] != 0' failed.
Return NVIC acknowledge-irq to its previous behaviour, like 11MPCore.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org>
Kevin Wolf [Fri, 24 Jan 2014 09:57:41 +0000 (10:57 +0100)]
target-i386: Fix I/O bitmap checks for in/out
Commit
1b90d56e changed the implementation of in/out imm to not assign
the accessed port number to cpu_T[0] as it appeared unnecessary.
However, currently gen_check_io() makes use of cpu_T[0] to implement the
I/O bitmap checks, so it's in fact still used and the change broke the
check, leading to #GP in legitimate cases (and probably also allowing
access to ports that shouldn't be allowed).
This patch reintroduces the missing assignment for these cases.
Signed-off-by: Kevin Wolf <kwolf@redhat.com>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Stefan Hajnoczi [Mon, 17 Feb 2014 15:33:35 +0000 (16:33 +0100)]
qtest: kill QEMU process on g_assert() failure
The QEMU process stays running if the test case fails. This patch fixes
the leak by installing a SIGABRT signal handler which invokes
qtest_end().
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Reviewed-by: Markus Armbruster <armbru@redhat.com>
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
Stefan Hajnoczi [Mon, 17 Feb 2014 13:54:17 +0000 (14:54 +0100)]
qtest: make QEMU our direct child process
qtest_init() cannot use exec*p() to launch QEMU since the exec*p()
functions take an argument array while qtest_init() takes char
*extra_args. Therefore we execute /bin/sh -c <command-line> and let the
shell parse the argument string.
This left /bin/sh as our child process and our child's child was QEMU.
We still want QEMU's pid so the -pidfile option was used to let QEMU
report its pid.
The pidfile needs to be unlinked when the test case exits or fails. In
other words, the pidfile creates a new problem for us!
Simplify all this using the shell 'exec' command. It allows us to
replace the /bin/sh process with QEMU. Then we no longer need to use
-pidfile because we already know our fork child's pid.
Note: Yes, it seems silly to exec /bin/sh when we could just exec QEMU
directly. But remember qtest_init() takes a single char *extra_args
command-line fragment instead of a real argv[] array, so we need
/bin/sh's argument parsing behavior.
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Reviewed-by: Markus Armbruster <armbru@redhat.com>
Stefan Hajnoczi [Mon, 17 Feb 2014 13:45:55 +0000 (14:45 +0100)]
qtest: drop unused child_pid field
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Reviewed-by: Markus Armbruster <armbru@redhat.com>
Peter Maydell [Mon, 17 Feb 2014 18:55:34 +0000 (18:55 +0000)]
linux-user: Fix error handling in target_to_host_semarray()
Fix two issues in error handling in target_to_host_semarray():
* don't leak the host_array buffer if lock_user fails
* return an error if malloc() fails
v2: added missing * -Riku Voipio
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Riku Voipio <riku.voipio@linaro.org>
Andreas Färber [Sat, 18 Jan 2014 06:38:30 +0000 (07:38 +0100)]
linux-user: Implement BLKPG ioctl
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Riku Voipio <riku.voipio@linaro.org>
Kevin Wolf [Mon, 17 Feb 2014 09:03:17 +0000 (10:03 +0100)]
trace-events: Fix typo in "offset"
s/offet/offset/
Signed-off-by: Kevin Wolf <kwolf@redhat.com>
Reviewed-by: Fam Zheng <famz@redhat.com>
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Mohamad Gebai [Thu, 30 Jan 2014 03:47:58 +0000 (22:47 -0500)]
Add ust generated files to .gitignore
Signed-off-by: Mohamad Gebai <mohamad.gebai@polymtl.ca>
Reviewed-by: Alex Bennée <alex@bennee.com>
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Mohamad Gebai [Thu, 30 Jan 2014 03:47:57 +0000 (22:47 -0500)]
Update documentation for LTTng ust tracing
Signed-off-by: Mohamad Gebai <mohamad.gebai@polymtl.ca>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Mohamad Gebai [Thu, 30 Jan 2014 03:47:56 +0000 (22:47 -0500)]
Adapt Makefiles to the new LTTng ust interface
Add generation of new files for LTTng ust.
Signed-off-by: Mohamad Gebai <mohamad.gebai@polymtl.ca>
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Mohamad Gebai [Thu, 30 Jan 2014 03:47:55 +0000 (22:47 -0500)]
Modified the tracetool framework for LTTng 2.x
* A new format is required to generate definitions for ust tracepoints.
Files ust_events_h.py and ust_events_c.py define common macros, while
new function ust_events_h in events.py does the actual definition of
each tracepoint.
* ust.py generates the new interface for calling userspace tracepoints
with LTTng 2.x, replacing trace_name(args) to tracepoint(name, args).
* As explained in ust_events_c.py, -Wredundant-decls gives a warning
when compiling with gcc 4.7 or older. This is specific to lttng-ust so
for now use a pragma clause to avoid getting a warning.
Signed-off-by: Mohamad Gebai <mohamad.gebai@polymtl.ca>
Reviewed-by: Alex Bennée <alex@bennee.com>
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Mohamad Gebai [Thu, 30 Jan 2014 03:47:54 +0000 (22:47 -0500)]
Fix configure script for LTTng 2.x
Signed-off-by: Mohamad Gebai <mohamad.gebai@polymtl.ca>
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Peter Maydell [Mon, 17 Feb 2014 18:55:33 +0000 (18:55 +0000)]
linux-user: Fix error handling in lock_iovec()
In lock_iovec() if lock_user() failed we were doing an unlock_user
but not a free(vec), which is the wrong way round. We were also
assuming that free() and unlock_user() don't touch errno, which
is not guaranteed. Fix both these problems.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Riku Voipio <riku.voipio@linaro.org>
Peter Maydell [Mon, 17 Feb 2014 18:55:32 +0000 (18:55 +0000)]
linux-user/signal.c: Don't pass sigaction uninitialised sa_flags
When forcing a fatal signal, we weren't initialising the sa_flags
field in the struct sigaction we used to reset the signal handler
to SIG_DFL.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Riku Voipio <riku.voipio@linaro.org>
Peter Maydell [Mon, 17 Feb 2014 18:55:31 +0000 (18:55 +0000)]
linux-user/elfload.c: Avoid calling g_free() on uninitialized data
Avoid calling g_free() on unintialized data in the error-handling
paths in elf_core_dump() by splitting the initialization of the
elf_note_info struct out of fill_note_info() so that it's always
valid to call free_note_info() whether we got to the point of
being able to fill_note_info() or not.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Riku Voipio <riku.voipio@linaro.org>
Riku Voipio [Mon, 13 Jan 2014 12:04:20 +0000 (14:04 +0200)]
linux-user: sync syscall numbers upto 3.13
All others updated except unicore, which doesn't look right to
begin with.
Signed-off-by: Riku Voipio <riku.voipio@linaro.org>
Gerd Hoffmann [Thu, 6 Feb 2014 12:13:21 +0000 (13:13 +0100)]
xhci: use DPRINTF() instead of fprintf(stderr, ...)
So we don't spam stderr with (guest-triggerable) messages by default.
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Gerd Hoffmann [Thu, 6 Feb 2014 12:06:38 +0000 (13:06 +0100)]
xhci: switch debug printf to tracepoint
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Gerd Hoffmann [Thu, 6 Feb 2014 11:06:55 +0000 (12:06 +0100)]
xhci iso: allow for some latency
Allow the scheduled transfer time be a bit behind, to
compensate for latencies. Without this xhci will wait
way to often for the mfindex wraparound, assuming the
scheduled time is in the future just because qemu is
a bit behind in processing the iso transfer requests.
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Gerd Hoffmann [Thu, 6 Feb 2014 11:03:59 +0000 (12:03 +0100)]
xhci iso: fix time calculation
Frameid specifies frames not microframes, so we
need to shift it to get the microframe index.
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Gerd Hoffmann [Wed, 5 Feb 2014 13:54:14 +0000 (14:54 +0100)]
uhci: invalidate queue on device address changes
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Gerd Hoffmann [Wed, 29 Jan 2014 16:03:10 +0000 (17:03 +0100)]
xhci: fix overflow in usb_xhci_post_load
Found by Coverity.
Reported-by: Markus Armbruster <armbru@redhat.com>
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Pantelis Koukousoulas [Mon, 16 Dec 2013 07:42:49 +0000 (09:42 +0200)]
usb: Remove magic constants from device bmAttributes
Replace magic constants in device bmAttributes with symbolic ones
from Linux kernel ch9.h
Signed-off-by: Pantelis Koukousoulas <pktoss@gmail.com>
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Stefan Hajnoczi [Sat, 8 Feb 2014 10:41:07 +0000 (11:41 +0100)]
qtest: Include system headers before user headers
It is dangerous to include user headers before system headers since user
macros can affect system headers.
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Signed-off-by: Andreas Färber <afaerber@suse.de>
Hani Benhabiles [Thu, 6 Feb 2014 22:30:13 +0000 (23:30 +0100)]
monitor: Add object_add class argument completion.
Signed-off-by: Hani Benhabiles <hani@linux.com>
Signed-off-by: Luiz Capitulino <lcapitulino@redhat.com>
Hani Benhabiles [Thu, 6 Feb 2014 22:30:12 +0000 (23:30 +0100)]
monitor: Add object_del id argument completion.
Signed-off-by: Hani Benhabiles <hani@linux.com>
Signed-off-by: Luiz Capitulino <lcapitulino@redhat.com>
Hani Benhabiles [Thu, 6 Feb 2014 22:30:11 +0000 (23:30 +0100)]
monitor: Add device_add device argument completion.
Signed-off-by: Hani Benhabiles <hani@linux.com>
Signed-off-by: Luiz Capitulino <lcapitulino@redhat.com>
Hani Benhabiles [Thu, 6 Feb 2014 22:30:10 +0000 (23:30 +0100)]
monitor: Add device_del id argument completion.
Signed-off-by: Hani Benhabiles <hani@linux.com>
Signed-off-by: Luiz Capitulino <lcapitulino@redhat.com>
Martin Kletzander [Sat, 1 Feb 2014 11:52:42 +0000 (12:52 +0100)]
qmp: expose list of supported character device backends
Introduce 'query-chardev-backends' QMP command which lists all
supported character device backends.
Signed-off-by: Martin Kletzander <mkletzan@redhat.com>
Reviewed-by: Eric Blake <eblake@redhat.com>
Signed-off-by: Luiz Capitulino <lcapitulino@redhat.com>
Markus Armbruster [Thu, 30 Jan 2014 14:07:28 +0000 (15:07 +0100)]
Use error_is_set() only when necessary
error_is_set(&var) is the same as var != NULL, but it takes
whole-program analysis to figure that out. Unnecessarily hard for
optimizers, static checkers, and human readers. Dumb it down to
obvious.
Gets rid of several dozen Coverity false positives.
Note that the obvious form is already used in many places.
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Reviewed-by: Eric Blake <eblake@redhat.com>
Reviewed-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Luiz Capitulino <lcapitulino@redhat.com>
Stefan Hajnoczi [Wed, 29 Jan 2014 11:17:31 +0000 (12:17 +0100)]
QMP: allow JSON dict arguments in qmp-shell
qmp-shell hides the QMP wire protocol JSON encoding from the user. Most
of the time this is helpful and makes the command-line human-friendly.
Some QMP commands take a dict as an argument. In order to express this
we need to revert back to JSON notation.
This patch allows JSON dict arguments in qmp-shell so commands like
blockdev-add and nbd-server-start can be invoked:
(QEMU) blockdev-add options={"driver":"file","id":"drive1",...}
Note that spaces are not allowed since str.split() is used to break up
the command-line arguments first.
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Reviewed-by: Eric Blake <eblake@redhat.com>
Reviewed-by: Benoit Canet <benoit@irqsave.net>
Signed-off-by: Luiz Capitulino <lcapitulino@redhat.com>
Soramichi AKIYAMA [Mon, 27 Jan 2014 10:46:11 +0000 (19:46 +0900)]
hmp: migrate command (without -d) now blocks correctly
This patch fixes a timing issue that migrate command (without -d) does not
block in some cases.
The original version of hmp.c:hmp_migrate_status_cb checks if the
migration status is 'active' or not to detect the completion of a migration.
However, if this function is executed when the migration status is stil
'setup' (the status before 'active'), migration command returns
immediately even if the user does not specify -d option.
Signed-off-by: Soramichi Akiyama <akiyama@nii.ac.jp>
Signed-off-by: Luiz Capitulino <lcapitulino@redhat.com>
Richard Henderson [Tue, 28 Jan 2014 19:39:49 +0000 (11:39 -0800)]
tcg/i386: Use SHLX/SHRX/SARX instructions
These three-operand shift instructions do not require the shift count
to be placed into ECX. This reduces the number of mov insns required,
with the mere addition of a new register constraint.
Don't attempt to get rid of the matching constraint, as that's impossible
to manipulate with just a new constraint. In addition, constant shifts
still need the matching constraint.
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Richard Henderson <rth@twiddle.net>
Richard Henderson [Tue, 28 Jan 2014 05:49:17 +0000 (21:49 -0800)]
tcg/i386: Use ANDN instruction
Note that the optimizer cannot simplify ANDC X,Y,C to AND X,Y,~C
so we must handle constants in the implementation of andc.
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Richard Henderson <rth@twiddle.net>
Richard Henderson [Tue, 28 Jan 2014 05:19:40 +0000 (21:19 -0800)]
tcg/i386: Add tcg_out_vex_modrm
Prepare for emitting BMI insns which require VEX encoding.
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Richard Henderson <rth@twiddle.net>
Richard Henderson [Mon, 27 Jan 2014 21:02:31 +0000 (13:02 -0800)]
tcg/i386: Move TCG_CT_CONST_* to tcg-target.c
These are not needed by users of tcg-target.h. No need to recompile
when we adjust them.
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Richard Henderson <rth@twiddle.net>
Richard Henderson [Wed, 29 Jan 2014 00:39:36 +0000 (16:39 -0800)]
disas/i386: Disassemble ANDN/SHLX/SHRX/SHAX
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Richard Henderson <rth@twiddle.net>
Richard Henderson [Fri, 31 Jan 2014 13:42:11 +0000 (07:42 -0600)]
tcg/optimize: Add more identity simplifications
Recognize 0 operand to andc, and -1 operands to and, orc, eqv.
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Richard Henderson <rth@twiddle.net>
Richard Henderson [Tue, 28 Jan 2014 21:26:17 +0000 (13:26 -0800)]
tcg/optimize: Optmize ANDC X,Y,Y to MOV X,0
Like we already do for SUB and XOR.
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Richard Henderson <rth@twiddle.net>
Richard Henderson [Tue, 28 Jan 2014 21:15:38 +0000 (13:15 -0800)]
tcg/optimize: Simply some logical ops to NOT
Given, of course, an appropriate constant. These could be generated
from the "canonical" operation for inversion on the guest, or via
other optimizations.
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Richard Henderson <rth@twiddle.net>
Richard Henderson [Tue, 28 Jan 2014 20:03:24 +0000 (12:03 -0800)]
tcg/optimize: Handle known-zeros masks for ANDC
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Richard Henderson <rth@twiddle.net>
Aurelien Jarno [Tue, 3 Sep 2013 06:27:39 +0000 (08:27 +0200)]
tcg/optimize: add known-zero bits compute for load ops
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Richard Henderson <rth@twiddle.net>
Aurelien Jarno [Tue, 3 Sep 2013 06:27:38 +0000 (08:27 +0200)]
tcg/optimize: improve known-zero bits for 32-bit ops
The shl_i32 op might set some bits of the unused 32 high bits of the
mask. Fix that by clearing the unused 32 high bits for all 32-bit ops
except load/store which operate on tl values.
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Richard Henderson <rth@twiddle.net>
Aurelien Jarno [Tue, 3 Sep 2013 06:27:38 +0000 (08:27 +0200)]
tcg/optimize: fix known-zero bits optimization
Known-zero bits optimization is a great idea that helps to generate more
optimized code. However the current implementation only works in very few
cases as the computed mask is not saved.
Fix this to make it really working.
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Richard Henderson <rth@twiddle.net>
Aurelien Jarno [Tue, 3 Sep 2013 06:27:38 +0000 (08:27 +0200)]
tcg/optimize: fix known-zero bits for right shift ops
32-bit versions of sar and shr ops should not propagate known-zero bits
from the unused 32 high bits. For sar it could even lead to wrong code
being generated.
Cc: qemu-stable@nongnu.org
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Richard Henderson <rth@twiddle.net>
Huw Davies [Thu, 13 Feb 2014 10:26:46 +0000 (10:26 +0000)]
tcg-arm: The shift count of op_rotl_i32 is in args[2] not args[1].
It's this that should be subtracted from 0x20 when converting to a right rotate.
Cc: qemu-stable@nongnu.org
Signed-off-by: Huw Davies <huw@codeweavers.com>
Signed-off-by: Richard Henderson <rth@twiddle.net>
Brad [Wed, 11 Dec 2013 00:49:08 +0000 (19:49 -0500)]
Fix QEMU build on OpenBSD on x86 archs
This resolves the build issue with building the ROMs on OpenBSD on x86 archs.
As of OpenBSD 5.3 the compiler builds PIE binaries by default and thus the
whole OS/packages and so forth. The ROMs need to have PIE disabled.
Check in configure whether the compiler supports the flags for disabling
PIE, and if it does then use them for building the ROMs. This fixes the
following buildbot failure:
>From the OpenBSD buildbots..
Building optionrom/multiboot.img
ld: multiboot.o: relocation R_X86_64_16 can not be used when making a shared object; recompile with -fPIC
Signed-off by: Brad Smith <brad@comstyle.com>
Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Richard Henderson [Tue, 21 Jan 2014 16:36:38 +0000 (08:36 -0800)]
TCG: Fix 32-bit host allocation typo
The second half register of a 64-bit temp on a 32-bit host
was allocated with the wrong base_type.
The base_type of the second half register is never checked,
but for consistency it should be the same as the first half.
Signed-off-by: Richard Henderson <rth@twiddle.net>
Michael Tokarev [Sat, 15 Feb 2014 20:26:25 +0000 (20:26 +0000)]
libvixl: fix 64bit constants usage
Since commit
999b53ec8794f203964db3ecf939a3da5c4bc843:
Author: Claudio Fontana <claudio.fontana@linaro.org>
Date: Wed Feb 5 17:27:28 2014 +0000
disas: Implement disassembly output for A64
Use libvixl to implement disassembly output in debug
logs for A64, for use with both AArch64 hosts and targets.
disas/libvixl/ contains functions which uses 64bit constants
without using appropriate suffixes, which fails on 32bits.
Fix this by using ULL suffix.
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Peter Maydell [Sat, 15 Feb 2014 16:36:40 +0000 (16:36 +0000)]
Merge remote-tracking branch 'remotes/mjt/tags/trivial-patches-2014-02-15' into staging
trivial patches for 2014-02-15
# gpg: Signature made Sat 15 Feb 2014 12:10:46 GMT using RSA key ID
74F0C838
# gpg: Good signature from "Michael Tokarev <mjt@tls.msk.ru>"
# gpg: aka "Michael Tokarev <mjt@corpit.ru>"
# gpg: aka "Michael Tokarev <mjt@debian.org>"
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg: There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 6EE1 95D1 886E 8FFB 810D 4324 457C E0A0 8044 65C5
# Subkey fingerprint: E190 8639 3B10 B51B AC2C 8B73 5253 C5AD 74F0 C838
* remotes/mjt/tags/trivial-patches-2014-02-15:
char/serial: Fix emptyness check
gitignore: anchor all ignored names
vl: trim includes
vl: remove old, long-unused defines
net: declare struct iovec in checksum.h to fix compiler warning
linux-user: refactor do_socketcall()
configure: add hints to a remedy for feature_not_found errors
configure: add hint of libfdt to DTC dependency not found message
sparc/leon3: Initialize stack pointer
misc: Fix case Qemu -> QEMU
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Peter Maydell [Sat, 15 Feb 2014 16:15:52 +0000 (16:15 +0000)]
Merge remote-tracking branch 'remotes/stefanha/tags/block-pull-request' into staging
Block pull request
# gpg: Signature made Fri 14 Feb 2014 17:26:30 GMT using RSA key ID
81AB73C8
# gpg: Good signature from "Stefan Hajnoczi <stefanha@redhat.com>"
# gpg: aka "Stefan Hajnoczi <stefanha@gmail.com>"
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg: There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 8695 A8BF D3F9 7CDA AC35 775A 9CA4 ABB3 81AB 73C8
* remotes/stefanha/tags/block-pull-request:
block: Open by reference will try device then node_name.
block: Relax bdrv_lookup_bs constraints.
blockdev: Fix wrong usage of QDECREF causing snapshoted quorum to crash on close.
block: mirror - use local_err to avoid NULL errp
qemu-iotests: Don't run 005 on vmdk split formats
block: qemu-iotests - add vhdx log replay tests for qemu-img
block: qemu-iotests - fix test 070 (vhdx)
block: Don't throw away errno via error_setg
block: Add notes to iSCSI's .bdrv_open and .bdrv_reopen_prepare
blockdev: Remove 'type' parameter from blockdev_init()
sdhci: Drop unnecessary #include
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Peter Maydell [Sat, 15 Feb 2014 15:20:08 +0000 (15:20 +0000)]
Merge remote-tracking branch 'remotes/jliu/or32-ld-st' into staging
* remotes/jliu/or32-ld-st:
target-openrisc: Use new qemu_ld/st opcodes
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Peter Maydell [Sat, 15 Feb 2014 15:07:00 +0000 (15:07 +0000)]
Merge remote-tracking branch 'remotes/jovanovic/mips-ufrp' into staging
* remotes/jovanovic/mips-ufrp:
target-mips: add user-mode FR switch support for MIPS32r5
target-mips: add support for CP0_Config5
target-mips: add support for CP0_Config4
target-mips: add CPU definition for MIPS32R5
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Peter Crosthwaite [Tue, 11 Feb 2014 06:49:35 +0000 (22:49 -0800)]
char/serial: Fix emptyness check
This was guarding against a full fifo rather than an empty fifo when
popping. Fix.
Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Reviewed-by: Martin Kletzander <mkletzan@redhat.com>
Reviewed-by: Dr. David Alan Gilbert <dgilbert@redhat.com>
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>