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6 years ago[Support/Path] Add more tests and improve failure messages of existing ones
Pavel Labath [Tue, 24 Apr 2018 08:29:20 +0000 (08:29 +0000)]
[Support/Path] Add more tests and improve failure messages of existing ones

Summary:
I am preparing a patch to the path function. While working on it, I
noticed that some of the areas are lacking test coverage (e.g. filename
and parent_path functions), so I add more tests to guard against
regressions there.

I have also found the failure messages hard to understand, so I rewrote
some existing test to give more actionable messages when they fail:
- for tests which run over multiple inputs, I use SCOPED_TRACE, to show
  which of the inputs caused the actual failure.
- for comparisons of vectors, I use gmock's container matchers, which
  will print out the full container contents (and the elements that
  differ) when they fail to match.

Reviewers: zturner, espindola

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D45941

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330691 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[LVI] Fix typo. NFC
Xin Tong [Tue, 24 Apr 2018 07:38:07 +0000 (07:38 +0000)]
[LVI] Fix typo. NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330688 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[llvm-objcopy] Adjust the code for the old versions of msvc
Alexander Shaposhnikov [Tue, 24 Apr 2018 06:23:22 +0000 (06:23 +0000)]
[llvm-objcopy] Adjust the code for the old versions of msvc

Follow-up for r330685.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330686 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoRecommit "[llvm-objcopy] Switch over to using TableGen for parsing arguments"
Alexander Shaposhnikov [Tue, 24 Apr 2018 05:43:32 +0000 (05:43 +0000)]
Recommit "[llvm-objcopy] Switch over to using TableGen for parsing arguments"

Add explicit dependency on ObjcopyTableGen
and rerun the tests on Windows.
I will double-check the build bots
and revert this commit if necessary.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330685 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[NFC] Use FileCheck in test
Max Kazantsev [Tue, 24 Apr 2018 04:42:37 +0000 (04:42 +0000)]
[NFC] Use FileCheck in test

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330684 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[NFC] Use forgetTopmostLoop instead of logic duplication
Max Kazantsev [Tue, 24 Apr 2018 04:33:04 +0000 (04:33 +0000)]
[NFC] Use forgetTopmostLoop instead of logic duplication

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330683 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[X86] Add a BSWAP16 instruction using the 32-bit encoding plus a 0x66 prefix.
Craig Topper [Tue, 24 Apr 2018 04:28:02 +0000 (04:28 +0000)]
[X86] Add a BSWAP16 instruction using the 32-bit encoding plus a 0x66 prefix.

This encoding is recognized by the CPU, but the behavior is undefined. This makes the disassembler handle it correctly so we don't print bswapl with a 16-bit register.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330682 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[PM/LoopUnswitch] Remove another over-aggressive assert.
Chandler Carruth [Tue, 24 Apr 2018 03:27:00 +0000 (03:27 +0000)]
[PM/LoopUnswitch] Remove another over-aggressive assert.

This code path can very clearly be called in a context where we have
baselined all the cloned blocks to a particular loop and are trying to
handle nested subloops. There is no harm in this, so just relax the
assert. I've added a test case that will make sure we actually exercise
this code path.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330680 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoRemove unused function HexagonEarlyIfConversion::replacePhiEdges. NFC.
Eric Christopher [Tue, 24 Apr 2018 02:10:59 +0000 (02:10 +0000)]
Remove unused function HexagonEarlyIfConversion::replacePhiEdges. NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330678 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[NFC] Add clarification comment
Max Kazantsev [Tue, 24 Apr 2018 02:08:05 +0000 (02:08 +0000)]
[NFC] Add clarification comment

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330677 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoReflow formatting after previous NFC commit.
Eric Christopher [Tue, 24 Apr 2018 01:57:03 +0000 (01:57 +0000)]
Reflow formatting after previous NFC commit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330676 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoChange if-conditionals to else-if as they should all be mutually exclusive.
Eric Christopher [Tue, 24 Apr 2018 01:57:02 +0000 (01:57 +0000)]
Change if-conditionals to else-if as they should all be mutually exclusive.

No functional change intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330675 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoMostly revert r330672.
Nico Weber [Tue, 24 Apr 2018 01:24:42 +0000 (01:24 +0000)]
Mostly revert r330672.

The test is apparently needed e.g. for check-cfi on Windows where we get
  'C:/b/slave/sanitizer-windows/build/./bin/clang.exe': command not found
without it.  Try to fix the problem that was fixed by r330672 by also checking
for isabs() instead.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330673 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoRemove code that's almost always dead, and harmful if not.
Nico Weber [Tue, 24 Apr 2018 01:05:04 +0000 (01:05 +0000)]
Remove code that's almost always dead, and harmful if not.

lit's util.which() would check if the passed-in path existed directly,
and if so return it as-is.  This is never the case when running llvm's, clang's,
or lld's tests normally.  But when running `./llvm-lit path/to/clang/test`
with a cwd of llvm-build/bin, this if would detect that clang exists at path
'clang' and return 'clang' as the discovered clang binary -- and then lit would
use the " clang " -> "*** Do not use 'clang' in tests, use '%clang'. ***"
substitution to replace that with a broken test.  By removing this early
return, lit ends up with the usual absolute path and everything works even
in this uncommon case.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330672 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoFix build breaks in examples due to moving stuff from Scalar.h to InstCombine.h
David Blaikie [Tue, 24 Apr 2018 00:58:57 +0000 (00:58 +0000)]
Fix build breaks in examples due to moving stuff from Scalar.h to InstCombine.h

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330670 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoInstCombine: Fix layering by not including Scalar.h in InstCombine
David Blaikie [Tue, 24 Apr 2018 00:48:59 +0000 (00:48 +0000)]
InstCombine: Fix layering by not including Scalar.h in InstCombine

(notionally Scalar.h is part of libLLVMScalarOpts, so it shouldn't be
included by InstCombine which doesn't/shouldn't need to depend on
ScalarOpts)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330669 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[AggressiveInstCombine] Add aggressive inst combiner to the LLVM C API.
Craig Topper [Tue, 24 Apr 2018 00:39:29 +0000 (00:39 +0000)]
[AggressiveInstCombine] Add aggressive inst combiner to the LLVM C API.

I just tried to copy what was done for regular InstCombine. Hopefully I didn't miss anything.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330668 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoReland r301880(!): "[InstSimplify] Handle selects of GEPs with 0 offset"
George Burgess IV [Tue, 24 Apr 2018 00:25:01 +0000 (00:25 +0000)]
Reland r301880(!): "[InstSimplify] Handle selects of GEPs with 0 offset"

I was reminded today that this patch got reverted in r301885. I can no
longer reproduce the failure that caused the revert locally (...almost
one year later), and the patch applied pretty cleanly, so I guess we'll
see if the bots still get angry about it.

The original breakage was InstSimplify complaining (in "assertion
failed" form) about getting passed some crazy IR when running `ninja
check-sanitizer`. I'm unable to find traces of what, exactly, said crazy
IR was. I suppose we'll find out pretty soon if that's still the case.
:)

Original commit:

  Author: gbiv
  Date: Mon May  1 18:12:08 2017
  New Revision: 301880

  URL: http://llvm.org/viewvc/llvm-project?rev=301880&view=rev
  Log:
  [InstSimplify] Handle selects of GEPs with 0 offset

  In particular (since it wouldn't fit nicely in the summary):
  (select (icmp eq V 0) P (getelementptr P V)) -> (getelementptr P V)

  Differential Revision: https://reviews.llvm.org/D31435

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330667 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[HWASan] Use dynamic shadow memory on Android only (LLVM)
Alex Shlyapnikov [Tue, 24 Apr 2018 00:16:54 +0000 (00:16 +0000)]
[HWASan] Use dynamic shadow memory on Android only (LLVM)

There're issues with IFUNC support on other platforms.

DIfferential Revision: https://reviews.llvm.org/D45840

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330665 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[AggressiveInstCombine] Add createAggressiveInstCombinerPass to LinkAllPasses.h.
Craig Topper [Tue, 24 Apr 2018 00:11:04 +0000 (00:11 +0000)]
[AggressiveInstCombine] Add createAggressiveInstCombinerPass to LinkAllPasses.h.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330664 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[AggressiveInstCombine] Add library initializer routine for AggressiveInstCombine...
Craig Topper [Tue, 24 Apr 2018 00:05:21 +0000 (00:05 +0000)]
[AggressiveInstCombine] Add library initializer routine for AggressiveInstCombine library. Use it in bugpoint and llvm-opt-fuzzer to match regular InstCombine.

This should make aggressive instcombine usable with these tools.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330663 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[X86] Remove unnecessary vector memory folded InstRW overrides.
Simon Pilgrim [Mon, 23 Apr 2018 22:45:04 +0000 (22:45 +0000)]
[X86] Remove unnecessary vector memory folded InstRW overrides.

We have test coverage for these with resources-sse*/avx*

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330662 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[LLVM-C] DIBuilder Bindings For Variable Expressions
Robert Widmann [Mon, 23 Apr 2018 22:31:49 +0000 (22:31 +0000)]
[LLVM-C] DIBuilder Bindings For Variable Expressions

Summary: Add DIBuilder bindings for (global) variable expressions, variable value expressions, and debug value intrinsic insertion.

Reviewers: harlanhaskins, deadalnix, whitequark

Reviewed By: whitequark

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D45979

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330661 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[GlobalISel][Legalizer] Look thro copies while combining G_UNMERGE's
Roman Tereshin [Mon, 23 Apr 2018 22:28:36 +0000 (22:28 +0000)]
[GlobalISel][Legalizer] Look thro copies while combining G_UNMERGE's

As we're becoming stricter w/ respect to not allowing vregs having LLTs
and regclasses assigned both mid-globalisel pipeline, the number of
extra copies grows, some of which separate G_UNMERGE's from their
corresponding G_MERGE's, becoming a performance concern.

It's worth mentioning that we're already looking through copies while
combining legalization artifacts for every kind of artifact but
G_UNMERGE.

Reviewed By: aditya_nandakumar

Reviewers: ab, t.p.northover, volkan, javed.absar

Subscribers: rovka, kristof.beyls, llvm-commits

Differential Revision: https://reviews.llvm.org/D45644

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330660 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[X86] Remove unnecessary BMI2 InstRW overrides.
Simon Pilgrim [Mon, 23 Apr 2018 22:19:55 +0000 (22:19 +0000)]
[X86] Remove unnecessary BMI2 InstRW overrides.

We have test coverage for these with resources-bmi2.s

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330659 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[LoopInterchange] Do not change LI for BBs in child loops.
Florian Hahn [Mon, 23 Apr 2018 21:38:19 +0000 (21:38 +0000)]
[LoopInterchange] Do not change LI for BBs in child loops.

If a loop with child loops becomes our new inner loop after
interchanging, we only need to update LoopInfo for the blocks defined in
the old outer loop. BBs in child loops will stay there.

Reviewers: efriedma, karthikthecool, mcrosier

Reviewed By: efriedma

Differential Revision: https://reviews.llvm.org/D45970

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330653 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[X86] Remove unnecessary WriteLEA InstRW overrides.
Simon Pilgrim [Mon, 23 Apr 2018 21:04:23 +0000 (21:04 +0000)]
[X86] Remove unnecessary WriteLEA InstRW overrides.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330648 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[DAGCombiner] Unfold scalar masked merge if profitable
Roman Lebedev [Mon, 23 Apr 2018 20:38:49 +0000 (20:38 +0000)]
[DAGCombiner] Unfold scalar masked merge if profitable

Summary:
This is [[ https://bugs.llvm.org/show_bug.cgi?id=37104 | PR37104 ]].

[[ https://bugs.llvm.org/show_bug.cgi?id=6773 | PR6773 ]] will introduce an IR canonicalization that is likely bad for the end assembly.
Previously, `andl`+`andn`/`andps`+`andnps` / `bic`/`bsl` would be generated. (see `@out`)
Now, they would no longer be generated  (see `@in`).
So we need to make sure that they are still generated.

If the mask is constant, we do nothing. InstCombine should have unfolded it.
Else, i use `hasAndNot()` TLI hook.

For now, only handle scalars.

https://rise4fun.com/Alive/bO6

----

I *really* don't like the code i wrote in `DAGCombiner::unfoldMaskedMerge()`.
It is super fragile. Is there something like IR Pattern Matchers for this?

Reviewers: spatel, craig.topper, RKSimon, javed.absar

Reviewed By: spatel

Subscribers: andreadb, courbet, kristof.beyls, javed.absar, rengolin, nemanjai, llvm-commits

Differential Revision: https://reviews.llvm.org/D45733

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330646 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[X86][AArch64][NFC] Add tests for masked merge unfolding
Roman Lebedev [Mon, 23 Apr 2018 20:38:42 +0000 (20:38 +0000)]
[X86][AArch64][NFC] Add tests for masked merge unfolding

Summary:
This is [[ https://bugs.llvm.org/show_bug.cgi?id=37104 | PR37104 ]].

[[ https://bugs.llvm.org/show_bug.cgi?id=6773 | PR6773 ]] will introduce an IR canonicalization that is likely bad for the end assembly.
Previously, `andl`+`andn`/`andps`+`andnps` / `bic`/`bsl` would be generated. (see `@out`)
Now, they would no longer be generated  (see `@in`).
I'm guessing `llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp` should be able to unfold this.

Reviewers: spatel, craig.topper, RKSimon, javed.absar

Reviewed By: spatel

Subscribers: nemanjai, rengolin, javed.absar, kristof.beyls, llvm-commits

Differential Revision: https://reviews.llvm.org/D45563

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330645 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[AggressiveInstCombine] add tests for PR37098; NFC
Sanjay Patel [Mon, 23 Apr 2018 20:20:32 +0000 (20:20 +0000)]
[AggressiveInstCombine] add tests for PR37098; NFC

I'm not sure if this is where we should try to fold these
patterns inspired by:
https://bugs.llvm.org/show_bug.cgi?id=37098
...if this isn't the right place, we can move the tests.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330642 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[CallSiteSplit] Make sure we remove nonnull if the parameter turns out to be a constant.
Xin Tong [Mon, 23 Apr 2018 20:09:08 +0000 (20:09 +0000)]
[CallSiteSplit] Make sure we remove nonnull if the parameter turns out to be a constant.

Summary: We do not need nonull attribute if we know an argument is going to be constant.

Reviewers: junbuml, davide, fhahn

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D45608

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330641 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[X86] Revert r330638 - accidental commit
Gabor Buella [Mon, 23 Apr 2018 20:05:51 +0000 (20:05 +0000)]
[X86] Revert r330638 - accidental commit

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330640 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoFix a broken typedef; NFCI
George Burgess IV [Mon, 23 Apr 2018 20:03:00 +0000 (20:03 +0000)]
Fix a broken typedef; NFCI

Richard Smith noted that `typedef typename iplist::iplist_impl_type
iplist_impl_type` is incorrect, per
http://eel.is/c++draft/basic.scope#class-2

It seems that neither clang nor gcc get too angry about this, but a
newer version of msvc does.

Thanks to jcmac on IRC for pointing this out!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330639 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[X86] movdiri and movdir64b instructions
Gabor Buella [Mon, 23 Apr 2018 20:00:59 +0000 (20:00 +0000)]
[X86] movdiri and movdir64b instructions

Reviewers: craig.topper

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330638 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[MemCpyOpt] Skip optimizing basic blocks not reachable from entry
Bjorn Pettersson [Mon, 23 Apr 2018 19:55:04 +0000 (19:55 +0000)]
[MemCpyOpt] Skip optimizing basic blocks not reachable from entry

Summary:
Skip basic blocks not reachable from the entry node
in MemCpyOptPass::iterateOnFunction.

Code that is unreachable may have properties that do not exist
for reachable code (an instruction in a basic block can for
example be dominated by a later instruction in the same basic
block, for example if there is a single block loop).
MemCpyOptPass::processStore is only safe to use for reachable
basic blocks, since it may iterate past the basic block
beginning when used for unreachable blocks. By simply skipping
to optimize unreachable basic blocks we can avoid asserts such
as "Assertion `!NodePtr->isKnownSentinel()' failed."
in MemCpyOptPass::processStore.

The problem was detected by fuzz tests.

Reviewers: eli.friedman, dneilson, efriedma

Reviewed By: efriedma

Subscribers: efriedma, llvm-commits

Differential Revision: https://reviews.llvm.org/D45889

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330635 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[WebAssembly] MC: Refactor section creation code
Sam Clegg [Mon, 23 Apr 2018 19:16:19 +0000 (19:16 +0000)]
[WebAssembly] MC: Refactor section creation code

Remove the use of default argument in favor of a separate
startCustomSection method.

Differential Revision: https://reviews.llvm.org/D45794

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330632 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[CODE_OWNERS] Update my email address.
Quentin Colombet [Mon, 23 Apr 2018 19:09:49 +0000 (19:09 +0000)]
[CODE_OWNERS] Update my email address.

NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330631 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoReland r329956, "AArch64: Introduce a DAG combine for folding offsets into addresses...
Peter Collingbourne [Mon, 23 Apr 2018 19:09:34 +0000 (19:09 +0000)]
Reland r329956, "AArch64: Introduce a DAG combine for folding offsets into addresses.", with a fix for the bot failure.

This reland includes a check to prevent the DAG combiner from folding an
offset that is smaller than the existing one. This can cause oscillations
between two possible DAGs, which was the cause of the hang and later assertion
failure observed on the lnt-ctmark-aarch64-O3-flto bot.
http://green.lab.llvm.org/green/job/lnt-ctmark-aarch64-O3-flto/2024/

Original commit message:
> This is a code size win in code that takes offseted addresses
> frequently, such as C++ constructors that typically need to compute
> an offseted address of a vtable. This reduces the size of Chromium
> for Android's .text section by 108KB.

Differential Revision: https://reviews.llvm.org/D45199

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330630 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[DSE] Teach the pass that atomic memory intrinsics are stores.
Daniel Neilson [Mon, 23 Apr 2018 19:06:49 +0000 (19:06 +0000)]
[DSE] Teach the pass that atomic memory intrinsics are stores.

Summary:
This change teaches DSE that the atomic memory intrinsics are stores
that can be eliminated, and can allow other stores to be eliminated.
This change specifically does not teach DSE that these intrinsics
can be partially eliminated (i.e. length reduced, and dest/src changed);
that will be handled in another change.

Reviewers: mkazantsev, skatkov, apilipenko, efriedma, rsmith

Reviewed By: efriedma

Subscribers: dmgreen, llvm-commits

Differential Revision: https://reviews.llvm.org/D45535

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330629 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[AArch64] Add cost model test case for transpose
Matthew Simpson [Mon, 23 Apr 2018 18:21:29 +0000 (18:21 +0000)]
[AArch64] Add cost model test case for transpose

This patch adds a cost model test case for vector shuffles having transpose
masks. The given costs are inaccurate and will be updated in a follow-on patch.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330625 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[HWASan] Switch back to fixed shadow mapping for x86-64
Alex Shlyapnikov [Mon, 23 Apr 2018 18:14:39 +0000 (18:14 +0000)]
[HWASan] Switch back to fixed shadow mapping for x86-64

For now switch back to fixed shadow mapping for x86-64 due to the issues
with IFUNC linking on older binutils. More details will be added to
https://bugs.chromium.org/p/chromium/issues/detail?id=835864

Differential Revision: https://reviews.llvm.org/D45840

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330623 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[X86] Add disassembler test cases for bswap.
Craig Topper [Mon, 23 Apr 2018 17:47:33 +0000 (17:47 +0000)]
[X86] Add disassembler test cases for bswap.

This demonstrates a bug where the encoding for a 16-bit bswap prints a 16-bit register and a 32-bit mnemonic. Intel docs say 16-bit bswap is undefined. We should either claim it as an invalid encoding or we should print a 16-bit mnemonic.

objdump does print the encoding as bswap with a 16-bit register. But it doesn't seem to ever print a suffix.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330621 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[SelectionDAG] Dump debug locs in SDNodes
Vedant Kumar [Mon, 23 Apr 2018 17:18:24 +0000 (17:18 +0000)]
[SelectionDAG] Dump debug locs in SDNodes

This helps debug issues where selection-dag assigns the wrong location
to an instruction.

Differential Revision: https://reviews.llvm.org/D45913

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330618 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[MC] Remove MachineInstr reference in MC layer (PR37160)
Simon Pilgrim [Mon, 23 Apr 2018 16:59:06 +0000 (16:59 +0000)]
[MC] Remove MachineInstr reference in MC layer (PR37160)

Only add support for getSchedInfoStr(const MachineInstr &MI) at the TargetSubtargetInfo level.

Really, the getSchedInfoStr calls need to be removed entirely, we should just return a latency/rthroughput through the subtarget and keep a string creation helper function somewhere else.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330615 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoFix -Wtautological-compare warning with npos on Windows
Reid Kleckner [Mon, 23 Apr 2018 16:47:27 +0000 (16:47 +0000)]
Fix -Wtautological-compare warning with npos on Windows

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330614 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoAMDGPU: Move a flawed assert when spilling SGPRs
Matt Arsenault [Mon, 23 Apr 2018 16:13:30 +0000 (16:13 +0000)]
AMDGPU: Move a flawed assert when spilling SGPRs

It's possible to validly spill the frame offset register
in a call sequence to a VGPR. There are definitely issues
with SGPR spilling to memory, so move the assert later.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330612 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[X86] Replace x87 instregex with instrs if they only match one instruction
Simon Pilgrim [Mon, 23 Apr 2018 16:10:50 +0000 (16:10 +0000)]
[X86] Replace x87 instregex with instrs if they only match one instruction

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330611 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoFix computeSymbolSizes SEGFAULT on invalid file
Adrian Prantl [Mon, 23 Apr 2018 16:08:01 +0000 (16:08 +0000)]
Fix computeSymbolSizes SEGFAULT on invalid file

We use llvm-symbolizer in some production systems, and we run it
against all possibly related files, including some that are not
ELF. We noticed that for some of those invalid files, llvm-symbolizer
would crash with SEGFAULT. Here is an example of such a file.

It is due to that in computeSymbolSizes, a loop uses condition

  for (unsigned I = 0, N = Addresses.size() - 1; I < N; ++I) {

where if Addresses.size() is 0, N would overflow and causing the loop
to access invalid memory.

Instead of patching the loop conditions, the commit makes so that the
function returns early if Addresses is empty.

Validated by checking that llvm-symbolizer no longer crashes.

Patch by Teng Qin!

Differential Revision: https://reviews.llvm.org/D44285

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330610 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoAMDGPU: Assign enum name to stack ID
Matt Arsenault [Mon, 23 Apr 2018 15:51:26 +0000 (15:51 +0000)]
AMDGPU: Assign enum name to stack ID

Also assert that it is correct for SGPRs. There is currently a bug
where stack slot coloring replaces SGPR spill FIs with one with
the default ID, which results in a more confusing assert later
about a dead object.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330607 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoStackSlotColoring: Fix missing skipFunction check
Matt Arsenault [Mon, 23 Apr 2018 15:51:21 +0000 (15:51 +0000)]
StackSlotColoring: Fix missing skipFunction check

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330606 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[SelectionDAG] Refactor lowering of atomic memory intrinsics.
Daniel Neilson [Mon, 23 Apr 2018 15:40:37 +0000 (15:40 +0000)]
[SelectionDAG] Refactor lowering of atomic memory intrinsics.

Summary:
This just refactors the lowering of the atomic memory intrinsics to more
closely match the code patterns used in the lowering of the non-atomic
memory intrinsics. Specifically, we encapsulate the lowering in
SelectionDAG::getAtomicMem*() functions rather than embedding
the code directly in the SelectionDAGBuilder code.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330603 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[LLVM-C] DIBuilderBindings for Subrange and Arrays
Robert Widmann [Mon, 23 Apr 2018 14:29:33 +0000 (14:29 +0000)]
[LLVM-C] DIBuilderBindings for Subrange and Arrays

Summary: Move Go bindings for subranges and DINode arrays.

Reviewers: harlanhaskins, whitequark, deadalnix

Reviewed By: whitequark

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D45933

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330594 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoSort a target list a bit better.
Nico Weber [Mon, 23 Apr 2018 14:28:49 +0000 (14:28 +0000)]
Sort a target list a bit better.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330593 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[DEBUGINFO, NVPTX] Add the test for the debug info of the local
Alexey Bataev [Mon, 23 Apr 2018 14:00:53 +0000 (14:00 +0000)]
[DEBUGINFO, NVPTX] Add the test for the debug info of the local
variables, NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330592 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[LLVM-C] Finish Up Scope Bindings
Robert Widmann [Mon, 23 Apr 2018 13:51:43 +0000 (13:51 +0000)]
[LLVM-C] Finish Up Scope Bindings

Summary: Adds bindings for Module and NameSpace scopes and LLVMDIBuilderCreateForwardDecl, a counterpart to LLVMDIBuilderCreateReplaceableCompositeType.

Reviewers: harlanhaskins, whitequark, deadalnix

Reviewed By: whitequark

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D45934

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330591 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[doc] Removed obsolete -count-aa from AliasAnalysis documentation
Marianne Mailhot-Sarrasin [Mon, 23 Apr 2018 13:45:28 +0000 (13:45 +0000)]
[doc] Removed obsolete -count-aa from AliasAnalysis documentation

Summary:
This patch removes references to AliasAnalysisCounter pass from the AliasAnalysis documentation. That pass have been eliminated in 2015, at revision trunk@247167.

Reviewed By: hfinkel

Differential Revision: https://reviews.llvm.org/D45876

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330590 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[X86] Remove instregex matching from CLAC/STAC.
Simon Pilgrim [Mon, 23 Apr 2018 13:24:17 +0000 (13:24 +0000)]
[X86] Remove instregex matching from CLAC/STAC.

Note - noticed this as the STAC case as it was unintentionally matching against *STACK* pseudo instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330588 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoList cpp file only once (was added in 147117 and 147117 as build fix each).
Nico Weber [Mon, 23 Apr 2018 13:11:51 +0000 (13:11 +0000)]
List cpp file only once (was added in 147117 and 147117 as build fix each).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330587 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoAMDGPU: Fix SDWA peephole for V_AND_B32
Nicolai Haehnle [Mon, 23 Apr 2018 13:06:03 +0000 (13:06 +0000)]
AMDGPU: Fix SDWA peephole for V_AND_B32

Summary:
Found by inspection. We care about the operand that *doesn't*
contain the immediate.

I believe this is currently not hit because we fold 0xff / 0xffff
immediates only later.

Change-Id: Ic3cf8538bc7da5eff3200d96eccf9d339e6345a7

Reviewers: arsenm, rampitec

Subscribers: kzhuravl, wdng, yaxunl, dstuttard, tpr, t-tye, llvm-commits

Differential Revision: https://reviews.llvm.org/D45886

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330586 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoAMDGPU: Fix a corner case crash in SIOptimizeExecMasking
Nicolai Haehnle [Mon, 23 Apr 2018 13:05:50 +0000 (13:05 +0000)]
AMDGPU: Fix a corner case crash in SIOptimizeExecMasking

Summary:
See the new test case; this is really unlikely to happen with real code,
but I ran into this while attempting to bugpoint-reduce a different issue.

Change-Id: I9ade1dc1aa8fd9c4d9fc83661d7b80e310b5c4a6

Reviewers: arsenm, rampitec

Subscribers: kzhuravl, wdng, yaxunl, dstuttard, tpr, t-tye, llvm-commits

Differential Revision: https://reviews.llvm.org/D45885

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330585 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoConsistently sort add_subdirectory calls in lib/Target/*/CMakeLists.txt
Nico Weber [Mon, 23 Apr 2018 12:49:34 +0000 (12:49 +0000)]
Consistently sort add_subdirectory calls in lib/Target/*/CMakeLists.txt

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330584 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[AArch64][SVE] Asm: Support for contiguous, non-faulting LDNF1 (scalar+imm) load...
Sander de Smalen [Mon, 23 Apr 2018 12:43:19 +0000 (12:43 +0000)]
[AArch64][SVE] Asm: Support for contiguous, non-faulting LDNF1 (scalar+imm) load instructions

Reviewers: fhahn, rengolin, javed.absar, huntergr, SjoerdMeijer, t.p.northover, echristo, evandro

Reviewed By: rengolin

Subscribers: tschuett, kristof.beyls, llvm-commits

Differential Revision: https://reviews.llvm.org/D45684

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330583 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[LoopRotate] Fix incorrect SCEV invalidation in loop rotation
Max Kazantsev [Mon, 23 Apr 2018 12:33:31 +0000 (12:33 +0000)]
[LoopRotate] Fix incorrect SCEV invalidation in loop rotation

LoopRotate only invalidates innermost loops while the changes that it makes may
also affert any of this parents. With patch rL329047, SCEV becomes much smarter
about calculation of exit counts for outer loops, so we cannot assume that they are
not affected.

Differential Revision: https://reviews.llvm.org/D45945

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330582 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[X86] Remove unnecessary MMX reg-mem InstRW scheduler overrides.
Simon Pilgrim [Mon, 23 Apr 2018 11:57:15 +0000 (11:57 +0000)]
[X86] Remove unnecessary MMX reg-mem InstRW scheduler overrides.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330581 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[LoopUnroll] Fix potentially incorrect SCEV invalidation in UnrollRuntime
Max Kazantsev [Mon, 23 Apr 2018 10:39:38 +0000 (10:39 +0000)]
[LoopUnroll] Fix potentially incorrect SCEV invalidation in UnrollRuntime

Current runtime unrolling invalidates parent loop saying that it might have changed
after the inner loop has changed, but it doesn't bother to do the same to its parents.
With patch rL329047, SCEV becomes much smarter about calculation of exit counts for
outer loops. We might need to invalidate not only the immediate parent, but also
any of its parents as well.

There is no clear evidence that there is some miscompile happening because of this
(at least I don't have such test), but the common sense says that the current code
is wrong.

Differential Revision: https://reviews.llvm.org/D45940
Reviewed By: chandlerc

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330577 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[LoopSimplify] Fix incorrect SCEV invalidation
Max Kazantsev [Mon, 23 Apr 2018 10:32:37 +0000 (10:32 +0000)]
[LoopSimplify] Fix incorrect SCEV invalidation

In the function `simplifyOneLoop` we optimistically assume that changes in the
inner loop only affect this very loop and have no impact on its parents. In fact,
after rL329047 has been merged, we can now calculate exit counts for outer
loops which may depend on inner loops. Thus, we need to invalidate all parents
when we do something to a loop.

There is an evidence of incorrect behavior of `simplifyOneLoop`: when we insert
`SE->verify()` check in the end of this funciton, it fails on a bunch of existing
test, in particular:

    LLVM :: Transforms/LoopUnroll/peel-loop-not-forced.ll
    LLVM :: Transforms/LoopUnroll/peel-loop-pgo.ll
    LLVM :: Transforms/LoopUnroll/peel-loop.ll
    LLVM :: Transforms/LoopUnroll/peel-loop2.ll

Note that previously we have fixed issues of this variety, see rL328483.
This patch makes this function invalidate the outermost loop properly.

Differential Revision: https://reviews.llvm.org/D45937
Reviewed By: chandlerc

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330576 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoFix BNF nits in TableGen language reference.
Simon Tatham [Mon, 23 Apr 2018 09:15:47 +0000 (09:15 +0000)]
Fix BNF nits in TableGen language reference.

Summary:
In the course of writing an experimental ANTLR grammar based on this
document, I found three errors in the documented BNF:

SimpleValues of dag type are allowed to have no operands at all after
the initial DagArg specifying the operator. For example, the value
(outs) is extremely common in backends; an example in the test suite
is test/TableGen/AsmVariant.td line 30. But the BNF doesn't allow
DagArgList to expand to the empty string (it must contain at least one
DagArg), and therefore the DagArgList specifying the operands in the
dag-shaped production for SimpleValue should be optional.

In the production for BodyItem with a 'let' and an optional RangeList,
the RangeList should have braces around it if it's present, matching
code such as "let E{7-0} = ..." on test/TableGen/BitsInit.td line 42.
Those braces aren't included in the RangeList nonterminal itself, so
instead they need to be part of the optional segment of the BodyItem
production.

Finally, the identifier after 'defm' should be optional. Again, this
is very common in the real back end .td files; an example in the test
suite is in test/TableGen/defmclass.td line 49.

Reviewers: rengolin, nhaehnle, stoklund

Reviewed By: nhaehnle

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D45818

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330570 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoTest commit access.
Simon Tatham [Mon, 23 Apr 2018 08:41:53 +0000 (08:41 +0000)]
Test commit access.

Should be a harmless trimming of trailing whitespace from a
documentation file.

(There are other instances of trailing whitespace in this file alone.
I've only fixed one of them, on the basis that that way the rest are
still available for other people's commit-access tests :-)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330567 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[AArch64][SVE] Asm: Support for structured ST2, ST3 and ST4 (scalar+imm) store instru...
Sander de Smalen [Mon, 23 Apr 2018 07:50:35 +0000 (07:50 +0000)]
[AArch64][SVE] Asm: Support for structured ST2, ST3 and ST4 (scalar+imm) store instructions.

Reviewers: fhahn, rengolin, javed.absar, SjoerdMeijer, t.p.northover, echristo, evandro, huntergr

Reviewed By: rengolin

Subscribers: tschuett, kristof.beyls, llvm-commits

Differential Revision: https://reviews.llvm.org/D45681

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330565 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[PM/LoopUnswitch] Remove a buggy assert in the new loop unswitch.
Chandler Carruth [Mon, 23 Apr 2018 06:58:36 +0000 (06:58 +0000)]
[PM/LoopUnswitch] Remove a buggy assert in the new loop unswitch.

The condition this was asserting doesn't actually hold. I've added
comments to explain why, removed the assert, and added a fun test case
reduced out of 403.gcc.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330564 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[X86] Add VEX_WIG to VEX encoded version of VCMPPSY/VCMPPDY.
Craig Topper [Mon, 23 Apr 2018 04:50:01 +0000 (04:50 +0000)]
[X86] Add VEX_WIG to VEX encoded version of VCMPPSY/VCMPPDY.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330563 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[PM/LoopUnswitch] Fix comment typo. NFC.
Chandler Carruth [Mon, 23 Apr 2018 00:48:42 +0000 (00:48 +0000)]
[PM/LoopUnswitch] Fix comment typo. NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330560 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[X86][Znver1] Remove unnecessary BMI1 ANDN InstRW overrides.
Simon Pilgrim [Sun, 22 Apr 2018 21:37:08 +0000 (21:37 +0000)]
[X86][Znver1] Remove unnecessary BMI1 ANDN InstRW overrides.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330558 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[llvm-mca][X86] Add BMI/LZCNT/POPCNT resource tests to all relevant models
Simon Pilgrim [Sun, 22 Apr 2018 20:42:24 +0000 (20:42 +0000)]
[llvm-mca][X86] Add BMI/LZCNT/POPCNT resource tests to all relevant models

The SandyBridge BMI tests are actually run on IvyBridge as that's the first lowest CPU that actually support the ISAs (but still use the SandyBridge model).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330556 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[LLVM-C] Add DIBuilder Bindings For Variable Creation
Robert Widmann [Sun, 22 Apr 2018 19:24:44 +0000 (19:24 +0000)]
[LLVM-C] Add DIBuilder Bindings For Variable Creation

Summary: Wrap LLVMDIBuilderCreateAutoVariable, LLVMDIBuilderCreateParameterVariable, LLVMDIBuilderCreateExpression, and move and correct LLVMDIBuilderInsertDeclareBefore and LLVMDIBuilderInsertDeclareAtEnd from the Go bindings to the C bindings.

Reviewers: harlanhaskins, whitequark, deadalnix

Reviewed By: harlanhaskins, whitequark

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D45928

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330555 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[X86] Remove unnecessary WriteFBlend/WriteBlend InstRW overrides.
Simon Pilgrim [Sun, 22 Apr 2018 18:35:53 +0000 (18:35 +0000)]
[X86] Remove unnecessary WriteFBlend/WriteBlend InstRW overrides.

Fixed a lot of the default classes which were being completely overridden.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330554 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[X86] Remove unnecessary WriteFMul/WriteFRcp/WriteFRsqrt InstRW overrides.
Simon Pilgrim [Sun, 22 Apr 2018 18:09:50 +0000 (18:09 +0000)]
[X86] Remove unnecessary WriteFMul/WriteFRcp/WriteFRsqrt InstRW overrides.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330553 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[X86] Remove unnecessary CVT instrw overrides.
Simon Pilgrim [Sun, 22 Apr 2018 17:54:58 +0000 (17:54 +0000)]
[X86] Remove unnecessary CVT instrw overrides.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330552 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoTest commit access.
Andres Freund [Sun, 22 Apr 2018 17:53:34 +0000 (17:53 +0000)]
Test commit access.

Remove trailing whitespace.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330551 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[PatternMatch] allow undef elements when matching a vector zero
Sanjay Patel [Sun, 22 Apr 2018 17:07:44 +0000 (17:07 +0000)]
[PatternMatch] allow undef elements when matching a vector zero

This is the last step in getting constant pattern matchers to allow
undef elements in constant vectors.

I'm adding a dedicated m_ZeroInt() function and building m_Zero() from
that. In most cases, calling code can be updated to use m_ZeroInt()
directly when there's no need to match pointers, but I'm leaving that
efficiency optimization as a follow-up step because it's not always
clear when that's ok.

There are just enough icmp folds in InstSimplify that can be used for
integer or pointer types, that we probably still want a generic m_Zero()
for those cases. Otherwise, we could eliminate it (and possibly add a
m_NullPtr() as an alias for isa<ConstantPointerNull>()).

We're conservatively returning a full zero vector (zeroinitializer) in
InstSimplify/InstCombine on some of these folds (see diffs in InstSimplify),
but I'm not sure if that's actually necessary in all cases. We may be
able to propagate an undef lane instead. One test where this happens is
marked with 'TODO'.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330550 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[X86][SkylakeServer] Remove unnecessary PMULLD instrw overrides.
Simon Pilgrim [Sun, 22 Apr 2018 16:51:12 +0000 (16:51 +0000)]
[X86][SkylakeServer] Remove unnecessary PMULLD instrw overrides.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330549 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[X86][Atom] Remove unnecessary scalar/vector load/move instrw overrides.
Simon Pilgrim [Sun, 22 Apr 2018 16:49:35 +0000 (16:49 +0000)]
[X86][Atom] Remove unnecessary scalar/vector load/move instrw overrides.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330548 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[InstCombine] add vector test with undef elts; NFC
Sanjay Patel [Sun, 22 Apr 2018 15:59:14 +0000 (15:59 +0000)]
[InstCombine] add vector test with undef elts; NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330547 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[X86] Fix (completely overridden) WriteFHAdd/WritePHAdd classes to allow us to remove...
Simon Pilgrim [Sun, 22 Apr 2018 15:25:59 +0000 (15:25 +0000)]
[X86] Fix (completely overridden) WriteFHAdd/WritePHAdd classes to allow us to remove unnecessary instrw overrides.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330546 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[X86][MMX][SSE] Tag missed PHADD/PHSUB instructions with WritePHAdd
Simon Pilgrim [Sun, 22 Apr 2018 15:02:23 +0000 (15:02 +0000)]
[X86][MMX][SSE] Tag missed PHADD/PHSUB instructions with WritePHAdd

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330545 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[X86] Remove unnecessary WriteFVarBlend/WriteVarBlend InstRW overrides.
Simon Pilgrim [Sun, 22 Apr 2018 14:43:12 +0000 (14:43 +0000)]
[X86] Remove unnecessary WriteFVarBlend/WriteVarBlend InstRW overrides.

This also fixes some of the ReadAfterLd issues due to InstRW.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330544 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[InstSimplify, InstCombine] add vector tests with undef elts; NFC
Sanjay Patel [Sun, 22 Apr 2018 14:19:37 +0000 (14:19 +0000)]
[InstSimplify, InstCombine] add vector tests with undef elts; NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330543 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[X86] Fix WriteMPSAD/WritePSADBW values to allow us to remove unnecessary instrw...
Simon Pilgrim [Sun, 22 Apr 2018 10:39:16 +0000 (10:39 +0000)]
[X86] Fix WriteMPSAD/WritePSADBW values to allow us to remove unnecessary instrw overrides.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330542 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[X86][SandyBridge] Remove unnecessary WritePOPCNTLd overrides by fixing load latency.
Simon Pilgrim [Sun, 22 Apr 2018 10:03:52 +0000 (10:03 +0000)]
[X86][SandyBridge] Remove unnecessary WritePOPCNTLd overrides by fixing load latency.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330541 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[llvm-mca][X86] Add POPCNT resource test
Simon Pilgrim [Sun, 22 Apr 2018 09:58:00 +0000 (09:58 +0000)]
[llvm-mca][X86] Add POPCNT resource test

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330540 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[test] Fix MC/ELF/nocompression.s
Jonas Devlieghere [Sun, 22 Apr 2018 08:46:27 +0000 (08:46 +0000)]
[test] Fix MC/ELF/nocompression.s

Unbreak the linux build bots:
  http://lab.llvm.org:8011/builders/clang-lld-x86_64-2stage/builds/5165/
  http://lab.llvm.org:8011/builders/llvm-clang-lld-x86_64-scei-ps4-ubuntu-fast/builds/28775
  http://lab.llvm.org:8011/builders/clang-with-lto-ubuntu/builds/8227

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330539 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[lli] Fix syntax error: missing ';'
Jonas Devlieghere [Sun, 22 Apr 2018 08:35:00 +0000 (08:35 +0000)]
[lli] Fix syntax error: missing ';'

Fixes build issue on the windows bots:
  error C2143: syntax error: missing ';'

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330538 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[lli] Make error handling more consistent.
Jonas Devlieghere [Sun, 22 Apr 2018 08:02:11 +0000 (08:02 +0000)]
[lli] Make error handling more consistent.

Makes error handling more consistent by using the helpers in support.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330537 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[llvm-mc] Make error handling more consistent.
Jonas Devlieghere [Sun, 22 Apr 2018 08:01:35 +0000 (08:01 +0000)]
[llvm-mc] Make error handling more consistent.

Makes error handling more consistent by using the helpers in support.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330536 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[Support] Fix prefix logic in WithColor.
Jonas Devlieghere [Sun, 22 Apr 2018 08:01:01 +0000 (08:01 +0000)]
[Support] Fix prefix logic in WithColor.

When a prefix is passed, we need to print a colon a space after it, not
just the prefix.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330535 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[X86] Remove an unnecessary HANDLE_OPTIONAL line from the disassembler operand proces...
Craig Topper [Sun, 22 Apr 2018 06:40:37 +0000 (06:40 +0000)]
[X86] Remove an unnecessary HANDLE_OPTIONAL line from the disassembler operand processing.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330534 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[X86] Change TB to PS on LFENCE instruction.
Craig Topper [Sun, 22 Apr 2018 03:15:02 +0000 (03:15 +0000)]
[X86] Change TB to PS on LFENCE instruction.

This matches the other FENCE instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330533 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[X86] Remove OpSizeIgnore, it's not implemented any differently than OpSizeFixed.
Craig Topper [Sun, 22 Apr 2018 01:24:58 +0000 (01:24 +0000)]
[X86] Remove OpSizeIgnore, it's not implemented any differently than OpSizeFixed.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330532 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[X86] Remove DATA32_PREFIX. Hack the printing for DATA16_PREFIX to print 'data32...
Craig Topper [Sun, 22 Apr 2018 00:52:02 +0000 (00:52 +0000)]
[X86] Remove DATA32_PREFIX. Hack the printing for DATA16_PREFIX to print 'data32' in 16-bit mode. Hack the asm parser to convert 'data32' to 'data16' in 16-bit mode.

Improve the error messages to match GNU assembler.

This also allows us to remove the hack from the disassembler table building.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330531 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[bcanalyzer] Recognize more stream types
Brian Gesiak [Sat, 21 Apr 2018 23:52:04 +0000 (23:52 +0000)]
[bcanalyzer] Recognize more stream types

Summary:
`llvm-bcanalyzer` prints out the stream type of the file it is
analyzing. If the file begins with the LLVM IR magic number, it reports
a stream type of "LLVM IR". However, any other bitstream format is
reported as "unknown".

Add some checks for two other common bitstream formats: Clang AST
files, which begin with 'CPCH', and Clang serialized diagnostics, which
begin with 'DIAG'.

Test Plan: `check-llvm`

Reviewers: pcc, aprantl, mehdi_amini, davide, george.karpenkov, JDevlieghere

Reviewed By: JDevlieghere

Subscribers: JDevlieghere, bruno, davide, llvm-commits

Differential Revision: https://reviews.llvm.org/D41979

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330529 91177308-0d34-0410-b5e6-96231b3b80d8