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Zachary Turner [Mon, 1 Oct 2018 17:55:16 +0000 (17:55 +0000)]
[PDB] Add support for parsing VFTable Shape records.
This allows them to be returned from the native API.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343506
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Matthias Braun [Mon, 1 Oct 2018 17:50:52 +0000 (17:50 +0000)]
MIRParser: Check that instructions only reference DILocation metadata
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343505
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Wouter van Oortmerssen [Mon, 1 Oct 2018 17:20:31 +0000 (17:20 +0000)]
[WebAssembly] Fixed AsmParser not allowing instructions with /
Summary:
The AsmParser Lexer regards these as a seperate token.
Here we expand the instruction name with them if they are
adjacent (no whitespace).
Tested: the basic-assembly.s test case has one case with a / in it.
The currently are also instructions with : in them, which we intend
to rename rather than fix them here.
Reviewers: tlively, dschuff
Subscribers: sbc100, jgravelle-google, aheejin, sunfish, llvm-commits
Differential Revision: https://reviews.llvm.org/D52442
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343501
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Craig Topper [Mon, 1 Oct 2018 17:10:50 +0000 (17:10 +0000)]
[X86] Enable load folding in the test shrinking code
This patch adds load folding support to the test shrinking code. This was noticed missing in the review for D52669
Differential Revision: https://reviews.llvm.org/D52699
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343499
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Craig Topper [Mon, 1 Oct 2018 17:10:45 +0000 (17:10 +0000)]
[X86] Improve test instruction shrinking when the sign flag is used and the output of the and is truncated
Currently we skip looking through truncates if the sign flag is used. But that's overly restrictive.
It's safe to look through the truncate as long as we ensure one of the 3 things when we shrink. Either the MSB of the mask at the shrunken size isn't set. If the mask bit is set then either the shrunk size needs to be equal to the compare size or the sign flag needs to be unused.
There are still missed opportunities to shrink a load and fold it in here. This will be fixed in a future patch.
Differential Revision: https://reviews.llvm.org/D52669
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343498
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Simon Pilgrim [Mon, 1 Oct 2018 16:31:30 +0000 (16:31 +0000)]
[X86][Btver2] Fix BT(C|R|S)mr & BT(C|R|S)mi schedule latency + uop counts
Match AMD Fam16h SOG + llvm-exegesis tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343494
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Matthias Braun [Mon, 1 Oct 2018 16:25:50 +0000 (16:25 +0000)]
DAGCombiner: StoreMerging: Fix bad index calculating when adjusting mismatching vector types
This fixes a case of bad index calculation when merging mismatching
vector types. This changes the existing code to just use the existing
extract_{subvector|element} and a bitcast (instead of bitcast first and
then newly created extract_xxx) so we don't need to adjust any indices
in the first place.
rdar://
44584718
Differential Revision: https://reviews.llvm.org/D52681
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343493
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Sanjay Patel [Mon, 1 Oct 2018 16:17:18 +0000 (16:17 +0000)]
[x86] add tests for 256- and 512-bit vector types for scalar-to-vector transform; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343491
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Simon Pilgrim [Mon, 1 Oct 2018 16:12:44 +0000 (16:12 +0000)]
[X86] Create schedule classes for BT(C|R|S)mi and BT(C|R|S)mr instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343490
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Evandro Menezes [Mon, 1 Oct 2018 16:11:19 +0000 (16:11 +0000)]
[AArch64] Refactor cheap cost model
Refactor the order in `TII::isAsCheapAsAMove()` to ease future development
and maintenance. Practically NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343489
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Simon Pilgrim [Mon, 1 Oct 2018 15:01:00 +0000 (15:01 +0000)]
[X86] Remove unnecessary BTmi/BTmr scheduler overrides
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343487
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Jesper Antonsson [Mon, 1 Oct 2018 14:59:25 +0000 (14:59 +0000)]
[InstCombine] Handle vector compares in foldGEPIcmp(), take 2
Summary:
This is a continuation of the fix for PR34627 "InstCombine assertion at vector gep/icmp folding". (I just realized bugpoint had fuzzed the original test for me, so I had fixed another trigger of the same assert in adjacent code in InstCombine.)
This patch avoids optimizing an icmp (to look only at the base pointers) when the resulting icmp would have a different type.
The patch adds a testcase and also cleans up and shrinks the pre-existing test for the adjacent assert trigger.
Reviewers: lebedev.ri, majnemer, spatel
Reviewed By: lebedev.ri
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D52494
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343486
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Simon Atanasyan [Mon, 1 Oct 2018 14:43:07 +0000 (14:43 +0000)]
[mips] Generate tests expectations using update_llc_test_checks. NFC
Generate tests expectations using update_llc_test_checks and reduce
number of "check prefixes" used in the tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343485
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Simon Pilgrim [Mon, 1 Oct 2018 14:42:16 +0000 (14:42 +0000)]
[X86][Btver2] Fix BTmr schedule uop counts
Match AMD Fam16h SOG + llvm-exegesis tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343484
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Sanjay Patel [Mon, 1 Oct 2018 14:40:00 +0000 (14:40 +0000)]
[InstCombine] try to convert vector insert+extract to trunc; 2nd try
This was originally committed at rL343407, but reverted at
rL343458 because it crashed trying to handle a case where
the destination type is FP. This version of the patch adds
a check for that possibility. Tests added at rL343480.
Original commit message:
This transform is requested for the backend in:
https://bugs.llvm.org/show_bug.cgi?id=39016
...but I figured it was worth doing in IR too, and it's probably
easier to implement here, so that's this patch.
In the simplest case, we are just truncating a scalar value. If the
extract index doesn't correspond to the LSBs of the scalar, then we
have to shift-right before the truncate. Endian-ness makes this tricky,
but hopefully the ASCII-art helps visualize the transform.
Differential Revision: https://reviews.llvm.org/D52439
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343482
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Sanjay Patel [Mon, 1 Oct 2018 14:29:09 +0000 (14:29 +0000)]
[InstCombine] add more insert-extract tests for D52439; NFC
The first attempt at this transform:
rL343407
...was reverted:
rL343458
...because it did not handle the case where we bitcast to FP.
The patch was already limited to avoid the case where we
bitcast from FP, but we might want to transform that too.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343480
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Simon Pilgrim [Mon, 1 Oct 2018 14:23:37 +0000 (14:23 +0000)]
[X86] Create schedule classes for BTmi and BTmr instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343478
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Haojian Wu [Mon, 1 Oct 2018 14:00:51 +0000 (14:00 +0000)]
Move llvm util dependencies from clang-tools-extra to add_lit_target.
Summary:
Address fixme in r301762. And would simplify the cmake file in
clang-tools-extra.
Reviewers: sammccall
Subscribers: mgorny, llvm-commits, cfe-commits
Differential Revision: https://reviews.llvm.org/D52713
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343473
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Robert Widmann [Mon, 1 Oct 2018 13:15:09 +0000 (13:15 +0000)]
[LLVM-C] Add an accessor for the kind of a Metadata Node
Summary: Allows for retrieving the type of a metadata node. Has the added benefit of ensuring that the C and C++ kind APIs stay in sync as a failure to add a corresponding LLVMMetadataKind will result in the switch in the accessor being semantically malformed.
Reviewers: whitequark, deadalnix
Reviewed By: whitequark
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D52693
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343469
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Simon Pilgrim [Mon, 1 Oct 2018 13:12:05 +0000 (13:12 +0000)]
[X86][Btver2] Fix masked load schedule
JFPU01 resource usage should match JFPX
Match AMD Fam16h SOG + llvm-exegesis tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343468
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Guillaume Chatelet [Mon, 1 Oct 2018 12:19:10 +0000 (12:19 +0000)]
[llvm-exegesis][NFC] Move random functions from CodeTemplate to SnippetGenerator.
Summary: Just moving methods around.
Reviewers: courbet
Subscribers: tschuett, llvm-commits
Differential Revision: https://reviews.llvm.org/D52720
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343461
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Sam McCall [Mon, 1 Oct 2018 12:17:05 +0000 (12:17 +0000)]
[Support] Listing a directory containing dangling symlinks is not an error.
Summary:
Reporting this as an error required stat()ing every file, as well as seeming
semantically questionable.
Reviewers: vsk, bkramer
Subscribers: mgrang, kristina, llvm-commits, liaoyuke
Differential Revision: https://reviews.llvm.org/D52648
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343460
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Hans Wennborg [Mon, 1 Oct 2018 12:07:45 +0000 (12:07 +0000)]
Revert r343407 "[InstCombine] try to convert vector insert+extract to trunc"
This caused Chromium builds to fail with "Illegal Trunc" assertion.
See https://crbug.com/890723 for repro.
> This transform is requested for the backend in:
> https://bugs.llvm.org/show_bug.cgi?id=39016
> ...but I figured it was worth doing in IR too, and it's probably
> easier to implement here, so that's this patch.
>
> In the simplest case, we are just truncating a scalar value. If the
> extract index doesn't correspond to the LSBs of the scalar, then we
> have to shift-right before the truncate. Endian-ness makes this tricky,
> but hopefully the ASCII-art helps visualize the transform.
>
> Differential Revision: https://reviews.llvm.org/D52439
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343458
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Guillaume Chatelet [Mon, 1 Oct 2018 11:46:06 +0000 (11:46 +0000)]
[llvm-exegesis][NFC] Make randomizeUnsetVariables a free function.
Summary: This is prelimineary to moving random functions to SnippetGenerator.
Reviewers: courbet
Subscribers: tschuett, llvm-commits
Differential Revision: https://reviews.llvm.org/D52718
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343456
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Alexander Timofeev [Mon, 1 Oct 2018 11:06:35 +0000 (11:06 +0000)]
[AMDGPU] Divergence driven instruction selection. Shift operations.
Summary: This change enables VOP3 shifts to be explicitly selected
dependent on the divergence.
Differential Revision: https://reviews.llvm.org/D52559
Reviewers: rampitec
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343455
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Puyan Lotfi [Mon, 1 Oct 2018 10:50:23 +0000 (10:50 +0000)]
[NFC] Adding "REQUIRES: zlib" to a llvm-objcopy test for bots without zlib.
M test/tools/llvm-objcopy/compress-and-decompress-debug-sections-error.test
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343454
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Andrea Di Biagio [Mon, 1 Oct 2018 10:35:13 +0000 (10:35 +0000)]
[X86][BtVer2] Teach how to identify zero-idiom VPERM2F128rr instructions.
This patch adds another variant class to identify zero-idiom VPERM2F128rr
instructions.
On Jaguar, a VPERM wih bit 3 and 7 of the mask set, is a zero-idiom.
Differential Revision: https://reviews.llvm.org/D52663
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343452
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Puyan Lotfi [Mon, 1 Oct 2018 10:29:41 +0000 (10:29 +0000)]
[llvm-objcopy] Adding support for decompressing zlib compressed dwarf sections.
Summary: I had added support for compressing dwarf sections in a prior commit,
this one adds support for decompressing. Usage is:
llvm-objcopy --decompress-debug-sections input.o output.o
Reviewers: jakehehrlich, jhenderson, alexshap
Reviewed By: jhenderson
Differential Revision: https://reviews.llvm.org/D51841
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343451
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Florian Hahn [Mon, 1 Oct 2018 09:59:48 +0000 (09:59 +0000)]
Recommit r343308: [LoopInterchange] Turn into a loop pass.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343450
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Clement Courbet [Mon, 1 Oct 2018 08:37:48 +0000 (08:37 +0000)]
[X86][Sched] Update scheduling information for VZEROALL on HWS, BDW, SKX, SNB.
Summary:
While looking at PR35606, I found out that the scheduling info is incorrect.
One can check that it's really a P5+P6 and not a 2*P56 with:
echo -e 'vzeroall\nvandps %xmm1, %xmm2, %xmm3' | ./bin/llvm-exegesis -mode=uops -snippets-file=-
(vandps executes on P5 only)
Reviewers: craig.topper, RKSimon
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D52541
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343447
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Clement Courbet [Mon, 1 Oct 2018 08:37:37 +0000 (08:37 +0000)]
[X86][Sched] Add pfm uop counter definitions for SNB,BDW,SKX.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343446
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Carlos Alberto Enciso [Mon, 1 Oct 2018 08:14:44 +0000 (08:14 +0000)]
[DebugInfo][Dexter] Incorrect DBG_VALUE after MCP dead copy instruction removal.
When MachineCopyPropagation eliminates a dead 'copy', its associated debug information becomes invalid. as the recorded register has been removed. It causes the debugger to display wrong variable value.
Differential Revision: https://reviews.llvm.org/D52614
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343445
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Clement Courbet [Mon, 1 Oct 2018 07:16:22 +0000 (07:16 +0000)]
[CodeGen][NFC] Add tests for heterogeneous types in MergeConsecutiveStores
Reviewers: efriedma
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D52643
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343444
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Craig Topper [Mon, 1 Oct 2018 07:08:41 +0000 (07:08 +0000)]
[X86] Stop X86DomainReassignment from creating copies between GR8/GR16 physical registers and k-registers.
We can only copy between a k-register and a GR32/GR64 register.
This patch detects that the copy will be illegal and prevents the domain reassignment from happening for that closure.
This probably isn't the best fix, and we should probably figure out how to handle this correctly.
Fixes PR38803.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343443
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Lang Hames [Mon, 1 Oct 2018 04:59:10 +0000 (04:59 +0000)]
[ORC] Pass Symbols to ExecutionSession::lookup by value, potentially saving a
copy.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343442
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Lang Hames [Mon, 1 Oct 2018 00:59:28 +0000 (00:59 +0000)]
[ORC] Add convenience methods for creating DynamicLibraryFallbackGenerators for
libraries on disk, and for the current process.
Avoids more boilerplate during JIT construction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343430
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Lang Hames [Mon, 1 Oct 2018 00:59:26 +0000 (00:59 +0000)]
[ORC] Add a method to JITTargetMachineBuilder to get the default data layout
for the target machine.
This simplifies usage during setup of concurrent JIT stacks where the client
needs a DataLayout, but not a TargetMachine (TargetMachines are created on
the fly by the compile threads later).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343429
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Craig Topper [Sun, 30 Sep 2018 23:43:30 +0000 (23:43 +0000)]
[X86] Change an llvm_unreachable to a report_fatal_error so the optimizer will stop making us reach the other report_fatal_error in this function.
There's a conditional report_fatal_error just above this llvm_unreachable. The optimizer when seeing the unreachable removes the conditional and just makes any other error trigger the existing report_fatal_error.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343428
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Lang Hames [Sun, 30 Sep 2018 23:18:24 +0000 (23:18 +0000)]
[ORC] Add an 'intern' method to ExecutionEngine for interning symbol names.
This cuts down on boilerplate by reducing 'ES.getSymbolStringPool().intern(...)'
to 'ES.intern(...)'.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343427
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Fangrui Song [Sun, 30 Sep 2018 22:31:29 +0000 (22:31 +0000)]
Use the container form llvm::sort(C, ...)
There are a few leftovers in rL343163 which span two lines. This commit
changes these llvm::sort(C.begin(), C.end, ...) to llvm::sort(C, ...)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343426
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Simon Pilgrim [Sun, 30 Sep 2018 20:19:16 +0000 (20:19 +0000)]
[X86] Fix scheduler class for BTmi instructions
This wasn't treated as a folded load instruction
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343424
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Lang Hames [Sun, 30 Sep 2018 19:12:23 +0000 (19:12 +0000)]
[ORC] Extract and tidy up JITTargetMachineBuilder, add unit test.
(1) Adds comments for the API.
(2) Removes the setArch method: This is redundant: the setArchStr method on the
triple should be used instead.
(3) Turns EmulatedTLS on by default. This matches EngineBuilder's behavior.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343423
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Simon Pilgrim [Sun, 30 Sep 2018 18:19:00 +0000 (18:19 +0000)]
[LLVM-MCA][X86] Add missing VCMPESTR/VCMPESTR tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343421
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Craig Topper [Sun, 30 Sep 2018 17:47:18 +0000 (17:47 +0000)]
[X86] Copy memrefs when folding a load for division instruction selection.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343419
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Bjorn Pettersson [Sun, 30 Sep 2018 17:26:58 +0000 (17:26 +0000)]
[PHIElimination] Lower a PHI node with only undef uses as IMPLICIT_DEF
Summary:
The lowering of PHI nodes used to detect if all inputs originated
from IMPLICIT_DEF's. If so the PHI node was replaced by an
IMPLICIT_DEF. Now we also consider undef uses when checking the
inputs. So if all inputs are implicitly defined or undef we
lower the PHI to an IMPLICIT_DEF. This makes
PHIElimination::LowerPHINode more consistent as it checks
both implicit and undef properties at later stages.
Reviewers: MatzeB, tstellar
Reviewed By: MatzeB
Subscribers: jvesely, nhaehnle, llvm-commits
Differential Revision: https://reviews.llvm.org/D52558
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343417
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Bjorn Pettersson [Sun, 30 Sep 2018 17:23:21 +0000 (17:23 +0000)]
[PHIElimination] Update the regression test for PR16508
Summary:
When PR16508 was solved (in rL185363) a regression test was
added as test/CodeGen/PowerPC/2013-07-01-PHIElimBug.ll.
I discovered that the test case no longer reproduced the
scenario from PR16508. This problem could have been amended
by adding an extra RUN line with "-O1" (or possibly "-O0"),
but instead I added a mir-reproducer
test/CodeGen/PowerPC/2013-07-01-PHIElimBug.mir
to get a reproducer that is less sensitive to changes in
earlier passes (including O-level).
While being at it I also corrected a code comment in
PHIElimination::EliminatePHINodes that has been incorrect
since the related bugfix from rL185363.
Reviewers: MatzeB, hfinkel
Reviewed By: MatzeB
Subscribers: nemanjai, jsji, llvm-commits
Differential Revision: https://reviews.llvm.org/D52553
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343416
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Simon Pilgrim [Sun, 30 Sep 2018 17:01:59 +0000 (17:01 +0000)]
[LLVM-MCA][X86] Add some AVX512 tests
These are going to be necessary to check I don't mess up when I start cleaning up all the remaining vector integer overrides
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343414
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Simon Pilgrim [Sun, 30 Sep 2018 16:38:38 +0000 (16:38 +0000)]
[X86][Btver2] Fix PCmpIStrI/PCmpIStrM schedules
Missing JFPU0 pipe and double JFPU1 pipe (to match JVALU1) resources
Match AMD Fam16h SOG + llvm-exegesis tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343413
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Zachary Turner [Sun, 30 Sep 2018 16:19:18 +0000 (16:19 +0000)]
[PDB] Add native support for dumping array types.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343412
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Simon Pilgrim [Sun, 30 Sep 2018 15:58:56 +0000 (15:58 +0000)]
[X86][BtVer2] Add the ability to add additional uops for folded instructions
Some instructions take an extra load uop - but not consistently.....
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343410
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Sanjay Patel [Sun, 30 Sep 2018 14:34:01 +0000 (14:34 +0000)]
[InstCombine] try to convert vector insert+extract to trunc
This transform is requested for the backend in:
https://bugs.llvm.org/show_bug.cgi?id=39016
...but I figured it was worth doing in IR too, and it's probably
easier to implement here, so that's this patch.
In the simplest case, we are just truncating a scalar value. If the
extract index doesn't correspond to the LSBs of the scalar, then we
have to shift-right before the truncate. Endian-ness makes this tricky,
but hopefully the ASCII-art helps visualize the transform.
Differential Revision: https://reviews.llvm.org/D52439
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343407
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Sanjay Patel [Sun, 30 Sep 2018 13:50:42 +0000 (13:50 +0000)]
[InstCombine] allow lengthening of insertelement to eliminate shuffles
As noted in post-commit comments for D52548, the limitation on
increasing vector length can be applied by opcode.
As a first step, this patch only allows insertelement to be
widened because that has no logical downsides for IR and has
little risk of pessimizing codegen.
This may cause PR39132 to go into hiding during a full compile,
but that bug is not fixed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343406
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Simon Pilgrim [Sun, 30 Sep 2018 12:46:42 +0000 (12:46 +0000)]
[DAG] Don't perform SINT_TO_FP<->UINT_TO_FP custom conversion after legalization
The SINT_TO_FP<->UINT_TO_FP combines for non-negative integers should only occur for legal ops once LegalOperations = true
No test case to hand, noticed when investigating PR38226 + PR38970
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343405
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Roman Lebedev [Sun, 30 Sep 2018 12:42:08 +0000 (12:42 +0000)]
[NFC][CodeGen][X86][AArch64] Add 64-bit constant bit field extract pattern tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343404
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Simon Pilgrim [Sun, 30 Sep 2018 09:42:04 +0000 (09:42 +0000)]
[X86] Regenerate MMX coalescing test
Exposes another extractelement(bitcast(scalartovector())) pattern
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343403
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Zachary Turner [Sun, 30 Sep 2018 03:57:49 +0000 (03:57 +0000)]
[PDB] Fix this test for real.
I was able to test this fix on an actual Windows machine
so this should get the bot green again.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343400
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Craig Topper [Sun, 30 Sep 2018 03:01:46 +0000 (03:01 +0000)]
[X86] Disable BMI BEXTR in X86DAGToDAGISel::matchBEXTRFromAnd unless we're on compiling for a CPU with single uop BEXTR
Summary:
This function turns (X >> C1) & C2 into a BMI BEXTR or TBM BEXTRI instruction. For BMI BEXTR we have to materialize an immediate into a register to feed to the BEXTR instruction.
The BMI BEXTR instruction is 2 uops on Intel CPUs. It looks like on SKL its one port 0/6 uop and one port 1/5 uop. Despite what Agner's tables say. I know one of the uops is a regular shift uop so it would have to go through the port 0/6 shifter unit. So that's the same or worse execution wise than the shift+and which is one 0/6 uop and one 0/1/5/6 uop. The move immediate into register is an additional 0/1/5/6 uop.
For now I've limited this transform to AMD CPUs which have a single uop BEXTR. If may also might make sense if we can fold a load or if the and immediate is larger than 32-bits and can't be encoded as a sign extended 32-bit value or if LICM or CSE can hoist the move immediate and share it. But we'd need to look more carefully at that. In the regression I looked at it doesn't look load folding or large immediates were occurring so the regression isn't caused by the loss of those. So we could try to be smarter here if we find a compelling case.
Reviewers: RKSimon, spatel, lebedev.ri, andreadb
Reviewed By: RKSimon
Subscribers: llvm-commits, andreadb, RKSimon
Differential Revision: https://reviews.llvm.org/D52570
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343399
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Zachary Turner [Sun, 30 Sep 2018 00:51:54 +0000 (00:51 +0000)]
Only dump the types we need in the test.
We added support for dumping pointers but pointers to arrays
won't correctly dump until we add support for dumping arrays.
Instead of trying to dump everything, which this test isn't
even interested in, just dump enums and typedefs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343398
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Zachary Turner [Sun, 30 Sep 2018 00:22:21 +0000 (00:22 +0000)]
Fix some tests on Windows.
I don't actually have a Windows machine at the present moment,
so hopefully this fixes it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343397
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Lang Hames [Sat, 29 Sep 2018 23:49:57 +0000 (23:49 +0000)]
[ORC] Add partitioning support to CompileOnDemandLayer2.
CompileOnDemandLayer2 now supports user-supplied partition functions (the
original CompileOnDemandLayer already supported these).
Partition functions are called with the list of requested global values
(i.e. global values that currently have queries waiting on them) and have an
opportunity to select extra global values to materialize at the same time.
Also adds testing infrastructure for the new feature to lli.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343396
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Lang Hames [Sat, 29 Sep 2018 23:49:56 +0000 (23:49 +0000)]
[ORC] Clear SymbolToDefinitionMap when materializing a MaterializationUnit.
The map is inaccessible at this point, so we may as well reclaim the memory
early.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343395
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Lang Hames [Sat, 29 Sep 2018 23:49:54 +0000 (23:49 +0000)]
Add a comment to clarify the contract for LLVMGetErrorMessage in the c-bindings
for Error.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343394
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Zachary Turner [Sat, 29 Sep 2018 23:28:19 +0000 (23:28 +0000)]
[PDB] Better native API support for pointers.
We didn't properly detect when a pointer was a member
pointer, and when that was the case we were not
properly returning class parent info. This caused
member pointers to render incorrectly in pretty mode.
However, we didn't even have pretty tests for pointers
in native mode, so those are also added now to ensure
this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343393
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David Bolvansky [Sat, 29 Sep 2018 21:00:37 +0000 (21:00 +0000)]
[DAGCombiner][NFC] Tests for X div/rem Y single bit fold
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343392
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Simon Pilgrim [Sat, 29 Sep 2018 20:34:16 +0000 (20:34 +0000)]
[X86][AVX2] Cleanup shuffle combining tests - add common prefixes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343391
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Simon Pilgrim [Sat, 29 Sep 2018 18:15:26 +0000 (18:15 +0000)]
[X86] SimplifyDemandedVectorEltsForTargetNode - remove identity target shuffles before simplifying inputs
By removing demanded target shuffles that simplify to zero/undef/identity before simplifying its inputs we improve chances of further simplification, as only the immediate parent user of the combined is added back to the work list - this still doesn't help us if its passed through other ops though (bitcasts....).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343390
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Craig Topper [Sat, 29 Sep 2018 18:03:52 +0000 (18:03 +0000)]
[X86] Add fast-isel test cases for unaligned load/store intrinsics recently added to clang
This adds tests for:
_mm_loadu_si16
_mm_loadu_si32
_mm_loadu_si16
_mm_storeu_si64
_mm_storeu_si32
_mm_storeu_si16
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343389
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Simon Pilgrim [Sat, 29 Sep 2018 17:36:22 +0000 (17:36 +0000)]
[X86][SSE] LowerScalarImmediateShift - remove 32-bit vXi64 special case handling.
This is all handled generally by getTargetConstantBitsFromNode now
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343387
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Simon Pilgrim [Sat, 29 Sep 2018 17:11:19 +0000 (17:11 +0000)]
Fix signed/unsigned mismatch warning. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343385
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Simon Pilgrim [Sat, 29 Sep 2018 17:01:55 +0000 (17:01 +0000)]
[X86] getTargetConstantBitsFromNode - add support for rearranging constant bits via shuffles
Exposed an issue that recursive calls to getTargetConstantBitsFromNode don't handle changes to EltSizeInBits yet.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343384
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Simon Pilgrim [Sat, 29 Sep 2018 16:40:35 +0000 (16:40 +0000)]
[X86][SSE] LowerScalarImmediateShift - use getTargetConstantBitsFromNode to get immediate data
Don't just attempt to find a splat build vector.
First step towards getting rid of all the 32-bit special case code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343383
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Sanjay Patel [Sat, 29 Sep 2018 15:05:24 +0000 (15:05 +0000)]
[InstCombine] fix formatting in vector evaluators; NFC
We need to alter the functionality as shown in D52548.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343379
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Sanjay Patel [Sat, 29 Sep 2018 15:01:45 +0000 (15:01 +0000)]
[InstCombine] add test for vector widening of insertelements; NFC
The test shows a potential overreach with the fix from D52548.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343378
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Simon Pilgrim [Sat, 29 Sep 2018 14:51:09 +0000 (14:51 +0000)]
[X86] getTargetConstantBitsFromNode - fix self-move assertions from gcc builds due to rL343375
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343377
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Simon Pilgrim [Sat, 29 Sep 2018 14:31:00 +0000 (14:31 +0000)]
[X86] Regenerate fma comments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343376
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Simon Pilgrim [Sat, 29 Sep 2018 14:17:32 +0000 (14:17 +0000)]
[X86] getTargetConstantBitsFromNode - add support for peeking through ISD::EXTRACT_SUBVECTOR
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343375
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Simon Pilgrim [Sat, 29 Sep 2018 13:25:22 +0000 (13:25 +0000)]
[X86][SSE] Fixed issue with v2i64 variable shifts on 32-bit targets
The shift amount might have peeked through a extract_subvector, altering the number of vector elements in the 'Amt' variable - so we were incorrectly calculating the ratio when peeking through bitcasts, resulting in incorrectly detecting splats.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343373
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Heejin Ahn [Sat, 29 Sep 2018 09:22:25 +0000 (09:22 +0000)]
Fix comment indentation in addLandingPad
rL343018 messed up the comment indentation while moving it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343371
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Vitaly Buka [Sat, 29 Sep 2018 02:17:12 +0000 (02:17 +0000)]
[cxx2a] Fix warning triggered by r343285
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343369
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Lang Hames [Fri, 28 Sep 2018 22:03:17 +0000 (22:03 +0000)]
[ORC] Make MaterializationResponsibility::getRequestedSymbols() const.
This makes it available for use in IRTransformLayer2::TransformFunction
instances (since a const MaterializationResponsibility& parameter was
added in r343365).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343367
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Lang Hames [Fri, 28 Sep 2018 21:49:53 +0000 (21:49 +0000)]
[ORC] Add more utilities to aid debugging output.
(1) A const accessor for the LLVMContext held by a ThreadSafeContext.
(2) A const accessor for the ThreadSafeModules held by an IRMaterializationUnit.
(3) A const MaterializationResponsibility reference to IRTransformLayer2's
transform function. This makes IRTransformLayer2 useful for JIT debugging
(since it can inspect JIT state through the responsibility argument) as well
as program transformations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343365
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Thomas Lively [Fri, 28 Sep 2018 21:36:43 +0000 (21:36 +0000)]
[ValueTracking] Allow select patterns to work on FP vectors
Summary:
This CL allows constant vectors of floats to be recognized as non-NaN
and non-zero in select patterns. This change makes
`matchSelectPattern` more powerful generally, but was motivated
specifically because I wanted fminnan and fmaxnan to be created for
vector versions of the scalar patterns they are created for.
Tested with check-all on all targets. A testcase in the WebAssembly
backend that tests the non-nan codepath is in an upcoming CL.
Reviewers: aheejin, dschuff
Subscribers: sunfish, llvm-commits
Differential Revision: https://reviews.llvm.org/D52324
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343364
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Robert Widmann [Fri, 28 Sep 2018 20:54:29 +0000 (20:54 +0000)]
[LLVM-C] Add an accessor for the "value type" of a global
Summary: Before this, there was no reasonable way to retrieve the type of a global value (most notably, a function) that was created with the C API.
Reviewers: whitequark, deadalnix
Reviewed By: whitequark
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D52659
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343363
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Heejin Ahn [Fri, 28 Sep 2018 20:54:04 +0000 (20:54 +0000)]
[WebAssembly] Fix memory leak on WasmEHFuncInfo
Summary: WasmEHFuncInfo objects were not being properly deleted.
Reviewers: dschuff
Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits
Differential Revision: https://reviews.llvm.org/D52582
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343362
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Eli Friedman [Fri, 28 Sep 2018 20:27:31 +0000 (20:27 +0000)]
[ARM] Fix correctness checks in promoteToConstantPool.
Correctly check for relocations in the constant to promote. And don't
allow promoting a constant multiple times.
This partially fixes https://bugs.llvm.org//show_bug.cgi?id=32780 ;
it's not a complete fix because we also need to prevent
ARMConstantIslands from cloning the constant.
(-arm-promote-constant is currently off by default, and it stays off
with this patch. I'll look into turning it on again when all the known
issues are fixed.)
Differential Revision: https://reviews.llvm.org/D51472
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343361
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Eli Friedman [Fri, 28 Sep 2018 20:21:51 +0000 (20:21 +0000)]
[ARM] Use preferred alignment for constants in promoteToConstantPool.
This mostly affects IR generated by non-clang frontends because clang
generally sets the alignment of globals explicitly.
Fixes https://bugs.llvm.org//show_bug.cgi?id=32394 .
(-arm-promote-constant is currently off by default, and it stays off
with this patch. I'll look into turning it on again when all the known
issues are fixed.)
Differential Revision: https://reviews.llvm.org/D51469
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343359
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Lang Hames [Fri, 28 Sep 2018 20:16:16 +0000 (20:16 +0000)]
[ORC] Narrow a cast: the block guarded by the condition only handles
GlobalVariables, not all GlobalValues.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343358
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Craig Topper [Fri, 28 Sep 2018 19:06:28 +0000 (19:06 +0000)]
[X86] Add test cases for failures to use narrow test with immediate instructions when a truncate is beteen the CMP and the AND and the sign flag is used.
The code in X86ISelDAGToDAG only looks through truncates if the sign flag isn't used, but that is overly restrictive. A future patch will improve this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343355
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Evandro Menezes [Fri, 28 Sep 2018 19:05:09 +0000 (19:05 +0000)]
[AArch64] Split zero cycle feature more granularly
Split the `zcz` feature into specific ones got GP and FP registers, `zcz-gp`
and `zcz-fp`, respectively, while retaining the original feature option to
mean both.
Differential revision: https://reviews.llvm.org/D52621
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343354
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George Karpenkov [Fri, 28 Sep 2018 18:49:01 +0000 (18:49 +0000)]
GraphWriter: Provide an API for writing a graph into a specified file
Always generating a temporary file is not always suitable, especially for tests
Differential Revision: https://reviews.llvm.org/D52636
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343351
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David Bolvansky [Fri, 28 Sep 2018 18:40:30 +0000 (18:40 +0000)]
[DAGCombiner] [NFC] Improve X div/rem 1 fold
Reviewers: spatel
Reviewed By: spatel
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D52661
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343349
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Chris Matthews [Fri, 28 Sep 2018 17:55:18 +0000 (17:55 +0000)]
make lit builtins a package
cat.py is not being installed when lit is installed from source. So
tests that use the internal shell fail when using cat.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343347
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Andrea Di Biagio [Fri, 28 Sep 2018 17:47:09 +0000 (17:47 +0000)]
[llvm-mca] Add a test for zero-idiom VPERM2F128rr. NFC
We don't correctly model the latency and resource usage information for
zero-idiom VPERM2F128rr on Jaguar.
This is demonstrated by the incorrect numbers in the resource pressure view, and
the timeline view.
A follow up patch will fix this problem.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343346
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whitequark [Fri, 28 Sep 2018 17:39:59 +0000 (17:39 +0000)]
[bindings/go] Add Go bindings to the Token type
Summary: This type is necessary for implementing coroutines.
Reviewers: whitequark
Reviewed By: whitequark
Subscribers: modocache, llvm-commits
Differential Revision: https://reviews.llvm.org/D47684
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343345
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Luke Cheeseman [Fri, 28 Sep 2018 17:01:50 +0000 (17:01 +0000)]
Revert r343317
- asan buildbots are breaking and I need to investigate the issue
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343341
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whitequark [Fri, 28 Sep 2018 16:48:47 +0000 (16:48 +0000)]
[bindings/go] Add Go bindings for inline assembly
Reviewers: harlanhaskins, whitequark, pcc
Reviewed By: pcc
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D46437
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343339
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whitequark [Fri, 28 Sep 2018 16:45:18 +0000 (16:45 +0000)]
Revert "[LLVM-C] Add bindings for addCoroutinePassesToExtensionPoints"
This reverts commit
c4baf7c2f06ff5459c4f5998ce980346e72bff97.
Broke the bots, and should really be in Transforms/Coroutines
instead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343337
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whitequark [Fri, 28 Sep 2018 16:38:11 +0000 (16:38 +0000)]
[LLVM-C] Add bindings for addCoroutinePassesToExtensionPoints
Summary: This patch adds bindings to C and Go for addCoroutinePassesToExtensionPoints, which is used to add coroutine passes to the correct locations in PassManagerBuilder.
Reviewers: whitequark, deadalnix
Reviewed By: whitequark
Subscribers: mehdi_amini, modocache, llvm-commits
Differential Revision: https://reviews.llvm.org/D51642
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343336
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Robert Widmann [Fri, 28 Sep 2018 16:02:26 +0000 (16:02 +0000)]
[LLVM-C] Fix broken build bots
Summary: Fix broken bots caused by the merge of D51522.
Reviewers: whitequark
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D52657
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343334
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Greg Bedwell [Fri, 28 Sep 2018 15:39:18 +0000 (15:39 +0000)]
[utils] Cope with the binary having a .exe extension in update_mca_test_checks.py
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343333
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