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7 years agoMissed a file in r289503.
Chris Bieneman [Tue, 13 Dec 2016 00:32:43 +0000 (00:32 +0000)]
Missed a file in r289503.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289504 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[LIT] Fix system-windows
Chris Bieneman [Tue, 13 Dec 2016 00:29:56 +0000 (00:29 +0000)]
[LIT] Fix system-windows

Turns out if you were on windows and your default target wasn't windows the system-windows feature wasn't getting enabled.

This fixes that and updates the coff-dwarf test to rely on the new "target-windows" feature. That test was the reason why system-windows was changed to not always be enabled on Windows hosts.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289503 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRevert "Suppress LLVM::tools/llvm-symbolizer/coff-dwarf.test for mingw, for now."
Chris Bieneman [Tue, 13 Dec 2016 00:29:51 +0000 (00:29 +0000)]
Revert "Suppress LLVM::tools/llvm-symbolizer/coff-dwarf.test for mingw, for now."

This reverts commit r249937.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289502 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[llvm-config] Unsupported should be win32
Chris Bieneman [Mon, 12 Dec 2016 23:42:08 +0000 (23:42 +0000)]
[llvm-config] Unsupported should be win32

Hopefully this will fix the failing Windows bot.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289497 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoStop lying about pointers' required alignments.
Tim Northover [Mon, 12 Dec 2016 23:29:07 +0000 (23:29 +0000)]
Stop lying about pointers' required alignments.

These extra specializations were added in the depths of history (r67984 from
2009) and are clearly problematic now. The pointers actually are aligned to the
default (8 bytes), since otherwise UBsan would be complaining loudly.

I *think* it originally made sense because there was no "alignof" to infer the
correct value so the generic case went with what malloc returned (8-byte
aliged objects), and on 32-bit machines this specialization was correct. It
became wrong when we started compiling for 64-bit, and caused a UBSan failure
when we tried to put a ValueHandle into a DenseMap.

Should fix the Green Dragon UBSan bot.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289496 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[libFuzzer] Implement Timers for Windows.
Marcos Pividori [Mon, 12 Dec 2016 23:25:11 +0000 (23:25 +0000)]
[libFuzzer] Implement Timers for Windows.

Implemented timeouts for Windows using TimerQueueTimers.
Timers are used to supervise the time of execution of the
callback function that is being fuzzed.

Differential Revision: https://reviews.llvm.org/D27237

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289495 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[x86] fix test specifications
Sanjay Patel [Mon, 12 Dec 2016 23:16:35 +0000 (23:16 +0000)]
[x86] fix test specifications

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289493 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[x86] fix test specifications and auto-generate checks
Sanjay Patel [Mon, 12 Dec 2016 23:15:15 +0000 (23:15 +0000)]
[x86] fix test specifications and auto-generate checks

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289492 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[CMake] Multi-target builtins build
Petr Hosek [Mon, 12 Dec 2016 23:15:10 +0000 (23:15 +0000)]
[CMake] Multi-target builtins build

This change enables building builtins for multiple different targets
using LLVM runtimes directory.

To specify the builtin targets to be built, use the LLVM_BUILTIN_TARGETS
variable, where the value is the list of targets.  To pass a per target
variable to the builtin build, you can set BUILTINS_<target>_<variable>
where <variable> will be passed to the builtin build for <target>.

Differential Revision: https://reviews.llvm.org/D26652

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289491 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRevert "Disable all llvm-config tests for now, will investigate later"
Chris Bieneman [Mon, 12 Dec 2016 23:14:58 +0000 (23:14 +0000)]
Revert "Disable all llvm-config tests for now, will investigate later"

This reverts commit r260386.

These tests all pass for me locally. I have no idea if they will pass on all configurations, so I'll watch the bots closely.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289490 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[llvm-config] Fix bug where `--libfiles` and `--names` would produce
Dan Liew [Mon, 12 Dec 2016 23:07:22 +0000 (23:07 +0000)]
[llvm-config] Fix bug where `--libfiles` and `--names` would produce
incorrect output when LLVM is built with `LLVM_BUILD_LLVM_DYLIB`.

`llvm-config` previously produced output like this

```
$ llvm-config --libfiles
/usr/lib/liblibLLVM-4.0svn.so.so
$ llvm-config --libnames
liblibLLVM-4.0svn.so.so
```

The library prefix and shared library extension were added to
the library name twice which was wrong.

I wanted to write a test cases for this but it looks like **all**
`llvm-config` tests were disabled by r260386 so I'll leave this for
now.

Subscribers: llvm-commits, tstellarAMD

Reviewers: beanz, DiamondLovesYou, axw

Differential Revision: https://reviews.llvm.org/D27393

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289488 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAvoid infinite loops in branch folding
Andrew Kaylor [Mon, 12 Dec 2016 23:05:38 +0000 (23:05 +0000)]
Avoid infinite loops in branch folding

Differential Revision: https://reviews.llvm.org/D27582

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289486 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoclang-format to fix post-commit feedback
Chris Bieneman [Mon, 12 Dec 2016 23:05:15 +0000 (23:05 +0000)]
clang-format to fix post-commit feedback

Thanks dblaikie!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289485 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[llvm-config] Fix cflags test looking for "error"
Chris Bieneman [Mon, 12 Dec 2016 23:03:28 +0000 (23:03 +0000)]
[llvm-config] Fix cflags test looking for "error"

This test is (I think) actually trying to make sure no errors are printed, but it hits on the string "error" in flags.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289484 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRevert "Remove system-libs.test for now"
Chris Bieneman [Mon, 12 Dec 2016 23:03:01 +0000 (23:03 +0000)]
Revert "Remove system-libs.test for now"

This reverts commit r260281.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289483 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRevert "[SCEVExpander] Use llvm data structures; NFC"
Sanjoy Das [Mon, 12 Dec 2016 23:00:12 +0000 (23:00 +0000)]
Revert "[SCEVExpander] Use llvm data structures; NFC"

This reverts r289215 (git SHA1 cb7b86a1).  It breaks the ubsan build
because a DenseMap that keys off of `AssertingVH<T>` will hit UB when it
tries to cast the empty and tombstone keys to `T *` (due to insufficient
alignment).

This is the relevant stack trace (thanks to Mike Aizatsky):

    #0 0x25cf100 in llvm::AssertingVH<llvm::PHINode>::getValPtr() const llvm/include/llvm/IR/ValueHandle.h:212:39
    #1 0x25cea20 in llvm::AssertingVH<llvm::PHINode>::operator=(llvm::AssertingVH<llvm::PHINode> const&) llvm/include/llvm/IR/ValueHandle.h:234:19
    #2 0x25d0092 in llvm::DenseMapBase<llvm::DenseMap<llvm::AssertingVH<llvm::PHINode>, llvm::detail::DenseSetEmpty, llvm::DenseMapInfo<llvm::AssertingVH<llvm::PHINode> >, llvm::detail::DenseSetPair<llvm::AssertingVH<llvm::PHINode> > >, llvm::AssertingVH<llvm::PHINode>, llvm::detail::DenseSetEmpty, llvm::DenseMapInfo<llvm::AssertingVH<llvm::PHINode> >, llvm::detail::DenseSetPair<llvm::AssertingVH<llvm::PHINode> > >::clear() llvm/include/llvm/ADT/DenseMap.h:113:23

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289482 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[libFuzzer] split one slow test into several, for more parallel testing
Kostya Serebryany [Mon, 12 Dec 2016 22:55:25 +0000 (22:55 +0000)]
[libFuzzer] split one slow test into several, for more parallel testing

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289481 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoFix MSVC build after 289461; MSVC isn't sure if this is std:: or llvm::
Nico Weber [Mon, 12 Dec 2016 22:46:40 +0000 (22:46 +0000)]
Fix MSVC build after 289461; MSVC isn't sure if this is std:: or llvm::

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289480 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[libFuzzer] make SimpleCmpTest a bit simpler to crack and more verbose
Kostya Serebryany [Mon, 12 Dec 2016 22:39:33 +0000 (22:39 +0000)]
[libFuzzer] make  SimpleCmpTest a bit simpler to crack and more verbose

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289477 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[x86] fix formatting; NFC
Sanjay Patel [Mon, 12 Dec 2016 22:31:01 +0000 (22:31 +0000)]
[x86] fix formatting; NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289476 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[AMDGPU, PowerPC, TableGen] Fix some Clang-tidy modernize and Include What You Use...
Eugene Zelenko [Mon, 12 Dec 2016 22:23:53 +0000 (22:23 +0000)]
[AMDGPU, PowerPC, TableGen] Fix some Clang-tidy modernize and Include What You Use warnings; other minor fixes (NFC).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289475 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[APFloatTest] Use std::make_tuple to make GCC 4.8 happy
Tim Shen [Mon, 12 Dec 2016 22:16:08 +0000 (22:16 +0000)]
[APFloatTest] Use std::make_tuple to make GCC 4.8 happy

Differential Revision: https://reviews.llvm.org/D26817

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289474 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[PPC] Prefer direct move on power8 if load 1 or 2 bytes to VSR
Guozhi Wei [Mon, 12 Dec 2016 22:09:02 +0000 (22:09 +0000)]
[PPC] Prefer direct move on power8 if load 1 or 2 bytes to VSR

Power8 has MTVSRWZ but no LXSIBZX/LXSIHZX, so move 1 or 2 bytes to VSR through MTVSRWZ is much faster than store the extended value into stack and load it with LXSIWZX.
This patch fixes pr31144.

Differential Revision: https://reviews.llvm.org/D27287

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289473 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[APFloat] Implement PPCDoubleDouble add and subtract.
Tim Shen [Mon, 12 Dec 2016 21:59:30 +0000 (21:59 +0000)]
[APFloat] Implement PPCDoubleDouble add and subtract.

Summary:
I looked at libgcc's implementation (which is based on the paper,
Software for Doubled-Precision Floating-Point Computations", by Seppo Linnainmaa,
ACM TOMS vol 7 no 3, September 1981, pages 272-283.) and made it generic to
arbitrary IEEE floats.

Differential Revision: https://reviews.llvm.org/D26817

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289472 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[SLP] Fix sign-extends for type-shrinking
Matthew Simpson [Mon, 12 Dec 2016 21:11:04 +0000 (21:11 +0000)]
[SLP] Fix sign-extends for type-shrinking

This patch ensures the correct minimum bit width during type-shrinking.
Previously when type-shrinking, we always sign-extended values back to their
original width. However, if we are going to sign-extend, and the sign bit is
unknown, we have to increase the minimum bit width by one bit so the
sign-extend will fill the upper bits correctly. If the sign bit is known to be
zero, we can perform a zero-extend instead. This should fix PR31243.

Reference: https://llvm.org/bugs/show_bug.cgi?id=31243
Differential Revision: https://reviews.llvm.org/D27466

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289470 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[libFuzzer] build libFuzzer itself with asan
Kostya Serebryany [Mon, 12 Dec 2016 20:58:10 +0000 (20:58 +0000)]
[libFuzzer] build libFuzzer itself with asan

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289469 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRecommit r288212: Emit 'no line' information for interesting 'orphan' instructions.
Paul Robinson [Mon, 12 Dec 2016 20:49:11 +0000 (20:49 +0000)]
Recommit r288212: Emit 'no line' information for interesting 'orphan' instructions.

DWARF specifies that "line 0" really means "no appropriate source
location" in the line table.  By default, use this for branch targets
and some other cases that have no specified source location, to
prevent inheriting unfortunate line numbers from physically preceding
instructions (which might be from completely unrelated source).

Updated patch allows enabling or suppressing this behavior for all
unspecified source locations.

Differential Revision: http://reviews.llvm.org/D24180

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289468 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[libFuzzer] respect -max_len during merge
Kostya Serebryany [Mon, 12 Dec 2016 20:39:35 +0000 (20:39 +0000)]
[libFuzzer] respect -max_len during merge

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289467 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[ThinLTO] Remove useless code (NFC)
Teresa Johnson [Mon, 12 Dec 2016 20:34:28 +0000 (20:34 +0000)]
[ThinLTO] Remove useless code (NFC)

Should have been removed in r288446.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289466 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRefactor BitcodeReader: move Metadata and ValueId handling in their own class/file
Mehdi Amini [Mon, 12 Dec 2016 19:34:26 +0000 (19:34 +0000)]
Refactor BitcodeReader: move Metadata and ValueId handling in their own class/file

Summary:
I'm planning on changing the way we load metadata to enable laziness.
I'm getting lost in this gigantic files, and gigantic class that is the bitcode
reader. This is a first toward splitting it in a few coarse components that
are more easily understandable.

Reviewers: pcc, tejohnson

Subscribers: mgorny, llvm-commits, dexonsmith

Differential Revision: https://reviews.llvm.org/D27646

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289461 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRemove IsMetadataMaterialized from BitcodeReader (NFC)
Mehdi Amini [Mon, 12 Dec 2016 19:23:39 +0000 (19:23 +0000)]
Remove IsMetadataMaterialized from BitcodeReader (NFC)

Summary: It does not seem useful.

Reviewers: pcc, dexonsmith

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D27668

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289457 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[LiveRangeEdit] Add assert string and descriptive comment.
Geoff Berry [Mon, 12 Dec 2016 19:12:41 +0000 (19:12 +0000)]
[LiveRangeEdit] Add assert string and descriptive comment.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289456 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoFix compile with GCC 5 or later
Dimitry Andric [Mon, 12 Dec 2016 19:05:52 +0000 (19:05 +0000)]
Fix compile with GCC 5 or later

Summary:

Compiling with GCC 5 or later can fail with a bogus error "constructor
required before non-static data member for
llvm::ValueEnumerator::MDRange::First has been parsed".

This was originally fixed upstream in GCC PR 70528, but later this fix
was reverted, and released versions of GCC still show the bogus error.

To work around this, replace MDRange's declaration of a default
constructor with a definition.

Reviewers: dexonsmith, rsmith, rivanvx

Subscribers: llvm-commits, dim, dexonsmith

Differential Revision: https://reviews.llvm.org/D18730

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289454 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRevert "[SCEVExpand] do not hoist divisions by zero (PR30935)"
Reid Kleckner [Mon, 12 Dec 2016 18:52:32 +0000 (18:52 +0000)]
Revert "[SCEVExpand] do not hoist divisions by zero (PR30935)"

Reverts r289412. It caused an OOB PHI operand access in instcombine when
ASan is enabled. Reduction in progress.

Also reverts "[SCEVExpander] Add a test case related to r289412"

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289453 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[mips] For PIC code convert unconditional jump to unconditional branch
Simon Atanasyan [Mon, 12 Dec 2016 17:40:26 +0000 (17:40 +0000)]
[mips] For PIC code convert unconditional jump to unconditional branch

Unconditional branch uses relative addressing which is the right choice
in case of position independent code.

This is a fix for the bug:
https://dmz-portal.mips.com/bugz/show_bug.cgi?id=2445

Differential revision: https://reviews.llvm.org/D27483

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289448 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAMDGPU: llvm.amdgcn.interp.mov is a source of divergence
Nicolai Haehnle [Mon, 12 Dec 2016 16:52:19 +0000 (16:52 +0000)]
AMDGPU: llvm.amdgcn.interp.mov is a source of divergence

Summary:
While the result is constant across a single primitive, each pixel
shader wave can have pixels from multiple primitives.

Reviewers: tstellarAMD, arsenm

Subscribers: kzhuravl, wdng, yaxunl, llvm-commits, tony-tye

Differential Revision: https://reviews.llvm.org/D27572

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289447 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoremove stale FIXME note from test; NFC
Sanjay Patel [Mon, 12 Dec 2016 16:20:21 +0000 (16:20 +0000)]
remove stale FIXME note from test; NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289445 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[X86] Regenerate vector bitcast/widening tests.
Simon Pilgrim [Mon, 12 Dec 2016 16:15:45 +0000 (16:15 +0000)]
[X86] Regenerate vector bitcast/widening tests.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289443 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[InstCombine] fix bug when offsetting case values of a switch (PR31260)
Sanjay Patel [Mon, 12 Dec 2016 16:13:52 +0000 (16:13 +0000)]
[InstCombine] fix bug when offsetting case values of a switch (PR31260)

We could truncate the condition and then try to fold the add into the
original condition value causing wrong case constants to be used.

Move the offset transform ahead of the truncate transform and return
after each transform, so there's no chance of getting confused values.

Fix for:
https://llvm.org/bugs/show_bug.cgi?id=31260

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289442 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[ThinLTO] Import only necessary DICompileUnit fields
Teresa Johnson [Mon, 12 Dec 2016 16:09:30 +0000 (16:09 +0000)]
[ThinLTO] Import only necessary DICompileUnit fields

Summary:
As discussed on mailing list, for ThinLTO importing we don't need
to import all the fields of the DICompileUnit. Don't import enums,
macros, retained types lists. Also only import local scoped imported
entities. Since we don't currently import any global variables,
we also don't need to import the list of global variables (added an
assert to verify none are being imported).

This is being done by pre-populating the value map entries to map
the unneeded metadata to nullptr. For the imported entities, we can
simply replace the source module's list with a new list containing
only those needed imported entities. This is done in the IRLinker
constructor so that value mapping automatically does the desired
mapping.

Reviewers: mehdi_amini, dexonsmith, dblaikie, aprantl

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D27635

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289441 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[InstCombine] clean up range-for-loops in visitSwitchInst(); NFCI
Sanjay Patel [Mon, 12 Dec 2016 15:52:56 +0000 (15:52 +0000)]
[InstCombine] clean up range-for-loops in visitSwitchInst(); NFCI

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289439 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[X86] Regenerate test.
Simon Pilgrim [Mon, 12 Dec 2016 15:47:53 +0000 (15:47 +0000)]
[X86] Regenerate test.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289438 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[InstCombine] add test to show PR31260 miscompile; NFC
Sanjay Patel [Mon, 12 Dec 2016 15:28:44 +0000 (15:28 +0000)]
[InstCombine] add test to show PR31260 miscompile; NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289437 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[SCEVExpander] Add a test case related to r289412
Sanjoy Das [Mon, 12 Dec 2016 14:57:11 +0000 (14:57 +0000)]
[SCEVExpander] Add a test case related to r289412

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289435 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoUpdate inline argument comment. NFCI.
Simon Pilgrim [Mon, 12 Dec 2016 13:43:15 +0000 (13:43 +0000)]
Update inline argument comment. NFCI.

combineX86ShufflesRecursively 'HasPSHUFB' flag has been the more generic 'HasVariableMask' flag for some time.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289430 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[X86][SSE] Add support for combining SSE VSHLI/VSRLI uniform constant shifts.
Simon Pilgrim [Mon, 12 Dec 2016 13:33:58 +0000 (13:33 +0000)]
[X86][SSE] Add support for combining SSE VSHLI/VSRLI uniform constant shifts.

Fixes some missed constant folding opportunities and allows us to combine shuffles that end with a logical bit shift.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289429 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[X86][SSE] Lower suitably sign-extended mul vXi64 using PMULDQ
Simon Pilgrim [Mon, 12 Dec 2016 10:49:15 +0000 (10:49 +0000)]
[X86][SSE] Lower suitably sign-extended mul vXi64 using PMULDQ

PMULDQ returns the 64-bit result of the signed multiplication of the lower 32-bits of vXi64 vector inputs, we can lower with this if the sign bits stretch that far.

Differential Revision: https://reviews.llvm.org/D27657

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289426 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[SelectionDAG] Add support for EXTRACT_SUBVECTOR to ComputeNumSignBits
Simon Pilgrim [Mon, 12 Dec 2016 10:29:43 +0000 (10:29 +0000)]
[SelectionDAG] Add support for EXTRACT_SUBVECTOR to ComputeNumSignBits

Pre-commit as discussed on D27657

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289425 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[X86] Teach selectScalarSSELoad to accept full 128-bit vector loads and the X86ISD...
Craig Topper [Mon, 12 Dec 2016 07:57:24 +0000 (07:57 +0000)]
[X86] Teach selectScalarSSELoad to accept full 128-bit vector loads and the X86ISD::VZEXT_LOAD opcode.

Disable peephole on some of the tests that no longer require it to properly fold scalar intrinsics.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289424 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[X86] Change CMPSS/CMPSD intrinsic instructions to use sse_load_f32/f64 as its memory...
Craig Topper [Mon, 12 Dec 2016 07:57:21 +0000 (07:57 +0000)]
[X86] Change CMPSS/CMPSD intrinsic instructions to use sse_load_f32/f64 as its memory pattern instead of full vector load.

These intrinsics only load a single element. We should use sse_loadf32/f64 to give more options of what loads it can match.

Currently these instructions are often only getting their load folded thanks to the load folding in the peephole pass. I plan to add more types of loads to sse_load_f32/64 so we can match without the peephole.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289423 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[X86] Remove some intrinsic instructions from hasPartialRegUpdate
Craig Topper [Mon, 12 Dec 2016 05:07:17 +0000 (05:07 +0000)]
[X86] Remove some intrinsic instructions from hasPartialRegUpdate

Summary:
These intrinsic instructions are all selected from intrinsics that have well defined behavior for where the upper bits come from. It's not the same place as the lower bits.

As you can see we were suppressing load folding for these instructions in some cases. In none of the cases was the separate load helping avoid a partial dependency on the destination register. So we should just go ahead and allow the load to be folded.

Only foldMemoryOperand was suppressing folding for these. They all have patterns for folding sse_load_f32/f64 that aren't gated with OptForSize, but sse_load_f32/f64 doesn't allow 128-bit vector loads. It only allows scalar_to_vector and vzmovl of scalar loads to match. There's no reason we can't allow a 128-bit vector load to be narrowed so I would like to fix sse_load_f32/f64 to allow that. And if I do that it changes some of these same test cases to fold the load too.

Reviewers: spatel, zvi, RKSimon

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D27611

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289419 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[SCEVExpand] do not hoist divisions by zero (PR30935)
Sebastian Pop [Mon, 12 Dec 2016 02:52:51 +0000 (02:52 +0000)]
[SCEVExpand] do not hoist divisions by zero (PR30935)

SCEVExpand computes the insertion point for the components of a SCEV to be code
generated.  When it comes to generating code for a division, SCEVexpand would
not be able to check (at compilation time) all the conditions necessary to avoid
a division by zero.  The patch disables hoisting of expressions containing
divisions by anything other than non-zero constants in order to avoid hoisting
these expressions past conditions that should hold before doing the division.

The patch passes check-all on x86_64-linux.

Differential Revision: https://reviews.llvm.org/D27216

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289412 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[InstCombine][XOP] The instructions for the scalar frcz intrinsics are defined to...
Craig Topper [Sun, 11 Dec 2016 22:32:38 +0000 (22:32 +0000)]
[InstCombine][XOP] The instructions for the scalar frcz intrinsics are defined to put 0 in the upper bits, not pass bits through like other intrinsics. So we should return a zero vector instead.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289411 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[X86][SSE] Add support for combining target shuffles to SHUFPD.
Simon Pilgrim [Sun, 11 Dec 2016 21:26:25 +0000 (21:26 +0000)]
[X86][SSE] Add support for combining target shuffles to SHUFPD.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289407 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[SCCP] Use the appropriate helper function. NFCI.
Davide Italiano [Sun, 11 Dec 2016 21:19:03 +0000 (21:19 +0000)]
[SCCP] Use the appropriate helper function. NFCI.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289406 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[X86][AVX512] Add missing patterns for broadcast fallback in case load node has multi...
Ayman Musa [Sun, 11 Dec 2016 20:11:17 +0000 (20:11 +0000)]
[X86][AVX512] Add missing patterns for broadcast fallback in case load node has multiple uses (for v4i64 and v4f64).

When the load node which the broadcast instruction broadcasts has multiple uses, it cannot be folded.
A fallback pattern is added to catch these cases and provide another solution.

Differential Revision: https://reviews.llvm.org/D27661

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289404 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[TBAA] Don't generate invalid TBAA when merging nodes
Sanjoy Das [Sun, 11 Dec 2016 20:07:25 +0000 (20:07 +0000)]
[TBAA] Don't generate invalid TBAA when merging nodes

Summary:
Fix a corner case in `MDNode::getMostGenericTBAA` where we can sometimes
generate invalid TBAA metadata.

Reviewers: chandlerc, hfinkel, mehdi_amini, manmanren

Subscribers: mcrosier, llvm-commits

Differential Revision: https://reviews.llvm.org/D26635

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289403 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[Verifier] Add verification for TBAA metadata
Sanjoy Das [Sun, 11 Dec 2016 20:07:15 +0000 (20:07 +0000)]
[Verifier] Add verification for TBAA metadata

Summary:
This change adds some verification in the IR verifier around struct path
TBAA metadata.

Other than some basic sanity checks (e.g. we get constant integers where
we expect constant integers), this checks:

 - That by the time an struct access tuple `(base-type, offset)` is
   "reduced" to a scalar base type, the offset is `0`.  For instance, in
   C++ you can't start from, say `("struct-a", 16)`, and end up with
   `("int", 4)` -- by the time the base type is `"int"`, the offset
   better be zero.  In particular, a variant of this invariant is needed
   for `llvm::getMostGenericTBAA` to be correct.

 - That there are no cycles in a struct path.

 - That struct type nodes have their offsets listed in an ascending
   order.

 - That when generating the struct access path, you eventually reach the
   access type listed in the tbaa tag node.

Reviewers: dexonsmith, chandlerc, reames, mehdi_amini, manmanren

Subscribers: mcrosier, llvm-commits

Differential Revision: https://reviews.llvm.org/D26438

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289402 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[Constants] don't die processing non-ConstantInt GEP indices in isGEPWithNoNotionalOv...
Sanjay Patel [Sun, 11 Dec 2016 20:07:02 +0000 (20:07 +0000)]
[Constants] don't die processing non-ConstantInt GEP indices in isGEPWithNoNotionalOverIndexing() (PR31262)

This should fix:
https://llvm.org/bugs/show_bug.cgi?id=31262

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289401 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[X86][AVX512] Add target shuffle test showing missing PSHUFPD combine.
Simon Pilgrim [Sun, 11 Dec 2016 19:41:23 +0000 (19:41 +0000)]
[X86][AVX512] Add target shuffle test showing missing PSHUFPD combine.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289400 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoinstr-combiner: sum up all latencies of the transformed instructions
Sebastian Pop [Sun, 11 Dec 2016 19:39:32 +0000 (19:39 +0000)]
instr-combiner: sum up all latencies of the transformed instructions

We have found that -- when the selected subarchitecture has a scheduling model
and we are not optimizing for size -- the machine-instruction combiner uses a
too-simple algorithm to compute the cost of one of the two alternatives [before
and after running a combining pass on a section of code], and therefor it throws
away the combination results too often.

This fix has the potential to help any ISA with the potential to combine
instructions and for which at least one subarchitecture has a scheduling model.
As of now, this is only known to definitely affect AArch64 subarchitectures with
a scheduling model.

Regression tested on AMD64/GNU-Linux, new test case tested to fail on an
unpatched compiler and pass on a patched compiler.

Patch by Abe Skolnik and Sebastian Pop.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289399 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[X86][XOP] Add target shuffle tests showing missing PSHUFPD combine.
Simon Pilgrim [Sun, 11 Dec 2016 19:36:25 +0000 (19:36 +0000)]
[X86][XOP] Add target shuffle tests showing missing PSHUFPD combine.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289398 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[SCEVExpander] Explicitly expand AddRec starts into loop preheader
Sanjoy Das [Sun, 11 Dec 2016 19:02:21 +0000 (19:02 +0000)]
[SCEVExpander] Explicitly expand AddRec starts into loop preheader

This is NFC today, but won't be once D27216 (or an equivalent patch) is
in.

This change fixes a design problem in SCEVExpander -- it relied on a
hoisting optimization to generate correct code for add recurrences.
This meant changing the hoisting optimization to not kick in under
certain circumstances (to avoid speculating faulting instructions, say)
would break correctness.

The fix is to make the correctness requirements explicit, and have it
not rely on the hoisting optimization for correctness.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289397 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[X86] Regcall - Adding support for mask types
Oren Ben Simhon [Sun, 11 Dec 2016 14:10:52 +0000 (14:10 +0000)]
[X86] Regcall - Adding support for mask types

Regcall calling convention passes mask types arguments in x86 GPR registers.
The review includes the changes required in order to support v32i1, v16i1 and v8i1.

Differential Revision: https://reviews.llvm.org/D27148

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289383 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[FileCheck] Re-implement the logic to find each check prefix in the
Chandler Carruth [Sun, 11 Dec 2016 12:49:05 +0000 (12:49 +0000)]
[FileCheck] Re-implement the logic to find each check prefix in the
check file to not be unreasonably slow in the face of multiple check
prefixes.

The previous logic would repeatedly scan potentially large portions of
the check file looking for alternative prefixes. In the worst case this
would scan most of the file looking for a rare prefix between every
single occurance of a common prefix. Even if we bounded the scan, this
would do bad things if the order of the prefixes was "unlucky" and the
distant prefix was scanned for first.

None of this is necessary. It is straightforward to build a state
machine that recognizes the first, longest of the set of alternative
prefixes. That is in fact exactly whan a regular expression does.

This patch builds a regular expression once for the set of prefixes and
then uses it to search incrementally for the next prefix. This requires
some threading of state but actually makes the code dramatically
simpler. I've also added a big comment describing the algorithm as it
was not at all obvious to me when I started.

With this patch, several previously pathological test cases in
test/CodeGen/X86 are 5x and more faster. Overall, running all tests
under test/CodeGen/X86 uses 10% less CPU after this, and because all the
slowest tests were hitting this, finishes in 40% less wall time on my
system (going from just over 5.38s to just over 3.23s) on a release
build! This patch substantially improves the time of all 7 X86 tests
that were in the top 20 reported by --time-tests, 5 of them are
completely off the list and the remaining 2 are much lower. (Sadly, the
new tests on the list include 2 new X86 ones that are slow for unrelated
reasons, so the count stays at 4 of the top 20.)

It isn't clear how much this helps debug builds in aggregate in part
because of the noise, but it again makes mane of the slowest x86 tests
significantly faster (10% or more improvement).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289382 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[FileCheck] Remove a parameter that was simply always set to
Chandler Carruth [Sun, 11 Dec 2016 10:22:17 +0000 (10:22 +0000)]
[FileCheck] Remove a parameter that was simply always set to
a commandline flag and test the flag directly. NFC.

If we ever need this generality it can be added back.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289381 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[FileCheck] Clean up doxygen comments throughout. NFC.
Chandler Carruth [Sun, 11 Dec 2016 10:16:21 +0000 (10:16 +0000)]
[FileCheck] Clean up doxygen comments throughout. NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289380 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[FileCheck] Run clang-format over this code. NFC.
Chandler Carruth [Sun, 11 Dec 2016 09:54:36 +0000 (09:54 +0000)]
[FileCheck] Run clang-format over this code. NFC.

This fixes one formatting goof I left in my previous commit and *many*
other inconsistencies.

I'm planning to make substantial changes here and so wanted to get to
a clean baseline.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289379 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRefactor FileCheck some to reduce memory allocation and copying. Also
Chandler Carruth [Sun, 11 Dec 2016 09:50:05 +0000 (09:50 +0000)]
Refactor FileCheck some to reduce memory allocation and copying. Also
make some readability improvements.

Both the check file and input file have to be fully buffered to
normalize their whitespace. But previously this would be done in a stack
SmallString and then copied into a heap allocated MemoryBuffer. That
seems pretty wasteful, especially for something like FileCheck where
there are only ever two such entities.

This just rearranges the code so that we can keep the canonicalized
buffers on the stack of the main function, use reasonably large stack
buffers to reduce allocation. A rough estimate seems to show that about
80% of LLVM's .ll and .s files will fit into a 4k buffer, so this should
completely avoid heap allocation for the buffer in those cases. My
system's malloc is fast enough that the allocations don't directly show
up in timings. However, on some very slow test cases, this saves 1% - 2%
by avoiding the copy into the heap allocated buffer.

This also splits out the code which checks the input into a helper much
like the code to build the checks as that made the code much more
readable to me. Nit picks and suggestions welcome here. It has really
exposed a *bunch* of stuff that could be cleaned up though, so I'm
probably going to go and spring clean all of this code as I have more
changes coming to speed things up.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289378 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[X86][InstCombine] Add support for scalar FMA intrinsics to SimplifyDemandedVectorElts.
Craig Topper [Sun, 11 Dec 2016 08:54:52 +0000 (08:54 +0000)]
[X86][InstCombine] Add support for scalar FMA intrinsics to SimplifyDemandedVectorElts.

This teaches SimplifyDemandedElts that the FMA can be removed if the lower element isn't used. It also teaches it that if upper elements of the first operand aren't used then we can simplify them.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289377 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[X86][InstCombine] Add the test cases for r289370, r289371, and r289372.
Craig Topper [Sun, 11 Dec 2016 08:00:51 +0000 (08:00 +0000)]
[X86][InstCombine] Add the test cases for r289370, r289371, and r289372.

I forgot to add the new files before commiting.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289374 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoTweak the core loop in StringRef::find to avoid calling memcmp on every
Chandler Carruth [Sun, 11 Dec 2016 07:46:21 +0000 (07:46 +0000)]
Tweak the core loop in StringRef::find to avoid calling memcmp on every
iteration.

Instead, load the byte at the needle length, compare it directly, and
save it to use in the lookup table of lengths we can skip forward.

I also added an annotation to expect that the comparison fails so that
the loop gets laid out contiguously without the call to memcpy (and the
substantial register shuffling that the ABI requires of that call).

Finally, because this behaves especially badly with a needle length of
one (by calling memcmp with a zero length) special case that to directly
call memchr, which is what we should have been doing anyways.

This was motivated by the fact that there are a large number of test
cases in 'check-llvm' where FileCheck's performance is dominated by
calls to StringRef::find (in a release, no-asserts build). I'm working
on patches to generally improve matters there, but this alone was worth
a 12.5% improvement in one test case where FileCheck spent 92% of its
time in this routine.

I experimented a bunch with different minor variations on this theme,
for example setting the pointer *at* the last byte and indexing
backwards for the call to memcmp. That didn't improve anything on this
version and seemed more complex. I also tried other things to make the
loop flow more nicely and none worked. =/ It is a bit unfortunate, the
generated code here remains pretty gross, but I don't see any obvious
ways to improve it. At this point, most of my ideas would be really
elaborate:

1) While the remainder of the string is long enough, we could load
   a 16-byte or 32-byte vector at the address of the last byte and use
   palignr to rotate that and check the first 15- or 31-bytes at the
   front of the next segment, essentially pre-loading the first several
   bytes of the next iteration so we could quickly detect a mismatch in
   those bytes without an additional memory access. Down side would be
   the code complexity, having a fallback loop, and likely misaligned
   vector load. Plus it would make the common case of the last byte not
   matching somewhat slower (need some extraction from a vector).
2) While we have space, we could do an aligned load of a 16- or 32-byte
   vector that *contains* the end byte, and use any peceding bytes to
   have a more precise "no" test, and any subsequent bytes could be
   saved for the next iteration. This remove any unaligned load penalty,
   but still requires us to pay the overhead of vector extraction for
   the cases where we didn't need to do anything other than load and
   compare the last byte.
3) Try to walk from the last byte in a way that is more friendly to
   cache and/or memory pre-fetcher considering we have to poke the last
   byte anyways.

No idea if any of these are really worth pursuing though. They all seem
somewhat unlikely to yield big wins in practice and to be a lot of work
and complexity. So I settled here, which at least seems like a strict
improvement over the previous version.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289373 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[X86][InstCombine] Teach InstCombineCalls to simplify demanded elements for scalar...
Craig Topper [Sun, 11 Dec 2016 07:42:06 +0000 (07:42 +0000)]
[X86][InstCombine] Teach InstCombineCalls to simplify demanded elements for scalar FMA intrinsics.

These intrinsics don't read the upper bits of their second and third inputs so we can try to simplify them.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289372 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[AVX-512][InstCombine] Teach InstCombineCalls how to simplify demanded for scalar...
Craig Topper [Sun, 11 Dec 2016 07:42:04 +0000 (07:42 +0000)]
[AVX-512][InstCombine] Teach InstCombineCalls how to simplify demanded for scalar cmp intrinsics with masking and rounding.

These intrinsics don't read the upper elements of their first and second input. These are slightly different the the SSE version which does use the upper bits of its first element as passthru bits since the result goes to an XMM register. For AVX-512 the result goes to a mask register instead.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289371 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[AVX-512][InstCombine] Teach InstCombineCalls how to simplify demanded elements for...
Craig Topper [Sun, 11 Dec 2016 07:42:01 +0000 (07:42 +0000)]
[AVX-512][InstCombine] Teach InstCombineCalls how to simplify demanded elements for scalar add,div,mul,sub,max,min intrinsics with masking and rounding.

These intrinsics don't read the upper bits of their second input. And the third input is the passthru for masking and that only uses the lower element as well.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289370 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[AVR] Add calling convention CodeGen tests
Dylan McKay [Sun, 11 Dec 2016 07:09:45 +0000 (07:09 +0000)]
[AVR] Add calling convention CodeGen tests

This adds CodeGen tests for the AVR C calling convention.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289369 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[libFuzzer] don't depend on time in a test
Kostya Serebryany [Sun, 11 Dec 2016 06:28:09 +0000 (06:28 +0000)]
[libFuzzer] don't depend on time in a test

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289368 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[AVR] Add a test to validate a simple 'blinking led' program
Dylan McKay [Sun, 11 Dec 2016 04:59:39 +0000 (04:59 +0000)]
[AVR] Add a test to validate a simple 'blinking led' program

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289362 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[AVX-512][InstCombine] Add 512-bit vpermilvar intrinsics to InstCombineCalls to match...
Craig Topper [Sun, 11 Dec 2016 01:59:36 +0000 (01:59 +0000)]
[AVX-512][InstCombine] Add 512-bit vpermilvar intrinsics to InstCombineCalls to match 128 and 256-bit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289354 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[X86] Fix a comment to say 'an FMA' instead of 'a FMA'. NFC
Craig Topper [Sun, 11 Dec 2016 01:28:08 +0000 (01:28 +0000)]
[X86] Fix a comment to say 'an FMA' instead of 'a FMA'. NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289352 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[X86] Remove masking from 512-bit VPERMIL intrinsics in preparation for being able...
Craig Topper [Sun, 11 Dec 2016 01:26:44 +0000 (01:26 +0000)]
[X86] Remove masking from 512-bit VPERMIL intrinsics in preparation for being able to constant fold them in InstCombineCalls like we do for 128/256-bit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289350 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[AVR] Fix a signed vs unsigned compiler warning
Dylan McKay [Sun, 11 Dec 2016 00:24:13 +0000 (00:24 +0000)]
[AVR] Fix a signed vs unsigned compiler warning

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289349 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[X86][InstCombine] Teach InstCombineCalls to turn pshufb intrinsic into a shufflevect...
Craig Topper [Sun, 11 Dec 2016 00:23:50 +0000 (00:23 +0000)]
[X86][InstCombine] Teach InstCombineCalls to turn pshufb intrinsic into a shufflevector if the indices are constant.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289348 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[AVR] Remove incorrect comment
Dylan McKay [Sat, 10 Dec 2016 23:50:30 +0000 (23:50 +0000)]
[AVR] Remove incorrect comment

This should've been removed in r289323.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289346 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[X86] Remove masking from 512-bit PSHUFB intrinsics in preparation for being able...
Craig Topper [Sat, 10 Dec 2016 23:09:43 +0000 (23:09 +0000)]
[X86] Remove masking from 512-bit PSHUFB intrinsics in preparation for being able to constant fold it in InstCombineCalls like we do for 128/256-bit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289344 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[InstCombine] add helper for shift-by-shift folds; NFCI
Sanjay Patel [Sat, 10 Dec 2016 22:16:29 +0000 (22:16 +0000)]
[InstCombine] add helper for shift-by-shift folds; NFCI

These are currently limited to integer types, but we should
be able to extend to splat vectors and possibly general vectors.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289343 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[X86][SSE] Add tests for sign extended vXi64 multiplication
Simon Pilgrim [Sat, 10 Dec 2016 22:02:36 +0000 (22:02 +0000)]
[X86][SSE] Add tests for sign extended vXi64 multiplication

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289342 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[X86][SSE] Ensure UNPCK inputs are a consistent value type in LowerHorizontalByteSum
Simon Pilgrim [Sat, 10 Dec 2016 21:16:45 +0000 (21:16 +0000)]
[X86][SSE] Ensure UNPCK inputs are a consistent value type in LowerHorizontalByteSum

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289341 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[AVX-512] Remove 128/256 masked vpermil instrinsics and autoupgrade to a select aroun...
Craig Topper [Sat, 10 Dec 2016 21:15:52 +0000 (21:15 +0000)]
[AVX-512] Remove 128/256 masked vpermil instrinsics and autoupgrade to a select around the unmasked avx1 intrinsics.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289340 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[X86][IR] Move the autoupgrading of store intrinsics out of the main nested if/else...
Craig Topper [Sat, 10 Dec 2016 21:15:48 +0000 (21:15 +0000)]
[X86][IR] Move the autoupgrading of store intrinsics out of the main nested if/else chain. This should buy a little more time against the MSVC limit mentioned in PR31034.

The handlers for stores all return at the end of their block so they can be picked off early.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289339 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAMDGPU: Fix asan errors when folding operands
Matt Arsenault [Sat, 10 Dec 2016 19:58:00 +0000 (19:58 +0000)]
AMDGPU: Fix asan errors when folding operands

This was failing when trying to fold immediates into operand 1 of a
phi, which only has one statically known operand.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289337 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[X86][SSE] Move ZeroVector creation into the shuffle pattern case where its actually...
Simon Pilgrim [Sat, 10 Dec 2016 19:49:55 +0000 (19:49 +0000)]
[X86][SSE] Move ZeroVector creation into the shuffle pattern case where its actually used.

Also fix the ZeroVector's type - I've no idea how this hasn't caused problems........

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289336 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[AVX-512] Add support for lowering (v2i64 (fp_to_sint (v2f32))) to vcvttps2uqq when...
Craig Topper [Sat, 10 Dec 2016 19:35:39 +0000 (19:35 +0000)]
[AVX-512] Add support for lowering (v2i64 (fp_to_sint (v2f32))) to vcvttps2uqq when AVX512DQ and AVX512VL are available.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289335 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[X86] Clarify indentation. NFC
Craig Topper [Sat, 10 Dec 2016 19:35:36 +0000 (19:35 +0000)]
[X86] Clarify indentation. NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289334 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[X86] Combine LowerFP_TO_SINT and LowerFP_TO_UINT. They only differ by a single boole...
Craig Topper [Sat, 10 Dec 2016 19:35:33 +0000 (19:35 +0000)]
[X86] Combine LowerFP_TO_SINT and LowerFP_TO_UINT. They only differ by a single boolean flag passed to a helper function. Just check the opcode and create the flag.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289333 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[InstSimplify] improve function name; NFC
Sanjay Patel [Sat, 10 Dec 2016 17:40:47 +0000 (17:40 +0000)]
[InstSimplify] improve function name; NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289332 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[mips] Eliminate else-after-return. NFC
Simon Atanasyan [Sat, 10 Dec 2016 17:30:09 +0000 (17:30 +0000)]
[mips] Eliminate else-after-return. NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289331 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[SelectionDAG] Add ability for computeKnownBits to peek through bitcasts from 'large...
Simon Pilgrim [Sat, 10 Dec 2016 17:00:00 +0000 (17:00 +0000)]
[SelectionDAG] Add ability for computeKnownBits to peek through bitcasts from 'large element' scalar/vector to 'small element' vector.

Extension to D27129 which already supported bitcasts from 'small element' vector to 'large element' scalar/vector types.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289329 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[X86][XOP] Add permil2ps buildvector combine test
Simon Pilgrim [Sat, 10 Dec 2016 13:45:08 +0000 (13:45 +0000)]
[X86][XOP] Add permil2ps buildvector combine test

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289327 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[AVR] Add a stub README file
Dylan McKay [Sat, 10 Dec 2016 12:08:19 +0000 (12:08 +0000)]
[AVR] Add a stub README file

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289326 91177308-0d34-0410-b5e6-96231b3b80d8