OSDN Git Service
Serge Pavlov [Mon, 14 Apr 2014 02:20:19 +0000 (02:20 +0000)]
Use APInt arithmetic, fixed typo. Thanks to Benjamin Kramer for noticing that.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206144
91177308-0d34-0410-b5e6-
96231b3b80d8
Craig Topper [Mon, 14 Apr 2014 01:11:34 +0000 (01:11 +0000)]
Add back some typecasts I accidentally lost in r206142.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206143
91177308-0d34-0410-b5e6-
96231b3b80d8
Craig Topper [Mon, 14 Apr 2014 00:51:57 +0000 (00:51 +0000)]
[C++11] More 'nullptr' conversion. In some cases just using a boolean check instead of comparing to nullptr.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206142
91177308-0d34-0410-b5e6-
96231b3b80d8
Hal Finkel [Sun, 13 Apr 2014 23:02:40 +0000 (23:02 +0000)]
[PowerPC] [Constant Hoisting] Enable constant hoisting on PPC
Implements the various TTI functions to enable constant hoisting on PPC. The
only significant test-suite change is this:
MultiSource/Benchmarks/VersaBench/bmm/bmm - 20% speedup
(which essentially reverses the slowdown from r206120).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206141
91177308-0d34-0410-b5e6-
96231b3b80d8
Saleem Abdulrasool [Sun, 13 Apr 2014 22:54:15 +0000 (22:54 +0000)]
tools: remove duplication of coff_aux_file
Now that COFF::coff_aux_file is defined, use that rather than redefining the
type locally.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206140
91177308-0d34-0410-b5e6-
96231b3b80d8
Saleem Abdulrasool [Sun, 13 Apr 2014 22:54:11 +0000 (22:54 +0000)]
tools: avoid a string duplication
The auxiliary file records are contiguous and only contain the filename.
Construct a StringRef directly rather than copying to a temporary buffer.
Suggested by majnemer on IRC!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206139
91177308-0d34-0410-b5e6-
96231b3b80d8
Saleem Abdulrasool [Sun, 13 Apr 2014 20:47:55 +0000 (20:47 +0000)]
MC: check machine magic when applying offset adjustments
The values for the relocation type can (and do) overlap across various
architectures. When performing an adjustment of the emitted relocation in the
final object file, check that the file magic matches the target for which the
relocation type is valid (e.g. a I386 relocation is only applied to an X86
object file, and an AMD64 relocation is only applied to an X86_64 object file).
This was noticed while adding support for ARM WinCOFF object file emission.
A test case for this is not really possible as the values for REL32 do not
overlap on I386 and AMD64, which is why this was never noticed in practice. The
ARM WinCOFF emission is not yet ready to merge into the tree.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206138
91177308-0d34-0410-b5e6-
96231b3b80d8
Serge Pavlov [Sun, 13 Apr 2014 18:23:41 +0000 (18:23 +0000)]
Recognize test for overflow in integer multiplication.
If multiplication involves zero-extended arguments and the result is
compared as in the patterns:
%mul32 = trunc i64 %mul64 to i32
%zext = zext i32 %mul32 to i64
%overflow = icmp ne i64 %mul64, %zext
or
%overflow = icmp ugt i64 %mul64 , 0xffffffff
then the multiplication may be replaced by call to umul.with.overflow.
This change fixes PR4917 and PR4918.
Differential Revision: http://llvm-reviews.chandlerc.com/D2814
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206137
91177308-0d34-0410-b5e6-
96231b3b80d8
Hal Finkel [Sun, 13 Apr 2014 17:10:58 +0000 (17:10 +0000)]
[PowerPC] Fix rlwimi isel when mask is not constant
We had been using the known-zero values of the operand of the or to construct
the mask for an rlwimi; this is not quite correct, but fine when the mask is
constant. When the mask is constant, then the known zeros of the operand must
be a superset of the zeros in the mask. However, when the mask is not a
constant, then there might be bits in the operand that are not known to be zero
that, at runtime, might be zero in the mask. Therefore, we check that any bits
not known to be zero *are* known to be one in the mask. Otherwise, we can't
fold the mask with the or and shift.
This was revealed as a miscompile of
MultiSource/Benchmarks/BitBench/drop3/drop3 when I started experimenting with
constant hoisting.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206136
91177308-0d34-0410-b5e6-
96231b3b80d8
David Blaikie [Sun, 13 Apr 2014 06:39:55 +0000 (06:39 +0000)]
Fix instruction debug info location during legalization
I found this from a particular GDB test suite case of inlining
(something similar is provided as a test case) but came across a few
other related cases (other callers of the same functions, and one other
instance of the same coding mistake in a separate function).
I'm not sure what the best way to test this is (let alone to cover the
other cases I discovered), so hopefully this sufficies - open to ideas.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206130
91177308-0d34-0410-b5e6-
96231b3b80d8
Craig Topper [Sun, 13 Apr 2014 04:57:38 +0000 (04:57 +0000)]
[C++11] More 'nullptr' conversion or in some cases just using a boolean check instead of comparing to nullptr.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206129
91177308-0d34-0410-b5e6-
96231b3b80d8
Lang Hames [Sun, 13 Apr 2014 04:09:16 +0000 (04:09 +0000)]
[X86] unique_ptr'ify one of X86GenericDisassembler's members.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206127
91177308-0d34-0410-b5e6-
96231b3b80d8
Saleem Abdulrasool [Sun, 13 Apr 2014 03:11:08 +0000 (03:11 +0000)]
tools: teach objdump about FILE aux records
Add support for file auxiliary symbol entries in COFF symbol tables. A COFF
symbol table with a FILE entry is followed by sizeof(__FILE__) / 18 auxiliary
symbol records which contain the filename. Read them and form the original
filename that the record contains. Then display the name in the output.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206126
91177308-0d34-0410-b5e6-
96231b3b80d8
Hal Finkel [Sat, 12 Apr 2014 21:52:38 +0000 (21:52 +0000)]
[PowerPC] Implement some additional TLI callbacks
Add implementations of:
bool isLegalICmpImmediate(int64_t Imm) const
bool isLegalAddImmediate(int64_t Imm) const
bool isTruncateFree(Type *Ty1, Type *Ty2) const
bool isTruncateFree(EVT VT1, EVT VT2) const
bool shouldConvertConstantLoadToIntImm(const APInt &Imm, Type *Ty) const
Unfortunately, this regresses counter-register-based loop formation because
some of the loops now end up in forms were SE cannot compute loop counts.
However, nevertheless, the test-suite results favor committing:
SingleSource/Benchmarks/BenchmarkGame/puzzle: 26% speedup
MultiSource/Benchmarks/FreeBench/analyzer/analyzer: 21% speedup
MultiSource/Benchmarks/MiBench/automotive-susan/automotive-susan: 20% speedup
SingleSource/Benchmarks/Polybench/linear-algebra/kernels/trisolv/trisolv: 19% speedup
SingleSource/Benchmarks/Polybench/linear-algebra/kernels/gesummv/gesummv: 15% speedup
MultiSource/Benchmarks/FreeBench/pcompress2/pcompress2: 2% speedup
MultiSource/Benchmarks/VersaBench/bmm/bmm: 26% slowdown
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206120
91177308-0d34-0410-b5e6-
96231b3b80d8
Joerg Sonnenberger [Sat, 12 Apr 2014 21:13:41 +0000 (21:13 +0000)]
Fix test syntax to work with non-bash /bin/sh.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206119
91177308-0d34-0410-b5e6-
96231b3b80d8
Benjamin Kramer [Sat, 12 Apr 2014 18:45:24 +0000 (18:45 +0000)]
Spell the specialization namespace correctly.
Not sure why clang didn't diagnose this (GCC does).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206117
91177308-0d34-0410-b5e6-
96231b3b80d8
Benjamin Kramer [Sat, 12 Apr 2014 18:39:57 +0000 (18:39 +0000)]
Make helper static and place random global into the llvm namespace.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206116
91177308-0d34-0410-b5e6-
96231b3b80d8
Saleem Abdulrasool [Sat, 12 Apr 2014 18:04:27 +0000 (18:04 +0000)]
tools: remove unnecessary copy of array_lengthof
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206115
91177308-0d34-0410-b5e6-
96231b3b80d8
Benjamin Kramer [Sat, 12 Apr 2014 16:15:53 +0000 (16:15 +0000)]
Retire llvm::array_endof in favor of non-member std::end.
While there make array_lengthof constexpr if we have support for it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206112
91177308-0d34-0410-b5e6-
96231b3b80d8
Benjamin Kramer [Sat, 12 Apr 2014 14:26:59 +0000 (14:26 +0000)]
Move MDBuilder's methods out of line.
Making them inline was a historical accident, they're neither hot nor
templated.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206109
91177308-0d34-0410-b5e6-
96231b3b80d8
David Blaikie [Sat, 12 Apr 2014 05:35:59 +0000 (05:35 +0000)]
PR13337: Omit DW_TAG_restrict_type when compiling for DWARF2
DWARF3 introduced DW_TAG_restrict_type, so avoid using it in prior
versions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206105
91177308-0d34-0410-b5e6-
96231b3b80d8
Richard Trieu [Sat, 12 Apr 2014 04:47:04 +0000 (04:47 +0000)]
Add extra checks to mvn.ll test to prevent the "f1" check from matching
on a directory name instead of the function name.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206104
91177308-0d34-0410-b5e6-
96231b3b80d8
Adrian Prantl [Sat, 12 Apr 2014 04:25:02 +0000 (04:25 +0000)]
Revert "Debug info: (bugfix) C++ C/Dtors can be compiled to multiple functions,"
This reverts commit 206096 while I investigate why this broke the gdb
buildbot.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206103
91177308-0d34-0410-b5e6-
96231b3b80d8
Juergen Ributzka [Sat, 12 Apr 2014 02:53:51 +0000 (02:53 +0000)]
[ARM64] Never hoist the shift value of a shift instruction.
There is no need to check if we want to hoist the immediate value of an
shift instruction. Simply return TCC_Free right away.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206101
91177308-0d34-0410-b5e6-
96231b3b80d8
Juergen Ributzka [Sat, 12 Apr 2014 02:36:28 +0000 (02:36 +0000)]
[ARM64] Fix the cost model for cheap large constants.
Originally the cost model would give up for large constants and just return the
maximum cost. This is not what we want for constant hoisting, because some of
these constants are large in bitwidth, but are still cheap to materialize.
This commit fixes the cost model to either return TCC_Free if the cost cannot be
determined, or accurately calculate the cost even for large constants
(bitwidth > 128).
This fixes <rdar://problem/
16591573>.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206100
91177308-0d34-0410-b5e6-
96231b3b80d8
David Blaikie [Sat, 12 Apr 2014 02:24:04 +0000 (02:24 +0000)]
Use dwarf::Tag rather than unsigned for DIE::Tag to make debugging easier.
Nice to be able to just print out the Tag and have the debugger print
dwarf::DW_TAG_subprogram or whatever, rather than an int.
It's a bit finicky (for example DIDescriptor::getTag still returns
unsigned) because some places still handle real dwarf tags + our fake
tags (one day we'll remove the fake tags, hopefully).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206098
91177308-0d34-0410-b5e6-
96231b3b80d8
Eric Christopher [Sat, 12 Apr 2014 02:09:17 +0000 (02:09 +0000)]
Remove documentation for a deleted pass.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206097
91177308-0d34-0410-b5e6-
96231b3b80d8
Adrian Prantl [Sat, 12 Apr 2014 01:44:42 +0000 (01:44 +0000)]
Debug info: (bugfix) C++ C/Dtors can be compiled to multiple functions,
therefore, their declaration cannot have one DW_AT_linkage_name.
The specific instances however can and should have that attribute.
This patch reorders the code in DwarfUnit::getOrCreateSubprogramDIE()
to emit linkage names for C/Dtors.
rdar://problem/
16362674.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206096
91177308-0d34-0410-b5e6-
96231b3b80d8
Jim Grosbach [Sat, 12 Apr 2014 01:34:31 +0000 (01:34 +0000)]
llc: Add support for -mcpu=native.
When -mcpu=native is passed, autodetect the host CPU and pass that
as the CPU name to the TargetMachine factory method.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206095
91177308-0d34-0410-b5e6-
96231b3b80d8
Jim Grosbach [Sat, 12 Apr 2014 01:34:29 +0000 (01:34 +0000)]
X86: Remove TargetMachine CPU auto-detection.
This logic is properly in the realm of whatever is creating the
TargetMachine. This makes plain 'llc foo.ll' consistent across
heterogenous machines.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206094
91177308-0d34-0410-b5e6-
96231b3b80d8
Hal Finkel [Sat, 12 Apr 2014 01:26:00 +0000 (01:26 +0000)]
Reenable use of TBAA during CodeGen
We had disabled use of TBAA during CodeGen (even when otherwise using AA)
because the ptrtoint/inttoptr used by CGP for address sinking caused BasicAA to
miss basic type punning that it should catch (and, thus, we'd fail to override
TBAA when we should).
However, when AA is in use during CodeGen, CGP now uses normal GEPs and
bitcasts, instead of ptrtoint/inttoptr, when doing address sinking. As a
result, BasicAA should be able to make us do the right thing in the face of
type-punning, and it seems safe to enable use of TBAA again. self-hosting seems
fine on PPC64/Linux on the P7, with TBAA enabled and -misched=shuffle.
Note: We still don't update TBAA when merging stack slots, although because
BasicAA should now catch all such cases, this is no longer a blocking issue.
Nevertheless, I plan to commit code to deal with this properly in the near
future.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206093
91177308-0d34-0410-b5e6-
96231b3b80d8
Hal Finkel [Sat, 12 Apr 2014 00:59:48 +0000 (00:59 +0000)]
Add the ability to use GEPs for address sinking in CGP
The current memory-instruction optimization logic in CGP, which sinks parts of
the address computation that can be adsorbed by the addressing mode, does this
by explicitly converting the relevant part of the address computation into
IR-level integer operations (making use of ptrtoint and inttoptr). For most
targets this is currently not a problem, but for targets wishing to make use of
IR-level aliasing analysis during CodeGen, the use of ptrtoint/inttoptr is a
problem for two reasons:
1. BasicAA becomes less powerful in the face of the ptrtoint/inttoptr
2. In cases where type-punning was used, and BasicAA was used
to override TBAA, BasicAA may no longer do so. (this had forced us to disable
all use of TBAA in CodeGen; something which we can now enable again)
This (use of GEPs instead of ptrtoint/inttoptr) is not currently enabled by
default (except for those targets that use AA during CodeGen), and so aside
from some PowerPC subtargets and SystemZ, there should be no change in
behavior. We may be able to switch completely away from the ptrtoint/inttoptr
sinking on all targets, but further testing is required.
I've doubled-up on a number of existing tests that are sensitive to the
address sinking behavior (including some store-merging tests that are
sensitive to the order of the resulting ADD operations at the SDAG level).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206092
91177308-0d34-0410-b5e6-
96231b3b80d8
Chad Rosier [Sat, 12 Apr 2014 00:14:23 +0000 (00:14 +0000)]
[AArch64] Implement the isLegalAddressingMode and getScalingFactorCost APIs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206089
91177308-0d34-0410-b5e6-
96231b3b80d8
Duncan P. N. Exon Smith [Fri, 11 Apr 2014 23:21:07 +0000 (23:21 +0000)]
blockfreq: Document BlockFrequencyInfo terminology
Documents terminology used in the forthcoming rewrite of
BlockFrequencyInfo.
<rdar://problem/
14292693>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206086
91177308-0d34-0410-b5e6-
96231b3b80d8
Duncan P. N. Exon Smith [Fri, 11 Apr 2014 23:21:04 +0000 (23:21 +0000)]
blockfreq: Rename BlockProbInfoT to BranchProbabilityInfoT
No functionality change.
<rdar://problem/
14292693>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206085
91177308-0d34-0410-b5e6-
96231b3b80d8
Duncan P. N. Exon Smith [Fri, 11 Apr 2014 23:21:02 +0000 (23:21 +0000)]
blockfreq: Remove unnecessary template parameters
Moves redundant template parameters into an implementation detail of
BlockFrequencyInfoImpl.
No functionality change.
<rdar://problem/
14292693>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206084
91177308-0d34-0410-b5e6-
96231b3b80d8
Duncan P. N. Exon Smith [Fri, 11 Apr 2014 23:20:58 +0000 (23:20 +0000)]
blockfreq: Rename BlockFrequencyImpl to BlockFrequencyInfoImpl
This is a shared implementation class for BlockFrequencyInfo and
MachineBlockFrequencyInfo, not for BlockFrequency, a related (but
distinct) class.
No functionality change.
<rdar://problem/
14292693>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206083
91177308-0d34-0410-b5e6-
96231b3b80d8
Duncan P. N. Exon Smith [Fri, 11 Apr 2014 23:20:52 +0000 (23:20 +0000)]
blockfreq: Use getSuccessorIndex()
No functionality change.
<rdar://problem/
14292693>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206082
91177308-0d34-0410-b5e6-
96231b3b80d8
David Blaikie [Fri, 11 Apr 2014 22:49:14 +0000 (22:49 +0000)]
Pull out a named variable for the cached section names to aid readability.
Based on a code review suggestion from Eric Christopher in r205990
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206080
91177308-0d34-0410-b5e6-
96231b3b80d8
Louis Gerbarg [Fri, 11 Apr 2014 22:27:58 +0000 (22:27 +0000)]
Add ARM64 CLS patterns
This patch adds patterns to generate the cls instruction ARM64. Includes tests
for 64 bit and 32 bit operands.
rdar://
15611957
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206079
91177308-0d34-0410-b5e6-
96231b3b80d8
David Blaikie [Fri, 11 Apr 2014 22:11:50 +0000 (22:11 +0000)]
Format fixes for r205990
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206078
91177308-0d34-0410-b5e6-
96231b3b80d8
Benjamin Kramer [Fri, 11 Apr 2014 21:58:11 +0000 (21:58 +0000)]
Make doxygen comment match the declaration.
Found by -Wdocumentation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206076
91177308-0d34-0410-b5e6-
96231b3b80d8
Quentin Colombet [Fri, 11 Apr 2014 21:51:09 +0000 (21:51 +0000)]
[RegAllocGreedy][Last Chance Recoloring] Change the name of the exhaustive search option.
fexhaustive-register-search => exhaustive-register-search
'f' is a Clang thing!
This is related to PR18747.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206075
91177308-0d34-0410-b5e6-
96231b3b80d8
Quentin Colombet [Fri, 11 Apr 2014 21:39:44 +0000 (21:39 +0000)]
[RegAllocGreedy][Last Chance Recoloring] Addition of
-fexhaustive-register-search option to allow an exhaustive search during last
chance recoloring.
This is related to PR18747
Patch by MAYUR PANDEY <mayur.p@samsung.com>.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206072
91177308-0d34-0410-b5e6-
96231b3b80d8
Matt Arsenault [Fri, 11 Apr 2014 20:59:54 +0000 (20:59 +0000)]
R600: Check if a sextload should be used for parameter loads.
Through some oddity where truncate (sextload x) isn't folded into
an anyextload for vectors, the sextload remains if the
vector isn't immediately scalarized. This keeps the expected
zextload instructions in the kernel-args test when small type
vectors aren't scalarized.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206070
91177308-0d34-0410-b5e6-
96231b3b80d8
Lang Hames [Fri, 11 Apr 2014 20:07:58 +0000 (20:07 +0000)]
Remove redundant symbolization support from MCDisassembler interface.
MCDisassembler has an MCSymbolizer member that is meant to take care of
symbolizing during disassembly, but it also has several methods that enable the
disassembler to do symbolization internally (i.e. without an attached symbolizer
object). There is no need for this duplication, but ARM64 had been making use of
it. This patch moves the ARM64 symbolization logic out of ARM64Disassembler and
into an ARM64ExternalSymbolizer class, and removes the duplicated MCSymbolizer
functionality from the MCDisassembler interface. Symbolization will now be
done exclusively through MCSymbolizers.
There should be no impact on disassembly for any platform, but this allows us to
tidy up the MCDisassembler interface and simplify the process of (and invariants
related to) disassembler setup.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206063
91177308-0d34-0410-b5e6-
96231b3b80d8
Quentin Colombet [Fri, 11 Apr 2014 19:45:07 +0000 (19:45 +0000)]
[Register Coalescer] Fix wrong live-range information with rematerialization.
When rematerializing an instruction that defines a super register that would be
used by a physical subregisters we use the related physical super register for
the definition.
To keep the live-range information accurate, all the defined subregisters must be
marked as dead def, otherwise the register allocation may miss some
interferences.
Working on a reduced test-case!
<rdar://problem/
16582185>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206060
91177308-0d34-0410-b5e6-
96231b3b80d8
Matt Arsenault [Fri, 11 Apr 2014 19:25:18 +0000 (19:25 +0000)]
R600/SI: Refactor SOPC classes slightly.
Better match what is done for VOPC to eventually
prefer selecting these.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206048
91177308-0d34-0410-b5e6-
96231b3b80d8
Rafael Espindola [Fri, 11 Apr 2014 19:18:01 +0000 (19:18 +0000)]
Don't lose the thumb bit by using relocations with sections.
This fixes a regression from r205076.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206047
91177308-0d34-0410-b5e6-
96231b3b80d8
Adrian Prantl [Fri, 11 Apr 2014 18:08:37 +0000 (18:08 +0000)]
Add some CHECKs to this testcase.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206046
91177308-0d34-0410-b5e6-
96231b3b80d8
Matt Arsenault [Fri, 11 Apr 2014 17:57:53 +0000 (17:57 +0000)]
Fix shift by constants for vector.
ashr <N x iM>, <N x iM> M -> undef
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206045
91177308-0d34-0410-b5e6-
96231b3b80d8
Adrian Prantl [Fri, 11 Apr 2014 17:49:47 +0000 (17:49 +0000)]
Debug info: Store the DIVariable in DebugLocEntry also for constants,
so DwarfDebug::emitDebugLocEntry can emit them with the correct signedness.
rdar://problem/
15928306
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206042
91177308-0d34-0410-b5e6-
96231b3b80d8
Matt Arsenault [Fri, 11 Apr 2014 17:47:30 +0000 (17:47 +0000)]
Move ExtractVectorElements to SelectionDAG.
This seems generally useful, and makes sense to
go along with SplitVector.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206041
91177308-0d34-0410-b5e6-
96231b3b80d8
Tom Stellard [Fri, 11 Apr 2014 16:12:01 +0000 (16:12 +0000)]
SelectionDAG: Use helper function to improve legalization of ISD::MUL
The TargetLowering::expandMUL() helper contains lowering code extracted
from the DAGTypeLegalizer and allows the SelectionDAGLegalizer to expand more
ISD::MUL patterns without having to use a library call.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206037
91177308-0d34-0410-b5e6-
96231b3b80d8
Tom Stellard [Fri, 11 Apr 2014 16:11:58 +0000 (16:11 +0000)]
SelectionDAG: Factor ISD::MUL lowering code out of DAGTypeLegalizer
This code has been moved to a new function in the TargetLowering
class called expandMUL(). The purpose of this is to be able
to share lowering code between the SelectionDAGLegalize and
DAGTypeLegalizer classes.
No functionality changed intended.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206036
91177308-0d34-0410-b5e6-
96231b3b80d8
Daniel Sanders [Fri, 11 Apr 2014 15:33:36 +0000 (15:33 +0000)]
Revert: r205182 - llvm/test/MC/Mips/mips64r2/valid-xfail.s: This REQUIRES asserts. Seems it doesn't fail with -Asserts.
This was most likely caused by an uninitialized value and the relevant code was re-written in r205292. Reverting to see if it still fails on any of the buildbots.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206033
91177308-0d34-0410-b5e6-
96231b3b80d8
Diego Novillo [Fri, 11 Apr 2014 13:55:56 +0000 (13:55 +0000)]
Fix use-after-free bug caught by address sanitizer:
http://lab.llvm.org:8011/builders/sanitizer-x86_64-linux-bootstrap/builds/2959
The location string is returned as a std::string, not a StringRef.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206032
91177308-0d34-0410-b5e6-
96231b3b80d8
Simon Atanasyan [Fri, 11 Apr 2014 04:13:39 +0000 (04:13 +0000)]
[yaml2obj][ELF] ELF Relocations Support.
The patch implements support for both relocation record formats: Elf_Rel
and Elf_Rela. It is possible to define relocation against symbol only.
Relocations against sections will be implemented later. Now yaml2obj
recognizes X86_64, MIPS and Hexagon relocation types.
Example of relocation section specification:
Sections:
- Name: .text
Type: SHT_PROGBITS
Content: "
0000000000000000"
AddressAlign: 16
Flags: [SHF_ALLOC]
- Name: .rel.text
Type: SHT_REL
Info: .text
AddressAlign: 4
Relocations:
- Offset: 0x1
Symbol: glob1
Type: R_MIPS_32
- Offset: 0x2
Symbol: glob2
Type: R_MIPS_CALL16
The patch reviewed by Michael Spencer, Sean Silva, Shankar Easwaran.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206017
91177308-0d34-0410-b5e6-
96231b3b80d8
David Blaikie [Fri, 11 Apr 2014 01:50:01 +0000 (01:50 +0000)]
Implement depth_first and inverse_depth_first range factory functions.
Also updated as many loops as I could find using df_begin/idf_begin -
strangely I found no uses of idf_begin. Is that just used out of tree?
Also a few places couldn't use df_begin because either they used the
member functions of the depth first iterators or had specific ordering
constraints (I added a comment in the latter case).
Based on a patch by Jim Grosbach. (Jim - you just had iterator_range<T>
where you needed iterator_range<idf_iterator<T>>)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206016
91177308-0d34-0410-b5e6-
96231b3b80d8
Jim Grosbach [Fri, 11 Apr 2014 01:13:16 +0000 (01:13 +0000)]
[c++11] Range'ify use list loops in InstrEmitter.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206015
91177308-0d34-0410-b5e6-
96231b3b80d8
Jim Grosbach [Fri, 11 Apr 2014 01:13:13 +0000 (01:13 +0000)]
[c++11] Range'ify use list loops in DAGCombiner.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206014
91177308-0d34-0410-b5e6-
96231b3b80d8
Jim Grosbach [Fri, 11 Apr 2014 01:13:10 +0000 (01:13 +0000)]
[ARM64,C++11] Range'ify use-lists iterators in address type promotion.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206013
91177308-0d34-0410-b5e6-
96231b3b80d8
David Blaikie [Fri, 11 Apr 2014 00:43:52 +0000 (00:43 +0000)]
Use value types instead of 'new'd objects to store dwarf labels for asm files
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206009
91177308-0d34-0410-b5e6-
96231b3b80d8
Jim Grosbach [Fri, 11 Apr 2014 00:27:22 +0000 (00:27 +0000)]
[ARM64,C++11]: Range'ify use-list iterators in DAGToDAG.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206007
91177308-0d34-0410-b5e6-
96231b3b80d8
Jim Grosbach [Fri, 11 Apr 2014 00:27:19 +0000 (00:27 +0000)]
[ARM64,C++11]: More range-based loop simplification.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206006
91177308-0d34-0410-b5e6-
96231b3b80d8
Jim Grosbach [Fri, 11 Apr 2014 00:27:17 +0000 (00:27 +0000)]
SDNode: Add uses() iterator_range convenience methods.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206005
91177308-0d34-0410-b5e6-
96231b3b80d8
David Blaikie [Thu, 10 Apr 2014 23:55:11 +0000 (23:55 +0000)]
Remove lazy-initialization of section caches in MCContext
This seems to have been a cargo-culted habit from the very first such
cache which didn't have any specific justification (but might've been a
layering constraint at the time).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206003
91177308-0d34-0410-b5e6-
96231b3b80d8
Reid Kleckner [Thu, 10 Apr 2014 22:58:43 +0000 (22:58 +0000)]
Move the segmented stack switch to a function attribute
This removes the -segmented-stacks command line flag in favor of a
per-function "split-stack" attribute.
Patch by Luqman Aden and Alex Crichton!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205997
91177308-0d34-0410-b5e6-
96231b3b80d8
Josh Magee [Thu, 10 Apr 2014 22:47:27 +0000 (22:47 +0000)]
[stack protector] Refactor and clean-up test. No functionality change.
Refactored stack-protector.ll to use new-style function attributes everywhere
and eliminated unnecessary attributes.
This cleanup is in preparation for an upcoming test change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205996
91177308-0d34-0410-b5e6-
96231b3b80d8
Louis Gerbarg [Thu, 10 Apr 2014 22:25:51 +0000 (22:25 +0000)]
Test commit.
Update contact information in CREDITS.TXT.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205995
91177308-0d34-0410-b5e6-
96231b3b80d8
David Blaikie [Thu, 10 Apr 2014 22:03:48 +0000 (22:03 +0000)]
Simplify make_range by using move semantics
Move the iterators into the range the same way the range's ctor moves
them into the members.
Also remove some redundant top level parens in the return statement.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205993
91177308-0d34-0410-b5e6-
96231b3b80d8
Jim Grosbach [Thu, 10 Apr 2014 22:00:18 +0000 (22:00 +0000)]
[ARM64,C++11]: Range'ify loops in InstrInfo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205992
91177308-0d34-0410-b5e6-
96231b3b80d8
Kaelyn Takata [Thu, 10 Apr 2014 21:55:58 +0000 (21:55 +0000)]
Remove the use of "%e" as it is not a valid expansion like "%t".
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205991
91177308-0d34-0410-b5e6-
96231b3b80d8
David Blaikie [Thu, 10 Apr 2014 21:53:53 +0000 (21:53 +0000)]
Reimplement debug info compression by compressing the whole section, rather than a fragment.
To support compressing the debug_line section that contains multiple
fragments (due, I believe, to variation in choices of line table
encoding depending on the size of instruction ranges in the actual
program code) we needed to support compressing multiple MCFragments in a
single pass.
This patch implements that behavior by mutating the post-relaxed and
relocated section to be the compressed form of its former self,
including renaming the section.
This is a more flexible (and less invasive, to a degree) implementation
that will allow for other features such as "use compression only if it's
smaller than the uncompressed data".
Compressing debug_frame would be a possible further extension to this
work, but I've left it for now. The hurdle there is alignment sections -
which might require going as far as to refactor
MCAssembler.cpp:writeFragment to handle writing to a byte buffer or an
MCObjectWriter (there's already a virtual call there, so it shouldn't
add substantial compile-time cost) which could in turn involve
refactoring MCAsmBackend::writeNopData to use that same abstraction...
which involves touching all the backends. This would remove the limited
handling of fragment writing seen in
ELFObjectWriter.cpp:getUncompressedData which would be nice - but it's
more invasive.
I did discover that I (perhaps obviously) don't need to handle
relocations when I rewrite the fragments - since the relocations have
already been applied and computed (and stored into
ELFObjectWriter::Relocations) by this stage (necessarily, because we
need to have written any immediate values or assembly-time relocations
into the data already before we compress it, which we have). The test
case doesn't necessarily cover that in detail - I can add more test
coverage if that's preferred.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205990
91177308-0d34-0410-b5e6-
96231b3b80d8
David Blaikie [Thu, 10 Apr 2014 21:53:47 +0000 (21:53 +0000)]
Revert debug info compression support.
To support compression for debug_line and debug_frame a different
approach is required. To simplify review, revert the old implementation
and XFAIL the test case. New implementation to follow shortly.
Reverts r205059 and r204958.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205989
91177308-0d34-0410-b5e6-
96231b3b80d8
Jim Grosbach [Thu, 10 Apr 2014 21:49:24 +0000 (21:49 +0000)]
[ARM64,C++11]: Range'ify loops in the conditional-compare pass.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205988
91177308-0d34-0410-b5e6-
96231b3b80d8
Jim Grosbach [Thu, 10 Apr 2014 21:49:22 +0000 (21:49 +0000)]
iterator_range: Add an llvm::make_range() helper method.
Convenience wrapper to make dealing with sub-ranges easier. Like the
iterator_range<> itself, if/when this sort of thing gets standards
blessing, it will be replaced by the official version.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205987
91177308-0d34-0410-b5e6-
96231b3b80d8
Kevin Enderby [Thu, 10 Apr 2014 20:18:58 +0000 (20:18 +0000)]
For the ARM integrated assembler add checking of the
alignments on vld/vst instructions. And report errors for
alignments that are not supported.
While this is a large diff and an big test case, the changes
are very straight forward. But pretty much had to touch
all vld/vst instructions changing the addrmode to one of the
new ones that where added will do the proper checking for
the specific instruction.
FYI, re-committing this with a tweak so MemoryOp's default
constructor is trivial and will work with MSVC 2012. Thanks
to Reid Kleckner and Jim Grosbach for help with the tweak.
rdar://
11312406
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205986
91177308-0d34-0410-b5e6-
96231b3b80d8
Adrian Prantl [Thu, 10 Apr 2014 18:37:53 +0000 (18:37 +0000)]
Revert "Follow-up to r205973: change the return type to const MDNode*."
This reverts commit r205974, it turns out that this wasn't such a great idea
after all. Using DIVariable as return value is self-documenting and marginally
more type safe.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205979
91177308-0d34-0410-b5e6-
96231b3b80d8
Adrian Prantl [Thu, 10 Apr 2014 17:50:30 +0000 (17:50 +0000)]
Follow-up to r205973: change the return type to const MDNode*.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205974
91177308-0d34-0410-b5e6-
96231b3b80d8
Adrian Prantl [Thu, 10 Apr 2014 17:39:48 +0000 (17:39 +0000)]
Debug info: Factor the retrieving of the DIVariable from a MachineInstr
into a function.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205973
91177308-0d34-0410-b5e6-
96231b3b80d8
NAKAMURA Takumi [Thu, 10 Apr 2014 15:47:04 +0000 (15:47 +0000)]
AddLLVM: Mute the prefix "lib" in SHARED on win32.
- LLVMSupport.dll
- libLLVMSupport.dll.a
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205969
91177308-0d34-0410-b5e6-
96231b3b80d8
Daniel Sanders [Thu, 10 Apr 2014 15:00:28 +0000 (15:00 +0000)]
[mips] NotMips64 predicate is really a test for 32-bit GPR's.
Summary:
Similarly, the HasMips64 on the 64-bit move InstAlias is a test for 64-bit
GPR's.
No functional change.
Reviewers: matheusalmeida
Reviewed By: matheusalmeida
Differential Revision: http://reviews.llvm.org/D3263
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205968
91177308-0d34-0410-b5e6-
96231b3b80d8
Arnold Schwaighofer [Thu, 10 Apr 2014 13:41:35 +0000 (13:41 +0000)]
Reapply "SLPVectorizer: Ignore users that are insertelements we can reschedule them"
This commit reapplies 205018. After 205855 we should correctly vectorize
intrinsics.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205965
91177308-0d34-0410-b5e6-
96231b3b80d8
Daniel Sanders [Thu, 10 Apr 2014 13:16:49 +0000 (13:16 +0000)]
[mips] Switch the MIPS-III and MIPS-IV assembler tests to use -mcpu=mips4.
Summary:
It is now the smallest superset for these ISA's.
FeatureMips4 now contains FeatureFPIdx since [ls][dw]xc1 were added in MIPS-IV.
Made the FPIdx feature bit lowercase so that it can be used in the -mattr option.
Depends on D3274
Reviewers: matheusalmeida
Reviewed By: matheusalmeida
Differential Revision: http://reviews.llvm.org/D3275
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205964
91177308-0d34-0410-b5e6-
96231b3b80d8
NAKAMURA Takumi [Thu, 10 Apr 2014 12:46:13 +0000 (12:46 +0000)]
ARM64/*/LLVMBuild.txt: Prune redundant deps.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205963
91177308-0d34-0410-b5e6-
96231b3b80d8
NAKAMURA Takumi [Thu, 10 Apr 2014 11:16:47 +0000 (11:16 +0000)]
LLVMBuild.txt: Add missing dependencies.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205962
91177308-0d34-0410-b5e6-
96231b3b80d8
NAKAMURA Takumi [Thu, 10 Apr 2014 11:16:17 +0000 (11:16 +0000)]
LLVMBuild.txt: Reformat.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205961
91177308-0d34-0410-b5e6-
96231b3b80d8
Dmitri Gribenko [Thu, 10 Apr 2014 09:44:32 +0000 (09:44 +0000)]
SaveAndRestore: fix coding style and Doxygenify comments
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205959
91177308-0d34-0410-b5e6-
96231b3b80d8
David Majnemer [Thu, 10 Apr 2014 07:37:33 +0000 (07:37 +0000)]
YAMLIO: Allow scalars to dictate quotation rules
Introduce ScalarTraits::mustQuote which determines whether or not a
StringRef needs quoting before it is acceptable to output.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205955
91177308-0d34-0410-b5e6-
96231b3b80d8
Simon Atanasyan [Thu, 10 Apr 2014 06:02:49 +0000 (06:02 +0000)]
Use range-based for loops. No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205953
91177308-0d34-0410-b5e6-
96231b3b80d8
NAKAMURA Takumi [Thu, 10 Apr 2014 03:05:59 +0000 (03:05 +0000)]
Fix abuse of StringRef on ARM64SysReg::MRSMapper::toString(Val, Valid).
FIXME: Could we use SmallString here?
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205950
91177308-0d34-0410-b5e6-
96231b3b80d8
Saleem Abdulrasool [Thu, 10 Apr 2014 02:48:10 +0000 (02:48 +0000)]
ARM64: add an explicit cast to silence a silly warning
GCC 4.8 complains with:
warning: enumeral and non-enumeral type in conditional expression
Although this is silly and harmless in this case, add an explicit cast to
silence the warning.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205949
91177308-0d34-0410-b5e6-
96231b3b80d8
Juergen Ributzka [Thu, 10 Apr 2014 01:36:59 +0000 (01:36 +0000)]
[ARM64] Fix immediate cost calculation for types larger than i64.
The immediate cost calculation code was hitting an assertion in the included
test case, because APInt was still internally 128-bits. Truncating it to 64-bits
fixed the issue.
Fixes <rdar://problem/
16572521>.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205947
91177308-0d34-0410-b5e6-
96231b3b80d8
Reid Kleckner [Thu, 10 Apr 2014 00:52:14 +0000 (00:52 +0000)]
Revert "For the ARM integrated assembler add checking of the alignments on vld/vst instructions. And report errors for alignments that are not supported."
It doesn't build with MSVC 2012, because MSVC doesn't allow union
members that have non-trivial default constructors. This change added
'SMLoc AlignmentLoc' to MemoryOp, which made MemoryOp's default ctor
non-trivial.
This reverts commit r205930.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205944
91177308-0d34-0410-b5e6-
96231b3b80d8
Jim Grosbach [Thu, 10 Apr 2014 00:27:45 +0000 (00:27 +0000)]
Fix to support properly cleaning up failed address sinking against constants
As it turns out the source of the sunkaddr can be a constant, in which case
there is not an instruction to delete, causing the cleanup code introduced in
r204833 to crash. This patch adds a dynamic check to ensure the deleted value is
in fact an instruction and not a constant.
Patch by Louis Gerbarg <lgg@apple.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205941
91177308-0d34-0410-b5e6-
96231b3b80d8
Jim Grosbach [Thu, 10 Apr 2014 00:27:43 +0000 (00:27 +0000)]
X86: Tighten up test.
llc CPU autodection bites again. Speculative fix for bot failures.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205940
91177308-0d34-0410-b5e6-
96231b3b80d8
Jim Grosbach [Wed, 9 Apr 2014 23:39:25 +0000 (23:39 +0000)]
Add support for load folding of avx1 logical instructions
AVX supports logical operations using an operand from memory. Unfortunately
because integer operations were not added until AVX2 the AVX1 logical
operation's types were preventing the isel from folding the loads. In a limited
number of cases the peephole optimizer would fold the loads, but most were
missed. This patch adds explicit patterns with appropriate casts in order for
these loads to be folded.
The included test cases run on reduced examples and disable the peephole
optimizer to ensure the folds are being pattern matched.
Patch by Louis Gerbarg <lgg@apple.com>
rdar://
16355124
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205938
91177308-0d34-0410-b5e6-
96231b3b80d8
Jim Grosbach [Wed, 9 Apr 2014 23:28:11 +0000 (23:28 +0000)]
SelectionDAG: Don't constant fold target-specific nodes.
FoldConstantArithmetic() only knows how to deal with a few target independent
ISD opcodes. Bail early if it sees a target-specific ISD node. These node do
funny things with operand types which may break the assumptions of the code
that follows, and there's no actual folding that can be done anyway. For example,
non-constant 256 bit vector shifts on X86 have a shift-amount operand that's a
128-bit v4i32 vector regardless of what the first operand type is and that breaks
the assumption that the operand types must match.
rdar://
16530923
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205937
91177308-0d34-0410-b5e6-
96231b3b80d8
Kevin Enderby [Wed, 9 Apr 2014 21:32:59 +0000 (21:32 +0000)]
For the ARM integrated assembler add checking of the
alignments on vld/vst instructions. And report errors for
alignments that are not supported.
While this is a large diff and an big test case, the changes
are very straight forward. But pretty much had to touch
all vld/vst instructions changing the addrmode to one of the
new ones that where added will do the proper checking for
the specific instruction.
rdar://
11312406
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205930
91177308-0d34-0410-b5e6-
96231b3b80d8