OSDN Git Service
Lang Hames [Tue, 9 May 2017 21:32:18 +0000 (21:32 +0000)]
[ExecutionEngine] Make RuntimeDyld::MemoryManager responsible for tracking EH
frames.
RuntimeDyld was previously responsible for tracking allocated EH frames, but it
makes more sense to have the RuntimeDyld::MemoryManager track them (since the
frames are allocated through the memory manager, and written to memory owned by
the memory manager). This patch moves the frame tracking into
RTDyldMemoryManager, and changes the deregisterFrames method on
RuntimeDyld::MemoryManager from:
void deregisterEHFrames(uint8_t *Addr, uint64_t LoadAddr, size_t Size);
to:
void deregisterEHFrames();
Separating this responsibility will allow ORC to continue to throw the
RuntimeDyld instances away post-link (saving a few dozen bytes per lazy
function) while properly deregistering frames when modules are unloaded.
This patch also updates ORC to call deregisterEHFrames when modules are
unloaded. This fixes a bug where an exception that tears down the JIT can then
unwind through dangling EH frames that have been deallocated but not
deregistered, resulting in UB.
For people using SectionMemoryManager this should be pretty much a no-op. For
people with custom allocators that override registerEHFrames/deregisterEHFrames,
you will now be responsible for tracking allocated EH frames.
Reviewed in https://reviews.llvm.org/D32829
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302589
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Keno Fischer [Tue, 9 May 2017 21:07:20 +0000 (21:07 +0000)]
[GVN] Fix a crash on encountering non-integral pointers
Summary:
This fixes the immediate crash caused by introducing an incorrect inttoptr
before attempting the conversion. There may still be a legality
check missing somewhere earlier for non-integral pointers, but this change
seems necessary in any case.
Reviewers: sanjoy, dberlin
Reviewed By: dberlin
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D32623
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302587
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Stanislav Mekhanoshin [Tue, 9 May 2017 20:50:04 +0000 (20:50 +0000)]
[AMDGPU] Fixed typo in GCNRegPressure, NFC
VGRP -> VGPR, SGRP -> SGPR
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302586
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Sanjay Patel [Tue, 9 May 2017 20:46:12 +0000 (20:46 +0000)]
[InstCombine] update test file to use FileCheck; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302585
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Zvi Rackover [Tue, 9 May 2017 20:25:38 +0000 (20:25 +0000)]
DAGCombine: Combine shuffles of splat-shuffles
Summary: Reapply r299047, but this time handle correctly splat-masks with undef elements.
Reviewers: spatel, RKSimon, eli.friedman, andreadb
Reviewed By: spatel
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D31961
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302583
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Matthew Simpson [Tue, 9 May 2017 20:18:12 +0000 (20:18 +0000)]
[AArch64] Consider widening instructions in cost calculations
The AArch64 instruction set has a few "widening" instructions (e.g., uaddl,
saddl, uaddw, etc.) that take one or more doubleword operands and produce
quadword results. The operands are automatically sign- or zero-extended as
appropriate. However, in LLVM IR, these extends are explicit. This patch
updates TTI to consider these widening instructions as single operations whose
cost is attached to the arithmetic instruction. It marks extends that are part
of a widening operation "free" and applies a sub-target specified overhead
(zero by default) to the arithmetic instructions.
Differential Revision: https://reviews.llvm.org/D32706
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302582
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Sanjay Patel [Tue, 9 May 2017 20:05:05 +0000 (20:05 +0000)]
[InstCombine] clean up matchDeMorgansLaws(); NFCI
The motivation for getting rid of dyn_castNotVal is to allow fixing:
https://bugs.llvm.org/show_bug.cgi?id=32706
So this was supposed to be functional-change-intended for the case
of inverting constants and applying DeMorgan. However, I can't find
any cases where that pattern will actually get to matchDeMorgansLaws()
because we have other folds in visitAnd/visitOr that do the same
thing. So this ends up just being a clean-up patch with slight efficiency
improvement, but no-functional-change-intended.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302581
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Davide Italiano [Tue, 9 May 2017 20:02:48 +0000 (20:02 +0000)]
[NewGVN] Simplify a DEBUG() statement. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302579
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Reid Kleckner [Tue, 9 May 2017 19:59:29 +0000 (19:59 +0000)]
[codeview] Check for a DIExpression offset for local variables
Fixes inalloca parameters, which previously all pointed to the same
offset. Extend the test to use llvm-readobj so that we can test the
offset in a readable way.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302578
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Adrian Prantl [Tue, 9 May 2017 19:47:37 +0000 (19:47 +0000)]
Make it illegal for two Functions to point to the same DISubprogram
As recently discussed on llvm-dev [1], this patch makes it illegal for
two Functions to point to the same DISubprogram and updates
FunctionCloner to also clone the debug info of a function to conform
to the new requirement. To simplify the implementation it also factors
out the creation of inlineAt locations from the Inliner into a
general-purpose utility in DILocation.
[1] http://lists.llvm.org/pipermail/llvm-dev/2017-May/112661.html
<rdar://problem/
31926379>
Differential Revision: https://reviews.llvm.org/D32975
This reapplies r302469 with a fix for a bot failure (reparentDebugInfo
now checks for the case the orig and new function are identical).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302576
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Piotr Padlewski [Tue, 9 May 2017 19:39:44 +0000 (19:39 +0000)]
NFC: refactor replaceDominatedUsesWith
Summary:
Since I will post patch with some changes to
replaceDominatedUsesWith, it would be good to avoid
duplicating code again.
Reviewers: davide, dberlin
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D32798
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302575
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Wolfgang Pieb [Tue, 9 May 2017 19:38:38 +0000 (19:38 +0000)]
[DWARF] Fix a parsing issue with type unit headers.
Reviewers: dblaikie
Differential Revision: https://reviews.llvm.org/D32987
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302574
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Eric Beckmann [Tue, 9 May 2017 19:35:45 +0000 (19:35 +0000)]
Fix the Endianness bug by adding the little endian UTF marker.
Summary: Quick fix
Reviewers: zturner, uweigand
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D33014
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302573
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Serge Guelton [Tue, 9 May 2017 19:31:13 +0000 (19:31 +0000)]
Suppress all uses of LLVM_END_WITH_NULL. NFC.
Use variadic templates instead of relying on <cstdarg> + sentinel.
This enforces better type checking and makes code more readable.
Differential Revision: https://reviews.llvm.org/D32541
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302571
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Jacques Pienaar [Tue, 9 May 2017 18:35:26 +0000 (18:35 +0000)]
[lanai] Add computeKnownBitsForTargetNode for Lanai.
Summary: computeKnownBitsForTargetNode was not defined for Lanai which resulted in additional AND's with 0x1 for the output of SETCC instructions.
Reviewers: eliben, majnemer
Reviewed By: majnemer
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D29605
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302568
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Davide Italiano [Tue, 9 May 2017 18:29:37 +0000 (18:29 +0000)]
[NewGVN] Explain why sorting by pointer values doesn't introduce non-determinism.
Thanks to Eli for pointing out in a post-commit review comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302566
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Ulrich Weigand [Tue, 9 May 2017 18:27:39 +0000 (18:27 +0000)]
[SystemZ] Support missing relocation types in RuntimeDyldELF
Handle some more relocation types in
RuntimeDyldELF::resolveSystemZRelocation
This fixes a number of failing LLDB test cases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302565
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Sam Clegg [Tue, 9 May 2017 17:51:38 +0000 (17:51 +0000)]
[WebAssembly] Fix validation of start function
The check for valid start function was inverted. Added a new
test in test/Object to check this case and fixed the existing
tests in for ObjectYAML.
Differential Revision: https://reviews.llvm.org/D32986
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302560
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Krzysztof Parzyszek [Tue, 9 May 2017 17:16:52 +0000 (17:16 +0000)]
[RegScavenger] Rangify a loop, NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302554
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Puyan Lotfi [Tue, 9 May 2017 17:13:37 +0000 (17:13 +0000)]
Adding VSCode syntax colorizer to utils (generated from textmate colorizer).
--This line, and those below, will be igored--
A utils/vscode
A utils/vscode/README
A utils/vscode/tablegen
A utils/vscode/tablegen/.vscode
A utils/vscode/tablegen/.vscode/launch.json
A utils/vscode/tablegen/CHANGELOG.md
A utils/vscode/tablegen/README.md
A utils/vscode/tablegen/language-configuration.json
A utils/vscode/tablegen/package.json
A utils/vscode/tablegen/syntaxes
A utils/vscode/tablegen/syntaxes/TableGen.tmLanguage
A utils/vscode/tablegen/vsc-extension-quickstart.md
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302553
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Davide Italiano [Tue, 9 May 2017 16:58:28 +0000 (16:58 +0000)]
[NewGVN] Fix a consistent order for phi nodes operands.
The way we currently define congruency for two PHIExpression(s) is:
1) The operands to the phi functions are congruent
2) The PHIs are defined in the same BasicBlock.
NewGVN works under the assumption that phi operands are in predecessor
order, or at least in some consistent order. OTOH, is valid IR:
patatino:
%meh = phi i16 [ %0, %winky ], [ %conv1, %tinky ]
%banana = phi i16 [ %0, %tinky ], [ %conv1, %winky ]
br label %end
and the in-memory representations of the two SSA registers have an
inconsistent order. This violation of NewGVN assumptions results into
two PHIs found congruent when they're not. While we think it's useful
to have always a consistent order enforced, let's fix this in NewGVN
sorting uses in predecessor order before creating a PHI expression.
Differential Revision: https://reviews.llvm.org/D32990
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302552
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Craig Topper [Tue, 9 May 2017 16:47:33 +0000 (16:47 +0000)]
[APInt] Remove return value from tcFullMultiply.
The description says it returns the number of words needed to represent the results. But the way it was coded it always returns (lhsWords + rhsWords) or (lhsWords + rhsWords - 1). But the result could be even smaller than that and it wouldn't tell you.
No one uses the result today so rather than try to fix it, just remove it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302551
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Daniel Berlin [Tue, 9 May 2017 16:40:04 +0000 (16:40 +0000)]
NewGVN: Make all of symbolic evaluation logically const.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302550
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Craig Topper [Tue, 9 May 2017 16:32:11 +0000 (16:32 +0000)]
[X86] Add more patterns for BZHI isel
This patch adds more patterns that a reasonable person might write that can be compiled to BZHI.
This adds support for
(~0U >> (32 - b)) & a;
and
a << (32 - b) >> (32 - b);
This was inspired by the code in APInt::clearUnusedBits.
This can pass an index of 32 to the bzhi instruction which a quick test of Haswell hardware shows will not mask any bits. Though the description text in the Intel manual says the "index is saturated to OperandSize-1". The pseudocode in the same manual indicates no bits will be zeroed for this case.
I think this is still missing cases where the subtract portion is an 8-bit operation.
Differential Revision: https://reviews.llvm.org/D32616
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302549
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Sanjay Patel [Tue, 9 May 2017 16:24:59 +0000 (16:24 +0000)]
[InstCombineCasts] Fix checks in sext->lshr->trunc pattern.
The comment says to avoid the case where zero bits are shifted into the truncated value,
but the code checks that the shift is smaller than the truncated value instead of the
number of bits added by the sign extension. Fixing this allows a shift by more than the
value size to be introduced, which is undefined behavior, so the shift is capped at the
value size minus one, which has the expected behavior of filling the value with the sign
bit.
Patch by Jacob Young!
Differential Revision: https://reviews.llvm.org/D32285
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302548
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Guy Blank [Tue, 9 May 2017 16:16:48 +0000 (16:16 +0000)]
VX512] Only look at lower bit in constant scalar masks
for scalar masked instructions only the lower bit of the mask is relevant. so for constant masks we should either do an unmasked operation or no operation, depending on the value of the lower bit.
This patch handles cases where the lower bit is '1'.
Differential Revision: https://reviews.llvm.org/D32805
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302546
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Reid Kleckner [Tue, 9 May 2017 16:02:20 +0000 (16:02 +0000)]
Re-land "Use the frame index side table for byval and inalloca arguments"
This re-lands r302483. It was not the cause of PR32977.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302544
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Reid Kleckner [Tue, 9 May 2017 16:01:47 +0000 (16:01 +0000)]
Re-land "Don't add DBG_VALUE instructions for static allocas in dbg.declare"
This re-lands commit r302461. It was not the cause of PR32977.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302543
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Tim Shen [Tue, 9 May 2017 15:27:17 +0000 (15:27 +0000)]
[Atomic] Remove IsStore/IsLoad in the interface, and pass the instruction instead. NFC.
Now both emitLeadingFence and emitTrailingFence take the instruction
itself, instead of taking IsLoad/IsStore pairs.
Instruction::mayReadFromMemory and Instrucion::mayWriteToMemory are used
for determining those two booleans.
The instruction argument is also useful for later D32763, in
emitTrailingFence. For emitLeadingFence, it seems to have cleaner
interface with the proposed change.
Differential Revision: https://reviews.llvm.org/D32762
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302539
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Aaron Ballman [Tue, 9 May 2017 15:12:03 +0000 (15:12 +0000)]
Amend r302535; ifndef and ifdef are different, as it turns out.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302537
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Aaron Ballman [Tue, 9 May 2017 14:59:48 +0000 (14:59 +0000)]
ARMRegisterBankInfo.h requires LLVM_BUILD_GLOBAL_ISEL to be defined. If it is not defined, then ARMGenRegisterBank.inc is not table generated and the inclusion of this header causes the build to fail.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302535
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Hans Wennborg [Tue, 9 May 2017 14:44:15 +0000 (14:44 +0000)]
Revert r302469 "Make it illegal for two Functions to point to the same DISubprogram"
This caused PR32977.
Original commit message:
> Make it illegal for two Functions to point to the same DISubprogram
>
> As recently discussed on llvm-dev [1], this patch makes it illegal for
> two Functions to point to the same DISubprogram and updates
> FunctionCloner to also clone the debug info of a function to conform
> to the new requirement. To simplify the implementation it also factors
> out the creation of inlineAt locations from the Inliner into a
> general-purpose utility in DILocation.
>
> [1] http://lists.llvm.org/pipermail/llvm-dev/2017-May/112661.html
> <rdar://problem/
31926379>
>
> Differential Revision: https://reviews.llvm.org/D32975
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302533
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Anna Thomas [Tue, 9 May 2017 14:29:33 +0000 (14:29 +0000)]
[LV] Fix insertion point for shuffle vectors in first order recurrence
Summary:
In first order recurrence vectorization, when the previous value is a phi node, we need to
set the insertion point to the first non-phi node.
We can have the previous value being a phi node, due to the generation of new
IVs as part of trunc optimization [1].
[1] https://reviews.llvm.org/rL294967
Reviewers: mssimpso, mkuper
Subscribers: mzolotukhin, llvm-commits
Differential Revision: https://reviews.llvm.org/D32969
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302532
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Aaron Ballman [Tue, 9 May 2017 14:22:48 +0000 (14:22 +0000)]
Removing a file that is not necessary (and was causing link diagnostics with MSVC 2015); NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302531
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Guy Blank [Tue, 9 May 2017 14:03:51 +0000 (14:03 +0000)]
[X86][AVX512] Refine some avx512er intrinsics tests. NFC.
The modified tests should test the masked intrinsics.
Currently the mask is constant, which with a future patch (https://reviews.llvm.org/D32805) will cause the intrinsics to be replaced with an unmasked version.
This patch changes the constant mask to be a variable one.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302529
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Serge Pavlov [Tue, 9 May 2017 13:35:13 +0000 (13:35 +0000)]
Add extra operand to CALLSEQ_START to keep frame part set up previously
Using arguments with attribute inalloca creates problems for verification
of machine representation. This attribute instructs the backend that the
argument is prepared in stack prior to CALLSEQ_START..CALLSEQ_END
sequence (see http://llvm.org/docs/InAlloca.htm for details). Frame size
stored in CALLSEQ_START in this case does not count the size of this
argument. However CALLSEQ_END still keeps total frame size, as caller can
be responsible for cleanup of entire frame. So CALLSEQ_START and
CALLSEQ_END keep different frame size and the difference is treated by
MachineVerifier as stack error. Currently there is no way to distinguish
this case from actual errors.
This patch adds additional argument to CALLSEQ_START and its
target-specific counterparts to keep size of stack that is set up prior to
the call frame sequence. This argument allows MachineVerifier to calculate
actual frame size associated with frame setup instruction and correctly
process the case of inalloca arguments.
The changes made by the patch are:
- Frame setup instructions get the second mandatory argument. It
affects all targets that use frame pseudo instructions and touched many
files although the changes are uniform.
- Access to frame properties are implemented using special instructions
rather than calls getOperand(N).getImm(). For X86 and ARM such
replacement was made previously.
- Changes that reflect appearance of additional argument of frame setup
instruction. These involve proper instruction initialization and
methods that access instruction arguments.
- MachineVerifier retrieves frame size using method, which reports sum of
frame parts initialized inside frame instruction pair and outside it.
The patch implements approach proposed by Quentin Colombet in
https://bugs.llvm.org/show_bug.cgi?id=27481#c1.
It fixes 9 tests failed with machine verifier enabled and listed
in PR27481.
Differential Revision: https://reviews.llvm.org/D32394
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302527
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Simon Dardis [Tue, 9 May 2017 13:18:48 +0000 (13:18 +0000)]
Revert "[MIPS] Add support to match more patterns for DINS instruction"
This reverts commit rL302512. This broke the mips buildbots.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302526
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Simon Pilgrim [Tue, 9 May 2017 13:14:40 +0000 (13:14 +0000)]
[X86][SSE42] Lower v2i64/v4i64 ASHR(X, 63) as PCMPGTQ(0, X)
Similar to what we do for vXi8 ASHR(X, 7), use SSE42's PCMPGTQ to splat the sign instead of using the PSRAD+PSHUFD.
Avoiding bitcasts this improves combines that utilize computeNumSignBits, permits memory folding and reduces pipe pressure. Although it does require a second register, given that this is a (cheap) zero register the impact is minimal.
Differential Revision: https://reviews.llvm.org/D32973
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302525
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Diana Picus [Tue, 9 May 2017 13:05:43 +0000 (13:05 +0000)]
Revert "[Dwarf] Disable reference verification for now (PR32972)"
This reverts commit r302520 because it break the unit tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302524
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Renato Golin [Tue, 9 May 2017 12:36:50 +0000 (12:36 +0000)]
[Dwarf] Disable reference verification for now (PR32972)
There is no other explanation about why this only started happening
now, even though it crashes on old code (supposedly reachable from
here).
The only common factor between the failing bots is that they use GCC
(4.9 and 5.3) to compile Clang, while the others use Clang 3.8, but the
failure is while building the tests, as an assertion, on Clang.
Commenting it out for now in hope the bots will go back green, but we
should keep looking for the real cause, and update bugzilla.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302520
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Guy Blank [Tue, 9 May 2017 12:32:48 +0000 (12:32 +0000)]
[X86][AVX512] Add test for masking of scalar instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302519
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Amara Emerson [Tue, 9 May 2017 10:43:25 +0000 (10:43 +0000)]
Introduce experimental generic intrinsics for horizontal vector reductions.
- This change allows targets to opt-in to using them instead of the log2
shufflevector algorithm.
- The SLP and Loop vectorizers have the common code to do shuffle reductions
factored out into LoopUtils, and now have a unified interface for generating
reductions regardless of the preference of the target. LoopUtils now uses TTI
to determine what kind of reductions the target wants to handle.
- For CodeGen, basic legalization support is added.
Differential Revision: https://reviews.llvm.org/D30086
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302514
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Nikolai Bozhenov [Tue, 9 May 2017 10:14:03 +0000 (10:14 +0000)]
[X86] Clang option -fuse-init-array has no effect when generating for MCU target
Reviewers: Eugene.Zelenko, dschuff, craig.topper
Reviewed By: craig.topper
Subscribers: ahatanak, aaboud, DavidKreitzer, llvm-commits, cfe-commits
Differential Revision: https://reviews.llvm.org/D32543
Patch by AndreiGrischenko <andrei.l.grischenko@intel.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302513
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Strahinja Petrovic [Tue, 9 May 2017 10:02:00 +0000 (10:02 +0000)]
[MIPS] Add support to match more patterns for DINS instruction
This patch adds support for recognizing patterns to match
DINS instruction.
Differential Revision: https://reviews.llvm.org/D31465
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302512
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Diana Picus [Tue, 9 May 2017 08:32:42 +0000 (08:32 +0000)]
[ARM GlobalISel] Remove hand-written G_FADD selection
Remove the code selecting G_FADD - now that TableGen can handle more
opcodes, it's not needed anymore.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302511
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Craig Topper [Tue, 9 May 2017 07:04:04 +0000 (07:04 +0000)]
[ConstantRange] Rewrite shl to avoid repeated calls to getUnsignedMax and avoid creating the min APInt until we're sure we need it. Use inplace shift operations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302510
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Craig Topper [Tue, 9 May 2017 07:04:02 +0000 (07:04 +0000)]
[ConstantRange] Combine the two adds max+1 in lshr into a single addition.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302509
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Craig Topper [Tue, 9 May 2017 05:01:29 +0000 (05:01 +0000)]
[ConstantRange] Use APInt::isNullValue in place of comparing with 0. The compiler should be able to generate slightly better code for the former. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302508
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Reid Kleckner [Tue, 9 May 2017 01:57:44 +0000 (01:57 +0000)]
Revert "Don't add DBG_VALUE instructions for static allocas in dbg.declare"
This reverts commit r302461.
It appears to be causing failures compiling gtest with debug info on the
Linux sanitizer bot. I was unable to reproduce the failure locally,
however.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302504
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Teresa Johnson [Tue, 9 May 2017 01:43:24 +0000 (01:43 +0000)]
Fix code section prefix for proper layout
Summary:
r284533 added hot and cold section prefixes based on profile
information, to enable grouping of hot/cold functions at link time.
However, it used "cold" as the prefix for cold sections, but gold only
recognizes "unlikely" (which is used by gcc for cold sections).
Therefore, cold sections were not properly being grouped. Switch to
using "unlikely"
Reviewers: danielcdh, davidxl
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D32983
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302502
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Tom Stellard [Tue, 9 May 2017 01:41:28 +0000 (01:41 +0000)]
Revert "Revert "CMake: Move sphinx detection into AddSphinxTarget.cmake""
This reverts commit r302054.
Re-commit now that I have fixes for clang/lld.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302499
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Kostya Serebryany [Tue, 9 May 2017 01:34:27 +0000 (01:34 +0000)]
[libFuzzer] update docs on -print_coverage/-dump_coverage
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302498
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Kostya Serebryany [Tue, 9 May 2017 01:17:29 +0000 (01:17 +0000)]
[libFuzzer] make sure the input data is not overwritten in the fuzz target (if it is -- report an error)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302494
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Reid Kleckner [Tue, 9 May 2017 01:14:39 +0000 (01:14 +0000)]
Revert "Use the frame index side table for byval and inalloca arguments"
This reverts r302483 and it's follow up fix.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302493
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Craig Topper [Mon, 8 May 2017 23:49:54 +0000 (23:49 +0000)]
[APInt] Use default constructor instead of explicitly creating a 1-bit APInt in udiv and urem. NFC
The default constructor does the same thing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302487
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Craig Topper [Mon, 8 May 2017 23:49:49 +0000 (23:49 +0000)]
[APInt] Remove 'else' after 'return' in udiv and urem. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302486
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Evgeniy Stepanov [Mon, 8 May 2017 23:46:20 +0000 (23:46 +0000)]
Ignore !associated metadata with null argument.
Fixes PR32577 (comment 10).
Such metadata may legitimately appear in LTO.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302485
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Reid Kleckner [Mon, 8 May 2017 23:27:52 +0000 (23:27 +0000)]
Relax Dwarf filecheck test for 32-bit hosts
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302484
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Reid Kleckner [Mon, 8 May 2017 23:20:27 +0000 (23:20 +0000)]
Use the frame index side table for byval and inalloca arguments
Summary:
For inalloca functions, this is a very common code pattern:
%argpack = type <{ i32, i32, i32 }>
define void @f(%argpack* inalloca %args) {
entry:
%a = getelementptr inbounds %argpack, %argpack* %args, i32 0, i32 0
%b = getelementptr inbounds %argpack, %argpack* %args, i32 0, i32 1
%c = getelementptr inbounds %argpack, %argpack* %args, i32 0, i32 2
tail call void @llvm.dbg.declare(metadata i32* %a, ... "a")
tail call void @llvm.dbg.declare(metadata i32* %c, ... "b")
tail call void @llvm.dbg.declare(metadata i32* %b, ... "c")
Even though these GEPs can be simplified to a constant offset from EBP
or RSP, we don't do that at -O0, and each GEP is computed into a
register. Registers used to compute argument addresses are typically
spilled and clobbered very quickly after the initial computation, so
live debug variable tracking loses information very quickly if we use
DBG_VALUE instructions.
This change moves processing of dbg.declare between argument lowering
and basic block isel, so that we can ask if an argument has a frame
index or not. If the argument lives in a register as is the case for
byval arguments on some targets, then we don't put it in the side table
and during ISel we emit DBG_VALUE instructions.
Reviewers: aprantl
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D32980
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302483
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Sanjoy Das [Mon, 8 May 2017 23:18:46 +0000 (23:18 +0000)]
Add basic test case for -instnamer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302482
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Sanjoy Das [Mon, 8 May 2017 23:18:43 +0000 (23:18 +0000)]
[InstNamer] Use range-for
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302481
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Sanjoy Das [Mon, 8 May 2017 23:18:39 +0000 (23:18 +0000)]
[InstNamer] Don't check type of arguments (they're never void)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302480
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Sanjoy Das [Mon, 8 May 2017 23:18:36 +0000 (23:18 +0000)]
Delete trailing whitespace
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302479
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Sanjay Patel [Mon, 8 May 2017 22:33:20 +0000 (22:33 +0000)]
[InstCombine] add tests from D32285 to show current problems; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302475
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Greg Clayton [Mon, 8 May 2017 21:29:17 +0000 (21:29 +0000)]
Add const to "DWARFDie &Die" in a few functions as they can't change the DWARFDie.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302471
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Eugene Zemtsov [Mon, 8 May 2017 21:20:53 +0000 (21:20 +0000)]
Fix typo
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302470
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Adrian Prantl [Mon, 8 May 2017 21:17:08 +0000 (21:17 +0000)]
Make it illegal for two Functions to point to the same DISubprogram
As recently discussed on llvm-dev [1], this patch makes it illegal for
two Functions to point to the same DISubprogram and updates
FunctionCloner to also clone the debug info of a function to conform
to the new requirement. To simplify the implementation it also factors
out the creation of inlineAt locations from the Inliner into a
general-purpose utility in DILocation.
[1] http://lists.llvm.org/pipermail/llvm-dev/2017-May/112661.html
<rdar://problem/
31926379>
Differential Revision: https://reviews.llvm.org/D32975
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302469
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Matthias Braun [Mon, 8 May 2017 21:10:58 +0000 (21:10 +0000)]
STLExtras: Fix enumerate() documentation
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302467
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Greg Clayton [Mon, 8 May 2017 20:53:00 +0000 (20:53 +0000)]
Fix typo "veify" to "verify".
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302466
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Sanjay Patel [Mon, 8 May 2017 20:49:59 +0000 (20:49 +0000)]
[InstCombine] add folds for not-of-shift-right
This is another step towards getting rid of dyn_castNotVal,
so we can recommit:
https://reviews.llvm.org/rL300977
As the tests show, we were missing the lshr case for constants
and both ashr/lshr vector splat folds. The ashr case with constant
was being performed inefficiently in 2 steps. It's also possible
there was a latent bug in that case because we can't do that fold
if the constant is positive:
http://rise4fun.com/Alive/Bge
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302465
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Davide Italiano [Mon, 8 May 2017 20:44:01 +0000 (20:44 +0000)]
[PartialInlining] Capture by reference rather than by value.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302464
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Tim Northover [Mon, 8 May 2017 20:00:14 +0000 (20:00 +0000)]
ARM: use divmod libcalls on embedded MachO platforms too.
The separated libcalls are implemented in terms of __divmodsi4 and __udivmodsi4
anyway, so we should always use them if possible.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302462
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Reid Kleckner [Mon, 8 May 2017 19:58:15 +0000 (19:58 +0000)]
Don't add DBG_VALUE instructions for static allocas in dbg.declare
Summary:
An llvm.dbg.declare of a static alloca is always added to the
MachineFunction dbg variable map, so these values are entirely
redundant. They survive all the way through codegen to be ignored by
DWARF emission.
Effectively revert r113967
Two bugpoint-reduced test cases from 2012 broke as a result of this
change. Despite my best efforts, I haven't been able to rewrite the test
case using dbg.value. I'm not too concerned about the lost coverage
because these were reduced from the test-suite, which we still run.
Reviewers: aprantl, dblaikie
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D32920
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302461
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Zachary Turner [Mon, 8 May 2017 19:46:37 +0000 (19:46 +0000)]
Add some useful helper methods / operators to TypeIndex.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302460
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Reid Kleckner [Mon, 8 May 2017 19:45:57 +0000 (19:45 +0000)]
Update instructions for using the experimental monorepo
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302459
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Zachary Turner [Mon, 8 May 2017 19:45:55 +0000 (19:45 +0000)]
[BitVector] Make find_prev member function const.
NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302458
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Sanjoy Das [Mon, 8 May 2017 19:15:06 +0000 (19:15 +0000)]
Add a blurb to the release notes about the WeakVH -> WeakTrackingVH transition
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302456
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Zachary Turner [Mon, 8 May 2017 18:38:43 +0000 (18:38 +0000)]
[CodeView] Add support for random access type visitors.
Previously type visitation was done strictly sequentially, and
TypeIndexes were computed by incrementing the TypeIndex of the
last visited record. This works fine for situations like dumping,
but not when you want to visit types in random order. For example,
in a debug session someone might lookup a symbol by name, find that
it has TypeIndex 10,000 and then want to go straight to TypeIndex
10,000.
In order to make this work, the visitation framework needs a mode
where it can plumb TypeIndices through the callback pipeline. This
patch adds such a mode. In doing so, it is necessary to provide
an alternative implementation of TypeDatabase that supports random
access, so that is done as well.
Nothing actually uses these random access capabilities yet, but
this will be done in subsequent patches.
Differential Revision: https://reviews.llvm.org/D32928
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302454
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Quentin Colombet [Mon, 8 May 2017 18:16:31 +0000 (18:16 +0000)]
[AArch64][RegisterBankInfo] Change the default mapping of fp loads.
This fixes PR32550, in a way that does not imply running the greedy
mode at O0.
The fix consists in checking if a load is used by any floating point
instruction and if yes, we return a default mapping with FPR instead
of GPR.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302453
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Quentin Colombet [Mon, 8 May 2017 18:16:23 +0000 (18:16 +0000)]
[AArch64][RegisterBankInfo] Fix mapping cost for GPR.
In r292478, we changed the order of the enum that is referenced by
PMI_FirstXXX. This had the side effect of changing the cost of the
mapping of all the loads, instead of just the FPRs ones.
Reinstate the higher cost for all but GPR loads.
Note: This did not have any external visible effects:
- For Fast mode, the cost would have been higher, but we don't care
because we don't try to use alternative mappings.
- For Greedy mode, the higher cost of the GPR loads, would have
triggered the use of the supposedly alternative mapping, that
would be in fact the same GPR mapping but with a lower cost.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302452
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Sanjay Patel [Mon, 8 May 2017 18:16:04 +0000 (18:16 +0000)]
[InstCombine] move/add tests for not(shr (not X), Y); NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302451
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Craig Topper [Mon, 8 May 2017 18:02:51 +0000 (18:02 +0000)]
[ARM] Use a Changed flag to avoid making a pass's return value dependent on a compare with a Statistic object.
Statistic compile to always be 0 in release build so this compare would always return false. And in the debug builds Statistic are global variables and remember their values across pass runs. So this compare returns true anytime the pass runs after the first time it modifies something.
This was found after reviewing all usages of comparison operators on a Statistic object. We had some internal code that did a compare with a statistic that caused a mismatch in output between debug and release builds. So we did an audit out of paranoia.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302450
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Craig Topper [Mon, 8 May 2017 17:39:08 +0000 (17:39 +0000)]
[SCEV] Make setRange take ConstantRange by value instead of rvalue reference so we don't force anything on the caller.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302449
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Craig Topper [Mon, 8 May 2017 17:39:01 +0000 (17:39 +0000)]
[SCEV] Don't use std::move on both inputs to APInt::operator+ or operator-. It might be confusing to the reader. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302448
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Daniel Berlin [Mon, 8 May 2017 17:37:33 +0000 (17:37 +0000)]
ConstantFold: Handle gep nonnull, undef as well
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302447
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Daniel Berlin [Mon, 8 May 2017 17:37:29 +0000 (17:37 +0000)]
ConstantFold: Fold getelementptr (i32, i32* null, i64 undef) to null.
Transforms/IndVarSimplify/2011-10-27-lftrnull will fail if this regresses.
Transforms/GVN/PRE/2011-06-01-NonLocalMemdepMiscompile.ll has been changed to still test what it was
trying to test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302446
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Craig Topper [Mon, 8 May 2017 17:22:34 +0000 (17:22 +0000)]
[ValueTracking] Use KnownOnes to provide a better bound on known zeros for ctlz/cttz intrinics
This patch uses KnownOnes of the input of ctlz/cttz to bound the value that can be returned from these intrinsics. This makes these intrinsics more similar to the handling for ctpop which already uses known bits to produce a similar bound.
Differential Revision: https://reviews.llvm.org/D32521
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302444
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Zvi Rackover [Mon, 8 May 2017 16:54:25 +0000 (16:54 +0000)]
[X86] Split test configurations. NFC.
Split test that includes reproducer for pr32967 to KNL and SKX.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302442
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Sanjay Patel [Mon, 8 May 2017 16:35:02 +0000 (16:35 +0000)]
[InstSimplify] fix typo; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302439
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Sanjay Patel [Mon, 8 May 2017 16:33:42 +0000 (16:33 +0000)]
[InstCombine] use local variable to reduce code duplication; NFCI
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302438
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Craig Topper [Mon, 8 May 2017 16:22:48 +0000 (16:22 +0000)]
[ValueTracking] Introduce a version of computeKnownBits that returns a KnownBits struct. Begin using it to replace internal usages of ComputeSignBit
This introduces a new interface for computeKnownBits that returns the KnownBits object instead of requiring it to be pre-constructed and passed in by reference.
This is a much more convenient interface as it doesn't require the caller to figure out the BitWidth to pre-construct the object. It's so convenient that I believe we can use this interface to remove the special ComputeSignBit flavor of computeKnownBits.
As a step towards that idea, this patch replaces all of the internal usages of ComputeSignBit with this new interface. As you can see from the patch there were a couple places where we called ComputeSignBit which really called computeKnownBits, and then called computeKnownBits again directly. I've reduced those places to only making one call to computeKnownBits. I bet there are probably external users that do it too.
A future patch will update the external users and remove the ComputeSignBit interface. I'll also working on moving more locations to the KnownBits returning interface for computeKnownBits.
Differential Revision: https://reviews.llvm.org/D32848
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302437
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Sanjay Patel [Mon, 8 May 2017 16:21:55 +0000 (16:21 +0000)]
[InstCombine/InstSimplify] add comments about code duplication; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302436
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Sanjay Patel [Mon, 8 May 2017 15:58:57 +0000 (15:58 +0000)]
[InstCombine] add another test for PR32949; NFC
A patch for the InstSimplify variant of this bug is up for review here:
https://reviews.llvm.org/D32954
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302434
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Zvi Rackover [Mon, 8 May 2017 15:46:58 +0000 (15:46 +0000)]
InstructionSimplify: Refactor foldIdentityShuffles. NFC.
Summary:
Minor refactoring of foldIdentityShuffles() which allows the removal of a
ConstantDataVector::get() in SimplifyShuffleVectorInstruction.
Reviewers: spatel
Reviewed By: spatel
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D32955
Conflicts:
lib/Analysis/InstructionSimplify.cpp
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302433
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Geoff Berry [Mon, 8 May 2017 15:33:08 +0000 (15:33 +0000)]
Fix comment typos.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302432
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Zvi Rackover [Mon, 8 May 2017 14:47:32 +0000 (14:47 +0000)]
Adding reproducer for pr32967. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302426
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Simon Pilgrim [Mon, 8 May 2017 14:16:39 +0000 (14:16 +0000)]
[X86][SSE] Improve combineLogicBlendIntoPBLENDV to use general masks.
Currently combineLogicBlendIntoPBLENDV can only match ASHR to detect sign splatting of a bit mask, this patch generalises this to use computeNumSignBits instead.
This is a first step in several things we can do to improve PBLENDV support:
* Better matching of X86ISD::ANDNP patterns.
* Handle floating point cases.
* Better vector and bitcast support in computeNumSignBits.
* Recognise that PBLENDV only uses the sign bit of the mask, we should be able strip away sign splats (ASHR, PCMPGT isNeg tests etc.).
Differential Revision: https://reviews.llvm.org/D32953
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302424
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Simon Pilgrim [Mon, 8 May 2017 13:32:34 +0000 (13:32 +0000)]
Normalize line endings. NFCI,
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302422
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Zvi Rackover [Mon, 8 May 2017 12:40:18 +0000 (12:40 +0000)]
IR: Add a shufflevector mask commutation helper function. NFC.
Summary:
Following up on Sanjay's suggetion in D32955, move this functionality
into ShuffleVectornstruction.
Reviewers: spatel, RKSimon
Reviewed By: RKSimon
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D32956
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302420
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Simon Pilgrim [Mon, 8 May 2017 10:37:34 +0000 (10:37 +0000)]
[ARM][NEON] Add support for ISD::ABS lowering
Update NEON int_arm_neon_vabs intrinsic to use the ISD::ABS opcode directly
Added constant folding tests.
Differential Revision: https://reviews.llvm.org/D32938
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302417
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