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Justin Holewinski [Fri, 27 Jun 2014 18:35:53 +0000 (18:35 +0000)]
[NVPTX] Variables that start with llvm. or nvvm. are reserved and should not be emitted
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211940
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Justin Holewinski [Fri, 27 Jun 2014 18:35:51 +0000 (18:35 +0000)]
[NVPTX] Fix handling of ldg/ldu intrinsics.
The address space of the pointer must be global (1) for these intrinsics. There must also be alignment metadata attached to the intrinsic calls, e.g.
%val = tail call i32 @llvm.nvvm.ldu.i.global.i32.p1i32(i32 addrspace(1)* %ptr), !align !0
!0 = metadata !{i32 4}
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211939
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Justin Holewinski [Fri, 27 Jun 2014 18:35:44 +0000 (18:35 +0000)]
[NVPTX] Clean up argument lowering code and properly handle alignment for structs and vectors
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211938
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Justin Holewinski [Fri, 27 Jun 2014 18:35:42 +0000 (18:35 +0000)]
[NVPTX] Add missing boolean vector contents flag
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211937
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Justin Holewinski [Fri, 27 Jun 2014 18:35:40 +0000 (18:35 +0000)]
[NVPTX] Add support for [SHL,SRA,SRL]_PARTS
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211936
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Justin Holewinski [Fri, 27 Jun 2014 18:35:37 +0000 (18:35 +0000)]
[NVPTX] Implement fma and imad contraction as target DAGCombiner patterns
This also introduces DAGCombiner patterns for mul.wide to multiply two smaller integers and produce a larger integer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211935
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Justin Holewinski [Fri, 27 Jun 2014 18:35:33 +0000 (18:35 +0000)]
[NVPTX] Add support for efficient rotate instructions on SM 3.2+
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211934
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Justin Holewinski [Fri, 27 Jun 2014 18:35:30 +0000 (18:35 +0000)]
[NVPTX] Add missing isel patterns for 64-bit atomics
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211933
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Justin Holewinski [Fri, 27 Jun 2014 18:35:27 +0000 (18:35 +0000)]
[NVPTX] Add isel patterns for bit-field extract (bfe)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211932
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Justin Holewinski [Fri, 27 Jun 2014 18:35:24 +0000 (18:35 +0000)]
[NVPTX] Add support for isspacep instruction
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211931
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Justin Holewinski [Fri, 27 Jun 2014 18:35:21 +0000 (18:35 +0000)]
[NVPTX] Add support for envreg reads
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211930
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Justin Holewinski [Fri, 27 Jun 2014 18:35:18 +0000 (18:35 +0000)]
[NVPTX] Add target options for PTX 3.2/4.0 and SM 5.0 (Maxwell)
Default PTX version is set to PTX 3.2
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211929
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Justin Holewinski [Fri, 27 Jun 2014 18:35:16 +0000 (18:35 +0000)]
[NVPTX] Update sub-target feature detection
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211928
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Justin Holewinski [Fri, 27 Jun 2014 18:35:14 +0000 (18:35 +0000)]
[NVPTX] Directly control the Machine SSA passes that are invoked for NVPTX.
NVPTX is a bit special in the optimizations it requires, so this gives
us better control over the backend optimization pipeline.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211927
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Justin Holewinski [Fri, 27 Jun 2014 18:35:10 +0000 (18:35 +0000)]
[NVPTX] Emit .weak when linkage is not external, internal, or private
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211926
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Justin Holewinski [Fri, 27 Jun 2014 18:35:08 +0000 (18:35 +0000)]
[NVPTX] Just use getTypeAllocSize() when computing return value size for structures and vectors
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211925
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Tyler Nowicki [Fri, 27 Jun 2014 18:30:08 +0000 (18:30 +0000)]
Vectorization documentation for loop hint pragmas and Rpass diagnostics.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211924
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Aaron Ballman [Fri, 27 Jun 2014 18:25:49 +0000 (18:25 +0000)]
Silencing some -Wcast-qual warnings. No functional changes intended.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211923
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Chandler Carruth [Fri, 27 Jun 2014 18:25:23 +0000 (18:25 +0000)]
[x86] Fix a miscompile in the new shuffle lowering uncovered by
a bootstrap.
I managed to mis-remember how PACKUS worked on x86, and was using undef
for the high bytes instead of zero. The fix is fairly obvious.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211922
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David Majnemer [Fri, 27 Jun 2014 18:19:56 +0000 (18:19 +0000)]
IR: Add COMDATs to the IR
This new IR facility allows us to represent the object-file semantic of
a COMDAT group.
COMDATs allow us to tie together sections and make the inclusion of one
dependent on another. This is required to implement features like MS
ABI VFTables and optimizing away certain kinds of initialization in C++.
This functionality is only representable in COFF and ELF, Mach-O has no
similar mechanism.
Differential Revision: http://reviews.llvm.org/D4178
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211920
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Reid Kleckner [Fri, 27 Jun 2014 18:17:30 +0000 (18:17 +0000)]
cmake: Don't do anything for LLVM_ENABLE_ASSERTIONS=OFF
By default, CMake will set NDEBUG in Rel* builds and leave it off in
debug builds, so we shouldn't need to do anything ourselves.
Before this change, it was possible to a Debug build without assertions
(aka Debug-Asserts in the autoconf system) by configuring with
-DLLVM_ENABLE_ASSERTIONS=OFF, but this configuration isn't very useful.
You can still get the same effect by explicitly adding -DNDEBUG to
CFLAGS.
Differential Revision: http://reviews.llvm.org/D4257
Patch by Janusz Sobczak!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211919
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Julien Lerouge [Fri, 27 Jun 2014 18:02:54 +0000 (18:02 +0000)]
lldb can interrupt waitpid, so EINTR shouldn't be an error. This fixes the case
where there is no timeout. In the case where there is a timeout though, the
code is still wrong since it doesn't check that the alarm really went off.
Without this patch, I cannot debug a program that forks itself using
sys::ExecuteAndWait with lldb.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211918
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Matt Arsenault [Fri, 27 Jun 2014 17:57:00 +0000 (17:57 +0000)]
R600: Move trivial getters into header, use initializer list
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211917
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David Blaikie [Fri, 27 Jun 2014 17:45:43 +0000 (17:45 +0000)]
Fix test so it doesn't try to write out temporary files into the test tree.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211916
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Logan Chien [Fri, 27 Jun 2014 17:25:54 +0000 (17:25 +0000)]
Avoid non-ascii character in the source code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211914
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David Majnemer [Fri, 27 Jun 2014 17:19:44 +0000 (17:19 +0000)]
MC: Fix associative sections on COFF
COFF sections in MC were represented by a tuple of section-name and
COMDAT-name. This is not sufficient to represent a .text section
associated with another .text section; we need a way to distinguish
between the key section and the one marked associative.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211913
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Juergen Ributzka [Fri, 27 Jun 2014 17:16:34 +0000 (17:16 +0000)]
[FastISel][X86] Fix typos.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211911
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Matt Arsenault [Fri, 27 Jun 2014 16:52:49 +0000 (16:52 +0000)]
R600: Don't crash on unhandled instruction in promote alloca
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211906
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Ed Maste [Fri, 27 Jun 2014 16:37:20 +0000 (16:37 +0000)]
llvm-objdump: don't assert if ELF file has no sections
FreeBSD core files, for example, have no sections (only program headers).
llvm.org/pr20139
Differential Revision: http://reviews.llvm.org/D4323
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211904
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Alexander Kornienko [Fri, 27 Jun 2014 15:30:55 +0000 (15:30 +0000)]
Clean up unused variable warning in release build.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211902
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Chandler Carruth [Fri, 27 Jun 2014 15:13:01 +0000 (15:13 +0000)]
Re-apply r211287: Remove support for LLVM runtime multi-threading.
I'll fix the problems in libclang and other projects in ways that don't
require <mutex> until we sort out the cygwin situation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211900
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Ulrich Weigand [Fri, 27 Jun 2014 13:04:12 +0000 (13:04 +0000)]
[PowerPC] Constrain base register in PPCRegisterInfo::resolveFrameIndex
I've run into a bug where current LLVM at -O0 (with fast-isel)
generated invalid code like:
ld 0, 20936(1) # 8-byte Folded Reload
stw 12, 10348(0)
stw 12, 10344(0)
The underlying vreg had been introduced as base register by the
Local Stack Slot Allocation pass. That register was constrained
to G8RC by PPCRegisterInfo::materializeFrameBaseRegister to match
the ADDI instruction used to set it, but it was *not* constrained
to G8RC_NOX0 to fit the *use* of the register in an address.
That should have happened in PPCRegisterInfo::resolveFrameIndex.
This patch adds an appropriate constrainRegClass call.
Reviewed by Hal Finkel.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211897
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Chandler Carruth [Fri, 27 Jun 2014 12:04:18 +0000 (12:04 +0000)]
[x86] Clean up some unused variables, especially in release builds.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211894
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Chandler Carruth [Fri, 27 Jun 2014 11:40:13 +0000 (11:40 +0000)]
[x86] Teach the target combine step to aggressively fold pshufd insturcions.
Summary:
This allows it to fold pshufd instructions across intervening
half-shuffles and other noise. This pattern actually shows up in the
generic lowering tests, but I've also added direct tests using
intrinsics to make sure that the specific desired functionality is
working even if the lowering stuff changes in the future.
Differential Revision: http://reviews.llvm.org/D4292
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211892
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Simon Atanasyan [Fri, 27 Jun 2014 11:36:45 +0000 (11:36 +0000)]
[ELF][Mips] Fix recognition of MIPS 64-bit arch in the ELFObjectFile:getArch() method.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211891
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Chandler Carruth [Fri, 27 Jun 2014 11:34:40 +0000 (11:34 +0000)]
[x86] Teach the target-specific combining how to aggressively fold
half-shuffles, even looking through intervening instructions in a chain.
Summary:
This doesn't happen to show up with any test cases I've found for the current
shuffle lowering, but previous attempts would benefit from this and it seems
generally useful. I've tested it directly using intrinsics, which also shows
that it will work with hand vectorized code as well.
Note that even though pshufd isn't directly used in these tests, it gets
exercised because we combine some of the half shuffles into a pshufd
first, and then merge them.
Differential Revision: http://reviews.llvm.org/D4291
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211890
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Chandler Carruth [Fri, 27 Jun 2014 11:27:52 +0000 (11:27 +0000)]
[x86] Teach the X86 backend to DAG-combine SSE2 shuffles that are
trivially redundant.
This fixes several cases in the new vector shuffle lowering algorithm
which would generate redundant shuffle instructions for the sake of
simplicity.
I'm also deleting a testcase which was somewhat ridiculous. It was
checking for a bug in 2007 about incorrectly transforming shuffles by
looking for the string "-86" in the output of a pretty substantial
function. This test case doesn't seem to have any value at this point.
Differential Revision: http://reviews.llvm.org/D4240
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211889
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Chandler Carruth [Fri, 27 Jun 2014 11:23:44 +0000 (11:23 +0000)]
[x86] Begin a significant overhaul of how vector lowering is done in the
x86 backend.
This sketches out a new code path for vector lowering, hidden behind an
off-by-default flag while it is under development. The fundamental idea
behind the new code path is to aggressively break down the problem space
in ways that ease selecting the odd set of instructions available on
x86, and carefully avoid scalarizing code even when forced to use older
ISAs. Notably, this starts off restricting itself to SSE2 and implements
the complete vector shuffle and blend space for 128-bit vectors in SSE2
without scalarizing. The plan is to layer on top of this ISA extensions
where we can bail out of the complex SSE2 lowering and opt for
a cheaper, specialized instruction (or set of instructions). It also
needs to be generalized to AVX and AVX512 vector widths.
Currently, this does a decent but not perfect job for SSE2. There are
some specific shortcomings that I plan to address:
- We need a peephole combine to fold together shuffles where possible.
There are cases where a previous shuffle could be modified slightly to
arrange for elements to be in the correct position and a later shuffle
eliminated. Doing this eagerly added quite a bit of complexity, and
so my plan is to combine away these redundancies afterward.
- There are a lot more clever ways to use unpck and pack that need to be
added. This is essential for real world shuffles as it turns out...
Once SSE2 is polished a bit I should be able to get interesting numbers
on performance improvements on benchmarks conducive to vectorization.
All of this will be off by default until it is functionally equivalent
of course.
Differential Revision: http://reviews.llvm.org/D4225
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211888
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Ulrich Weigand [Fri, 27 Jun 2014 10:32:14 +0000 (10:32 +0000)]
[RuntimeDyld, PowerPC] Fix/improve handling of TOC relocations
Current PPC64 RuntimeDyld code to handle TOC relocations has two
problems:
- With recent linkers, in addition to the relocations that implicitly
refer to the TOC base (R_PPC64_TOC*), you can now also use the .TOC.
magic symbol with any other relocation to refer to the TOC base
explicitly. This isn't currently used much in ELFv1 code (although
it could be), but it is essential in ELFv2 code.
- In a complex JIT environment with multiple modules, each module may
have its own .toc section, and TOC relocations in one module must
refer to *its own* TOC section. The current findPPC64TOC implementation
does not correctly implement this; in fact, it will always return the
address of the first TOC section it finds anywhere. (Note that at the
time findPPC64TOC is called, we don't even *know* which module the
relocation originally resided in, so it is not even possible to fix
this routine as-is.)
This commit fixes both problems by handling TOC relocations earlier, in
processRelocationRef. To do this, I've removed the findPPC64TOC routine
and replaced it by a new routine findPPC64TOCSection, which works
analogously to findOPDEntrySection in scanning the sections of the
ObjImage provided by its caller, processRelocationRef. This solves the
issue of finding the correct TOC section associated with the current
module.
This makes it straightforward to implement both R_PPC64_TOC relocations,
and relocations explicitly refering to the .TOC. symbol, directly in
processRelocationRef. There is now a new problem in implementing the
R_PPC64_TOC16* relocations, because those can now in theory involve
*three* different sections: the relocation may be applied in section A,
refer explicitly to a symbol in section B, and refer implicitly to the
TOC section C. The final processing of the relocation thus may only
happen after all three of these sections have been assigned final
addresses. There is currently no obvious means to implement this in
its general form with the common-code RuntimeDyld infrastructure.
Fortunately, ppc64 code usually makes no use of this most general form;
in fact, TOC16 relocations are only ever generated by LLVM for symbols
residing themselves in the TOC, which means "section B" == "section C"
in the above terminology. This special case can easily be handled with
the current infrastructure, and that is what this patch does.
[ Unhandled cases result in an explicit error, unlike the current code
which silently returns the wrong TOC base address ... ]
This patch makes the JIT work on both BE and LE (ELFv2 requires
additional patches, of course), and allowed me to successfully run
complex JIT scenarios (via mesa/llvmpipe).
Reviewed by Hal Finkel.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211885
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Alp Toker [Fri, 27 Jun 2014 09:19:14 +0000 (09:19 +0000)]
IRReader: don't mark MemoryBuffers const
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211883
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Dinesh Dwivedi [Fri, 27 Jun 2014 07:47:35 +0000 (07:47 +0000)]
Added instruction combine to transform few more negative values addition to subtraction (Part 3)
This patch enables transforms for
(x + (~(y | c) + 1) --> x - (y | c) if c is odd
Differential Revision: http://reviews.llvm.org/D4210
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211881
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Eric Christopher [Fri, 27 Jun 2014 07:38:01 +0000 (07:38 +0000)]
Remove the caching of the target machine from SystemZTargetLowering.
Update all callers and uses accordingly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211880
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David Majnemer [Fri, 27 Jun 2014 07:36:26 +0000 (07:36 +0000)]
GlobalOpt: Fix constantfold-initializers.ll test
The test added in r211762 was sloppy, the correct initializer wasn't
added to @llvm.global_ctors
Spotted by Pasi Parviainen!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211879
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Eric Christopher [Fri, 27 Jun 2014 07:01:17 +0000 (07:01 +0000)]
Remove target machine caching from SystemZInstrInfo and
SystemZRegisterInfo and replace it with the subtarget as that's
all they needed in the first place. Update all uses and calls
accordingly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211877
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David Blaikie [Fri, 27 Jun 2014 05:34:05 +0000 (05:34 +0000)]
Revert "Revert "Revert "PR20038: DebugInfo: Inlined call sites where the caller has debug info but the call itself has no debug location."""
Reverting this again, didn't mean to commit it - while r211872 fixes one
of the issues here, there are still others to figure out and address.
This reverts commit r211871.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211873
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David Blaikie [Fri, 27 Jun 2014 05:32:09 +0000 (05:32 +0000)]
ArgumentPromotion: Propagate debug locations on calls for which arguments are promoted.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211872
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David Blaikie [Fri, 27 Jun 2014 05:31:49 +0000 (05:31 +0000)]
Revert "Revert "PR20038: DebugInfo: Inlined call sites where the caller has debug info but the call itself has no debug location.""
This reverts commit r211724.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211871
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Eric Christopher [Fri, 27 Jun 2014 05:26:28 +0000 (05:26 +0000)]
Have SystemZSelectionDAGInfo constructor take a DataLayout rather
than a target machine since it doesn't need anything past the
DataLayout.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211870
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Craig Topper [Fri, 27 Jun 2014 05:18:21 +0000 (05:18 +0000)]
Rename getX86ConditonCode -> getX86ConditionCode
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211869
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Andrew Trick [Fri, 27 Jun 2014 05:09:36 +0000 (05:09 +0000)]
Left out the NDEBUG in the previous checkin.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211867
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Andrew Trick [Fri, 27 Jun 2014 04:57:05 +0000 (04:57 +0000)]
MachineScheduler: add some book-keeping to fix an assert.
Fixe for Bug 20057 - Assertion failied in llvm::SUnit* llvm::SchedBoundary::pickOnlyChoice(): Assertion `i <= (HazardRec->getMaxLookAhead() + MaxObservedStall) && "permanent hazard"'
Thanks to Chad for the test case.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211865
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Alp Toker [Fri, 27 Jun 2014 04:48:32 +0000 (04:48 +0000)]
Propagate const-correctness into parseBitcodeFile()
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211864
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Eric Christopher [Fri, 27 Jun 2014 04:38:30 +0000 (04:38 +0000)]
Have MipsSelectionDAGInfo constructor take a DataLayout rather
than a target machine since it doesn't need anything past the
DataLayout.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211863
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Alp Toker [Fri, 27 Jun 2014 04:33:58 +0000 (04:33 +0000)]
ParseIR: don't take ownership of the MemoryBuffer
clang was needlessly duplicating whole memory buffer contents in an attempt to
satisfy unclear ownership semantics. Let's just hide internal LLVM quirks and
present a simple non-owning interface.
The public C API preserves previous behaviour for stability.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211861
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Eric Christopher [Fri, 27 Jun 2014 04:33:14 +0000 (04:33 +0000)]
Move NVPTX subtarget dependent variables from the target machine
to the subtarget.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211860
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Matt Arsenault [Fri, 27 Jun 2014 03:55:55 +0000 (03:55 +0000)]
R600: Add some testcases for promote alloca pass.
More complicated GEPs are skipped. Add some tests to
actually stress this skipping.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211859
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Eric Christopher [Fri, 27 Jun 2014 03:45:49 +0000 (03:45 +0000)]
Use the target lowering we can get off of the DAG rather than off
of the cached target machine.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211858
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Saleem Abdulrasool [Fri, 27 Jun 2014 03:11:18 +0000 (03:11 +0000)]
Support: update DLLCharacteristics enumeration
Add the new AppContainer characteristic which is import for Windows Store
(Metro) compatible applications. Add the new Control Flow Guard flag to bring
the enumeration up to date with the current values as of Windows 8.1.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211855
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Saleem Abdulrasool [Fri, 27 Jun 2014 03:11:14 +0000 (03:11 +0000)]
Support: tweak comment layout
Make the comment layout more uniform. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211854
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Rafael Espindola [Fri, 27 Jun 2014 02:51:21 +0000 (02:51 +0000)]
Don't force the build of toos/lto as a static lib.
Any uses of tools/lto as a static lib should probably move to lib/LTO.
This was also never implemented in the configure build, so this reduces
the differences among the two.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211852
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Matt Arsenault [Fri, 27 Jun 2014 02:36:59 +0000 (02:36 +0000)]
Fix missing newline and simplify debug printing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211850
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Matt Arsenault [Fri, 27 Jun 2014 02:33:47 +0000 (02:33 +0000)]
R600: Move load/store ReplaceNodeResults to common code.
Future patches will want to custom lower loads on SI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211848
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Eric Christopher [Fri, 27 Jun 2014 02:05:24 +0000 (02:05 +0000)]
Move the constructor for NVPTXFrameLowering into the implementation
file in preparation for the subtarget move.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211847
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Eric Christopher [Fri, 27 Jun 2014 02:05:22 +0000 (02:05 +0000)]
Remove unnecessary caching of the TargetMachine on NVPTXFrameLowering.
Adjust the constructor accordingly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211846
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Eric Christopher [Fri, 27 Jun 2014 02:05:19 +0000 (02:05 +0000)]
Rework the logic for setting the TargetName. This appears to
be shorter and identical in goal.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211845
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Eric Christopher [Fri, 27 Jun 2014 01:27:08 +0000 (01:27 +0000)]
Remove caching of the target machine in NVPTXInstrInfo and
update constructor accordingly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211840
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Eric Christopher [Fri, 27 Jun 2014 01:27:06 +0000 (01:27 +0000)]
Remove comment that duplicated information in the constructor
that it's after.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211839
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Eric Christopher [Fri, 27 Jun 2014 01:27:05 +0000 (01:27 +0000)]
Remove commented out code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211838
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Eric Christopher [Fri, 27 Jun 2014 01:27:03 +0000 (01:27 +0000)]
Remove extraneous parens and extraneous const cast (and fix the
prototype for the function to patch what we were returning).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211837
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Eric Christopher [Fri, 27 Jun 2014 01:14:54 +0000 (01:14 +0000)]
Move the subtarget dependent features from the target machine to
the subtarget for the MSP430 target.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211836
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Eric Christopher [Fri, 27 Jun 2014 01:14:50 +0000 (01:14 +0000)]
Remove uses and caches of the target machine and subtarget from
both MSP430InstrInfo and MSP430RegisterInfo. Remove unused member
variable StackAlign from MSP430RegisterInfo. Update constructors
accordingly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211835
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Eric Christopher [Fri, 27 Jun 2014 00:52:11 +0000 (00:52 +0000)]
Remove caching of an unused subtarget from MSP430FrameLowering.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211830
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Adam Nemet [Fri, 27 Jun 2014 00:43:38 +0000 (00:43 +0000)]
[X86] AVX512: Add vbroadcasti*
For now I used a separate template for these sub-vector/tuple broadcasts
rather than sharing the mem variants with avx512_int_broadcast_rm.
<rdar://problem/
17402869>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211828
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Eric Christopher [Fri, 27 Jun 2014 00:37:59 +0000 (00:37 +0000)]
Remove unnecessary caching of variables by MSP430TargetLowering and
make the constructor more general since it only needs a target
machine.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211827
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Eric Christopher [Fri, 27 Jun 2014 00:37:57 +0000 (00:37 +0000)]
Have MSP430SelectionDAGInfo constructor take a DataLayout rather
than a target machine since it doesn't need anything past the
DataLayout.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211826
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Eric Christopher [Fri, 27 Jun 2014 00:27:40 +0000 (00:27 +0000)]
Move all of the hexagon subtarget dependent variables from the target
machine to the subtarget.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211824
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Eric Christopher [Fri, 27 Jun 2014 00:18:25 +0000 (00:18 +0000)]
Have HexagonSelectionDAGInfo take a DataLayout rather than a
target machine since that's all it needs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211822
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Eric Christopher [Fri, 27 Jun 2014 00:13:52 +0000 (00:13 +0000)]
Make HexagonISelLowering not dependent upon a HexagonTargetMachine,
but a normal TargetMachine and remove a few cached uses.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211821
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Eric Christopher [Fri, 27 Jun 2014 00:13:49 +0000 (00:13 +0000)]
Reduce indentation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211820
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Eric Christopher [Fri, 27 Jun 2014 00:13:47 +0000 (00:13 +0000)]
Remove unnecessary caching of the subtarget for HexagonFrameLowering and remove the unused constructor argument.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211819
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Eric Christopher [Fri, 27 Jun 2014 00:13:43 +0000 (00:13 +0000)]
InstrItineraryData is already on the subtarget, no reason to
cache it on the target as well.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211818
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Juergen Ributzka [Thu, 26 Jun 2014 23:39:52 +0000 (23:39 +0000)]
[StackMaps] Enable patchpoint liveness analysis per default.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211817
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Juergen Ributzka [Thu, 26 Jun 2014 23:39:44 +0000 (23:39 +0000)]
[Stackmaps] Remove the liveness calculation for stackmap intrinsics.
There is no need to calculate the liveness information for stackmaps. The
liveness information is still available for the patchpoint intrinsic and
that is also the intended usage model.
Related to <rdar://problem/
17473725>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211816
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Lang Hames [Thu, 26 Jun 2014 23:05:44 +0000 (23:05 +0000)]
[RuntimeDyld] Teach MachOObjectImage to deregister itself with the debugger upon
destruction the same way ELFObjectImage does.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211815
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Alp Toker [Thu, 26 Jun 2014 22:52:05 +0000 (22:52 +0000)]
Revert "Introduce a string_ostream string builder facilty"
Temporarily back out commits r211749, r211752 and r211754.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211814
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Eric Christopher [Thu, 26 Jun 2014 22:33:55 +0000 (22:33 +0000)]
Move the various Subtarget dependent members down to the subtarget
for the Sparc port. Use the same initializeSubtargetDependencies
function to handle initialization similar to the other ports to
handle dependencies.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211811
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Eric Christopher [Thu, 26 Jun 2014 22:33:52 +0000 (22:33 +0000)]
Have SparcSelectionDAGInfo take a DataLayout to initialize since
that's all it needs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211810
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Eric Christopher [Thu, 26 Jun 2014 22:33:50 +0000 (22:33 +0000)]
Remove the storage and use of the subtarget out of the sparc frame
lowering code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211809
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Sanjay Patel [Thu, 26 Jun 2014 22:18:51 +0000 (22:18 +0000)]
fixed typo
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211808
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Tom Roeder [Thu, 26 Jun 2014 20:43:27 +0000 (20:43 +0000)]
Fix the new LTOCodeGenerator setup in gold to parse options before using MAttrs.
This fixes a regression that made clang -flto -Wl,--plugin-opt=-mattr=+aes not
pass the "+aes" option to the LTOCodeGenerator attributes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211804
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Arnold Schwaighofer [Thu, 26 Jun 2014 19:51:19 +0000 (19:51 +0000)]
GVN: Preserve invariant.load metadata
If both instructions to be replaced are marked invariant the resulting
instruction is invariant.
rdar://
13358910
Fix by Erik Eckstein!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211801
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Eric Christopher [Thu, 26 Jun 2014 19:30:05 +0000 (19:30 +0000)]
Remove extraneous includes from the target machines.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211800
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Eric Christopher [Thu, 26 Jun 2014 19:30:02 +0000 (19:30 +0000)]
Move all of the ARM subtarget features down onto the subtarget
rather than the target machine.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211799
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Eric Christopher [Thu, 26 Jun 2014 19:29:59 +0000 (19:29 +0000)]
Move the frame lowering constructors out of line to avoid circular
includes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211798
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Sanjay Patel [Thu, 26 Jun 2014 18:12:42 +0000 (18:12 +0000)]
Changed Phab 'CC' to 'subscriber'; fixed typo
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211793
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Matt Arsenault [Thu, 26 Jun 2014 17:22:30 +0000 (17:22 +0000)]
R600/SI: Add FP mode bits to binary.
The default rounding mode to initialize the mode register needs
to be reported to the runtime. Fill in other bits a kernel
may be interested in setting for future use.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211791
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Aaron Ballman [Thu, 26 Jun 2014 13:45:47 +0000 (13:45 +0000)]
Silencing a warning about isZExtFree hiding an inherited virtual function. No functional change intended.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211783
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Andrea Di Biagio [Thu, 26 Jun 2014 13:41:10 +0000 (13:41 +0000)]
Silence a warning due to a comparison between signed and unsigned.
No functional change intended.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211782
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Will Schmidt [Thu, 26 Jun 2014 13:37:03 +0000 (13:37 +0000)]
Add support for ppc64/power8 as a host
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211781
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Will Schmidt [Thu, 26 Jun 2014 13:36:19 +0000 (13:36 +0000)]
add ppc64/pwr8 as target
includes handling DIR_PWR8 where appropriate
The P7Model Itinerary is currently tied in for use under the P8Model, and will be updated later.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211779
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