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7 years ago[ARM] GlobalISel: Support loading from the stack
Diana Picus [Mon, 19 Dec 2016 11:26:31 +0000 (11:26 +0000)]
[ARM] GlobalISel: Support loading from the stack

Add support for selecting simple G_LOAD and G_FRAME_INDEX instructions (32-bit
scalars only). This will be useful for functions that need to pass arguments on
the stack.

First part of https://reviews.llvm.org/D27195.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@290096 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[CodeGen] Make MachineInstr::isIdenticalTo() symmetric.
Bjorn Pettersson [Mon, 19 Dec 2016 11:20:57 +0000 (11:20 +0000)]
[CodeGen] Make MachineInstr::isIdenticalTo() symmetric.

Summary:
MachineInstr::isIdenticalTo() is for some reason not
symmetric when comparing bundles, which gives us the
property:

  I1->isIdenticalTo(*I2) != I2->isIdenticalTo(*I1)

when comparing bundles where one bundle is longer than
the other.

This patch makes sure that bundles of different length
always are considered as not being identical. Thus, the
result of the comparison will be the same regardless of
which side that happens to be to the left.

Reviewers: dexonsmith, jonpa, andrew.w.kaylor

Subscribers: llvm-commits, mehdi_amini

Differential Revision: https://reviews.llvm.org/D27508

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@290095 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[XRay] Fix assertion failure on empty machine basic blocks (PR 31424)
Dean Michael Berris [Mon, 19 Dec 2016 09:20:38 +0000 (09:20 +0000)]
[XRay] Fix assertion failure on empty machine basic blocks (PR 31424)

The original version of the code in XRayInstrumentation.cpp assumed that
functions may not have empty machine basic blocks (or that the first one
couldn't be). This change addresses that by special-casing that specific
situation.

We provide two .mir test-cases to make sure we're handling this
appropriately.

Fixes llvm.org/PR31424.

Reviewers: chandlerc

Subscribers: varno, llvm-commits

Differential Revision: https://reviews.llvm.org/D27913

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@290091 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[X86] When recognizing vector loads or VZEXT_LOAD in selectScalarSSELoad make sure...
Craig Topper [Mon, 19 Dec 2016 08:35:56 +0000 (08:35 +0000)]
[X86] When recognizing vector loads or VZEXT_LOAD in selectScalarSSELoad make sure we pass the load's user rather than load itself to the second operand of IsLegalToFold.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@290089 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[TableGen] Use 'unsigned' instead of 'bool' in a place where the code conditionally...
Craig Topper [Mon, 19 Dec 2016 08:35:08 +0000 (08:35 +0000)]
[TableGen] Use 'unsigned' instead of 'bool' in a place where the code conditionally assigns numeric values. They happen to be 0 and 1 so this is NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@290088 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAdd files I seem to have dropped in my revert (r290086).
Daniel Jasper [Mon, 19 Dec 2016 08:32:13 +0000 (08:32 +0000)]
Add files I seem to have dropped in my revert (r290086).

Sorry!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@290087 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRevert @llvm.assume with operator bundles (r289755-r289757)
Daniel Jasper [Mon, 19 Dec 2016 08:22:17 +0000 (08:22 +0000)]
Revert @llvm.assume with operator bundles (r289755-r289757)

This creates non-linear behavior in the inliner (see more details in
r289755's commit thread).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@290086 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[X86] Remove all of the patterns that use X86ISD:FAND/FXOR/FOR/FANDN except for the...
Craig Topper [Mon, 19 Dec 2016 00:42:28 +0000 (00:42 +0000)]
[X86] Remove all of the patterns that use X86ISD:FAND/FXOR/FOR/FANDN except for the ones needed for SSE1. Anything SSE2 or above uses the integer ISD opcode.

This removes 11721 bytes from the DAG isel table or 2.2%

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@290073 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[FileCheck] Fix --strict-whitespace --match-full-lines -- add test-case
Tom de Vries [Sun, 18 Dec 2016 21:04:47 +0000 (21:04 +0000)]
[FileCheck] Fix --strict-whitespace --match-full-lines -- add test-case

Add test-case that was missing in "[FileCheck] Fix --strict-whitespace
--match-full-lines" commit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@290070 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[FileCheck] Fix --strict-whitespace --match-full-lines
Tom de Vries [Sun, 18 Dec 2016 20:45:59 +0000 (20:45 +0000)]
[FileCheck] Fix --strict-whitespace --match-full-lines

Make sure FileCheck --strict-whitespace --match-full-lines translates
'CHECK: bla ' into pattern '^ bla $' instead of pattern '^bla$'.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@290069 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[PDB] Don't use the long type
David Majnemer [Sun, 18 Dec 2016 20:10:50 +0000 (20:10 +0000)]
[PDB] Don't use the long type

Long is not the same size across a number of the platforms we support.
Use unsigned int here instead, it is more appropriate because
overflow/wrap-around is possible and, in this case, expected.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@290068 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[InstCombine] use commutative matchers for patterns with commutative operators
Sanjay Patel [Sun, 18 Dec 2016 18:49:48 +0000 (18:49 +0000)]
[InstCombine] use commutative matchers for patterns with commutative operators

Background/motivation - I was circling back around to:
https://llvm.org/bugs/show_bug.cgi?id=28296

I made a simple patch for that and noticed some regressions, so added test cases for
those with rL281055, and this is hopefully the minimal fix for just those cases.

But as you can see from the surrounding untouched folds, we are missing commuted patterns
all over the place, and of course there are no regression tests to cover any of those cases.

We could sprinkle "m_c_" dust all over this file and catch most of the missing folds, but
then we still wouldn't have test coverage, and we'd still miss some fraction of commuted
patterns because they require adjustments to the match order.

I'm aware of the concern about the potential compile-time performance impact of adding
matches like this (currently being discussed on llvm-dev), but I don't think there's any
evidence yet to suggest that handling commutative pattern matching more thoroughly is not
a worthwhile goal of InstCombine.

Differential Revision: https://reviews.llvm.org/D24419

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@290067 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRevert r289955 and r289962. This is causing lots of ASAN failures for us.
Daniel Jasper [Sun, 18 Dec 2016 14:36:38 +0000 (14:36 +0000)]
Revert r289955 and r289962. This is causing lots of ASAN failures for us.

Not sure whether it causes and ASAN false positive or whether it
actually leads to incorrect code or whether it even exposes bad code.
Hans, I'll get you instructions to reproduce this.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@290066 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[X86] [AVX512] Minor fix in encoding of scalar EVEX instructions. NFC.
Michael Zuckerman [Sun, 18 Dec 2016 14:29:00 +0000 (14:29 +0000)]
[X86] [AVX512] Minor fix in encoding of scalar EVEX instructions. NFC.

Commit on behalf of Gadi Haber

Removed EVEX_V512 prefix from scalar EVEX instructions since HW ignores L'L bits anyway (LIG). 4 instructions are modified.
The changed encodings are validated with XED.
Rviewers: delena, igorb

Differential revision: https://reviews.llvm.org/D27802

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@290065 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[X86][SSE] Add support for combining target shuffles to SHUFPS.
Simon Pilgrim [Sun, 18 Dec 2016 14:26:02 +0000 (14:26 +0000)]
[X86][SSE] Add support for combining target shuffles to SHUFPS.

As discussed on D27692, the next step will be to allow cross-domain shuffles once the combined shuffle depth passes a certain point.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@290064 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[FileCheck] Fix comment in ReadCheckFile
Tom de Vries [Sun, 18 Dec 2016 09:41:20 +0000 (09:41 +0000)]
[FileCheck] Fix comment in ReadCheckFile

The comment in ReadCheckFile claims that both leading and trailing whitespace
are removed, but the associated statement only removes leading whitespace.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@290061 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[X86][SSE][AVX-512] Convert FAND/FOR/FXOR/FANDN nodes to integer operations if they...
Craig Topper [Sun, 18 Dec 2016 07:54:23 +0000 (07:54 +0000)]
[X86][SSE][AVX-512] Convert FAND/FOR/FXOR/FANDN nodes to integer operations if they are available. This will allow a bunch of patterns to be removed.

These nodes are only emitted for lowering FABS/FNEG/FNABS/FCOPYSIGN. Ideally we just wouldn't create these nodes if SSE2 or higher is available, but it was simple to just convert them in DAG combine.

For SSE2, AVX, and AVX512 with DQI this is no functional change as the execution domain fixing pass ensures the right domain is selected regardless of the ISD opcode.

For AVX-512 without DQI we end up using integer instructions since the floating point versions aren't available. But we were already doing that for any logical operations in code that didn't come from FABS/FNEG/FNABS/FCOPYSIGN so this seems no worse. And we get the benefit of being able to fold broadcasts now.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@290060 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[AVX-512] Use EVEX encoded XOR instruction for zeroing scalar registers when DQI...
Craig Topper [Sun, 18 Dec 2016 06:23:14 +0000 (06:23 +0000)]
[AVX-512] Use EVEX encoded XOR instruction for zeroing scalar registers when DQI and VLX instructions are available.

This can give the register allocator more registers to use.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@290057 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[AVX-512] Make sure VLX is also enabled before using EVEX encoded logic ops for scala...
Craig Topper [Sun, 18 Dec 2016 04:17:00 +0000 (04:17 +0000)]
[AVX-512] Make sure VLX is also enabled before using EVEX encoded logic ops for scalars. I missed this in r290049.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@290055 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[PDB] Don't reimplement CRC32
David Majnemer [Sun, 18 Dec 2016 00:41:15 +0000 (00:41 +0000)]
[PDB] Don't reimplement CRC32

We already have a CRC32 implementation which is compatible with the PDB
hash, reuse it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@290054 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[PDB] Validate superblock addresses
David Majnemer [Sun, 18 Dec 2016 00:41:10 +0000 (00:41 +0000)]
[PDB] Validate superblock addresses

- Validate the address of the block map.
- Validate the address of the free block map.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@290053 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAMDGPU: Fix broken check prefix in test
Matt Arsenault [Sat, 17 Dec 2016 20:03:59 +0000 (20:03 +0000)]
AMDGPU: Fix broken check prefix in test

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@290050 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[AVX-512] Use EVEX encoded logic operations for scalar types when they are available...
Craig Topper [Sat, 17 Dec 2016 19:26:00 +0000 (19:26 +0000)]
[AVX-512] Use EVEX encoded logic operations for scalar types when they are available. This gives the register allocator more registers to work with.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@290049 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[AVX-512] Update scalar logic test to show missed opportunity to use EVEX encoded...
Craig Topper [Sat, 17 Dec 2016 19:25:55 +0000 (19:25 +0000)]
[AVX-512] Update scalar logic test to show missed opportunity to use EVEX encoded logic instructions to get more registers to use.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@290048 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRevert "AArch64CollectLOH: Rewrite as block-local analysis."
Matthias Braun [Sat, 17 Dec 2016 18:53:11 +0000 (18:53 +0000)]
Revert "AArch64CollectLOH: Rewrite as block-local analysis."

It is still breaking Chrome. http://llvm.org/PR31361

This reverts commit r290026.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@290047 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[InstCombine] Simplify code slightly. NFC
Craig Topper [Sat, 17 Dec 2016 18:10:04 +0000 (18:10 +0000)]
[InstCombine] Simplify code slightly. NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@290046 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRevert "[libFuzzer] add an experimental flag -experimental_len_control=1 that sets...
Daniel Jasper [Sat, 17 Dec 2016 12:27:49 +0000 (12:27 +0000)]
Revert "[libFuzzer] add an experimental flag -experimental_len_control=1 that sets max_len to 1M and tries to increases the actual max sizes of mutations very gradually. Also remove a bit of dead code"

This reverts commit r289998.

See comment:
https://reviews.llvm.org/rL289998

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@290043 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[DWARF] - Make PubIndexEntryDescriptor::toBits() to be const.
George Rimar [Sat, 17 Dec 2016 10:15:39 +0000 (10:15 +0000)]
[DWARF] - Make PubIndexEntryDescriptor::toBits() to be const.

That is usefull when iterating over entries of new DWARFDebugPubTable class
via DWARFDebugPubTable::getData which returns ArrayRef.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@290041 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[DWARF] - Introduce DWARFDebugPubTable class for dumping pub* sections.
George Rimar [Sat, 17 Dec 2016 09:10:32 +0000 (09:10 +0000)]
[DWARF] - Introduce DWARFDebugPubTable class for dumping pub* sections.

Patch implements parser of pubnames/pubtypes tables instead of static
function used before. It is now should be possible to reuse it
in LLD or other projects and clean up the duplication code.

Differential revision: https://reviews.llvm.org/D27851

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@290040 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[libFuzzer] use less memory for merge
Kostya Serebryany [Sat, 17 Dec 2016 08:20:24 +0000 (08:20 +0000)]
[libFuzzer] use less memory for merge

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@290039 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAdd custom type for PseudoSourceValue
Tom Stellard [Sat, 17 Dec 2016 04:41:53 +0000 (04:41 +0000)]
Add custom type for PseudoSourceValue

Summary:
PseudoSourceValue can be used to attach a target specific value for "well behaved" side-effects lowered from target specific intrinsics.
This is useful whenever there is not an LLVM IR Value around when representing such "well behaved" side-effected operations in backends by attaching a MachineMemOperand with a custom PseudoSourceValue as this makes the scheduler not treating them as "GlobalMemoryObjects" which triggers a logic that makes the operation act like a barrier in the Schedule DAG.

This patch adds another Kind to the PseudoSourceValue object which is "TargetCustom". It indicates a type of PseudoSourceValue that has a target specific meaning (aka. LLVM shouldn't assume any specific usage for such a PSV).

It supports the possibility of having many different kinds of "TargetCustom" PseudoSourceValues.

We had a discussion about if this was valuable or not (in particular because there was a believe that PSV were going away sooner or later) but seems like they are not going anywhere and I think they are useful backend side.

It is not clear the interaction of this with MIRParser (do we need a target hook to parse these?) and I would like a comment from Alex about that :)

Reviewers: arphaman, hfinkel, arsenm

Subscribers: Eugene.Zelenko, llvm-commits

Patch By: Marcello Maggioni

Differential Revision: https://reviews.llvm.org/D13575

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@290037 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoADT: Add a getArrayRef() accessor to MapVector.
Peter Collingbourne [Sat, 17 Dec 2016 04:04:18 +0000 (04:04 +0000)]
ADT: Add a getArrayRef() accessor to MapVector.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@290036 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[libFuzzer] speed up __sanitizer_cov_trace_switch a bit more (remove DIV)
Kostya Serebryany [Sat, 17 Dec 2016 02:23:35 +0000 (02:23 +0000)]
[libFuzzer] speed up __sanitizer_cov_trace_switch a bit more (remove DIV)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@290034 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[libFuzzer] remove stale test
Kostya Serebryany [Sat, 17 Dec 2016 02:18:59 +0000 (02:18 +0000)]
[libFuzzer] remove stale test

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@290033 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoMove test to correct directory
Matthias Braun [Sat, 17 Dec 2016 02:16:26 +0000 (02:16 +0000)]
Move test to correct directory

See also test/CodeGen/MIR/README

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@290032 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[libFuzzer] when tracing switch statements, handle only one case at a time (to make...
Kostya Serebryany [Sat, 17 Dec 2016 02:03:34 +0000 (02:03 +0000)]
[libFuzzer] when tracing switch statements, handle only one case at a time (to make things faster). Also ensure that the signals from value profile do not intersect with the regular coverage

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@290031 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRevert "[GVNHoist] Move GVNHoist to function simplification part of pipeline."
Evgeniy Stepanov [Sat, 17 Dec 2016 01:53:15 +0000 (01:53 +0000)]
Revert "[GVNHoist] Move GVNHoist to function simplification part of pipeline."

This reverts r289696, which caused TSan perf regression.

See PR31382.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@290030 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoFix compilation.
Evgeniy Stepanov [Sat, 17 Dec 2016 01:31:46 +0000 (01:31 +0000)]
Fix compilation.

unittests/ADT/TwineTest.cpp:106:38: error: field 'Count' will be initialized after base 'llvm::FormatAdapter<int>' [-Werror,-Wreorder]
    explicit formatter(int &Count) : Count(Count), FormatAdapter(0) {}

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@290029 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[Hexagon] Other attempt to fix build with enabled asserts broken in 290024 (NFC).
Eugene Zelenko [Sat, 17 Dec 2016 01:29:35 +0000 (01:29 +0000)]
[Hexagon] Other attempt to fix build with enabled asserts broken in 290024 (NFC).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@290028 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[Hexagon] Fix build with enabled asserts broken in 290024 (NFC).
Eugene Zelenko [Sat, 17 Dec 2016 01:17:18 +0000 (01:17 +0000)]
[Hexagon] Fix build with enabled asserts broken in 290024 (NFC).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@290027 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAArch64CollectLOH: Rewrite as block-local analysis.
Matthias Braun [Sat, 17 Dec 2016 01:15:59 +0000 (01:15 +0000)]
AArch64CollectLOH: Rewrite as block-local analysis.

Re-apply r288561: Liveness tracking should be correct now after r290014.

Previously this pass was using up to 5% compile time in some cases which
is a bit much for what it is doing. The pass featured a full blown
data-flow analysis which in the default configuration was restricted to a
single block.

This rewrites the pass under the assumption that we only ever work on a
single block. This is done in a single pass maintaining a state machine
per general purpose register to catch LOH patterns.

Differential Revision: https://reviews.llvm.org/D27329

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@290026 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[Hexagon] Fix some Clang-tidy modernize and Include What You Use warnings; other...
Eugene Zelenko [Sat, 17 Dec 2016 01:09:05 +0000 (01:09 +0000)]
[Hexagon] Fix some Clang-tidy modernize and Include What You Use warnings; other minor fixes (NFC).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@290024 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRetry: [BPI] Use a safer constructor to calculate branch probabilities
Vedant Kumar [Sat, 17 Dec 2016 01:02:08 +0000 (01:02 +0000)]
Retry: [BPI] Use a safer constructor to calculate branch probabilities

BPI may trigger signed overflow UB while computing branch probabilities for
cold calls or to unreachables. For example, with our current choice of weights,
we'll crash if there are >= 2^12 branches to an unreachable.

Use a safer BranchProbability constructor which is better at handling fractions
with large denominators.

Changes since the initial commit:
  - Use explicit casts to ensure that multiplication operands are 64-bit
    ints.

rdar://problem/29368161

Differential Revision: https://reviews.llvm.org/D27862

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@290022 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoDelete unused file.
Zachary Turner [Sat, 17 Dec 2016 00:58:19 +0000 (00:58 +0000)]
Delete unused file.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@290021 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAdd support for formatv to llvm::Twine.
Zachary Turner [Sat, 17 Dec 2016 00:38:15 +0000 (00:38 +0000)]
Add support for formatv to llvm::Twine.

Differential Revision: https://reviews.llvm.org/D27835

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@290020 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRevert "[BPI] Use a safer constructor to calculate branch probabilities"
Vedant Kumar [Sat, 17 Dec 2016 00:19:06 +0000 (00:19 +0000)]
Revert "[BPI] Use a safer constructor to calculate branch probabilities"

This reverts commit r290016. It breaks this bot, even though the test
passes locally:

  http://bb.pgr.jp/builders/ninja-x64-msvc-RA-centos6/builds/32956/

AnalysisTests: /home/bb/ninja-x64-msvc-RA-centos6/llvm-project/llvm/lib/Support/BranchProbability.cpp:52: static llvm::BranchProbability llvm::BranchProbability::getBranchProbability(uint64_t, uint64_t): Assertion `Numerator <= Denominator && "Probability cannot be bigger than 1!"' failed.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@290019 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[libfuzzer] removing experimental FuzzerFnAdapter
Mike Aizatsky [Sat, 17 Dec 2016 00:12:13 +0000 (00:12 +0000)]
[libfuzzer] removing experimental FuzzerFnAdapter

Summary: This is superceded by protobuf mutation work.

Reviewers: kcc

Subscribers: mgorny

Differential Revision: https://reviews.llvm.org/D27865

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@290018 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[sancov] skip dead files from computations
Mike Aizatsky [Sat, 17 Dec 2016 00:11:48 +0000 (00:11 +0000)]
[sancov] skip dead files from computations

Differential Revision: https://reviews.llvm.org/D27863

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@290017 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[BPI] Use a safer constructor to calculate branch probabilities
Vedant Kumar [Sat, 17 Dec 2016 00:09:51 +0000 (00:09 +0000)]
[BPI] Use a safer constructor to calculate branch probabilities

BPI may trigger signed overflow UB while computing branch probabilities
for cold calls or to unreachables. For example, with our current choice
of weights, we'll crash if there are >= 2^12 branches to an unreachable.

Use a safer BranchProbability constructor which is better at handling
fractions with large denominators.

rdar://problem/29368161

Differential Revision: https://reviews.llvm.org/D27862

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@290016 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[ORC][RPC] Use more meaningful template parameter names.
Lang Hames [Sat, 17 Dec 2016 00:04:24 +0000 (00:04 +0000)]
[ORC][RPC] Use more meaningful template parameter names.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@290015 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAArch64: Enable post-ra liveness updates
Matthias Braun [Fri, 16 Dec 2016 23:55:43 +0000 (23:55 +0000)]
AArch64: Enable post-ra liveness updates

Differential Revision: https://reviews.llvm.org/D27559

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@290014 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoBranchRelaxation: Recompute live-ins when splitting a block
Matthias Braun [Fri, 16 Dec 2016 23:55:37 +0000 (23:55 +0000)]
BranchRelaxation: Recompute live-ins when splitting a block

Factors out and reuses live-in computation code from BranchFolding.

Differential Revision: https://reviews.llvm.org/D27558

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@290013 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAllow "line 0" to be the first explicit debug location in a function.
Paul Robinson [Fri, 16 Dec 2016 23:54:33 +0000 (23:54 +0000)]
Allow "line 0" to be the first explicit debug location in a function.

Feedback on r289468 from Adrian Prantl.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@290012 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoGDB pretty printers: Basic DenseMap support
David Blaikie [Fri, 16 Dec 2016 23:53:14 +0000 (23:53 +0000)]
GDB pretty printers: Basic DenseMap support

Still prints the empty/tombstone keys (which some people would prefer,
but I find pretty noisy) because I haven't yet found a reliable way to
skip them (it requires calling into the running process to do so, which
isn't ideal for a pretty printer (doesn't work on a core file, for
example) - and gdb's ability to do so (or my ability to figure out how
to get gdb to do so) is limited) left some breadcrumbs for the next
person who might try to address that.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@290011 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoModuleSummaryAnalysis: Remove some duplicate code. NFCI.
Peter Collingbourne [Fri, 16 Dec 2016 23:19:02 +0000 (23:19 +0000)]
ModuleSummaryAnalysis: Remove some duplicate code. NFCI.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@290003 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoFix a bugs with using some Mach-O command line flags like "-arch armv7m".
Kevin Enderby [Fri, 16 Dec 2016 22:54:02 +0000 (22:54 +0000)]
Fix a bugs with using some Mach-O command line flags like "-arch armv7m".

The Mach-O command line flag like "-arch armv7m" does not match the
arch name part of its llvm Triple which is "thumbv7m-apple-darwin”.

I think the best way to fix this is to have
llvm::object::MachOObjectFile::getArchTriple() optionally return the
name of the Mach-O arch flag that would be used with -arch that
matches the CPUType and CPUSubType.  Then change
llvm::object::MachOUniversalBinary::ObjectForArch::getArchTypeName()
to use that and change it to getArchFlagName() as the type name is
really part of the Triple and the -arch flag name is a Mach-O thing
for a specific Triple with a specific Mcpu value.

rdar://29663637

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@290001 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoResubmit "[CodeView] Hook CodeViewRecordIO for reading/writing symbols."
Zachary Turner [Fri, 16 Dec 2016 22:48:14 +0000 (22:48 +0000)]
Resubmit "[CodeView] Hook CodeViewRecordIO for reading/writing symbols."

The original patch was broken due to some undefined behavior
as well as warnings that were triggering -Werror.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@290000 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[libFuzzer] avoid msan false positives in more cases
Kostya Serebryany [Fri, 16 Dec 2016 22:45:25 +0000 (22:45 +0000)]
[libFuzzer] avoid msan false positives in more cases

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289999 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[libFuzzer] add an experimental flag -experimental_len_control=1 that sets max_len...
Kostya Serebryany [Fri, 16 Dec 2016 22:42:05 +0000 (22:42 +0000)]
[libFuzzer] add an experimental flag -experimental_len_control=1 that sets max_len to 1M and tries to increases the actual max sizes of mutations very gradually. Also remove a bit of dead code

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289998 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[ThinLTO] Import composite types as declarations
Teresa Johnson [Fri, 16 Dec 2016 21:25:01 +0000 (21:25 +0000)]
[ThinLTO] Import composite types as declarations

Summary:
When reading the metadata bitcode, create a type declaration when
possible for composite types when we are importing. Doing this in
the bitcode reader saves memory. Also it works naturally in the case
when the type ODR map contains a definition for the same composite type
because it was used in the importing module (buildODRType will
automatically use the existing definition and not create a type
declaration).

For Chromium built with -g2, this reduces the aggregate size of the
generated native object files by 66% (from 31G to 10G). It reduced
the time through the ThinLTO link and backend phases by about 20% on
my machine.

Reviewers: mehdi_amini, dblaikie, aprantl

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D27775

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289993 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoPreserve loop metadata when folding branches to a common destination.
Michael Kuperstein [Fri, 16 Dec 2016 21:23:59 +0000 (21:23 +0000)]
Preserve loop metadata when folding branches to a common destination.

Differential Revision: https://reviews.llvm.org/D27830

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289992 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[CodeGenPrep] Skip merging empty case blocks
Jun Bum Lim [Fri, 16 Dec 2016 20:38:39 +0000 (20:38 +0000)]
[CodeGenPrep] Skip merging empty case blocks

This is recommit of r287553 after fixing the invalid loop info after eliminating an empty block and unit test failures in AVR and WebAssembly :

Summary: Merging an empty case block into the header block of switch could cause ISel to add COPY instructions in the header of switch, instead of the case block, if the case block is used as an incoming block of a PHI. This could potentially increase dynamic instructions, especially when the switch is in a loop. I added a test case which was reduced from the benchmark I was targetting.

Reviewers: t.p.northover, mcrosier, manmanren, wmi, joerg, davidxl

Subscribers: joerg, qcolombet, danielcdh, hfinkel, mcrosier, llvm-commits

Differential Revision: https://reviews.llvm.org/D22696

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289988 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoInline stripInvariantGroupMetadata out of existence
Sanjoy Das [Fri, 16 Dec 2016 20:29:39 +0000 (20:29 +0000)]
Inline stripInvariantGroupMetadata out of existence

As a one liner function, I don't think it is pulling its weight in terms
of helping readability.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289987 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRevert "[IR] Remove the DIExpression field from DIGlobalVariable."
Adrian Prantl [Fri, 16 Dec 2016 19:39:01 +0000 (19:39 +0000)]
Revert "[IR] Remove the DIExpression field from DIGlobalVariable."

This reverts commit 289920 (again).
I forgot to implement a Bitcode upgrade for the case where a DIGlobalVariable
has not DIExpression. Unfortunately it is not possible to safely upgrade
these variables without adding a flag to the bitcode record indicating which
version they are.
My plan of record is to roll the planned follow-up patch that adds a
unit: field to DIGlobalVariable into this patch before recomitting.
This way we only need one Bitcode upgrade for both changes (with a
version flag in the bitcode record to safely distinguish the record
formats).

Sorry for the churn!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289982 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRevert "[CodeView] Hook CodeViewRecordIO for reading/writing symbols."
Zachary Turner [Fri, 16 Dec 2016 19:25:23 +0000 (19:25 +0000)]
Revert "[CodeView] Hook CodeViewRecordIO for reading/writing symbols."

This reverts commit r289978, which is failing due to some rebase/merge
issues.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289981 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoFix comment on the verifier (typo + doxygen) (NFC)
Mehdi Amini [Fri, 16 Dec 2016 19:24:13 +0000 (19:24 +0000)]
Fix comment on the verifier (typo + doxygen) (NFC)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289980 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[CodeView] Hook CodeViewRecordIO for reading/writing symbols.
Zachary Turner [Fri, 16 Dec 2016 19:20:35 +0000 (19:20 +0000)]
[CodeView] Hook CodeViewRecordIO for reading/writing symbols.

This is the 3rd of 3 patches to get reading and writing of
CodeView symbol and type records to use a single codepath.

Differential Revision: https://reviews.llvm.org/D26427

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289978 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoStrip invalid TBAA when reading bitcode
Mehdi Amini [Fri, 16 Dec 2016 19:16:29 +0000 (19:16 +0000)]
Strip invalid TBAA when reading bitcode

This ensures backward compatibility on bitcode loading.

Differential Revision: https://reviews.llvm.org/D27839

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289977 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoGDB pretty printer for llvm::Optional
David Blaikie [Fri, 16 Dec 2016 19:16:22 +0000 (19:16 +0000)]
GDB pretty printer for llvm::Optional

(some other implementations of an optional pretty printer print the full
name of the optional type (including template parameter) - but seems if
the template parameter isn't printed for std::vector, not sure why it
would be printed for optional, so erring on the side of consistency in
that direction here - compact, etc, as well)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289976 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoReapply "[LV] Enable vectorization of loops with conditional stores by default"
Matthew Simpson [Fri, 16 Dec 2016 19:12:02 +0000 (19:12 +0000)]
Reapply "[LV] Enable vectorization of loops with conditional stores by default"

This patch reapplies r289863. The original patch was reverted because it
exposed a bug causing the loop vectorizer to crash in the Python runtime on
PPC. The underlying issue was fixed with r289958.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289975 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoImplement LaneBitmask::any(), use it to replace !none(), NFCI
Krzysztof Parzyszek [Fri, 16 Dec 2016 19:11:56 +0000 (19:11 +0000)]
Implement LaneBitmask::any(), use it to replace !none(), NFCI

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289974 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoFix CodeGenPrepare::stripInvariantGroupMetadata
Sanjoy Das [Fri, 16 Dec 2016 18:52:33 +0000 (18:52 +0000)]
Fix CodeGenPrepare::stripInvariantGroupMetadata

`dropUnknownNonDebugMetadata` takes a list of "known" metadata IDs.  The
only reason it worked at all is that `getMetadataID` returns something
unrelated -- it returns the subclass ID of the receiver (which is used
in `dyn_cast` etc.).  That does not numerically match
`LLVMContext::MD_invariant_group` and ends up dropping `invariant_group`
along with every other metadata that does not numerically match
`LLVMContext::MD_invariant_group`.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289973 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[ARM] Add ARMISD::VLD1DUP to match vld1_dup more consistently.
Eli Friedman [Fri, 16 Dec 2016 18:44:08 +0000 (18:44 +0000)]
[ARM] Add ARMISD::VLD1DUP to match vld1_dup more consistently.

Currently, there are substantial problems forming vld1_dup even if the
VDUP survives legalization. The lack of an actual node
leads to terrible results: not only can we not form post-increment vld1_dup
instructions, but we form scalar pre-increment and post-increment
loads which force the loaded value into a GPR. This patch fixes that
by combining the vdup+load into an ARMISD node before DAGCombine
messes it up.

Also includes a crash fix for vld2_dup (see testcase @vld2dupi8_postinc_variable).

Recommiting with fix to avoid forming vld1dup if the type of the load
doesn't match the type of the vdup (see
https://llvm.org/bugs/show_bug.cgi?id=31404).

Differential Revision: https://reviews.llvm.org/D27694

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289972 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoFix name typo in SelectonDAG
Joel Jones [Fri, 16 Dec 2016 18:22:54 +0000 (18:22 +0000)]
Fix name typo in SelectonDAG

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289969 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAMDGPU: Fix name for v_ashrrev_i16
Matt Arsenault [Fri, 16 Dec 2016 17:40:11 +0000 (17:40 +0000)]
AMDGPU: Fix name for v_ashrrev_i16

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289967 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[libFuzzer] Fix index error in SearchMemory() implementation for Windows.
Marcos Pividori [Fri, 16 Dec 2016 17:35:25 +0000 (17:35 +0000)]
[libFuzzer] Fix index error in SearchMemory() implementation for Windows.

Differential Revision: https://reviews.llvm.org/D27731

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289966 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[libFuzzer] Remove unnecessary includes of posix headers.
Marcos Pividori [Fri, 16 Dec 2016 17:35:21 +0000 (17:35 +0000)]
[libFuzzer] Remove unnecessary includes of posix headers.

Remove includes of "unistd.h" header, which is missing in non posix
systems.

Differential Revision: https://reviews.llvm.org/D277300

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289965 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[libFuzzer] Update tests to use more general functions instead of posix specific.
Marcos Pividori [Fri, 16 Dec 2016 17:35:13 +0000 (17:35 +0000)]
[libFuzzer] Update tests to use more general functions instead of posix specific.

Replace sleep() posix function by a more portable sleep_for() function
from std. Also, ignore memmem() and strcasestr() on Windows.

Differential Revision: https://reviews.llvm.org/D27729

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289964 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoFix -Wself-assign from r289955
Hans Wennborg [Fri, 16 Dec 2016 17:16:46 +0000 (17:16 +0000)]
Fix -Wself-assign from r289955

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289962 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRevert "dwarfdump: Support/process relocations on a CU's abbrev_off"
David Blaikie [Fri, 16 Dec 2016 17:10:17 +0000 (17:10 +0000)]
Revert "dwarfdump: Support/process relocations on a CU's abbrev_off"

Reverting because this breaks lld's gdb_index support - it's probably
double counting the abbrev relocation offset.

This reverts commit r289954.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289961 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRevert "[CodeGenPrep] Skip merging empty case blocks"
Jun Bum Lim [Fri, 16 Dec 2016 17:06:14 +0000 (17:06 +0000)]
Revert "[CodeGenPrep] Skip merging empty case blocks"

This reverts commit r289951.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289960 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[InstCombine] auto-generate checks; NFC
Sanjay Patel [Fri, 16 Dec 2016 16:58:54 +0000 (16:58 +0000)]
[InstCombine] auto-generate checks; NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289959 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[LV] Don't attempt to type-shrink scalarized instructions
Matthew Simpson [Fri, 16 Dec 2016 16:52:35 +0000 (16:52 +0000)]
[LV] Don't attempt to type-shrink scalarized instructions

After r288909, instructions feeding predicated instructions may be scalarized
if profitable. Since these instructions will remain scalar, we shouldn't
attempt to type-shrink them. We should only truncate vector types to their
minimal bit widths. This bug was exposed by enabling the vectorization of loops
containing conditional stores by default.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289958 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoPass sample pgo flags to thinlto.
Dehao Chen [Fri, 16 Dec 2016 16:48:46 +0000 (16:48 +0000)]
Pass sample pgo flags to thinlto.

Summary: ThinLTO needs to invoke SampleProfileLoader pass during link time in order to annotate profile correctly after module importing.

Reviewers: davidxl, mehdi_amini, tejohnson

Subscribers: pcc, davide, llvm-commits, mehdi_amini

Differential Revision: https://reviews.llvm.org/D27790

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289957 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[X86] Fold (setcc (cmp (atomic_load_add x, -C) C), COND) to (setcc (LADD x, -C),...
Hans Wennborg [Fri, 16 Dec 2016 16:34:59 +0000 (16:34 +0000)]
[X86] Fold (setcc (cmp (atomic_load_add x, -C) C), COND) to (setcc (LADD x, -C), COND) (PR31367)

atomic_load_add returns the value before addition, but sets EFLAGS based on the
result of the addition. That means it's setting the flags based on effectively
subtracting C from the value at x, which is also what the outer cmp does.

This targets a pattern that occurs frequently with reference counting pointers:

  void decrement(long volatile *ptr) {
    if (_InterlockedDecrement(ptr) == 0)
      release();
  }

Clang would previously compile it (for 32-bit at -Os) as:

00000000 <?decrement@@YAXPCJ@Z>:
   0:   8b 44 24 04             mov    0x4(%esp),%eax
   4:   31 c9                   xor    %ecx,%ecx
   6:   49                      dec    %ecx
   7:   f0 0f c1 08             lock xadd %ecx,(%eax)
   b:   83 f9 01                cmp    $0x1,%ecx
   e:   0f 84 00 00 00 00       je     14 <?decrement@@YAXPCJ@Z+0x14>
  14:   c3                      ret

and with this patch it becomes:

00000000 <?decrement@@YAXPCJ@Z>:
   0:   8b 44 24 04             mov    0x4(%esp),%eax
   4:   f0 ff 08                lock decl (%eax)
   7:   0f 84 00 00 00 00       je     d <?decrement@@YAXPCJ@Z+0xd>
   d:   c3                      ret

(Equivalent variants with _InterlockedExchangeAdd, std::atomic<>'s fetch_add
or pre-decrement operator generate the same code.)

Differential Revision: https://reviews.llvm.org/D27781

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289955 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agodwarfdump: Support/process relocations on a CU's abbrev_off
David Blaikie [Fri, 16 Dec 2016 16:31:10 +0000 (16:31 +0000)]
dwarfdump: Support/process relocations on a CU's abbrev_off

Input can be produced by ld -r, for example (a normal LLVM workflow
never hits this - LLVM only ever produces a single abbrev table in an
object (shared by multiple CUs), so the reloc's always 0, and when it's
linked together the relocation's resolved so it doesn't need to be
handled)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289954 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[CodeGenPrep] Skip merging empty case blocks
Jun Bum Lim [Fri, 16 Dec 2016 16:03:31 +0000 (16:03 +0000)]
[CodeGenPrep] Skip merging empty case blocks

This is recommit of r287553 after fixing the invalid loop info after eliminating an empty block:

Summary: Merging an empty case block into the header block of switch could cause ISel to add COPY instructions in the header of switch, instead of the case block, if the case block is used as an incoming block of a PHI. This could potentially increase dynamic instructions, especially when the switch is in a loop. I added a test case which was reduced from the benchmark I was targetting.

Reviewers: t.p.northover, mcrosier, manmanren, wmi, joerg, davidxl

Subscribers: joerg, qcolombet, danielcdh, hfinkel, mcrosier, llvm-commits

Differential Revision: https://reviews.llvm.org/D22696

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289951 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[X86][AVX] Call lowerVectorShuffleWithSHUFPS directly instead of calling DAG.getVecto...
Simon Pilgrim [Fri, 16 Dec 2016 15:23:32 +0000 (15:23 +0000)]
[X86][AVX] Call lowerVectorShuffleWithSHUFPS directly instead of calling DAG.getVectorShuffle (PR27885)

We've already done the hardwork of ensuring the mask is safe for 'SHUFPS'.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289950 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[X86][AVX512] use a single shufps for 512-bit vectors when it can save instructions
Simon Pilgrim [Fri, 16 Dec 2016 14:30:04 +0000 (14:30 +0000)]
[X86][AVX512] use a single shufps for 512-bit vectors when it can save instructions

This is the 512-bit counterpart to the 128-bit transform checked in here:
https://reviews.llvm.org/rL289837

This patch is based on the draft by @sroland (Roland Scheidegger) that is attached to PR27885:
https://llvm.org/bugs/show_bug.cgi?id=27885

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289946 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[X86][AVX512] Add tests showing missed opportunity to efficiently lower v16i32 to...
Simon Pilgrim [Fri, 16 Dec 2016 14:21:57 +0000 (14:21 +0000)]
[X86][AVX512] Add tests showing missed opportunity to efficiently lower v16i32 to VSHUFPS (PR27885)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289945 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoSpeculatively revert r289925, see PR31407
Nico Weber [Fri, 16 Dec 2016 14:02:28 +0000 (14:02 +0000)]
Speculatively revert r289925, see PR31407

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289944 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[MIRParser] Add parsing hex literals of arbitrary size as unsigned integers
Krzysztof Parzyszek [Fri, 16 Dec 2016 13:58:01 +0000 (13:58 +0000)]
[MIRParser] Add parsing hex literals of arbitrary size as unsigned integers

The current code does not parse hex literals larger than 32-bit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289943 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoMove VerifierSupport into namespace llvm.
Daniel Jasper [Fri, 16 Dec 2016 13:53:46 +0000 (13:53 +0000)]
Move VerifierSupport into namespace llvm.

It currently is in an unnamed namespace and then it shouldn't be used
from something in the header file. This actually triggers a warning with
GCC:
../include/llvm/IR/Verifier.h:39:7: warning: ‘llvm::TBAAVerifier’ has a field ‘llvm::TBAAVerifier::Diagnostic’ whose type uses the anonymous namespace [enabled by default]

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289942 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[GlobalISel] Silence unused variable warnings in Release builds.
Benjamin Kramer [Fri, 16 Dec 2016 13:13:03 +0000 (13:13 +0000)]
[GlobalISel] Silence unused variable warnings in Release builds.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289941 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[ARM] GlobalISel: Select add i32, i32
Diana Picus [Fri, 16 Dec 2016 12:54:46 +0000 (12:54 +0000)]
[ARM] GlobalISel: Select add i32, i32

Add the minimal support necessary to select a function that returns the sum of
two i32 values.

This includes some support for argument/return lowering of i32 values through
registers, as well as the handling of copy and add instructions throughout the
GlobalISel pipeline.

Differential Revision: https://reviews.llvm.org/D26677

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289940 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[X86][SSE] Combine shuffles to MOVSS/MOVSD whatever the domain.
Simon Pilgrim [Fri, 16 Dec 2016 11:48:51 +0000 (11:48 +0000)]
[X86][SSE] Combine shuffles to MOVSS/MOVSD whatever the domain.

We already do the same thing in shuffle lowering; but don't do it if we have SSE41 (PBLEND) instead.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289937 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[AVR] Add a test for 64-bit left shifts
Dylan McKay [Fri, 16 Dec 2016 11:40:00 +0000 (11:40 +0000)]
[AVR] Add a test for 64-bit left shifts

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289936 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRevert r289863: [LV] Enable vectorization of loops with conditional
Chandler Carruth [Fri, 16 Dec 2016 11:31:39 +0000 (11:31 +0000)]
Revert r289863: [LV] Enable vectorization of loops with conditional
stores by default

This uncovers a crasher in the loop vectorizer on PPC when building the
Python runtime. I'll send the testcase to the review thread for the
original commit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289934 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago [codegen] Add generic functions to skip debug values.
Florian Hahn [Fri, 16 Dec 2016 11:10:26 +0000 (11:10 +0000)]
 [codegen] Add generic functions to skip debug values.

Summary:
This commits moves skipDebugInstructionsForward and
skipDebugInstructionsBackward from lib/CodeGen/IfConversion.cpp
to include/llvm/CodeGen/MachineBasicBlock.h and updates
some codgen files to use them.

This refactoring was suggested in https://reviews.llvm.org/D27688
and I thought it's best to do the refactoring in a separate
review, but I could also put both changes in a single review
if that's preferred.

Also, the names for the functions aren't the snappiest and
I would be happy to rename them if anybody has suggestions.

Reviewers: eli.friedman, iteratee, aprantl, MatzeB

Subscribers: MatzeB, llvm-commits

Differential Revision: https://reviews.llvm.org/D27782

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289933 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[ARM] Expose methods to get the CCAssignFn. NFCI
Diana Picus [Fri, 16 Dec 2016 10:35:20 +0000 (10:35 +0000)]
[ARM] Expose methods to get the CCAssignFn. NFCI

Add two public methods to ARMTargetLowering: CCAssignFnForCall and
CCAssignFnForReturn, which are just calling the already existing private method
CCAssignFnForNode. These will come in handy for GlobalISel on ARM.

We also replace all calls to CCAssignFnForNode in ARMISelLowering.cpp, because
the new methods are friendlier to the reader.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289932 91177308-0d34-0410-b5e6-96231b3b80d8