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Simon Dardis [Wed, 21 Sep 2016 09:43:40 +0000 (09:43 +0000)]
[mips] LLVM PR/30197 - Tail call incorrectly clobbers arguments for mips
The postRA scheduler performs alias analysis to determine if stores and loads
can moved past each other. When a function has more arguments than argument
registers for the calling convention used, excess arguments are spilled onto the
stack. LLVM by default assumes that argument slots are immutable, unless the
function contains a tail call. Without the knowledge of that a function contains
a tail call site, stores and loads to fixed stack slots may be re-ordered
causing the out-going arguments to clobber the incoming arguments before the
incoming arguments are supposed to be dead.
Reviewers: vkalintiris
Differential Review: https://reviews.llvm.org/D24077
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@282063
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Diana Picus [Wed, 21 Sep 2016 08:24:41 +0000 (08:24 +0000)]
Revert "AArch64: Set shift bit of TLSLE HI12 add instruction"
This reverts commit r282057 because it broke the buildbots - see e.g.
http://lab.llvm.org:8011/builders/clang-cmake-aarch64-42vma/builds/12063
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@282058
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Lei Liu [Wed, 21 Sep 2016 07:41:41 +0000 (07:41 +0000)]
AArch64: Set shift bit of TLSLE HI12 add instruction
Summary: AArch64 LLVM assembler emits add instruction without shift bit to calculate the higher 12-bit address of TLS variables in local exec model. This generates wrong code sequence to access TLS variables with thread offset larger than 0x1000.
Reviewers: t.p.northover, peter.smith, rovka
Subscribers: salim.nasser, aemerson, llvm-commits, rengolin
Differential Revision: https://reviews.llvm.org/D24702
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@282057
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Craig Topper [Wed, 21 Sep 2016 06:37:54 +0000 (06:37 +0000)]
[AVX-512] Split the 3 different usages of the X86ISD::FSETCC opcode into 3 different opcodes.
It turns out isel is really not robust against having different type profiles for the same opcode. It turns out that if you put an illegal rounding mode(i.e. not CUR_DIRECTION or NO_EXC) on a comiss intrinsic we would generate the FSETCC form with the rounding mode added, but then pattern match to an instruction with ROUND_CUR_DIRECTION.
We can probably get away with just one FSETCCM opcode that always contains the rounding mode and explicitly put ROUND_CUR_DIRECTION in the pattern, but I'll leave that for future work.
With this change the clang tests for the comiss intrinsics that used an incorrect rounding mode of 3 properly fail isel instead of silently doing the wrong thing. Those clang tests will be fixed in a follow up commit and I also plan to add rounding mode checking to clang.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@282055
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NAKAMURA Takumi [Wed, 21 Sep 2016 04:43:11 +0000 (04:43 +0000)]
llvm/test/CodeGen/NVPTX/zero-cs.ll: Relax an expression to match in -Asserts.
LLVM ERROR: Cannot select: 0x3607bf0: i32 = ExternalSymbol'__powidf2'
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@282053
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Craig Topper [Wed, 21 Sep 2016 03:58:44 +0000 (03:58 +0000)]
[AVX-512] Don't add an additional rounding mode operand to the avx512 vcvtps2ph intrinsic lowering.
There was no way to control its value so it was always FROUND_CURRENT making it unnecessary. The true rounding mode is encoded in the immediate operand of the instruction.
This also removes the pattern from the rb form of the instructions since there is no way to specify the FROUND_NO_EXC rounding mode it required.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@282052
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Craig Topper [Wed, 21 Sep 2016 03:58:41 +0000 (03:58 +0000)]
[AVX-512] Simplify handling of INTR_TYPE_1OP_MASK_RM to remove support for the second opcode since its never used. This makes it consistent with INTR_TYPE_2OP_MASK_RM and INTR_TYPE_3OP_MASK_RM.
And even if it was used we were passing the same operands to both so it wouldn't make sense to have two opcodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@282051
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Kostya Serebryany [Wed, 21 Sep 2016 03:50:37 +0000 (03:50 +0000)]
[libFuzzer] fix libc++ build
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@282050
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Adam Nemet [Wed, 21 Sep 2016 03:14:20 +0000 (03:14 +0000)]
[LV] When reporting about a specific instruction without debug location use loop's
This can occur for example if some optimization drops the debug location.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@282048
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Kostya Serebryany [Wed, 21 Sep 2016 02:05:39 +0000 (02:05 +0000)]
[libFuzzer] more refactoring; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@282047
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Craig Topper [Wed, 21 Sep 2016 02:05:22 +0000 (02:05 +0000)]
[AVX-512] Don't lower avx512 vcvtps2ph/vcvtph2ps nodes to ISD::FP16_TO_FP/ISD::FP_TO_FP16 with an extra x86 specific rounding mode operand. We should use a target specific ISD opcode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@282046
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Jacques Pienaar [Wed, 21 Sep 2016 01:57:57 +0000 (01:57 +0000)]
[NVPTX] Check if callsite is defined when computing argument allignment
Summary: In getArgumentAlignment check if the ImmutableCallSite pointer CS is non-null before dereferencing. If CS is 0x0 fall back to the ABI type alignment else compute the alignment as before.
Reviewers: eliben, jpienaar
Subscribers: jlebar, vchuravy, cfe-commits, jholewinski
Differential Revision: https://reviews.llvm.org/D9168
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@282045
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Kostya Serebryany [Wed, 21 Sep 2016 01:50:50 +0000 (01:50 +0000)]
[libFuzzer] refactoring: split the large header into many; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@282044
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Kostya Serebryany [Wed, 21 Sep 2016 01:04:43 +0000 (01:04 +0000)]
[libFuzzer] refactoring: move the Corpus into a separate class; delete two unused experimental features
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@282042
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Justin Bogner [Wed, 21 Sep 2016 00:25:45 +0000 (00:25 +0000)]
Revert "TableGen: Switch from a std::map to a DenseMap in CodeGenSubRegIndex. NFC"
It turns out we iterate over this map a fair amount and the order
matters for clang to be deterministic. See:
http://lists.llvm.org/pipermail/llvm-commits/Week-of-Mon-
20160919/391315.html
This reverts r279875.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@282040
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Michael Kuperstein [Tue, 20 Sep 2016 23:10:31 +0000 (23:10 +0000)]
[InferAttributes] Don't access parameters that don't exist.
Check for the correct number of parameters before querying their type.
This fixes PR30455.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@282038
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Teresa Johnson [Tue, 20 Sep 2016 23:07:17 +0000 (23:07 +0000)]
[ThinLTO] Always emit a summary when compiling in ThinLTO mode
Summary:
Emit an empty summary section, instead of no summary section, when
there are no global variables in the index. This ensures that LTO
will treat these files as ThinLTO inputs, instead of as regular
LTO inputs.
In addition to not being what the user likely intended when
compiling with -flto=thin, the current behavior is problematic for
distributed build systems that expect to get ThinLTO index and imports
files back for each input compiled with -flto=thin. Combining into
a single regular LTO module also reduces the backend parallelism.
And in the case where the index was suppressed due to uses in
inline assembly, combining into a single LTO module could provoke
renaming of duplicates that we were trying to prevent by suppressing
the index.
This change required a couple of fixes to handle the empty summary
section.
Reviewers: mehdi_amini
Subscribers: mehdi_amini, llvm-commits, pcc
Differential Revision: https://reviews.llvm.org/D24779
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@282037
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Xinliang David Li [Tue, 20 Sep 2016 22:39:47 +0000 (22:39 +0000)]
code cleanup -- commoning IR travsersals
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@282034
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Eric Christopher [Tue, 20 Sep 2016 22:19:33 +0000 (22:19 +0000)]
Remove the default subtarget from the x86 port as it isn't necessary (or
correct) anymore.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@282031
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Eric Christopher [Tue, 20 Sep 2016 22:03:28 +0000 (22:03 +0000)]
Revert "Remove extra argument used once on
TargetMachine::getNameWithPrefix and inline the result into the singular
caller." and "Remove more guts of TargetMachine::getNameWithPrefix and
migrate one check to the TLOF mach-o version." temporarily until I can
get the whole call migrated out of the TargetMachine as we could hit
places where TLOF isn't valid.
This reverts commits r281981 and r281983.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@282028
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Anna Thomas [Tue, 20 Sep 2016 21:36:02 +0000 (21:36 +0000)]
[RS4GC] Refactor code for Rematerializing in presence of phi. NFC
Summary:
This is an NFC refactoring change as a precursor to the actual fix for rematerializing in
presence of phi.
https://reviews.llvm.org/D24399
Pasted from review:
findRematerializableChainToBasePointer changed to return the root of the
chain. instead of true or false.
move the PHI matching logic into the caller by inspecting the root return value.
This includes an assertion that the alternate root is in the liveset for the
call.
Tested with current RS4GC tests.
Reviewers: reames, sanjoy
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D24780
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@282023
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George Burgess IV [Tue, 20 Sep 2016 21:30:01 +0000 (21:30 +0000)]
[CodeGen] stop short-circuiting the SSP code for sspstrong.
This check caused us to skip adding layout information for calls to
alloca in sspreq/sspstrong mode. We check properly for sspstrong later
on (and add the correct layout info when doing so), so removing this
shouldn't hurt.
No test is included, since testing this using lit seems to require
checking for exact offsets in asm, which is something that the lit tests
for this avoid. If someone cares deeply, I'm happy to write a unittest
or something to cover this, but that feels like overkill.
Patch by Daniel Micay.
Differential Revision: https://reviews.llvm.org/D22714
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@282022
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Vedant Kumar [Tue, 20 Sep 2016 21:27:48 +0000 (21:27 +0000)]
[llvm-cov] Demangle names for hidden instantiation views
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@282020
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Xinliang David Li [Tue, 20 Sep 2016 21:04:22 +0000 (21:04 +0000)]
[Profile] dump ic value profile value/site-count histogram
Differential Revision: http://reviews.google.com/D24783
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@282017
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Petr Hosek [Tue, 20 Sep 2016 20:21:13 +0000 (20:21 +0000)]
Mark ELF sections whose name start with .note as note
Previously, such section would be marked as SHT_PROGBITS which
makes it impossible to use an initialized C variable declaration
to emit an (allocated) ELF note. The new behavior is also consistent
with ELF assembly parser.
Differential Revision: https://reviews.llvm.org/D24692
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@282010
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Xinliang David Li [Tue, 20 Sep 2016 20:20:01 +0000 (20:20 +0000)]
[Profile] Do not annotate select insts not covered in profile.
Fixed PR/30466
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@282009
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Kevin Enderby [Tue, 20 Sep 2016 20:14:14 +0000 (20:14 +0000)]
Next set of additional error checks for invalid Mach-O files for bad load commands
that use the Mach::dylib_command type for the load commands that are
currently used in the MachOObjectFile constructor.
This contains the missing checks for LC_ID_DYLIB, LC_ID_DYLIB, etc.
load commands and the fields for the Mach::dylib_command type.
Also checks that only an MH_DYLIB or MH_STUB_DYLIB has an
LC_ID_DYLIB load command (and others filetype don’t) and there
is not more than one of these load commands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@282008
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Sanjay Patel [Tue, 20 Sep 2016 19:31:30 +0000 (19:31 +0000)]
[x86] split up tests, regenerate checks
Note that we fail to eliminate 'or' with 0!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@282005
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Xinliang David Li [Tue, 20 Sep 2016 19:07:22 +0000 (19:07 +0000)]
[Profile] code refactoring: make getStep a method in base class
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@282002
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Evandro Menezes [Tue, 20 Sep 2016 19:02:09 +0000 (19:02 +0000)]
Revert part of "AArch64: Do not test for CPUs, use SubtargetFeatures"
This reverts part of commit
119e358d9635c8d1f3e7aee67e3ea3b8a62f8db6 by
removing FeatureUseRSqrt et al per request by Eric Christopher
<echristo@gmail.com> (v. http://bit.ly/2cmz6kW).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@282001
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Evandro Menezes [Tue, 20 Sep 2016 19:02:06 +0000 (19:02 +0000)]
Revert "[AArch64] Use the reciprocal estimation machinery"
This reverts commit
b7d42b0048f65346e9fa37fb65defeea7ce8c337 per request by
Eric Christopher <echristo@gmail.com> (v. http://bit.ly/2cmz6kW).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@282000
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Evandro Menezes [Tue, 20 Sep 2016 19:02:02 +0000 (19:02 +0000)]
Revert "[AArch64] Properly validate the reciprocal estimation."
This reverts commit
ad8ca1528242e2a4cb363e3779309e70eb7a430e per request by
Eric Christopher <echristo@gmail.com> (v. http://bit.ly/2cmz6kW).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281999
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Adrian Prantl [Tue, 20 Sep 2016 18:28:42 +0000 (18:28 +0000)]
ASAN: Don't drop debug info attachements for global variables.
This is a follow-up to r281284. Global Variables now can have
!dbg attachements, so ASAN should clone these when generating a
sanitized copy of a global variable.
<rdar://problem/
24899262>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281994
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Adrian McCarthy [Tue, 20 Sep 2016 17:42:13 +0000 (17:42 +0000)]
Fix syntactical nit from r281990.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281991
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Adrian McCarthy [Tue, 20 Sep 2016 17:20:51 +0000 (17:20 +0000)]
Emit S_COMPILE3 CodeView record
CodeView has an S_COMPILE3 record to identify the compiler and source language of the compiland. This record comes first in the debug$S section for the compiland. The debuggers rely on this record to know the source language of the code.
There was a little test fallout from introducing a new record into the symbols subsection.
Differential Revision: https://reviews.llvm.org/D24317
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281990
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Saleem Abdulrasool [Tue, 20 Sep 2016 17:05:04 +0000 (17:05 +0000)]
X86: loosen an overly aggressive MachO assertion
We would assert that the FP setup CFI used esp/rsp always. This held up in
practice when the code was generated from IR. However, with the integrated
assembler, it is possible to have the input be user specified assembly. In such
a case, we cannot assume that the function implementation has a compact unwind
representation. Loosen the assertion into a check and bail if we cannot
represent the frame pointer in the compact unwinding.
Addresses PR30453!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281986
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Eric Christopher [Tue, 20 Sep 2016 16:05:02 +0000 (16:05 +0000)]
Remove more guts of TargetMachine::getNameWithPrefix and migrate one check to the TLOF mach-o version.
NFC intended.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281983
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Eric Christopher [Tue, 20 Sep 2016 16:04:59 +0000 (16:04 +0000)]
Remove a use of subtarget initialization in the X86 backend so we can get rid of the default subtarget.
NFC intended.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281982
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Eric Christopher [Tue, 20 Sep 2016 16:04:50 +0000 (16:04 +0000)]
Remove extra argument used once on TargetMachine::getNameWithPrefix and inline the result into the singular caller.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281981
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Keith Walker [Tue, 20 Sep 2016 16:04:31 +0000 (16:04 +0000)]
Improve the -debug output for Debug Range Extension (NFC)
Include header messages and remove unnecessary blank lines.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281980
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Tim Northover [Tue, 20 Sep 2016 15:20:36 +0000 (15:20 +0000)]
GlobalISel: split aggregates for PCS lowering
This should match the existing behaviour for passing complicated struct and
array types, in particular HFAs come through like that from Clang.
For C & C++ we still need to somehow support all the weird ABI flags, or at
least those that are present in the IR (signext, byval, ...), and stack-based
parameter passing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281977
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Simon Pilgrim [Tue, 20 Sep 2016 14:42:45 +0000 (14:42 +0000)]
[X86][SSE] Regenerate multiple combine tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281973
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Sanjay Patel [Tue, 20 Sep 2016 14:36:14 +0000 (14:36 +0000)]
move variables closer to their uses; add FIXMEs; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281972
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Artem Tamazov [Tue, 20 Sep 2016 11:58:40 +0000 (11:58 +0000)]
[AMDGPU][mc] Add regression tests for Bug 28168
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281967
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Elena Demikhovsky [Tue, 20 Sep 2016 11:02:26 +0000 (11:02 +0000)]
AVX-512: Fixed a bug in lowering saturated operations on KNL.
The generated code is still not optimal.
Differential Revision: https://reviews.llvm.org/D24723
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281966
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Valery Pykhtin [Tue, 20 Sep 2016 10:41:16 +0000 (10:41 +0000)]
[AMDGPU] Refactor VOP3 instruction TD definitions
Differential revision: https://reviews.llvm.org/D24664
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281965
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Keith Walker [Tue, 20 Sep 2016 10:36:17 +0000 (10:36 +0000)]
Make llvm::ConvertDebugDeclareToDebugValue() be a void function (NFC)
The routines llvm::ConvertDebugDeclareToDebugValue() always returned
a true value which was never checked at the call site; change the
function return type to void.
This NFC cleanup was approved in the review https://reviews.llvm.org/D23715
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281964
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Nikolay Haustov [Tue, 20 Sep 2016 09:04:51 +0000 (09:04 +0000)]
AMDGPU: Improve documentation.
Summary:
Add links to ISA manuals and ABI.
Add text about assembler syntax.
Add info about instructions operands.
Add instruction examples for each encoding.
Update directives section, add missing .amdgpu_hsa_kernel.
Reviewers: tstellarAMD, SamWot, vpykhtin
Subscribers: kzhuravl, wdng, nhaehnle, yaxunl, tony-tye, artem.tamazov, llvm-commits
Differential Revision: https://reviews.llvm.org/D24724
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281962
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Dorit Nuzman [Tue, 20 Sep 2016 08:27:48 +0000 (08:27 +0000)]
Reverting revision 281960 due to test failures.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281961
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Dorit Nuzman [Tue, 20 Sep 2016 07:50:49 +0000 (07:50 +0000)]
[SROA] Preserve llvm.mem.parallel_loop_access metadata.
SROA doesn't preserve the llvm.mem.parallel_loop_access metadata when it
transforms loads/stores. This patch fixes a couple occurences of this
issue.
(Partially addresses PR28981).
Differential Revision: https://reviews.llvm.org/D23549
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281960
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Craig Topper [Tue, 20 Sep 2016 06:49:17 +0000 (06:49 +0000)]
[AVX-512] Teach X86InstrInfo::copyPhysReg to use a 512-bit move if XMM16-XMM31 or YMM16-YMM31 are the source or dest of the copy and VLX is not supported.
This can happen with SUBREG_TO_REG of ZMM16-ZMM31. Fixes PR30430.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281959
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Craig Topper [Tue, 20 Sep 2016 05:44:47 +0000 (05:44 +0000)]
[AVX-512] Use 512-bit vcvtps2ph/vcvtph2ps to implement fp_to_f16/f16_to_fp when F16C and VLX are not supported.
Fixes PR23941.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281958
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Matthias Braun [Tue, 20 Sep 2016 01:14:42 +0000 (01:14 +0000)]
BranchFolder: Fix invalid undef flags after merge.
It is legal to merge instructions with different undef flags; However we
must drop the undef flag from the merged instruction if it isn't present
everywhere.
This fixes http://llvm.org/PR30199
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281957
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Matthias Braun [Tue, 20 Sep 2016 01:14:39 +0000 (01:14 +0000)]
Machine{Instr|Operand}: Clarify some isIdenticalTo() subtleties.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281956
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Quentin Colombet [Tue, 20 Sep 2016 00:48:44 +0000 (00:48 +0000)]
[RegisterBankInfo] Avoid heap allocation in InstructionMapping.
Use SmallVector instead of dynamically allocated arrays for the mapping of the
operands in the InstructionMapping. That way we avoid heap allocation for most
of the cases. Ultimately, we should not have to rely on such tricky, the
instances of InstructionMapping would be TableGen'ed.
This improves the compilation time of the RegBankSelect pass.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281955
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Sanjay Patel [Tue, 20 Sep 2016 00:27:22 +0000 (00:27 +0000)]
[x86] fix variable names; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281953
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Kostya Serebryany [Tue, 20 Sep 2016 00:16:54 +0000 (00:16 +0000)]
[sanitizer-coverage] add comdat to coverage guards if needed
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281952
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Sanjay Patel [Mon, 19 Sep 2016 23:44:50 +0000 (23:44 +0000)]
[x86] auto-generate checks
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281950
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Philip Reames [Mon, 19 Sep 2016 23:30:23 +0000 (23:30 +0000)]
[LCSSA] Cache LoopExits to avoid wasted work
When looking at the scribus_1.3 example from https://llvm.org/bugs/show_bug.cgi?id=10584, I noticed that we were spending a large amount of time computing loop exits in LCSSA. This code appears to be written with the assumption that LoopExits are stored in the Loop and thus cheap to query. This is not true, so we should cache the result across the potentially long running loop which tends to visit a small handful of Loops.
On the particular example from 10584, this change drops the time spent in LCSSA computation by about 80%.
Differential Revision: https://reviews.llvm.org/D24509
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281949
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Quentin Colombet [Mon, 19 Sep 2016 23:18:47 +0000 (23:18 +0000)]
[RegisterBankInfo] Adapt call to std::fill due to use of SmallVector.
This was meant to be commited with my previous commit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281948
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David Callahan [Mon, 19 Sep 2016 23:17:58 +0000 (23:17 +0000)]
Merge branch 'ADCE5'
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281947
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Lang Hames [Mon, 19 Sep 2016 23:00:27 +0000 (23:00 +0000)]
[Kaleidoscope] Make Chapter 2 use llvm::make_unique, rather than a helper.
This essentially reverts r251936, minimizing the difference between Chapter2
and Chapter 3, and making Chapter 2's code match the tutorial text.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281945
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Sanjay Patel [Mon, 19 Sep 2016 22:07:27 +0000 (22:07 +0000)]
[x86] use getSignBit() to simplify code; NFCI
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281944
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Eric Christopher [Mon, 19 Sep 2016 21:55:04 +0000 (21:55 +0000)]
Move the armv8.1-a ras test to a negative with noras test as ras is
included in armv8.1-a by default and so we weren't testing anything.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281941
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Mehdi Amini [Mon, 19 Sep 2016 21:27:04 +0000 (21:27 +0000)]
BitcodeWriter: fix emission of invoke when calling a var-arg function with operand bundles
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281940
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Evgeniy Stepanov [Mon, 19 Sep 2016 21:26:05 +0000 (21:26 +0000)]
Misleading comments of SplitBlockAndInsertIfThenElse in BasicBlockUtils.h
The comments of SplitBlockAndInsertIfThenElse say the SplitBefore instruction will stay in the old block.
But according to the implementation(split the block at SplitBefore by using splitBasicBlock), the SplitBefore will be moved to the new block.
This patch fixes the comments.
Patch by Zhe Yu Wu.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281939
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Simon Pilgrim [Mon, 19 Sep 2016 20:50:35 +0000 (20:50 +0000)]
[X86][SSE] Updated vector abs tests
Renamed and added v2i64 / v4i64 tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281937
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Kostya Serebryany [Mon, 19 Sep 2016 20:32:34 +0000 (20:32 +0000)]
[libFuzzer] use sleep() instead of std::this_thread::sleep_for to avoid coverage from instrumented libc++
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281933
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Dehao Chen [Mon, 19 Sep 2016 18:38:14 +0000 (18:38 +0000)]
Handle early inline for hot callsites that reside in the same basic block.
Summary: Callsites in the same basic block should share the same hotness. This patch checks for the hottest callsite in the same basic block, and use the hotness for all callsites in that basic block for early inline decisions. It also fixes the test to add "-S" so theat the "CHECK-NOT" is actually checking the content.
Reviewers: dnovillo
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D24734
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281927
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Quentin Colombet [Mon, 19 Sep 2016 17:33:55 +0000 (17:33 +0000)]
[RegisterBankInfo] Avoid heap allocation in most cases.
The OperandsMapper class is used heavy in RegBankSelect and each
instantiation triggered a heap allocation for the array of operands.
Instead, use a SmallVector with a big enough size such that most of the
cases do not have to use dynamically allocated memory.
This improves the compile time of the RegBankSelect pass.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281916
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Matthias Braun [Mon, 19 Sep 2016 16:49:45 +0000 (16:49 +0000)]
LiveRangeCalc: Fix reporting of invalid vreg usage in liveness calculation
Machine programs need a definition of each vreg before reaching a use
(the definition may come from an IMPLICIT_DEF instruction). This class
of errors is not detected by the MachineVerifier because of efficiency
concerns. LiveRangeCalc used to report these problems, make it do that
again (followup to r279625).
Also use report_fatal_error() instead of llvm_unreachable() as the error
reporting is only present in asserts build anyway.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281914
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Dehao Chen [Mon, 19 Sep 2016 16:33:41 +0000 (16:33 +0000)]
Only set branch weight during sample pgo annotation when max_weight of the branch is non-zero. Otherwise use default static profile to set branch probability.
Summary: It does not make sense to set equal weights for all unkown branches as we have static branch prediction available.
Reviewers: dnovillo
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D24732
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281912
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Dehao Chen [Mon, 19 Sep 2016 16:06:37 +0000 (16:06 +0000)]
Use call target count to derive the call instruction weight
Summary: The call target count profile is directly derived from LBR branch->target data. This is more reliable than instruction frequency profiles that could be moved across basic block boundaries. This patches uses call target count profile to annotate call instructions.
Reviewers: davidxl, dnovillo
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D24410
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281911
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Etienne Bergeron [Mon, 19 Sep 2016 15:58:38 +0000 (15:58 +0000)]
[asan] Support dynamic shadow address instrumentation
Summary:
This patch is adding the support for a shadow memory with
dynamically allocated address range.
The compiler-rt needs to export a symbol containing the shadow
memory range.
This is required to support ASAN on windows 64-bits.
Reviewers: kcc, rnk, vitalybuka
Subscribers: kubabrecka, dberris, llvm-commits, chrisha
Differential Revision: https://reviews.llvm.org/D23354
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281908
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Zachary Turner [Mon, 19 Sep 2016 15:34:51 +0000 (15:34 +0000)]
[Support] Add StringRef::withNullAsEmpty()
When porting large bodies of code from using const char*
to StringRef, it is helpful to be able to treat nullptr
as an empty string, since that it is often what it is used
to indicate in C-style code.
Differential Revision: https://reviews.llvm.org/D24697
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281906
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Nico Weber [Mon, 19 Sep 2016 15:22:04 +0000 (15:22 +0000)]
Revert r281841, it does not work on Windows (PR30443).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281905
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Valery Pykhtin [Mon, 19 Sep 2016 14:39:49 +0000 (14:39 +0000)]
[AMDGPU] Refactor VOPC instruction TD definitions
Differential Revision: https://reviews.llvm.org/D24546
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281903
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Diana Picus [Mon, 19 Sep 2016 11:10:18 +0000 (11:10 +0000)]
[AArch64] Fix encoding for lsl #12 in add/sub immediates
Whenever an add/sub immediate needs a fixup, we set that immediate field to zero,
which is correct, but we also set the shift bits to zero, which is not true for
instructions that use lsl #12. This patch makes sure that if lsl #12 was used,
it will appear in the encoding of the instruction.
Differential Revision: https://reviews.llvm.org/D23930
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281898
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Sam Kolton [Mon, 19 Sep 2016 10:20:55 +0000 (10:20 +0000)]
[AMDGPU] Fix s_branch with -1 offset
Summary:
In case s_branch instruction target is itself backend should emit offset -1 but instead it emit 0.
'''
label:
s_branch label // should emit [0xff,0xff,0x82,0xbf]
'''
Tom, Matt: why are we adjusting fixup values in applyFixup() method instead of processFixup()? processFixup() is calling adjustFixupValue() but does nothing with its result.
Reviewers: vpykhtin, artem.tamazov, tstellarAMD
Subscribers: arsenm, kzhuravl, wdng, nhaehnle, yaxunl
Differential Revision: https://reviews.llvm.org/D24671
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281896
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Keith Walker [Mon, 19 Sep 2016 09:49:30 +0000 (09:49 +0000)]
Add @llvm.dbg.value entries for the phi node created by -mem2reg
When phi nodes are created in the -mem2reg phase, the @llvm.dbg.declare
entries are converted to @llvm.dbg.value entries at the place where the
store instructions existed. However no entry is created to describe
the resulting value of the phi node.
The effect of this is especially noticeable in for loops which have a
constant for the intial value; the loop control variable's location
would be described as the intial constant value in the loop body once
the -mem2reg optimization phase was run.
This change adds the creation of the @llvm.dbg.value entries to describe
variables whose location is the result of a phi node created in -mem2reg.
Also when the phi node is finally lowered to a machine instruction it
is important that the lowered "load" instruction is placed before the
associated DEBUG_VALUE entry describing the value loaded.
Differential Revision: https://reviews.llvm.org/D23715
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281895
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Oliver Stannard [Mon, 19 Sep 2016 09:21:45 +0000 (09:21 +0000)]
[Thumb] Set correct initial mapping symbol for big-endian thumb
The initial mapping symbol state is set from the triple, but we only checked
for the little-endian thumb triple, so could end up with an ARM mapping symbol
for big-endian thumb.
Differential Revision: https://reviews.llvm.org/D24553
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281894
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Tim Northover [Mon, 19 Sep 2016 09:11:09 +0000 (09:11 +0000)]
ARM: check alignment before transforming ldr -> ldm (or similar).
ldm and stm instructions always require 4-byte alignment on the pointer, but we
weren't checking this before trying to reduce code-size by replacing a
post-indexed load/store with them. Unfortunately, we were also dropping this
incormation in DAG ISel too, but that's easy enough to fix.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281893
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Elena Demikhovsky [Mon, 19 Sep 2016 08:58:43 +0000 (08:58 +0000)]
[X86 Codegen Test] Divided masked_memop into several files. NFC.
The masked_memop.ll became huge. I extracted AVX-512 specific tests into separate files.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281892
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James Molloy [Mon, 19 Sep 2016 08:23:08 +0000 (08:23 +0000)]
[SimplifyCFG] Update (AND) IR flags when CSE'ing instructions
We were updating metadata but not IR flags. Because we pick an arbitrary instruction to be the CSE candidate, it comes down to luck (50% or less chance) if this results in broken codegen or not, which is why PR30373 which is actually not the fault of the commit it was bisected down to.
Fixes PR30373.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281889
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Craig Topper [Mon, 19 Sep 2016 02:53:43 +0000 (02:53 +0000)]
[X86,AVX-512] Use INSERT_SUBREG instead of SUBREG_TO_REG when the input is not the output of an instruction.
SUBREG_TO_REG is supposed to indicate that the super register has been zeroed, but we can't prove that if we don't know where it came from.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281885
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Craig Topper [Mon, 19 Sep 2016 02:53:37 +0000 (02:53 +0000)]
[AVX-512] Add support for lowering fp_to_f16 and f16_to_fp when VLX is supported regardless of whether F16C is also supported.
Still need to add support for lowering using AVX512F when neither VLX or F16C is supported.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281884
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Vedant Kumar [Mon, 19 Sep 2016 02:15:59 +0000 (02:15 +0000)]
[llvm-cov] Emit a link to some documentation
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281883
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Vedant Kumar [Mon, 19 Sep 2016 01:46:01 +0000 (01:46 +0000)]
[llvm-cov] Delete the NonCodeLines field, it was always dead
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281882
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Dean Michael Berris [Mon, 19 Sep 2016 00:54:35 +0000 (00:54 +0000)]
[XRay] ARM 32-bit no-Thumb support in LLVM
This is a port of XRay to ARM 32-bit, without Thumb support yet. The XRay instrumentation support is moving up to AsmPrinter.
This is one of 3 commits to different repositories of XRay ARM port. The other 2 are:
https://reviews.llvm.org/D23932 (Clang test)
https://reviews.llvm.org/D23933 (compiler-rt)
Differential Revision: https://reviews.llvm.org/D23931
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281878
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Vedant Kumar [Mon, 19 Sep 2016 00:38:29 +0000 (00:38 +0000)]
[llvm-cov] Teach the coverage exporter about instantiation coverage
While we're at it, re-use the logic from CoverageReport to compute
summaries.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281877
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Vedant Kumar [Mon, 19 Sep 2016 00:38:25 +0000 (00:38 +0000)]
[llvm-cov] Make a helper method static for re-use (NFC)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281876
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Vedant Kumar [Mon, 19 Sep 2016 00:38:23 +0000 (00:38 +0000)]
[llvm-cov] Track function and instantiation coverage separately
These are distinct statistics which are useful to look at separately.
Example: say you have a template function "foo" with 5 instantiations
and only 3 of them are covered. Then this contributes (1/1) to the total
function coverage and (3/5) to the total instantiation coverage. I.e,
the old "Function Coverage" column has been renamed to "Instantiation
Coverage", and the new "Function Coverage" aggregates information from
the various instantiations of a function.
One benefit of making this switch is that the Line and Region coverage
columns will start making sense. Let's continue the example and assume
that the 5 instantiations of "foo" cover {2, 4, 6, 8, 10} out of 10
lines respectively. The new line coverage for "foo" is (10/10), not
(30/50). The old scenario got confusing because we'd report that there
were more lines in a file than what was actually possible.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281875
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Vedant Kumar [Mon, 19 Sep 2016 00:38:18 +0000 (00:38 +0000)]
[llvm-cov] Don't recompute the 'Covered' field from *CoverageInfo (NFC)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281874
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Vedant Kumar [Mon, 19 Sep 2016 00:38:16 +0000 (00:38 +0000)]
[llvm-cov] Make 'adjustColumnWidths' do less work
This drops some redundant calls to get{UniqueSourceFiles,
CoveredFunctions}. We can figure out the right column widths without
re-doing this expensive work.
This isn't NFC, but I don't want to check in another binary *.covmapping
file with long filenames in it. I tested this locally on a project with
some long filenames (FileCheck).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281873
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Vedant Kumar [Mon, 19 Sep 2016 00:38:14 +0000 (00:38 +0000)]
[llvm-cov] Drop another redundant 'No.' suffix
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281872
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Vedant Kumar [Mon, 19 Sep 2016 00:38:11 +0000 (00:38 +0000)]
[utils] Delete the 'check-coverage-regressions' script
In practice, it's way too noisy.
It's also a maintenance burden, since we apparently can't add tests for
it without breaking some Windows setups (see: D22692).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281871
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Dehao Chen [Sun, 18 Sep 2016 23:11:37 +0000 (23:11 +0000)]
Handle Invoke during sample profiler annotation: make it inlinable.
Summary: Previously we reline on inst-combine to remove inlinable invoke instructions. This causes trouble because a few extra optimizations are schedule early that could introduce too much CFG change (e.g. simplifycfg removes too much control flow). This patch handles invoke instruction in-place during sample profile annotation, so that we do not rely on instcombine to remove those invoke instructions.
Reviewers: davidxl, dnovillo
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D24409
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281870
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Xinliang David Li [Sun, 18 Sep 2016 22:10:19 +0000 (22:10 +0000)]
Extend title underline
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281869
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Craig Topper [Sun, 18 Sep 2016 21:49:32 +0000 (21:49 +0000)]
[AVX-512] Don't lower CVTPD2PS intrinsics to ISD::FP_ROUND with an X86 rounding mode encoding in the second operand. This immediate should only be 0 or 1 and indicates if the truncation loses precision.
Also enhance an assert in SelectionDAG::getNode to flag this sort of problem in the future.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281868
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Craig Topper [Sun, 18 Sep 2016 21:49:28 +0000 (21:49 +0000)]
[AVX-512] Stop lowering avx512_mask_sqrt intrinsics to ISD:FSQRT with a second operand containing an X86 specific rounding mode encoding that doesn't belong.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281867
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