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Matthias Braun [Fri, 23 Sep 2016 18:28:31 +0000 (18:28 +0000)]
ScheduleDAG: Match enum names when printing sdep kinds
It is less confusing to have the same names in the debug print as the
enum members.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@282273
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Peter Collingbourne [Fri, 23 Sep 2016 18:27:42 +0000 (18:27 +0000)]
BitcodeReader: Deduplicate code. NFC.
Differential Revision: https://reviews.llvm.org/D24852
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@282272
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Quentin Colombet [Fri, 23 Sep 2016 17:50:06 +0000 (17:50 +0000)]
[RegBankSelect] Use DEBUG_TYPE instead of repeating the name of the pass
NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@282267
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Quentin Colombet [Fri, 23 Sep 2016 17:50:03 +0000 (17:50 +0000)]
[RegisterBank] Mark the dump method with LLVM_DUMP_METHOD.
NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@282266
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Jun Bum Lim [Fri, 23 Sep 2016 17:26:14 +0000 (17:26 +0000)]
Enhance calcColdCallHeuristics for InvokeInst
Summary: When identifying cold blocks, consider only the edge to the normal destination if the terminator is InvokeInst and let calcInvokeHeuristics() decide edge weights for the InvokeInst.
Reviewers: mcrosier, hfinkel, davidxl
Subscribers: mcrosier, llvm-commits
Differential Revision: https://reviews.llvm.org/D24868
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@282262
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James Molloy [Fri, 23 Sep 2016 13:35:43 +0000 (13:35 +0000)]
Revert "[ARM] Promote small global constants to constant pools"
This reverts commit r282241. It caused http://lab.llvm.org:8011/builders/clang-native-arm-lnt/builds/19882.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@282249
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Nemanja Ivanovic [Fri, 23 Sep 2016 13:25:31 +0000 (13:25 +0000)]
[Power9] Exploit move and splat instructions for build_vector improvement
This patch corresponds to review:
https://reviews.llvm.org/D21135
This patch exploits the following instructions:
mtvsrws
lxvwsx
mtvsrdd
mfvsrld
In order to improve some build_vector and extractelement patterns.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@282246
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James Molloy [Fri, 23 Sep 2016 12:15:58 +0000 (12:15 +0000)]
[ARM] Promote small global constants to constant pools
If a constant is unamed_addr and is only used within one function, we can save
on the code size and runtime cost of an indirection by changing the global's storage
to inside the constant pool. For example, instead of:
ldr r0, .CPI0
bl printf
bx lr
.CPI0: &format_string
format_string: .asciz "hello, world!\n"
We can emit:
adr r0, .CPI0
bl printf
bx lr
.CPI0: .asciz "hello, world!\n"
This can cause significant code size savings when many small strings are used in one
function (4 bytes per string).
This recommit contains fixes for a nasty bug related to fast-isel fallback - because
fast-isel doesn't know about this optimization, if it runs and emits references to
a string that we inline (because fast-isel fell back to SDAG) we will end up
with an inlined string and also an out-of-line string, and we won't emit the
out-of-line string, causing backend failures.
It also contains fixes for emitting .text relocations which made the sanitizer
bots unhappy.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@282241
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Michal Gorny [Fri, 23 Sep 2016 11:09:33 +0000 (11:09 +0000)]
cmake: Support overriding Sphinx HTML doc install directory
Provide ${PROJECT}_INSTALL_SPHINX_HTML_DIR variables (e.g.
LLVM_INSTALL_SPHINX_HTML_DIR) to override Sphinx HTML doc install
directory.
Bug: https://llvm.org/bugs/show_bug.cgi?id=23780
Differential Revision: https://reviews.llvm.org/D23757
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@282240
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George Rimar [Fri, 23 Sep 2016 11:01:53 +0000 (11:01 +0000)]
Revert r282238 "Revert r282235 "[llvm-dwarfdump] - Teach dwarfdump to dump gdb-index section.""
Build bot issues (http://lab.llvm.org:8011/builders/clang-x64-ninja-win7/builds/15856/steps/ninja%20check%201/logs/FAIL%3A%20LLVM%3A%3Adwarfdump-dump-gdbindex.test)
should be fixed in that version. Issue was that MSVS does not support "%zu". Though it works fine on MSCS 2015,
Bot looks running MSVS 2013 that does not like it. MSDN also says that "z" prefix is not supported: https://msdn.microsoft.com/en-us/library/tcxf1dw6.aspx
I had to use PRId64 instead.
Original commit message:
[llvm-dwarfdump] - Teach dwarfdump to dump gdb-index section.
gold linker's --gdb-index option currently is able to create the .gdb_index section that allows GDB to locate and read the .dwo files as it needs them,
this helps reduce the total size of the object files processed by the linker.
More info about that:
https://gcc.gnu.org/wiki/DebugFission
https://sourceware.org/gdb/onlinedocs/gdb/Index-Section-Format.html
Patch teaches dwarfdump tool to dump this section.
Differential revision: https://reviews.llvm.org/D21503
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@282239
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George Rimar [Fri, 23 Sep 2016 10:12:56 +0000 (10:12 +0000)]
Revert r282235 "[llvm-dwarfdump] - Teach dwarfdump to dump gdb-index section."
It broke BB:
http://lab.llvm.org:8011/builders/clang-x64-ninja-win7/builds/15856
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@282238
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Alexey Bataev [Fri, 23 Sep 2016 09:14:08 +0000 (09:14 +0000)]
[InstCombine] Fix for PR29124: reduce insertelements to shufflevector
If inserting more than one constant into a vector:
define <4 x float> @foo(<4 x float> %x) {
%ins1 = insertelement <4 x float> %x, float 1.0, i32 1
%ins2 = insertelement <4 x float> %ins1, float 2.0, i32 2
ret <4 x float> %ins2
}
InstCombine could reduce that to a shufflevector:
define <4 x float> @goo(<4 x float> %x) {
%shuf = shufflevector <4 x float> %x, <4 x float> <float undef, float 1.0, float 2.0, float undef>, <4 x i32><i32 0, i32 5, i32 6, i32 3>
ret <4 x float> %shuf
}
Also, InstCombine tries to convert shuffle instruction to single insertelement, if one of the vectors is a constant vector and only a single element from this constant should be used in shuffle, i.e.
shufflevector <4 x float> %v, <4 x float> <float undef, float 1.0, float
undef, float undef>, <4 x i32> <i32 0, i32 5, i32 undef, i32 undef> ->
insertelement <4 x float> %v, float 1.0, 1
Differential Revision: https://reviews.llvm.org/D24182
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@282237
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George Rimar [Fri, 23 Sep 2016 09:09:26 +0000 (09:09 +0000)]
[llvm-dwarfdump] - Teach dwarfdump to dump gdb-index section.
gold linker's --gdb-index option currently is able to create the .gdb_index section that allows GDB to locate and read the .dwo files as it needs them,
this helps reduce the total size of the object files processed by the linker.
More info about that:
https://gcc.gnu.org/wiki/DebugFission
https://sourceware.org/gdb/onlinedocs/gdb/Index-Section-Format.html
Patch teaches dwarfdump tool to dump this section.
Differential revision: https://reviews.llvm.org/D21503
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@282235
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Valery Pykhtin [Fri, 23 Sep 2016 09:08:07 +0000 (09:08 +0000)]
[AMDGPU] Refactor VOP1 and VOP2 instruction TD definitions
Differential revision: https://reviews.llvm.org/D24738
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@282234
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Craig Topper [Fri, 23 Sep 2016 06:24:43 +0000 (06:24 +0000)]
[AVX-512] Split X86ISD::VFPROUND and X86ISD::VFPEXT into separate opcodes for each type constraint.
This revealed that scalar intrinsics could create nodes with a rounding mode of FROUND_CUR_DIRECTION, but the patterns didn't check for it. It just worked because isel doesn't check operand count and we had a pattern without the rounding mode argument at all.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@282231
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Craig Topper [Fri, 23 Sep 2016 06:24:39 +0000 (06:24 +0000)]
[AVX-512] Add separate ISD opcodes for each form of CVT instructions. Don't reuse non-X86 ISD opcodes with extra X86 specific arguments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@282230
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Craig Topper [Fri, 23 Sep 2016 06:24:35 +0000 (06:24 +0000)]
[AVX-512] Use different ISD opcodes for some of the scalar intrinsic lowering. Isel is not very robust against using the same ISD opcode with different number of operands so its better to separate.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@282229
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Kostya Serebryany [Fri, 23 Sep 2016 02:18:59 +0000 (02:18 +0000)]
[libFuzzer] be more precise about what we reset in TracePC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@282225
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Kostya Serebryany [Fri, 23 Sep 2016 01:58:51 +0000 (01:58 +0000)]
[libFuzzer] fix merging with trace-pc-guard
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@282224
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Tom Stellard [Fri, 23 Sep 2016 01:33:26 +0000 (01:33 +0000)]
AMDGPU/SI: Include implicit arguments in kernarg_segment_byte_size
Reviewers: arsenm
Subscribers: arsenm, kzhuravl, wdng, nhaehnle, yaxunl, llvm-commits, tony-tye
Differential Revision: https://reviews.llvm.org/D24835
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@282223
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Kostya Serebryany [Fri, 23 Sep 2016 01:20:07 +0000 (01:20 +0000)]
[libFuzzer] simplify the TracePC logic
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@282222
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Quentin Colombet [Fri, 23 Sep 2016 00:59:12 +0000 (00:59 +0000)]
[RegisterBankInfo] Mark the dump methods with LLVM_DUMP_METHOD.
NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@282221
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Quentin Colombet [Fri, 23 Sep 2016 00:59:07 +0000 (00:59 +0000)]
[AArch64][RegisterBankInfo] Sanity check TableGen'ed like inputs.
Make sure the entries written to mimic the behavior of TableGen are
sane.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@282220
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Kostya Serebryany [Fri, 23 Sep 2016 00:46:18 +0000 (00:46 +0000)]
[libFuzzer] move value profiling logic into TracePC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@282219
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Tom Stellard [Fri, 23 Sep 2016 00:42:56 +0000 (00:42 +0000)]
Triple: Add opencl environment type
Summary:
For AMDGPU, we have been using the operating system component of the triple
for specifying the low-level runtime that is being used. The rationale for
this is that the host operating system (e.g. Linux) is irrelevant for GPU code,
since its execution enviroment will be mostly controled by the low-level runtime
being used to execute the code.
In most cases, higher level languages have their own runtime which is
implemented on top of the low-level runtime. The kernel ABIs of each
language mostly depend on the low-level runtime, but there may be some
slight differences between languages. OpenCL for example, may append
additional arguments to the kernel in order to pass values like global
offsets or buffers for printf. OpenMP, HCC, or other languages may want
to add their own values which differ from OpenCL.
The reason for adding a new opencl environment type is to make it possible for the backend
to distinguish between the ABIs of the higher-level languages and handle them correctly.
It seems cleaner to use the enviroment component for this rather than creating a new
OS type for every combination of low-level runtime / high-level language.
Reviewers: Anastasia, chandlerc
Subscribers: whchung, pekka.jaaskelainen, wdng, yaxunl, llvm-commits
Differential Revision: https://reviews.llvm.org/D24735
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@282218
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Petr Hosek [Fri, 23 Sep 2016 00:41:06 +0000 (00:41 +0000)]
[MC] Support skip and count for .incbin directive
These optional arguments are supported by GNU assembler.
Differential Revision: https://reviews.llvm.org/D24714
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@282217
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Kostya Serebryany [Fri, 23 Sep 2016 00:22:46 +0000 (00:22 +0000)]
[libFuzzer] change ValueBitMap to remember the number of bits in it
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@282216
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Quentin Colombet [Fri, 23 Sep 2016 00:14:36 +0000 (00:14 +0000)]
[AArch64][RegisterBankInfo] Switch to TableGen'ed like PartialMapping.
Statically instanciate the most common PartialMappings. This should
be closer to what the code would look like when TableGen support is
added for GlobalISel. As a side effect, this should improve compile
time.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@282215
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Quentin Colombet [Fri, 23 Sep 2016 00:14:34 +0000 (00:14 +0000)]
[RegisterBankInfo] Check that the mapping covers the interesting bits.
In the verify method of the ValueMapping class we used to check that the
mapping exactly matches the bits of the input value. This is problematic
for statically allocated mappings because we would need a different
mapping for each different size of the value that maps on one
instruction. For instance, with such scheme, we would need a different
mapping for a value of size 1, 5, 23 whereas they all end up on a 32-bit
wide instruction.
Therefore, change the verifier to check that the meaningful bits are
covered by the mapping instead of matching them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@282214
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Quentin Colombet [Fri, 23 Sep 2016 00:14:30 +0000 (00:14 +0000)]
[RegisterBankInfo] Use array instead of SmallVector for BreakDown.
This is another step toward TableGen'ed like structures. The BreakDown of
the mapping of the value will be statically computed by TableGen, thus
we only have to point to the right entry in the table instead of
dynamically allocate the mapping for each instruction.
We still support the dynamic allocation through a factory of
PartialMapping to ease the bring-up of the targets while the TableGen
backend is not available.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@282213
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Kostya Serebryany [Thu, 22 Sep 2016 23:16:36 +0000 (23:16 +0000)]
[libFuzzer] simplify the crash minimizer; split MaxLen into two: MaxInputLen and MaxMutationLen, allow MaxMutationLen to be less than MaxInputLen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@282211
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Sanjay Patel [Thu, 22 Sep 2016 22:36:26 +0000 (22:36 +0000)]
[InstCombine] fold X urem C -> X < C ? X : X - C when C is big (PR28672)
We already have the udiv variant of this transform, so I think this is ok for
InstCombine too even though there is an increase in IR instructions. As the
tests and TODO comments show, the transform can lead to follow-on combines.
This should fix: https://llvm.org/bugs/show_bug.cgi?id=28672
Differential Revision: https://reviews.llvm.org/D24527
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@282209
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Davide Italiano [Thu, 22 Sep 2016 22:02:59 +0000 (22:02 +0000)]
[AsmParser] Remove unused partial template specialization.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@282206
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Vedant Kumar [Thu, 22 Sep 2016 21:49:49 +0000 (21:49 +0000)]
[utils] Teach the code coverage prep script about --restrict
Add two options to the code coverage artifact prep script:
* --use-existing-profdata: Use an existing indexed profile instead of
merging the same profiles again.
* --restrict: Restrict the coverage reporting to the given list of
source directories.
With this in place, we can teach the coverage bot how to prepare
separate reports for each of the llvm tools.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@282204
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Vedant Kumar [Thu, 22 Sep 2016 21:49:47 +0000 (21:49 +0000)]
[llvm-cov] Document some fields in a class (NFC)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@282203
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Vedant Kumar [Thu, 22 Sep 2016 21:49:43 +0000 (21:49 +0000)]
[llvm-cov] Add the ability to specify directories of input source files
We've supported restricting coverage reports to a set of files for a
long time. Add support for being able to restrict by entire directories.
I suppose this supersedes D20803.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@282202
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Matthias Braun [Thu, 22 Sep 2016 21:39:56 +0000 (21:39 +0000)]
MachineScheduler: Slightly simplify release node
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@282201
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Matthias Braun [Thu, 22 Sep 2016 21:39:52 +0000 (21:39 +0000)]
MachineScheduler: Remove ineffective heuristic; NFC
Currently all nodes get added to the NextSU list when they are released,
so any candidate must be in that list, making the heuristic ineffective.
Remove it for now, we can add it back later in a working fashion if
necessary.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@282200
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Hans Wennborg [Thu, 22 Sep 2016 21:20:53 +0000 (21:20 +0000)]
Revert r282168 "GVN-hoist: fix store past load dependence analysis (PR30216)"
and also the dependent r282175 "GVN-hoist: do not dereference null pointers"
It's causing compiler crashes building Harfbuzz (PR30499).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@282199
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Krzysztof Parzyszek [Thu, 22 Sep 2016 21:01:24 +0000 (21:01 +0000)]
[RDF] Add initial support for lane masks in the DFG
Use lane masks for calculating covering and aliasing of register
references.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@282194
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Krzysztof Parzyszek [Thu, 22 Sep 2016 20:59:41 +0000 (20:59 +0000)]
[Hexagon] Remove USR_OVF from CtrRegs register class
USR_OVF is a subregister of USR, which is a member of CtrRegs. Having both
a register and its proper subregister in the same register class has bad
consequences for lane mask calculation: based solely on the lane mask info,
USR_OVF would not appear to be a subregister of USR.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@282192
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Krzysztof Parzyszek [Thu, 22 Sep 2016 20:58:19 +0000 (20:58 +0000)]
[RDF] Print the function name for calls in dumps
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@282191
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Krzysztof Parzyszek [Thu, 22 Sep 2016 20:56:39 +0000 (20:56 +0000)]
[RDF] Use uint32_t for register numbers instead of unsigned
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@282190
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Arnold Schwaighofer [Thu, 22 Sep 2016 20:06:25 +0000 (20:06 +0000)]
i386 does not support optimized swifterror handling
rdar://
28432565
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@282186
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Hans Wennborg [Thu, 22 Sep 2016 19:50:05 +0000 (19:50 +0000)]
Win64: Don't emit unwind info for "leaf" functions (PR30337)
According to MSDN (see the PR), functions which don't touch any callee-saved
registers (including %rsp) don't need any unwind info.
This patch makes LLVM not emit unwind info for such functions, to save
binary size.
Differential Revision: https://reviews.llvm.org/D24748
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@282185
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Zachary Turner [Thu, 22 Sep 2016 19:21:32 +0000 (19:21 +0000)]
Fix build breakage due to typo in cast.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@282183
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Nemanja Ivanovic [Thu, 22 Sep 2016 19:06:38 +0000 (19:06 +0000)]
[PowerPC] Sign extend sub-word values for atomic comparisons
Atomic comparison instructions use the sub-word load instruction on
Power8 and up but the value is not sign extended prior to the signed word
compare instruction. This patch adds that sign extension.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@282182
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Nirav Dave [Thu, 22 Sep 2016 17:28:43 +0000 (17:28 +0000)]
[DAG] Fix incorrect alignment of ext load.
Correctly use alignment size from loaded size not output value size.
Reviewers: jyknight, tstellarAMD, arsenm
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D23356
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@282177
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Sebastian Pop [Thu, 22 Sep 2016 17:22:58 +0000 (17:22 +0000)]
GVN-hoist: do not dereference null pointers
there may be basic blocks without memory accesses, in which case the
list of accesses is a null pointer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@282175
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Krzysztof Parzyszek [Thu, 22 Sep 2016 17:22:43 +0000 (17:22 +0000)]
[PPC] Set SP after loading data from stack frame, if no red zone is present
Follow-up to r280705: Make sure that the SP is only restored after all data
is loaded from the stack frame, if there is no red zone.
This completes the fix for https://llvm.org/bugs/show_bug.cgi?id=26519.
Differential Revision: https://reviews.llvm.org/D24466
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@282174
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Zachary Turner [Thu, 22 Sep 2016 15:55:05 +0000 (15:55 +0000)]
Speculative fix for build failures due to consumeInteger.
A recent patch added support for consumeInteger() and made
getAsInteger delegate to this function. A few buildbots are
failing as a result with an assertion failure. On a hunch,
I tested what happens if I call getAsInteger() on an empty
string, and sure enough it crashes the same way that the
buildbots are crashing.
I confirmed that getAsInteger() on an empty string did not
crash before my patch, so I suspect this to be the cause.
I also added a unit test for the empty string.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@282170
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Sebastian Pop [Thu, 22 Sep 2016 15:33:51 +0000 (15:33 +0000)]
GVN-hoist: fix store past load dependence analysis (PR30216)
To hoist stores past loads, we used to search for potential
conflicting loads on the hoisting path by following a MemorySSA
def-def link from the store to be hoisted to the previous
defining memory access, and from there we followed the def-use
chains to all the uses that occur on the hoisting path. The
problem is that the def-def link may point to a store that does
not alias with the store to be hoisted, and so the loads that are
walked may not alias with the store to be hoisted, and even as in
the testcase of PR30216, the loads that may alias with the store
to be hoisted are not visited.
The current patch visits all loads on the path from the store to
be hoisted to the hoisting position and uses the alias analysis
to ask whether the store may alias the load. I was not able to
use the MemorySSA functionality to ask for whether load and
store are clobbered: I'm not sure which function to call, so I
used a call to AA->isNoAlias().
Store past store is still working as before using a MemorySSA
query: I added an extra test to pr30216.ll to make sure store
past store does not regress.
Differential Revision: https://reviews.llvm.org/D24517
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@282168
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Sebastian Pop [Thu, 22 Sep 2016 15:08:09 +0000 (15:08 +0000)]
GVN-hoist: fix typo
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@282165
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Zachary Turner [Thu, 22 Sep 2016 15:05:19 +0000 (15:05 +0000)]
[Support] Add StringRef::consumeInteger.
StringRef::getInteger() exists and treats the entire string as
an integer of the specified radix, failing if any invalid characters
are encountered or the number overflows.
Sometimes you might have something like "123456foo" and you want
to get the number 123456 and leave the string "foo" remaining.
This is similar to what would be possible by using the standard
runtime library functions strtoul et al and specifying an end
pointer.
This patch adds consumeInteger(), which does exactly that. It
consumes as much as possible until an invalid character is found,
and modifies the StringRef in place so that upon return only
the portion of the StringRef after the number remains.
Differential Revision: https://reviews.llvm.org/D24778
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@282164
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Etienne Bergeron [Thu, 22 Sep 2016 14:57:24 +0000 (14:57 +0000)]
[compiler-rt] fix typo in option description [NFC]
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@282163
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Sebastian Pop [Thu, 22 Sep 2016 14:45:46 +0000 (14:45 +0000)]
GVN-hoist: move hoist testcase to GVNHoist dir
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@282161
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Sebastian Pop [Thu, 22 Sep 2016 14:45:40 +0000 (14:45 +0000)]
GVN-hoist: only hoist relevant scalar instructions
Without this patch, GVN-hoist would think that a branch instruction is a scalar instruction
and would try to value number it. The patch filters out all such kind of irrelevant instructions.
A bit frustrating is that there is no easy way to discard all those very infrequent instructions,
a bit like isa<TerminatorInst> that stands for a large family of instructions. I'm thinking that
checking for those very infrequent other instructions would cost us more in compilation time
than just letting those instructions getting numbered, so I'm still thinking that a simpler check:
if (isa<TerminatorInst>(I))
return false;
is better than listing all the other less frequent instructions.
Differential Revision: https://reviews.llvm.org/D23929
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@282160
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Keith Walker [Thu, 22 Sep 2016 14:13:25 +0000 (14:13 +0000)]
Reapplying r281895 (and follow-up r281964) after fixing pr30468.
The additional fix is:
When adding debug information to a lowered phi node in mem2reg
check that we have a valid insertion point after the phi for adding
the debug information.
This change addresses the issue in pr30468 where a lowered phi was
added before a catchswitch and no debug information should be added
after the phi in this case.
Differential Revision: https://reviews.llvm.org/D24797
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@282155
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Tim Northover [Thu, 22 Sep 2016 13:49:25 +0000 (13:49 +0000)]
GlobalISel: handle stack-based parameters on AArch64.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@282153
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Anna Thomas [Thu, 22 Sep 2016 13:13:06 +0000 (13:13 +0000)]
[RS4GC] Remat in presence of phi and use live value
Summary:
Reviewers:
Subscribers:
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@282150
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Artem Tamazov [Thu, 22 Sep 2016 11:47:21 +0000 (11:47 +0000)]
[AMDGPU][mc] Add support for absolute expressions in DPP modifiers.
Also added range checking for DPP attributes.
Assembler tests added as well.
Differential Revision: https://reviews.llvm.org/D24755
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@282145
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Nemanja Ivanovic [Thu, 22 Sep 2016 10:32:03 +0000 (10:32 +0000)]
[PowerPC] Remove LE patterns matching generic stores/loads to VSX permuting ops
This patch corresponds to:
https://reviews.llvm.org/D21409
The LXVD2X, LXVW4X, STXVD2X and STXVW4X instructions permute the two doublewords
in the vector register when in little-endian mode. Custom code ensures that the
necessary swaps are inserted for these. This patch simply removes the possibilty
that a load/store node will match one of these instructions in the SDAG as that
would not insert the necessary swaps.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@282144
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Nemanja Ivanovic [Thu, 22 Sep 2016 09:52:19 +0000 (09:52 +0000)]
[Power9] Add exploitation of non-permuting memory ops
This patch corresponds to review:
https://reviews.llvm.org/D19825
The new lxvx/stxvx instructions do not require the swaps to line the elements
up correctly. In order to select them over the lxvd2x/lxvw4x instructions which
require swaps, the patterns for the old instruction have a predicate that
ensures they won't be selected on Power9 and newer CPUs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@282143
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Sagar Thakur [Thu, 22 Sep 2016 08:33:06 +0000 (08:33 +0000)]
[EfficiencySanitizer] Using '$' instead of '#' for struct counter name
For MIPS '#' is the start of comment line. Therefore we get assembler errors if # is used in the structure names.
Differential: D24334
Reviewed by: zhaoqin
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@282141
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Dorit Nuzman [Thu, 22 Sep 2016 07:56:23 +0000 (07:56 +0000)]
Fix revision 281960
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@282139
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Craig Topper [Thu, 22 Sep 2016 03:00:50 +0000 (03:00 +0000)]
[AVX-512] Add support for commuting VPTERNLOG instructions.
VPTERNLOG is a ternary instruction with an immediate specifying the logical operation to perform. For each bit position in the 3 source vectors the bit from each source is concatenated together and the resulting 3-bit value is used to select a bit in the immediate. This bit value is written to the result vector.
We can commute this by swapping operands and modifying the immediate. To modify the immediate we need to swap two pairs of bits. The pairs correspond to the locations in the immediate where the commuted operands bits have opposite values and the uncommuted operand has the same value. Bits 0 and 7 will never be swapped since the relevant bits from all sources are the same value.
This refactors and reuses parts of the FMA3 commuting code which is also a three operand instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@282132
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Quentin Colombet [Thu, 22 Sep 2016 02:10:37 +0000 (02:10 +0000)]
[RegisterBankInfo] Move to statically allocated RegisterBank.
This commit is basically the first step toward what will
RegisterBankInfo look when it gets TableGen'ed.
It introduces a XXXGenRegisterBankInfo.def file that is what TableGen
will issue at some point. Moreover, the RegBanks field in
RegisterBankInfo changed to reflect the static (compile time) aspect of
the information.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@282131
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Quentin Colombet [Thu, 22 Sep 2016 02:10:32 +0000 (02:10 +0000)]
[RegisterBankInfo] Take advantage of the extra argument of SmallVector::resize.
When initializing an instance of OperandsMapper, instead of using
SmallVector::resize followed by std::fill, use the function that
directly does that in SmallVector.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@282130
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Kostya Serebryany [Thu, 22 Sep 2016 01:34:58 +0000 (01:34 +0000)]
[libFuzzer] add 'features' to the corpus elements, allow mutations with Size > MaxSize, fix sha1 in corpus stats; various refactorings
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@282129
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Kostya Serebryany [Thu, 22 Sep 2016 00:57:29 +0000 (00:57 +0000)]
[libFuzzer] one more test
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@282127
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Kostya Serebryany [Wed, 21 Sep 2016 22:42:17 +0000 (22:42 +0000)]
[libFuzzer] add stats to the corpus; more refactoring
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@282121
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Zachary Turner [Wed, 21 Sep 2016 22:29:36 +0000 (22:29 +0000)]
=delete the StringRef(nullptr_t) constructor.
It's a guaranteed crash if you construct a StringRef with
nullptr, so might as well delete the constructor that allows
it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@282116
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Kostya Serebryany [Wed, 21 Sep 2016 21:41:48 +0000 (21:41 +0000)]
[libFuzzer] more refactoring; don't compute sha1sum every time we mutate a unit from the corpus, use the stored one.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@282115
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Kostya Serebryany [Wed, 21 Sep 2016 21:17:23 +0000 (21:17 +0000)]
[libFuzzer] more refactoring
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@282113
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Kevin Enderby [Wed, 21 Sep 2016 20:03:09 +0000 (20:03 +0000)]
Next set of additional error checks for invalid Mach-O files for bad LC_UUID
load commands. Added a missing check and made the check for more than
one like other other “more than one” checks. And of course added test cases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@282104
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Chad Rosier [Wed, 21 Sep 2016 19:16:47 +0000 (19:16 +0000)]
[LoopInterchange] Track all dependencies, not just anti dependencies.
Currently, we give up on loop interchange if we encounter a flow dependency
anywhere in the loop list. Worse yet, we don't even track output dependencies.
This patch updates the dependency matrix computation to track flow and output
dependencies in the same way we track anti dependencies.
This improves an internal workload by 2.2x.
Note the loop interchange pass is off by default and it can be enabled with
'-mllvm -enable-loopinterchange'
Differential Revision: https://reviews.llvm.org/D24564
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@282101
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Teresa Johnson [Wed, 21 Sep 2016 19:12:05 +0000 (19:12 +0000)]
[ThinLTO] Emit files for distributed builds for all modules
With the new LTO API in r278338, we stopped emitting the individual
index files and imports files for some modules in the distributed backend
case (thinlto-index-only plugin option).
Specifically, this is when the linker decides not to include a module in the
link, because it was in an archive library and did not have a strong
reference to it. Not creating the expected output files makes the
distributed build system implementation more difficult, in terms of
checking for the expected outputs of the thin link, and scheduling the
backend jobs. To address this, the gold-plugin will write dummy empty
.thinlto.bc and .imports files for modules not included in the link
(which LTO never sees).
Augmented a gold v1.12+ test, since that version of gold has the handling
for notifying on modules not being included in the link.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@282100
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Davide Italiano [Wed, 21 Sep 2016 18:26:08 +0000 (18:26 +0000)]
[MIRParser] Delete dead code. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@282098
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Nico Weber [Wed, 21 Sep 2016 18:25:43 +0000 (18:25 +0000)]
revert 281908 because 281909 got reverted
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@282097
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Etienne Bergeron [Wed, 21 Sep 2016 17:15:23 +0000 (17:15 +0000)]
fix typo in comment [NFC]
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@282091
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Arnold Schwaighofer [Wed, 21 Sep 2016 16:53:36 +0000 (16:53 +0000)]
Disable tail calls if there is an swifterror argument
ISel does not handle them correctly yet i.e we crash trying to emit tail call
code.
radar://
28407842
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@282088
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Matthew Simpson [Wed, 21 Sep 2016 16:50:24 +0000 (16:50 +0000)]
[LV] Don't emit unused scalars for uniform instructions
If we identify an instruction as uniform after vectorization, we know that we
should only use the value corresponding to the first vector lane of each unroll
iteration. However, when scalarizing such instructions, we still produce values
for the other vector lanes. This patch prevents us from generating the unused
scalars.
Differential Revision: https://reviews.llvm.org/D24275
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@282087
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Artem Tamazov [Wed, 21 Sep 2016 16:35:44 +0000 (16:35 +0000)]
[AMDGPU][mc] Add support for ds_add_[rtn_]f32.
Lit tests added.
Resolves https://github.com/RadeonOpenCompute/hcc/issues/122.
Differential Revision: https://reviews.llvm.org/D24765
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@282086
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Dehao Chen [Wed, 21 Sep 2016 16:26:51 +0000 (16:26 +0000)]
Change the basic block weight calculation algorithm to use max instead of voting.
Summary: Now that we have more precise debug info, we should change back to use maximum to get basic block weight.
Reviewers: dnovillo
Subscribers: andreadb, llvm-commits
Differential Revision: https://reviews.llvm.org/D24788
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@282084
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Matthew Simpson [Wed, 21 Sep 2016 16:09:23 +0000 (16:09 +0000)]
[LV] Rename "Width" to "Lane" (NFC)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@282083
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Cameron McInally [Wed, 21 Sep 2016 16:06:10 +0000 (16:06 +0000)]
[AVX512] Fix return types on int_x86_avx512_gatherXXX_di intrinsics
The return type should match the pass through vector type.
Differential Revision: https://reviews.llvm.org/D24744
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@282081
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Hans Wennborg [Wed, 21 Sep 2016 15:55:53 +0000 (15:55 +0000)]
Revert r281895 "Add @llvm.dbg.value entries for the phi node created by -mem2reg"
(And follow-up r281964.)
It caused PR30468.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@282077
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Nico Weber [Wed, 21 Sep 2016 15:33:24 +0000 (15:33 +0000)]
Revert r281715, it caused PR30475
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@282076
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Arnold Schwaighofer [Wed, 21 Sep 2016 15:29:08 +0000 (15:29 +0000)]
DeadArgElim: Don't mark swifterror arguments as unused
Replacing swifterror arguments with undef creates invalid IR.
rdar://
28300490
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@282075
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Chad Rosier [Wed, 21 Sep 2016 13:28:41 +0000 (13:28 +0000)]
[LoopInterchange] Various cleanup. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@282071
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Tim Northover [Wed, 21 Sep 2016 12:57:45 +0000 (12:57 +0000)]
GlobalISel: produce correct code for signext/zeroext ABI flags.
We still don't really have an equivalent of "AssertXExt" in DAG, so we don't
exploit the guarantees on the receiving side yet, but this should produce
conservatively correct code on iOS ABIs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@282069
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Tim Northover [Wed, 21 Sep 2016 12:57:35 +0000 (12:57 +0000)]
GlobalISel: pass Function to lowerFormalArguments directly (NFC).
The only implementation that exists immediately looks it up anyway, and the
information is needed to handle various parameter attributes (stored on the
function itself).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@282068
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Sam Kolton [Wed, 21 Sep 2016 10:33:32 +0000 (10:33 +0000)]
[AMDGPU] Assembler: remove unused AMDGPUMCObjectWriter.
Summary: It is replaced by AMDGPUELFObjectWriter
Reviewers: tstellarAMD, vpykhtin, artem.tamazov
Subscribers: arsenm, kzhuravl, wdng, nhaehnle, yaxunl
Differential Revision: https://reviews.llvm.org/D24654
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@282065
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Simon Dardis [Wed, 21 Sep 2016 09:43:40 +0000 (09:43 +0000)]
[mips] LLVM PR/30197 - Tail call incorrectly clobbers arguments for mips
The postRA scheduler performs alias analysis to determine if stores and loads
can moved past each other. When a function has more arguments than argument
registers for the calling convention used, excess arguments are spilled onto the
stack. LLVM by default assumes that argument slots are immutable, unless the
function contains a tail call. Without the knowledge of that a function contains
a tail call site, stores and loads to fixed stack slots may be re-ordered
causing the out-going arguments to clobber the incoming arguments before the
incoming arguments are supposed to be dead.
Reviewers: vkalintiris
Differential Review: https://reviews.llvm.org/D24077
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@282063
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Diana Picus [Wed, 21 Sep 2016 08:24:41 +0000 (08:24 +0000)]
Revert "AArch64: Set shift bit of TLSLE HI12 add instruction"
This reverts commit r282057 because it broke the buildbots - see e.g.
http://lab.llvm.org:8011/builders/clang-cmake-aarch64-42vma/builds/12063
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@282058
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Lei Liu [Wed, 21 Sep 2016 07:41:41 +0000 (07:41 +0000)]
AArch64: Set shift bit of TLSLE HI12 add instruction
Summary: AArch64 LLVM assembler emits add instruction without shift bit to calculate the higher 12-bit address of TLS variables in local exec model. This generates wrong code sequence to access TLS variables with thread offset larger than 0x1000.
Reviewers: t.p.northover, peter.smith, rovka
Subscribers: salim.nasser, aemerson, llvm-commits, rengolin
Differential Revision: https://reviews.llvm.org/D24702
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@282057
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Craig Topper [Wed, 21 Sep 2016 06:37:54 +0000 (06:37 +0000)]
[AVX-512] Split the 3 different usages of the X86ISD::FSETCC opcode into 3 different opcodes.
It turns out isel is really not robust against having different type profiles for the same opcode. It turns out that if you put an illegal rounding mode(i.e. not CUR_DIRECTION or NO_EXC) on a comiss intrinsic we would generate the FSETCC form with the rounding mode added, but then pattern match to an instruction with ROUND_CUR_DIRECTION.
We can probably get away with just one FSETCCM opcode that always contains the rounding mode and explicitly put ROUND_CUR_DIRECTION in the pattern, but I'll leave that for future work.
With this change the clang tests for the comiss intrinsics that used an incorrect rounding mode of 3 properly fail isel instead of silently doing the wrong thing. Those clang tests will be fixed in a follow up commit and I also plan to add rounding mode checking to clang.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@282055
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NAKAMURA Takumi [Wed, 21 Sep 2016 04:43:11 +0000 (04:43 +0000)]
llvm/test/CodeGen/NVPTX/zero-cs.ll: Relax an expression to match in -Asserts.
LLVM ERROR: Cannot select: 0x3607bf0: i32 = ExternalSymbol'__powidf2'
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@282053
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Craig Topper [Wed, 21 Sep 2016 03:58:44 +0000 (03:58 +0000)]
[AVX-512] Don't add an additional rounding mode operand to the avx512 vcvtps2ph intrinsic lowering.
There was no way to control its value so it was always FROUND_CURRENT making it unnecessary. The true rounding mode is encoded in the immediate operand of the instruction.
This also removes the pattern from the rb form of the instructions since there is no way to specify the FROUND_NO_EXC rounding mode it required.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@282052
91177308-0d34-0410-b5e6-
96231b3b80d8
Craig Topper [Wed, 21 Sep 2016 03:58:41 +0000 (03:58 +0000)]
[AVX-512] Simplify handling of INTR_TYPE_1OP_MASK_RM to remove support for the second opcode since its never used. This makes it consistent with INTR_TYPE_2OP_MASK_RM and INTR_TYPE_3OP_MASK_RM.
And even if it was used we were passing the same operands to both so it wouldn't make sense to have two opcodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@282051
91177308-0d34-0410-b5e6-
96231b3b80d8