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Dave Airlie [Thu, 30 Apr 2015 00:42:06 +0000 (10:42 +1000)]
glsl: check total count of multi-slot double vertex attribs
The spec is vague all over the place about this, but this seems
to be the intent, we can probably make this optional later if
someone makes hw that cares and writes a driver.
Basically we need to double count some of the d types but
only for totalling not for slot number assignment.
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Wed, 8 Apr 2015 04:38:19 +0000 (14:38 +1000)]
glsl: track which program inputs are doubles
instead of doing the attempts at dual slot handling here,
let the backend do it.
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Fri, 20 Feb 2015 01:38:12 +0000 (11:38 +1000)]
glsl: add ARB_vertex_attrib_64bit support. (v2)
Just more boilerplate stuff.
v2:
bad fallthrough on versioning,
this is my ugly but self contained solution (Ian)
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Fri, 20 Feb 2015 01:32:55 +0000 (11:32 +1000)]
mesa: add ARB_vertex_attrib_64bit to extensions. (v2)
Just add the boilerplate bits.
v2: add to version.c
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Fri, 20 Feb 2015 01:26:33 +0000 (11:26 +1000)]
mapi: add GL_ARB_vertex_attrib_64bit support
This just adds the glapi bits.
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Fri, 20 Feb 2015 03:58:18 +0000 (13:58 +1000)]
st/glsl_to_tgsi: fix ir_assignment hack doing bad things for doubles
This hack for fixing gl_FragDepth apparantly caused a GLSL shader
outputting a single double to try and output a dvec4, but we hadn't
assigned outputs for the secondary bit.
This avoids going into the hack code for scalar doubles.
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Topi Pohjolainen [Thu, 7 May 2015 13:07:15 +0000 (16:07 +0300)]
i965/wm/gen6: Add option for disabling statistics collection
Normally this is always needed but for internal blits and clears
we need to be able to disable it.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Topi Pohjolainen [Wed, 6 May 2015 17:31:49 +0000 (20:31 +0300)]
i965/wm/gen6: Refactor state setup
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Anuj Phogat [Wed, 6 May 2015 22:11:42 +0000 (15:11 -0700)]
i965: Remove unused variables
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Anuj Phogat [Wed, 15 Apr 2015 18:46:53 +0000 (11:46 -0700)]
i965: Change the order of conditions tested in if
Reduces the number of conditions tested in if to one in case of
non-integer formats. Makes no functional changes.
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Matt Turner [Wed, 6 May 2015 05:54:59 +0000 (22:54 -0700)]
nir: Allow feq/fne/ieq/ine to be optimized with inot.
instructions in affected programs: 380 -> 376 (-1.05%)
helped: 2
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Glenn Kennard <glenn.kennard@gmail.com>
Matt Turner [Wed, 6 May 2015 03:25:07 +0000 (20:25 -0700)]
nir: Recognize (a < c || b < c) as min(a, b) < c.
... and (a >= c) || (b >= c) as max(a, b) >= c.
Similar to commit
97e6c1b9.
total instructions in shared programs:
6182276 ->
6182180 (-0.00%)
instructions in affected programs: 6400 -> 6304 (-1.50%)
helped: 68
HURT: 4
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Glenn Kennard <glenn.kennard@gmail.com>
Matt Turner [Wed, 6 May 2015 03:20:30 +0000 (20:20 -0700)]
nir: Recognize trivial min/max.
No changes, but does prevent some regressions in the next commit.
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Glenn Kennard <glenn.kennard@gmail.com>
Matt Turner [Wed, 6 May 2015 02:56:27 +0000 (19:56 -0700)]
nir: Recognize i2b(b2i(x)) as x.
Helps the same set of programs as the previous commit.
instructions in affected programs: 4490 -> 4346 (-3.21%)
helped: 8
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Glenn Kennard <glenn.kennard@gmail.com>
Matt Turner [Wed, 6 May 2015 02:50:58 +0000 (19:50 -0700)]
nir: Recognize imul(b2i(a), b2i(b)) as a logical AND.
Four shaders in Unreal 4's Sun Temple are helped, and gain SIMD16
because we avoid an integer multiplication.
instructions in affected programs: 2353 -> 2245 (-4.59%)
helped: 4
GAINED: 4
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Glenn Kennard <glenn.kennard@gmail.com>
Chad Versace [Wed, 6 May 2015 02:05:32 +0000 (19:05 -0700)]
i965/sync: Implement DRI2_Fence extension
This enables EGL_KHR_fence_sync and EGL_KHR_wait_sync.
Below is the difference in piglit results, before and after this patch.
No regressions and several tests improve from 'skip' to 'pass'. Out of
EGL_KHR_fence_sync tests, two of the multithreaded tests skip; all other
tests pass.
cmdline: piglit run -p gbm -t sync tests/quick.py
mesa: master@
1ac7db0
piglit:
4069bec
hw: Ivybridge
| before after
------+-------------
pass | 32 46
fail | 0 0
crash | 0 0
skip | 35 21
total | 67 67
v2:
- Set fence->signalled = true in brw_fence_has_completed() too.
Reviewed-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Chad Versace [Wed, 6 May 2015 02:05:32 +0000 (19:05 -0700)]
i965/sync: Replace prefix 'intel_sync' -> 'intel_gl_sync'
I'm about to implement DRI2_Fenc in intel_syncobj.c. To prevent
madness, we need to prefix functions for GL_ARB_sync with 'gl' and
functions for DRI2_Fence with 'dri'. Otherwise, the file will become
a jumble of similiarly named functions.
For example:
old-name: intel_client_wait_sync()
new-name: intel_gl_client_wait_sync()
soon-to-come: intel_dri_client_wait_sync()
I wrote this renaming commit separately from the commit that implements
DRI2_Fence because I wanted the latter diff to be reviewable.
Reviewed-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Chad Versace [Wed, 6 May 2015 02:05:31 +0000 (19:05 -0700)]
i915/sync: Return early when calloc fails
Reviewed-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Chad Versace [Wed, 6 May 2015 02:05:30 +0000 (19:05 -0700)]
i965/sync: Return NULL when calloc fails
Reviewed-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Chad Versace [Wed, 6 May 2015 02:05:29 +0000 (19:05 -0700)]
i915/sync: Don't crash when deleting sync object
Don't pass NULL to drm_intel_bo_unreference(). It doesn't like that.
Bug found by code inspection.
Reviewed-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Chad Versace [Wed, 6 May 2015 02:05:28 +0000 (19:05 -0700)]
i965/sync: Don't crash when deleting sync object
Don't pass NULL to drm_intel_bo_unreference(). It doesn't like that.
Bug found by code inspection.
Reviewed-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Chad Versace [Thu, 7 May 2015 15:09:07 +0000 (08:09 -0700)]
egl/dri2: Fix codestyle in a comment
Pointed out by Kenneth Graunke. Trivial fix.
Martin Peres [Wed, 6 May 2015 10:31:30 +0000 (13:31 +0300)]
glx: report which DRI version is used when in verbose debug mode
This should make it more obvious in bug reports while also removing
any sort of guesswork for developers.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Martin Peres <martin.peres@linux.intel.com>
Vinson Lee [Wed, 6 May 2015 19:39:09 +0000 (12:39 -0700)]
glapi: Add positional argument specifier.
Fix build error introduced with commit
1c5a57a "glapi/es3.1: Add support
for GLES versions > 3.0" with Python < 2.7.
File "src/mapi/glapi/gen/gl_genexec.py", line 230, in <module>
printer.Print(api)
File "src/mapi/glapi/gen/gl_XML.py", line 120, in Print
self.printBody(api)
File "src/mapi/glapi/gen/gl_genexec.py", line 187, in printBody
condition_parts.append('(ctx->API == API_OPENGLES2 && ctx->Version >= {})'.format(int(f.api_map['es2'] * 10)))
ValueError: zero length field name in format
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Ilia Mirkin [Thu, 7 May 2015 00:48:40 +0000 (20:48 -0400)]
nv50/ir: add SHL to the list of U32 opcodes
Having the wrong inferred type prevents a number of optimizations,
including constant propagation (since float immediates work differently
than integer immediates).
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Ian Romanick [Tue, 21 Apr 2015 04:43:32 +0000 (13:43 +0900)]
i965: Sort extension enable lists
Sort by GEN, then sort by extension name.
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Vinson Lee [Wed, 6 May 2015 17:09:38 +0000 (10:09 -0700)]
r600g: Fix Clang return-type build error.
Fix Clang return-type error introduced with commit
96f164f6f047833091eb98a73aa80c31dc94f962 "gallium: make
pipe_context::begin_query return a boolean".
CC r600_query.lo
r600_query.c:443:3: error: non-void function 'r600_begin_query' should return a value [-Wreturn-type]
return;
^
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
Kenneth Graunke [Tue, 10 Mar 2015 11:18:06 +0000 (04:18 -0700)]
i965/fs: Allow copy propagation on ATTR file registers.
This especially helps with NIR because we currently emit MOVs at the top
of the shader to copy from various ATTR registers to a giant VGRF array
of all inputs. (This could potentially be done better, but since
there's only ever one write to each register, it should be trivial to
copy propagate away...)
With NIR - only vertex shaders:
total instructions in shared programs:
3129373 ->
2889581 (-7.66%)
instructions in affected programs:
3119717 ->
2879925 (-7.69%)
helped: 20833
Without NIR - only vertex shaders:
total instructions in shared programs:
2745901 ->
2724483 (-0.78%)
instructions in affected programs: 693426 -> 672008 (-3.09%)
helped: 3516
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Jason Ekstrand [Thu, 2 Apr 2015 01:15:42 +0000 (18:15 -0700)]
i965/fs_inst: Get rid of the effective_width field
The effective_width field was an ill-concieved hack to get around issues in
the LOAD_PAYLOAD instruction. Now that the LOAD_PAYLOAD instruction is far
more sane, this field can die.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Jason Ekstrand [Wed, 25 Mar 2015 00:00:04 +0000 (17:00 -0700)]
i965/fs: Rework the fs_visitor LOAD_PAYLOAD instruction
The newly reworked instruction is far more straightforward than the
original. Before, the LOAD_PAYLOAD instruction was lowered by a the
complicated and broken-by-design pile of heuristics to try and guess
force_writemask_all, exec_size, and a number of other factors on the
sources.
Instead, we use the header_size on the instruction to denote which sources
are "header sources". Header sources are required to be a single physical
hardware register that is copied verbatim. The registers that follow are
considered the actual payload registers and have a width that correspond's
to the LOAD_PAYLOAD's exec_size and are treated as being per-channel. This
gives us a fairly straightforward lowering:
1) All header sources are copied directly using force_writemask_all and,
since they are guaranteed to be a single register, there are no
force_sechalf issues.
2) All non-header sources are copied using the exact same force_sechalf
and force_writemask_all modifiers as the LOAD_PAYLOAD operation itself.
3) In order to accommodate older gens that need interleaved colors,
lower_load_payload detects when the destination is a COMPR4 register
and automatically interleaves the non-header sources. The
lower_load_payload pass does the right thing here regardless of whether
or not the hardware actually supports COMPR4.
This patch commit itself is made up of a bunch of smaller changes squashed
together. Individual change descriptions follow:
i965/fs: Rework fs_visitor::LOAD_PAYLOAD
We rework LOAD_PAYLOAD to verify that all of the sources that count as
headers are, indeed, exactly one register and that all of the non-header
sources match the destination width. We then take the exec_size for
LOAD_PAYLOAD directly from the destination width.
i965/fs: Make destinations of load_payload have the appropreate width
i965/fs: Rework fs_visitor::lower_load_payload
v2: Don't allow the saturate flag on LOAD_PAYLOAD instructions
i965/fs_cse: Support the new-style LOAD_PAYLOAD
i965/fs_inst::is_copy_payload: Support the new-style LOAD_PAYLOAD
i965/fs: Simplify setup_color_payload
Previously, setup_color_payload was a a big helper function that did a
lot of gen-specific special casing for setting up the color sources of
the LOAD_PAYLOAD instruction. Now that lower_load_payload is much more
sane, most of that complexity isn't needed anymore. Instead, we can do
a simple fixup pass for color clamps and then just stash sources
directly in the LOAD_PAYLOAD. We can trust lower_load_payload to do the
right thing with respect to COMPR4.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Jason Ekstrand [Tue, 24 Mar 2015 17:37:33 +0000 (10:37 -0700)]
i965/fs: Make LOAD_PAYLOAD take a header size
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Jason Ekstrand [Tue, 24 Mar 2015 20:55:10 +0000 (13:55 -0700)]
i965/fs: Make emit_single_fb_write take an explicit exec_size
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Jason Ekstrand [Wed, 1 Apr 2015 22:38:23 +0000 (15:38 -0700)]
i965/fs_inst: Add an is_copy_payload helper
This commit adds a new is_copy_payload helper to fs_inst that takes the
place of the similarly named functions in cse and register coalesce. The
two is_copy_payload functions in CSE and register coalesce were subtly
different and potentially subtly broken. The new version unifies the two
and should be more correct.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Jason Ekstrand [Tue, 24 Mar 2015 17:17:32 +0000 (10:17 -0700)]
i965: Change header_present to header_size in backend_instruction
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Jason Ekstrand [Tue, 24 Mar 2015 22:06:24 +0000 (15:06 -0700)]
i965/fs_cse: Factor out code to create copy instructions
v2: Get rid of the block parameter and make src a const reference
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Jason Ekstrand [Tue, 5 May 2015 22:57:11 +0000 (15:57 -0700)]
i965/fs: Make half(fs_reg, unsigned) handle register files more explicitly
Previously, we had a special case for uniforms and immediates and then a
bunch of asserts for various other pessimal things. This commit changes it
so that it explicitly does something on each register file. Some of them
are disallowed and others are treated properly.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Francisco Jerez [Wed, 22 Apr 2015 12:01:24 +0000 (15:01 +0300)]
i965/fs: Fix passing an immediate to half().
Immediates are generally uniform, they yield the same value to both
halves of any instruction.
Reviewed-by: Matt Turner <mattst88@gmail.com>
Jeremy Huddleston Sequoia [Fri, 2 Jan 2015 03:48:40 +0000 (19:48 -0800)]
swrast: Build fix for darwin
Fixes regression from commit
64b1dc44495890cbc2c7c5509cb830264020998c
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=90147
Signed-off-by: Jeremy Huddleston Sequoia <jeremyhu@apple.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
CC: Emil Velikov <emil.l.velikov@gmail.com>
CC: jon.turney@dronecode.org.uk
CC: ionic@macports.org
Chad Versace [Wed, 6 May 2015 02:05:20 +0000 (19:05 -0700)]
egl/dri2: Check return value of __DRI2fence::create_fence()
If it returns NULL, then return early with an error.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Roland Scheidegger [Wed, 6 May 2015 13:56:17 +0000 (15:56 +0200)]
draw: (trivial) fix out-of-bounds vector initialization
Was off-by-one. llvm says inserting an element with an index higher than the
number of elements yields undefined results. Previously such inserts were
ignored but as of llvm revision 235854 the vector gets replaced with undef,
causing failures.
This fixes piglit gl-3.2-layered-rendering-gl-layer, as mentioned in
https://llvm.org/bugs/show_bug.cgi?id=23424.
Reviewed-by: Brian Paul <brianp@vmware.com>
Cc: mesa-stable@lists.freedesktop.org
Martin Peres [Mon, 4 May 2015 13:59:54 +0000 (16:59 +0300)]
main/queryobj: add GL_QUERY_TARGET support to GetQueryObjectiv()
This was missing from my patchset to support the query-related entry
points of Direct State Access.
Reported-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Martin Peres <martin.peres@linux.intel.com>
Chia-I Wu [Wed, 6 May 2015 08:32:28 +0000 (16:32 +0800)]
ilo: silence a compiler warning
Silence
ilo_query.c:120:7: warning: 'return' with no value, in function returning non-void
since commit
96f164f6.
Tapani Pälli [Wed, 6 May 2015 06:36:15 +0000 (09:36 +0300)]
mesa: support compute stage in _mesa_program_resource_prop
Increases pass rate of ES31-CTS.*program_interface_query* tests
when run with MESA_EXTENSION_OVERRIDE='GL_ARB_compute_shader'. Many
of the negative tests that happen to use compute stage in queries
start passing.
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Martin Peres <martin.peres@linux.intel.com>
Tapani Pälli [Thu, 30 Apr 2015 06:27:00 +0000 (09:27 +0300)]
glsl: mark special built-in inputs referenced by vertex stage
Refactoring done on active attribute queries did not take in to
account special built-in inputs for the vertex stage. This commit
sets them referenced by vertex stage so that they get enumerated
properly.
Fixes Piglit test 'get-active-attrib-returns-all-inputs' failure.
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=90243
Acked-by: Jose Fonseca <jfonseca@vmware.com>
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
Reviewed-By: Martin Peres <martin.peres@linux.intel.com>
Chris Forbes [Wed, 6 May 2015 07:05:17 +0000 (19:05 +1200)]
relnotes: Note support for viewport arrays on i965/Gen6.
Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Chris Forbes [Wed, 6 May 2015 05:45:11 +0000 (17:45 +1200)]
i965/gen6: Enable ARB_viewport_array and AMD_vertex_shader_viewport_index
Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Chris Forbes [Wed, 6 May 2015 05:35:37 +0000 (17:35 +1200)]
i965/gen6: Upload all the SF viewports
Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Chris Forbes [Wed, 6 May 2015 05:34:27 +0000 (17:34 +1200)]
i965/gen6: Upload all the clip viewports
Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Chris Forbes [Wed, 6 May 2015 02:43:34 +0000 (14:43 +1200)]
i965/gen6: setup limits for ARB_viewport_array
Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Brian Paul [Tue, 5 May 2015 21:49:56 +0000 (15:49 -0600)]
st/mesa: fix pipe_query_result result initializer
Fixes MSVC build error.
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Brian Paul [Tue, 5 May 2015 21:42:34 +0000 (15:42 -0600)]
st/mesa: fix st_NewPerfMonitor() declaration
Was missing the context parameter. Fixes MSVC warning.
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Brian Paul [Tue, 5 May 2015 21:41:15 +0000 (15:41 -0600)]
glsl: add parens in shader_integer_mix() to silence compiler warning
Silences gcc warning:
builtin_functions.cpp:204:23: warning: suggest parentheses around '&&'
within '||' [-Wparentheses]
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Brian Paul [Tue, 28 Apr 2015 21:48:56 +0000 (15:48 -0600)]
st/mesa: also try PIPE_FORMAT_R10G10B10A2_UNORM for GL_RGB10
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Samuel Pitoiset [Tue, 8 Jul 2014 12:23:01 +0000 (14:23 +0200)]
nvc0: all queries use an unsigned 64-bits integer by default
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Martin Peres <martin.peres@free.fr>
Samuel Pitoiset [Sat, 5 Jul 2014 10:54:26 +0000 (12:54 +0200)]
nvc0: make begin_query return false when all MP counters are used
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Martin Peres <martin.peres@free.fr>
Samuel Pitoiset [Mon, 7 Jul 2014 22:43:59 +0000 (00:43 +0200)]
docs: mark GL_AMD_performance_monitor on nvc0 for the 10.6.0 release
Other drivers which want to enable this extension must expose groups of
GPU hardware performance counters.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Martin Peres <martin.peres@free.fr>
Samuel Pitoiset [Fri, 4 Jul 2014 09:43:53 +0000 (11:43 +0200)]
nvc0: define driver-specific query groups
This patch defines "Driver statistics" and "MP counters" groups, but
only the latter will be exposed through GL_AMD_performance_monitor.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Martin Peres <martin.peres@free.fr>
Christoph Bumiller [Fri, 4 Jul 2014 11:02:06 +0000 (13:02 +0200)]
st/mesa: implement GL_AMD_performance_monitor
This is based on the original patch of Christoph Bumiller.
v2 (Samuel Pitoiset):
- improve Gallium interface for this extension
- rewrite some parts of the original code
- fix compilation errors and piglit tests
v3:
- only enable this extension when the underlying driver expose GPU counters
- get rid of the ring buffer of queries
v4:
- add a debug message when the maximum number of counters has been
reached
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Martin Peres <martin.peres@free.fr>
Samuel Pitoiset [Sat, 5 Jul 2014 10:46:03 +0000 (12:46 +0200)]
gallium: make pipe_context::begin_query return a boolean
GL_AMD_performance_monitor must return an error when a monitoring
session cannot be started.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Martin Peres <martin.peres@free.fr>
Samuel Pitoiset [Mon, 7 Jul 2014 21:49:14 +0000 (23:49 +0200)]
gallium: replace pipe_driver_query_info::max_value by a union
This allows queries to return different numeric types.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset at gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Martin Peres <martin.peres@free.fr>
Samuel Pitoiset [Wed, 9 Jul 2014 11:00:37 +0000 (13:00 +0200)]
gallium: add new numeric types to pipe_query_result
This will be used by GL_AMD_performance_monitor.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Martin Peres <martin.peres@free.fr>
Samuel Pitoiset [Fri, 4 Jul 2014 09:41:46 +0000 (11:41 +0200)]
gallium: add new fields to pipe_driver_query_info
According to the spec of GL_AMD_performance_monitor, valid type values
returned are UNSIGNED_INT, UNSIGNED_INT64_AMD, PERCENTAGE_AMD, FLOAT.
This also introduces the new field group_id in order to categorize
queries into groups.
v2: add PIPE_DRIVER_QUERY_TYPE_BYTES
v3: fix incorrect query type for radeon and svga drivers
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Martin Peres <martin.peres@free.fr>
Samuel Pitoiset [Fri, 4 Jul 2014 09:24:02 +0000 (11:24 +0200)]
gallium: add pipe_screen::get_driver_query_group_info
Driver queries are organized as a single hierarchy where queries are
categorized into groups. Each group has a list of queries and a maximum
number of queries that can be sampled. The list of available groups can
be obtained using pipe_screen::get_driver_query_group_info.
This will be used by GL_AMD_performance monitor.
v2: add group type (CPU/GPU)
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Martin Peres <martin.peres@free.fr>
Tim Rowley [Mon, 4 May 2015 21:54:27 +0000 (16:54 -0500)]
mesa: fix shininess check for ffvertex_prog v2
Switch to using VERT_BIT_GENERIC macro, as varying_vp_inputs is a
bitmask.
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: mesa-stable@lists.freedesktop.org
Marius Predut [Thu, 23 Apr 2015 15:41:29 +0000 (18:41 +0300)]
i965/aa: fixing anti-aliasing bug for thinnest width lines - GEN7
On SNB and IVB hw, for 1 pixel line thickness or less,
the general anti-aliasing algorithm give up - garbage line is generated.
Setting a Line Width of 0.0 specifies the rasterization of
the “thinnest” (one-pixel-wide), non-antialiased lines.
Lines rendered with zero Line Width are rasterized using
Grid Intersection Quantization rules as specified
by bspec section 6.3.12.1 Zero-Width (Cosmetic) Line Rasterization.
v2: Daniel Stone: Fix = used instead of == in an if-statement.
v3: Ian Romanick: Use "._Enabled" flag insteed ".Enabled".
Add code comments. re-word wrap the commit message.
Add a complete bugzillia list.
Improve the hardcoded values to produce better results.
v4: Matt Turner: typo fixes and adjust <= 1.49 to become < 1.5
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=28832
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=9951
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=27007
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=60797
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=15006
Acked-by: Chris Forbes <chrisf@ijw.co.nz>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Marius Predut <marius.predut@intel.com>
Kenneth Graunke [Tue, 5 May 2015 18:46:56 +0000 (11:46 -0700)]
i965: Fix missing type in local variable declaration.
Trivial. Fixes the following compiler warning (from GCC 5.1.0):
brw_context.c:629:10: warning: type defaults to ‘int’ in declaration
of ‘simd_size’ [-Wimplicit-int]
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Matt Turner [Tue, 5 May 2015 18:35:51 +0000 (11:35 -0700)]
i965/vec4: Use same type for immediate, for compaction.
Marius Predut [Thu, 23 Apr 2015 15:41:14 +0000 (18:41 +0300)]
i965/aa: fixing anti-aliasing bug for thinnest width lines - GEN6
On SNB and IVB hw, for 1 pixel line thickness or less,
the general anti-aliasing algorithm give up - garbage line is generated.
Setting a Line Width of 0.0 specifies the rasterization of
the “thinnest” (one-pixel-wide), non-antialiased lines.
Lines rendered with zero Line Width are rasterized using
Grid Intersection Quantization rules as specified
by bspec section 6.3.12.1 Zero-Width (Cosmetic) Line Rasterization.
v2: Daniel Stone: Fix = used instead of == in an if-statement.
v3: Ian Romanick: Use "._Enabled" flag insteed ".Enabled".
Add code comments. re-word wrap the commit message.
Add a complete bugzillia list.
Improve the hardcoded values to produce better results.
v4: Matt Turner: typo fixes and adjust <= 1.49 to become < 1.5
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=28832
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=9951
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=27007
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=60797
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=15006
Acked-by: Chris Forbes <chrisf@ijw.co.nz>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Marius Predut <marius.predut@intel.com>
Matt Turner [Tue, 21 Apr 2015 21:45:19 +0000 (14:45 -0700)]
i965: Remove end-of-thread SEND alignment code.
This was present in Eric's initial implementation of the compaction code
for Sandybridge (commit
077d01b6). There is no documentation saying this
is necessary, and removing it causes no regressions in piglit on any
platform.
Boyan Ding [Wed, 25 Mar 2015 11:36:54 +0000 (19:36 +0800)]
i965: Add XRGB8888 format to intel_screen_make_configs
Some application, such as drm backend of weston, uses XRGB8888 config as
default. i965 doesn't provide this format, but before commit
65c8965d,
the drm platform of EGL takes ARGB8888 as XRGB8888. Now that commit
65c8965d makes EGL recognize format correctly so weston won't start
because it can't find XRGB8888. Add XRGB8888 format to i965 just as
other drivers do.
Cc: mesa-stable@lists.freedesktop.org
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89689
Signed-off-by: Boyan Ding <boyan.j.ding@gmail.com>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Emil Velikov [Tue, 5 May 2015 13:39:08 +0000 (14:39 +0100)]
nir: add nir_array.h to the sources list
Otherwise `make distcheck' will fail.
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Samuel Iglesias Gonsalvez [Mon, 9 Feb 2015 09:36:36 +0000 (10:36 +0100)]
glsl: don't lower fragdata array if the output data types don't match
Commit
7e414b58640aee6e243d337e72cea290c354f632 broke the gl_FragData array
into separate gl_FragData[i] variables, so drivers can eliminate useless
writes to gl_FragData improving their performance.
The problem occurs when GLSL IR code is linked in the following case:
* The FS output variable base data type does not match gl_FragData one (float
vector)
* The FS output variable is replaced by gl_out_FragDataX because of commit
7e414b58640aee6 with X from 0 to GL_MAX_DRAW_BUFFERS.
Then the FS output variable base data type is lost in the resulting GLSL IR,
making that the driver does a wrong assignment to gl_out_FragData components
because of unmatching data types.
This patch reverts the fragdata array lowering when the output var base data type
doesn't match gl_out_FragData, i.e., when output variable base data type is
not a float or a float vector.
This patch fixes 250 dEQP tests (tested in an Intel Haswell machine)
dEQP-GLES3.functional.fragment_out.random.* (22 failed tests)
dEQP-GLES3.functional.fragment_out.array.uint.* (120 failed tests)
dEQP-GLES3.functional.fragment_out.array.int.* (108 failed tests)
Signed-off-by: Samuel Iglesias Gonsalvez <siglesias@igalia.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Neil Roberts [Thu, 19 Feb 2015 19:33:43 +0000 (19:33 +0000)]
i965/skl: Align compressed textures to four times the block size
On Skylake it is possible to choose your own alignment values for
compressed textures but they are expressed as a multiple of the block
size. The minimum alignment value we can use is 4 so we effectively
have to align to 4 times the block size. This patch makes it initially
set mt->align_[wh] to the large alignment value and then later divides
it by the block size so that it can be uploaded as part of the surface
state.
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
Dave Airlie [Mon, 4 May 2015 23:10:34 +0000 (09:10 +1000)]
egl: image_dma_buf_export - use KHR 64-bit type
After talking to Jon Leech he suggested this should be fine.
update spec to the version in the registry.
Signed-off-by: Dave Airlie <airlied@redhat.com>
Ian Romanick [Wed, 29 Apr 2015 20:15:06 +0000 (13:15 -0700)]
glapi/es3.1: Add support for GLES versions > 3.0
Make the checks in the Python script and the generated code more generic
to support arbitrary GLES versions >= 2.0.
The updated dispatch_sanity.cpp test discovered this problem. Without
this, the next patch would erroneously enable GLES 3.1 functions in GLES
2.0 and GLES 3.0.
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Ian Romanick [Tue, 28 Apr 2015 22:12:58 +0000 (15:12 -0700)]
glsl/es3.1: Allow misc ARB_gpu_shader5 built-ins in GLSL ES 3.10
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Ian Romanick [Tue, 28 Apr 2015 22:00:22 +0000 (15:00 -0700)]
glsl/es3.1: Allow textureGather and textureGatherOffset in GLSL ES 3.10
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Ian Romanick [Tue, 28 Apr 2015 21:38:13 +0000 (14:38 -0700)]
glsl/es3.1: Allow enhnaced packing functions in GLSL ES 3.10
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Ian Romanick [Tue, 28 Apr 2015 19:50:51 +0000 (12:50 -0700)]
glsl/es3.1: Allow interger mix built-ins in GLSL ES 3.10
v2: Add missing lexer support. Noticed by Tapani.
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu> [v1]
Ian Romanick [Tue, 28 Apr 2015 19:46:46 +0000 (12:46 -0700)]
glsl/es3.1: Allow separate shader objects in GLSL ES 3.10
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Ian Romanick [Tue, 28 Apr 2015 19:38:46 +0000 (12:38 -0700)]
glsl/es3.1: Allow explicit uniform locations in GLSL ES 3.10
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Ian Romanick [Tue, 28 Apr 2015 19:13:21 +0000 (12:13 -0700)]
glsl/es3.1: Allow 3.10 ES shaders in a GLES 3.1 context
Currently no 3.10 ES features (beyond 3.00 ES) are enabled. That will
come later.
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Ian Romanick [Tue, 28 Apr 2015 18:58:56 +0000 (11:58 -0700)]
mesa/es3.1: Add _mesa_is_gles31 helper
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Ian Romanick [Wed, 29 Apr 2015 01:01:00 +0000 (18:01 -0700)]
docs/GL3: Update GLES 3.1 dependencies
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Ian Romanick [Tue, 28 Apr 2015 20:15:46 +0000 (13:15 -0700)]
glsl: Add glsl_parser_state::has_atomic_counters helper
v2: Change GL version from 400 to 420. Noticed by Tapani and Ilia.
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Ian Romanick [Tue, 28 Apr 2015 18:57:39 +0000 (11:57 -0700)]
mesa: Use bool in _mesa_is_ helpers instead of GLboolean
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Dylan Baker <baker.dylan.c@gmail.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Ian Romanick [Tue, 28 Apr 2015 18:26:33 +0000 (11:26 -0700)]
mesa: Trivial coding standards cleanups
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Dylan Baker <baker.dylan.c@gmail.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Ian Romanick [Tue, 28 Apr 2015 18:18:42 +0000 (11:18 -0700)]
mesa: Use bool instead of GLboolean
v2: Squash in whitespace fixes.
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Dylan Baker <baker.dylan.c@gmail.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Ian Romanick [Tue, 21 Apr 2015 23:58:59 +0000 (08:58 +0900)]
glsl: Silence unused parameter warnings
I opted to comment out "last_field" because it was not obvious what the
meaning of the dangling bool would be. For the other parameters, the
meaning was more intuitive without the name.
link_uniform_blocks.cpp:70:65: warning: unused parameter 'name' [-Wunused-parameter]
virtual void enter_record(const glsl_type *type, const char *name,
^
link_uniform_blocks.cpp:77:65: warning: unused parameter 'name' [-Wunused-parameter]
virtual void leave_record(const glsl_type *type, const char *name,
^
link_uniform_blocks.cpp:93:62: warning: unused parameter 'record_type' [-Wunused-parameter]
bool row_major, const glsl_type *record_type,
^
link_uniform_blocks.cpp:94:34: warning: unused parameter 'last_field' [-Wunused-parameter]
bool last_field)
^
link_uniforms.cpp:547:65: warning: unused parameter 'name' [-Wunused-parameter]
virtual void enter_record(const glsl_type *type, const char *name,
^
link_uniforms.cpp:556:65: warning: unused parameter 'name' [-Wunused-parameter]
virtual void leave_record(const glsl_type *type, const char *name,
^
link_uniforms.cpp:567:34: warning: unused parameter 'last_field' [-Wunused-parameter]
bool last_field)
^
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Dylan Baker <baker.dylan.c@gmail.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Ian Romanick [Wed, 29 Apr 2015 18:53:18 +0000 (11:53 -0700)]
mesa: Restore functionality to dispatch sanity test
Along with a couple secondary goals, the dispatch sanity test had two
major, primary goals.
1. Ensure that all functions part of an API version are set in the
dispatch table.
2. Ensure that functions that cannot be part of an API version are not
set in the dispatch table.
Commit
4bdbb58 removed the tests ability to fulfill either of its
primary goals by removing anything that used _mesa_generic_nop(). It
seems like the problem on Windows could have been resolved by adding the
NULL context pointer check from nop_handler to _mesa_generic_nop().
There is, however, some debugging benefit to actually getting the
(supposed) function name logged in the "unsupported function called"
message.
The preceding commit added a function, _glapi_new_nop_table, that
allocates a table of per-entry point no-op functions. Restore the
ability to actually validate the sanity of the dispatch table by using
_glapi_new_nop_table.
Previous to this commit removing a function from one of the
*_functions_possible lists would not cause the test to fail. With this
commit removing such a function will result in failure, as is expected.
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Francisco Jerez [Thu, 19 Feb 2015 12:49:10 +0000 (14:49 +0200)]
i965: Fix variable indexing of sampler arrays under non-uniform control flow.
ARB_gpu_shader5 requires sampler array indexing expressions to be
dynamically uniform, this however doesn't have any implications on the
control flow that leads to the evaluation of that expression being
uniform. Use emit_uniformize() to obtain an arbitrary live value from
the binding table index calculation instead of assuming that the first
channel is always live.
Fixes the following Piglit test cases:
arb_gpu_shader5/execution/sampler_array_indexing/fs-nonuniform-control-flow.shader_test
arb_gpu_shader5/execution/sampler_array_indexing/vs-nonuniform-control-flow.shader_test
part of the series:
http://lists.freedesktop.org/archives/piglit/2015-February/014615.html
Reviewed-by: Matt Turner <mattst88@gmail.com>
Francisco Jerez [Thu, 19 Feb 2015 12:48:29 +0000 (14:48 +0200)]
i965: Fix variable indexing of UBO arrays under non-uniform control flow.
ARB_gpu_shader5 requires UBO array indexing expressions to be
dynamically uniform, this however doesn't have any implications on the
control flow that leads to the evaluation of that expression being
uniform. Use emit_uniformize() to obtain an arbitrary live value from
the binding table index calculation instead of assuming that the first
channel is always live.
Fixes the following Piglit tests:
arb_gpu_shader5/execution/ubo_array_indexing/fs-nonuniform-control-flow.shader_test
arb_gpu_shader5/execution/ubo_array_indexing/vs-nonuniform-control-flow.shader_test
part of the series:
http://lists.freedesktop.org/archives/piglit/2015-February/014616.html
Reviewed-by: Matt Turner <mattst88@gmail.com>
Francisco Jerez [Fri, 20 Mar 2015 12:16:09 +0000 (14:16 +0200)]
i965: Define helper function to copy an arbitrary live component from some register.
Reviewed-by: Matt Turner <mattst88@gmail.com>
Francisco Jerez [Fri, 20 Feb 2015 18:25:04 +0000 (20:25 +0200)]
i965: Perform basic optimizations on the FIND_LIVE_CHANNEL opcode.
v2: Save some CPU cycles by doing 'return progress' rather than
'depth++' in the discard jump special case.
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Francisco Jerez [Thu, 23 Apr 2015 11:42:53 +0000 (14:42 +0300)]
i965: Introduce the FIND_LIVE_CHANNEL pseudo-opcode.
This instruction calculates the index of an arbitrary channel enabled
in the current execution mask. It's expected to be used as input for
the BROADCAST opcode, but it's implemented as a separate instruction
rather than being baked into BROADCAST because FIND_LIVE_CHANNEL has
no dependencies so it can always be CSE'ed with other instances of the
same instruction within a basic block.
v2: Whitespace fixes.
Reviewed-by: Matt Turner <mattst88@gmail.com>
Francisco Jerez [Thu, 19 Feb 2015 12:52:24 +0000 (14:52 +0200)]
i965: Perform basic optimizations on the BROADCAST opcode.
v2: Style fixes.
Reviewed-by: Matt Turner <mattst88@gmail.com>
Francisco Jerez [Fri, 20 Feb 2015 18:14:24 +0000 (20:14 +0200)]
i965: Introduce the BROADCAST pseudo-opcode.
The BROADCAST instruction picks the channel from its first source
given by an index passed in as second source. This will be used in
situations where all channels from the same SIMD thread have to agree
on the value of something, e.g. a surface binding table index.
This is in particular the case for UBO, sampler and image arrays,
which can be indexed dynamically with the restriction that all active
SIMD channels access the same index, provided to the shared unit as
part of a single scalar field of the message descriptor. Simply
taking the index value from the first channel as we were doing until
now is incorrect, because it might contain an uninitialized value if
the channel had previously been disabled by non-uniform control flow.
v2: Minor style fixes. Improve commit message.
Reviewed-by: Matt Turner <mattst88@gmail.com>
Francisco Jerez [Wed, 28 Jan 2015 15:42:37 +0000 (17:42 +0200)]
glsl: Keep track of the early_fragment_tests flag in gl_shader.
And rename _mesa_glsl_parse_state::early_fragment_tests to
fs_early_fragment_tests for consistency with other FS-specific flags in the
same struct.
Reviewed-by: Matt Turner <mattst88@gmail.com>
Francisco Jerez [Thu, 4 Dec 2014 08:54:13 +0000 (10:54 +0200)]
glsl: Error out on invalid uses of the early_fragment_tests layout qualifier.
Reviewed-by: Matt Turner <mattst88@gmail.com>
Francisco Jerez [Sat, 31 Jan 2015 20:07:47 +0000 (22:07 +0200)]
glsl: Forbid use of image qualifiers in declarations of type other than image.
Reviewed-by: Matt Turner <mattst88@gmail.com>