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Sanjay Patel [Mon, 12 Nov 2018 15:20:14 +0000 (15:20 +0000)]
[VectorUtils] add funnel-shifts to the list of vectorizable intrinsics
This just identifies the intrinsics as candidates for vectorization.
It does not mean we will attempt to vectorize under normal conditions
(the test file is forcing vectorization).
The cost model must be fixed to show that the transform is profitable
in general.
Allowing vectorization with these intrinsics is required to avoid
potential regressions from canonicalizing to the intrinsics from
generic IR:
https://bugs.llvm.org/show_bug.cgi?id=37417
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346661
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Sanjay Patel [Mon, 12 Nov 2018 15:10:30 +0000 (15:10 +0000)]
[VectorUtils] reorder list of vectorizable intrinsics; NFC
We need to add funnel-shifts to this list, so clean up
the random order before it gets worse.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346660
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Sanjay Patel [Mon, 12 Nov 2018 14:52:01 +0000 (14:52 +0000)]
[LoopVectorize] add tests for funnel shifts; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346658
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Simon Pilgrim [Mon, 12 Nov 2018 14:48:39 +0000 (14:48 +0000)]
Fix unused variable warning. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346657
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Simon Pilgrim [Mon, 12 Nov 2018 14:25:23 +0000 (14:25 +0000)]
[CostModel] Add more realistic SK_ExtractSubvector generic costs.
Instead of defaulting to a cost = 1, expand to element extract/insert like we do for other shuffles.
This exposes an issue in LoopVectorize which could call SK_ExtractSubvector with a scalar subvector type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346656
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Alex Bradbury [Mon, 12 Nov 2018 14:25:07 +0000 (14:25 +0000)]
[RISCV] Support .option relax and .option norelax
This extends the .option support from D45864 to enable/disable the relax
feature flag from D44886
During parsing of the relax/norelax directives, the RISCV::FeatureRelax
feature bits of the SubtargetInfo stored in the AsmParser are updated
appropriately to reflect whether relaxation is currently enabled in the
parser. When an instruction is parsed, the parser checks if relaxation is
currently enabled and if so, gets a handle to the AsmBackend and sets the
ForceRelocs flag. The AsmBackend uses a combination of the original
RISCV::FeatureRelax feature bits set by e.g -mattr=+/-relax and the
ForceRelocs flag to determine whether to emit relocations for symbol and
branch diffs. Diff relocations should therefore only not be emitted if the
relax flag was not set on the command line and no instruction was ever parsed
in a section with relaxation enabled to ensure correct diffs are emitted.
Differential Revision: https://reviews.llvm.org/D46423
Patch by Lewis Revill.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346655
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Nirav Dave [Mon, 12 Nov 2018 14:05:40 +0000 (14:05 +0000)]
[DAGCombiner] Fix load-store forwarding of indexed loads.
Summary:
Handle extra output from index loads in cases where we wish to
forward a load value directly from a preceeding store.
Fixes PR39571.
Reviewers: peter.smith, rengolin
Subscribers: javed.absar, hiraditya, arphaman, llvm-commits
Differential Revision: https://reviews.llvm.org/D54265
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346654
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Andrea Di Biagio [Mon, 12 Nov 2018 13:09:39 +0000 (13:09 +0000)]
[llvm-mca] Correctly update the resource strategy for processor resources with multiple units.
When looking at the tests committed by Roman at r346587, I noticed that numbers
reported by the resource pressure for PdAGU01 were wrong.
In particular, according to the aut-generated CHECK lines in tests
memcpy-like-test.s and store-throughput.s, resource pressure for PdAGU01
was not uniformly distributed among the two AGEN pipes.
It turns out that the reason why pressure was not correctly distributed, was
because the "resource selection strategy" object associated with PdAGU01 was not
correctly updated on the event of AGEN pipe used.
As a result, llvm-mca was not simulating a round-robin pipeline allocation for
PdAGU01. Instead, PdAGU1 was always prioritized over PdAGU0.
This patch fixes the issue; now processor resource strategy objects for
resources declaring multiple units, are correctly notified in the event of
"resource used".
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346650
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Philip Pfaffe [Mon, 12 Nov 2018 12:27:58 +0000 (12:27 +0000)]
[newpm] Fix r346645: Missing consume of the Error return by the pipeline parser
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346649
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Philip Pfaffe [Mon, 12 Nov 2018 11:17:07 +0000 (11:17 +0000)]
Add an OptimizerLast EP
Summary:
It turns out that we need an OptimizerLast PassBuilder extension point
after all. I missed the relevance of this EP the first time. By legacy PM magic,
function passes added at this EP get added to the last _Function_ PM, which is a
feature we lost when dropping this EP for the new PM.
A key difference between this and the legacy PassManager's OptimizerLast
callback is that this extension point is not triggered at O0. Extensions
to the O0 pipeline should append their passes to the end of the overall
pipeline.
Differential Revision: https://reviews.llvm.org/D54374
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346645
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Max Kazantsev [Mon, 12 Nov 2018 09:29:58 +0000 (09:29 +0000)]
[LICM] Hoist guards from non-header blocks
This patch relaxes overconservative checks on whether or not we could write
memory before we execute an instruction. This allows us to hoist guards out of
loops even if they are not in the header block.
Differential Revision: https://reviews.llvm.org/D50891
Reviewed By: fedor.sergeev
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346643
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Calixte Denizet [Mon, 12 Nov 2018 09:01:43 +0000 (09:01 +0000)]
[GCOV] Add options to filter files which must be instrumented.
Summary:
When making code coverage, a lot of files (like the ones coming from /usr/include) are removed when post-processing gcno/gcda so finally they doen't need to be instrumented nor to appear in gcno/gcda.
The goal of the patch is to be able to filter the files we want to instrument, there are several advantages to do that:
- improve speed (no overhead due to instrumentation on files we don't care)
- reduce gcno/gcda size
- it gives the possibility to easily instrument only few files (e.g. ones modified in a patch) without changing the build system
- need to accept this patch to be enabled in clang: https://reviews.llvm.org/D52034
Reviewers: marco-c, vsk
Reviewed By: marco-c
Subscribers: llvm-commits, sylvestre.ledru
Differential Revision: https://reviews.llvm.org/D52033
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346641
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Jonas Paulsson [Mon, 12 Nov 2018 08:12:20 +0000 (08:12 +0000)]
[SystemZ] Replicate the load with most uses in buildVector()
Iterate over all elements and count the number of uses among them for each
used load. Then make sure to REPLICATE the load which has the most uses in
order to minimize the number of needed element insertions.
Review: Ulrich Weigand
https://reviews.llvm.org/D54322
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346637
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Fangrui Song [Mon, 12 Nov 2018 08:10:14 +0000 (08:10 +0000)]
[llvm-objdump] add more constraints for tests
Patch by Higuoxing (Xing)
Reviewers: jhenderson
Reviewed By: jhenderson
Differential Revision: https://reviews.llvm.org/D54299
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346636
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Philip Reames [Mon, 12 Nov 2018 02:34:54 +0000 (02:34 +0000)]
[GC] Remove unused configuration variable
The custom root mechanism didn't actually do anything. ShadowStackGC, the only one which used it, just removed the gcroots before they reached the normal lowering in SelectionDAG. As a result, the state flag had no value.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346632
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Philip Reames [Mon, 12 Nov 2018 02:26:26 +0000 (02:26 +0000)]
[GC] Minor style modernization
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346631
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Fangrui Song [Sun, 11 Nov 2018 23:17:46 +0000 (23:17 +0000)]
[IPSCCP] Delete two forward declarations
Summary: Use forward declaration as the reviewer is in favor of #include and delete a redundant declaration of Function.
Reviewers: fhahn
Reviewed By: fhahn
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D54398
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346627
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Jonas Devlieghere [Sun, 11 Nov 2018 22:12:21 +0000 (22:12 +0000)]
[llvm-nm] Use WithColor for error reporting
Use helpers from Support/WithError.h to print errors.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346624
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Jonas Devlieghere [Sun, 11 Nov 2018 22:12:04 +0000 (22:12 +0000)]
[llvm-objdump] Use WithColor for error reporting
Use helpers from Support/WithError.h to print errors.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346623
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Jonas Devlieghere [Sun, 11 Nov 2018 22:11:47 +0000 (22:11 +0000)]
[llvm-undname] Use WithColor for error reporting
Use helpers from Support/WithError.h to print errors.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346622
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Philip Reames [Sun, 11 Nov 2018 21:13:09 +0000 (21:13 +0000)]
[GCRoot] Remove some unneccessary complexity
The GCStrategy provides three configuration options were are largely redundant.
1) Support for conditionally lowering gcread and gcwrite to loads and stores. This is redundant since any GC which wished to use these abstractions would lower them out of existance before the built in lowering anyways. As such, there's no need to have the lowering being conditional.
2) Conditional initialization for allocas marked via gcroot. Semantically, roots have to be initialized before first potential use. Arguably, the frontend really should have responsibility for that, but the old API allowed the frontend to ignore this detail. Only one builtin GC used the non-initializing mode. Since no one to my knowledge actually uses the ErlangGC strategy, I decide the slight pessimization was worth the simplicity. If that turns out to be problematic, we can always improve the insertion algorithm to detect more existing initializing stores.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346621
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Florian Hahn [Sun, 11 Nov 2018 20:57:04 +0000 (20:57 +0000)]
[IPSCCP] Use forward declaration.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346620
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Fangrui Song [Sun, 11 Nov 2018 20:44:13 +0000 (20:44 +0000)]
[IPSCCP,PM] Add missing #include in rL346618
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346619
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Florian Hahn [Sun, 11 Nov 2018 20:22:45 +0000 (20:22 +0000)]
[IPSCCP,PM] Preserve PDT in the new pass manager.
Reviewers: kuhar, chandlerc, NutshellySima, brzycki
Reviewed By: NutshellySima, brzycki
Differential Revision: https://reviews.llvm.org/D54317
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346618
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Fangrui Song [Sun, 11 Nov 2018 19:15:27 +0000 (19:15 +0000)]
[MC] Fix 3 objdump tests after rL346610
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346617
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Fangrui Song [Sun, 11 Nov 2018 18:57:28 +0000 (18:57 +0000)]
[DWARF] Change pubnames to use DWARFSection instead of StringRef
Summary: The debug_info_offset values in .debug_{,gnu_}pub{name,types} may be relocated. Change it to DWARFSection so that we can get relocated values.
Reviewers: ruiu, dblaikie, grimar, JDevlieghere
Reviewed By: JDevlieghere
Subscribers: aprantl, JDevlieghere, llvm-commits
Differential Revision: https://reviews.llvm.org/D54375
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346615
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Kristina Brooks [Sun, 11 Nov 2018 18:40:33 +0000 (18:40 +0000)]
[llvm][test] Update tests using objdump
Update tests using llvm-objdump since check strings don't
match anymore due to the extra `O` in place. This is a
followup for rL346610.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346611
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Kristina Brooks [Sun, 11 Nov 2018 17:47:13 +0000 (17:47 +0000)]
[llvm-objdump] Add symbol 'O' for object data
Improve compatibility with GNU objdump by showing `O` next to
global symbol names, instead of a blank space.
Patch by Higuoxing (Xing).
Reviewers: MaskRay
Differential Revision: https://reviews.llvm.org/D54380
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346610
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Sanjay Patel [Sun, 11 Nov 2018 14:57:26 +0000 (14:57 +0000)]
[x86] auto-generate complete checks; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346609
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Nico Weber [Sun, 11 Nov 2018 10:04:00 +0000 (10:04 +0000)]
Make initializeOutputStream() return false on error and true on success.
As discussed in https://reviews.llvm.org/D52104
Differential Revision: https://reviews.llvm.org/D52143
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346606
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Craig Topper [Sun, 11 Nov 2018 07:24:36 +0000 (07:24 +0000)]
[X86] Use DAG.getConstant instead of getZeroVector.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346605
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Jonas Devlieghere [Sun, 11 Nov 2018 01:46:03 +0000 (01:46 +0000)]
[Support] Make error banner optional in logAllUnhandledErrors
In a lot of places an empty string was passed as the ErrorBanner to
logAllUnhandledErrors. This patch makes that argument optional to
simplify the call sites.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346604
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Craig Topper [Sun, 11 Nov 2018 01:40:04 +0000 (01:40 +0000)]
[X86] Replace calls to getOnesVector/getZeroVector with getConstant.
getConstant will create a BUILD_VECTOR for us and use a legal type if necessary. So just create the simple node and let BUILD_VECTOR legalization do the canonicalization.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346603
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Jonas Devlieghere [Sun, 11 Nov 2018 01:24:02 +0000 (01:24 +0000)]
[llvm-cxxdump] Use error reporting helpers from support
This patch makes llvm-cxxdump use the error reporting helpers from
Support/WithColor.h
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346602
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Craig Topper [Sat, 10 Nov 2018 23:46:03 +0000 (23:46 +0000)]
[DAGCombiner] Make tryToFoldExtendOfConstant return an SDValue instead of an SDNode*. NFC
Removes the need to call getNode internally and to recreate an SDValue after the call.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346600
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Sanjay Patel [Sat, 10 Nov 2018 20:29:25 +0000 (20:29 +0000)]
[InstCombine] simplify code for merging stores; NFCI
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346596
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Sanjay Patel [Sat, 10 Nov 2018 20:05:31 +0000 (20:05 +0000)]
[x86] allow vector load narrowing with multi-use values
This is a long-awaited follow-up suggested in D33578. Since then, we've picked up even more
opportunities for vector narrowing from changes like D53784, so there are a lot of test diffs.
Apart from 2-3 strange cases, these are all wins.
I've structured this to be no-functional-change-intended for any target except for x86
because I couldn't tell if AArch64, ARM, and AMDGPU would improve or not. All of those
targets have existing regression tests (4, 4, 10 files respectively) that would be
affected. Also, Hexagon overrides the shouldReduceLoadWidth() hook, but doesn't show
any regression test diffs. The trade-off is deciding if an extra vector load is better
than a single wide load + extract_subvector.
For x86, this is almost always better (on paper at least) because we often can fold
loads into subsequent ops and not increase the official instruction count. There's also
some unknown -- but potentially large -- benefit from using narrower vector ops if wide
ops are implemented with multiple uops and/or frequency throttling is avoided.
Differential Revision: https://reviews.llvm.org/D54073
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346595
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Sanjay Patel [Sat, 10 Nov 2018 18:51:10 +0000 (18:51 +0000)]
[InstCombine] auto-generate full checks; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346594
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David Carlier [Sat, 10 Nov 2018 18:47:00 +0000 (18:47 +0000)]
Fix DragonFlyBSD linkage issue.
environ global failed on LTO linkage step.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346593
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Benjamin Kramer [Sat, 10 Nov 2018 18:11:11 +0000 (18:11 +0000)]
[X86] Remove unused variable
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346592
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Craig Topper [Sat, 10 Nov 2018 17:44:28 +0000 (17:44 +0000)]
[X86] Remove apparently unneeded code from combineVSZext.
No lit tests fail with this code removed.
This is a pre-commit for D54346.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346590
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Simon Pilgrim [Sat, 10 Nov 2018 17:37:52 +0000 (17:37 +0000)]
[CostModel][X86] SK_ExtractSubvector costs must only be tested for vector types (PR39615)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346589
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Philip Reames [Sat, 10 Nov 2018 16:08:10 +0000 (16:08 +0000)]
[GC] Rename a header for consistency
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346588
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Roman Lebedev [Sat, 10 Nov 2018 14:31:43 +0000 (14:31 +0000)]
[X86][BdVer2] Fix loads/stores throughput for Piledriver (PR39465)
There are two AGU units, and per 1cy, there can be either two loads,
or a load and a store; but not two stores, or two loads and a store.
Additionally, loads shouldn't affect the store scheduler and vice versa.
(but *should* affect the PdEX scheduler.)
Required rL346545.
Fixes https://bugs.llvm.org/show_bug.cgi?id=39465
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346587
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Roman Lebedev [Sat, 10 Nov 2018 10:56:58 +0000 (10:56 +0000)]
[NFC][MCA][BdVer2] Add bdver2 runline into register-file-statistics.s test
Missed this one by accident when adding
the initial version in rL345463 / rL345462
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346585
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Eugene Leviant [Sat, 10 Nov 2018 08:31:21 +0000 (08:31 +0000)]
[ThinLTO] Internalize readonly globals
This patch allows internalising globals if all accesses to them
(from live functions) are from non-volatile load instructions
Differential revision: https://reviews.llvm.org/D49362
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346584
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Craig Topper [Sat, 10 Nov 2018 06:04:33 +0000 (06:04 +0000)]
[X86] Use a MOVSX instruction instead of a MOVZX instruction in isel for an any_extend of the remainder from an 8-bit sdivrem.
The sdivrem will emit its own MOVSX to move %ah to the low byte of a register. By using a MOVSX for an any_extend this allows a post-isel peephole to merge them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346581
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Craig Topper [Sat, 10 Nov 2018 06:04:09 +0000 (06:04 +0000)]
[X86] Add a test case to show scalarized vector srem to demonstrate unnecessary instructions. NFC
After the division %ah is being sign extended to move it to lower byte of a register while avoiding a partial register read. We then zero extend the low byte to the full 32 bit register. But we don't use any of the zero extended bits. In the DAG the zero extend was really an any_extend so the sign extend should have been enough.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346580
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David Carlier [Sat, 10 Nov 2018 01:01:03 +0000 (01:01 +0000)]
Fix DragonFlyBSD build
Reviewers: rnk, thakis
Reviewed By: krytarowski
Differential Revision: https://reviews.llvm.org/D54363
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346577
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Matthias Braun [Sat, 10 Nov 2018 00:36:27 +0000 (00:36 +0000)]
RegAllocFast: Further cleanups; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346576
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Matthias Braun [Sat, 10 Nov 2018 00:34:09 +0000 (00:34 +0000)]
test/CodeGen/X86: Relax test case
No need to hardcode register or expecting totally unnecessary spills
from the allocator.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346575
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Craig Topper [Sat, 10 Nov 2018 00:26:42 +0000 (00:26 +0000)]
[X86] In LowerHorizontalByteSum, emit vector_shuffle nodes instead of directly using X86ISD::UNPCKL/X86ISD::UNPCKH.
This gives shuffle lowering the freedom to use zero_extend_vector_inreg for the unpckl shuffle. Shuffle combining usually makes this swap later, but not when AVX512 is enabled it seems.
While there also use DAG.getConstant to create a 0 vector instead of using the helper the forces a specific BUILD_VECTOR. I don't think that helper is usually needed. We're basically free to create a constant build_vector anytime and it will be legalized on its own.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346574
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Thomas Lively [Sat, 10 Nov 2018 00:11:14 +0000 (00:11 +0000)]
[WebAssembly] Update bleeding-edge cpu features
Reviewers: aheejin, dschuff
Subscribers: sbc100, jgravelle-google, sunfish, jfb, llvm-commits
Differential Revision: https://reviews.llvm.org/D54362
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346570
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Philip Reames [Fri, 9 Nov 2018 23:56:21 +0000 (23:56 +0000)]
[GC] Simplify linking of GC builtin GC strategies
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346569
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Eli Friedman [Fri, 9 Nov 2018 23:33:30 +0000 (23:33 +0000)]
[ARM64] [Windows] Handle funclets
This patch adds support for funclets in frame lowering and ISel
lowering. Together with D50288 and D50166, it enables C++ exception
handling.
Patch by Sanjin Sijaric, with some fixes by me.
Differential Revision: https://reviews.llvm.org/D51524
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346568
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Dylan McKay [Fri, 9 Nov 2018 23:17:59 +0000 (23:17 +0000)]
[AVR] Reorder the CHECK lines in directmem.ll to match current trunk
In r346432 ("[DAGCombine] Improve alias analysis for chain of independent stores"),
the order of ldi/sts blocks changed.
The new IR is equivalent to the old IR.
This patch updates the test to fix the test suite.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346565
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Craig Topper [Fri, 9 Nov 2018 23:11:30 +0000 (23:11 +0000)]
[SelectionDAG] Fix a -Wparentheses warning from gcc in an assert. NFC
gcc wants parentheses around the logical OR since there is a logical AND for the string.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346564
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Eli Friedman [Fri, 9 Nov 2018 23:09:17 +0000 (23:09 +0000)]
[ARM] Add MemOperand to LDRcp to enable DCE.
LDRcp should be deleted when the dest register is dead in register
coalescing. Without MemOp, dead LDRcp will cause dead constant pool
value which references to non-existing label.
Patch by Yin Ma.
Differential Revision: https://reviews.llvm.org/D54173
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346563
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Eli Friedman [Fri, 9 Nov 2018 22:35:26 +0000 (22:35 +0000)]
[JumpThreading] Fix exponential time algorithm computing known values.
ComputeValueKnownInPredecessors has a "visited" set to prevent infinite
loops, since a value can be visited more than once. However, the
implementation didn't prevent the algorithm from taking exponential
time. Instead of removing elements from the RecursionSet one at a time,
we should keep around the whole set until
ComputeValueKnownInPredecessors finishes, then discard it.
The testcase is synthetic because I was having trouble effectively
reducing the original. But it's basically the same idea.
Instead of failing, we could theoretically cache the result instead.
But I don't think it would help substantially in practice.
Differential Revision: https://reviews.llvm.org/D54239
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346562
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Thomas Lively [Fri, 9 Nov 2018 22:05:51 +0000 (22:05 +0000)]
Revert "Exclude wasm target from Windows packaging due to PR39448"
Summary:
This reverts r346122 now that the failing tests have been
disabled. Depends on D54353.
Reviewers: aheejin, dschuff
Subscribers: fedor.sergeev, sunfish, llvm-commits
Differential Revision: https://reviews.llvm.org/D54354
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346559
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Thomas Lively [Fri, 9 Nov 2018 22:04:37 +0000 (22:04 +0000)]
[WebAssembly] Disable custom NaN payload tests
Summary:
These tests fail on 32-bit builds because NaN payload bits in floating point
immediates are not necessarily preserved through compilation. This is because
the MC layer uses native doubles to store these values. The tests will be
reenabled once this problem has been fixed or deleted if we decide we don't care
about lowering payload bits.
Reviewers: aheejin, dschuff
Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits
Differential Revision: https://reviews.llvm.org/D54353
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346558
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Craig Topper [Fri, 9 Nov 2018 20:09:53 +0000 (20:09 +0000)]
[X86] Move the promotion of v16i16->v16i8 for avx512f but not avx512bw from lowering to isel. Change to use vpmovzx instead of vpmovsx.
With avx512f but not avx512bw we need to extend to v16i32 then truncate that to to v16i8. Previously we emitted both nodes during lowering, but I'm trying to switch to using target independent nodes and with that switched the extend+truncate wou
This patch changes the implementation to what will be necessary with that patch which helps minimize test diffs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346552
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James Y Knight [Fri, 9 Nov 2018 19:45:13 +0000 (19:45 +0000)]
Branch/tag all projects with a single commit in release-tagging script.
This change updates the release script to use svnmucc to create all
the branches with one commit.
This will ensure that the git tag won't bounce around if the git
migration runs in-between separate commits creating a branch.
Additionally, update the list of projects to include all of the
projects in the monorepo, plus test-suite.
Differential Revision: https://reviews.llvm.org/D53467
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346550
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Bryan Chan [Fri, 9 Nov 2018 19:32:08 +0000 (19:32 +0000)]
[AArch64] Support HiSilicon's TSV110 processor
Reviewers: t.p.northover, SjoerdMeijer, kristof.beyls
Reviewed By: kristof.beyls
Subscribers: olista01, javed.absar, kristof.beyls, kristina, llvm-commits
Differential Revision: https://reviews.llvm.org/D53908
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346546
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Andrea Di Biagio [Fri, 9 Nov 2018 19:30:20 +0000 (19:30 +0000)]
[llvm-mca] Account for buffered resources when analyzing "Super" resources.
This was noticed when working on PR3946.
By construction, a group cannot be used as a "Super" resource. That constraint
is enforced by method `SubtargetEmitter::ExpandProcResource()`.
A Super resource S can be part of a group G. However, method
`SubtargetEmitter::ExpandProcResource()` would not update the number of
consumed resource cycles in G based on S.
In practice, this is perfectly fine because the resource usage is correctly
computed for processor resource units. However, llvm-mca should still check if G
is a buffered resource.
Before this patch, llvm-mca didn't correctly check if S was part of a group that
defines a buffer. So, the instruction descriptor was not correctly set.
For now, the semantic change introduced by this patch doesn't affect any of the
upstream scheduling models. However, it will allow to make some progress on PR3946.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346545
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Nico Weber [Fri, 9 Nov 2018 19:28:50 +0000 (19:28 +0000)]
[MS demangler] Use a slightly shorter unmangling for mangled strings.
Before: const wchar_t * {L"%"}
Now: L"%"
See also PR39593.
Differential Revision: https://reviews.llvm.org/D54294
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346544
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Fangrui Song [Fri, 9 Nov 2018 19:24:48 +0000 (19:24 +0000)]
[Hexagon] Fix some -Wunused-function with LLVM_DUMP_METHOD and -Wunused-variable
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346543
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Ulrich Weigand [Fri, 9 Nov 2018 19:16:21 +0000 (19:16 +0000)]
[SystemZ] Add a couple of missing tests
A few fp128 tests were omitted from test/CodeGen/SystemZ/fp-round-01.ll
since in early days, LLVM couldn't handle implicitly generated library
calls to functions with long double arguments on SystemZ.
This deficiency was actually long since fixed, but those tests are
still missing. This patch adds the missing tests. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346541
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Paul Robinson [Fri, 9 Nov 2018 19:06:09 +0000 (19:06 +0000)]
[DWARFv5] Emit normal type units in .debug_info comdats.
Differential Revision: https://reviews.llvm.org/D54282
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346540
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Craig Topper [Fri, 9 Nov 2018 19:05:51 +0000 (19:05 +0000)]
[X86] Turn X86ISD::VSEXT into X86ISD::VZEXT if the upper bits aren't demanded.
This makes X86ISD::VSEXT more similar to ISD::SIGN_EXTEND and ISD::ZERO_EXTEND.
I'm hoping to replace X86ISD::VSEXT/VZEXT with target independent nodes. Making the target specific nodes similar to the target independent nodes helps minimize test diffs in that patch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346539
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Simon Pilgrim [Fri, 9 Nov 2018 19:04:27 +0000 (19:04 +0000)]
[CostModel][X86] SK_ExtractSubvector is free if the subvector is at the start of the source vector
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346538
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Jordan Rupprecht [Fri, 9 Nov 2018 18:54:27 +0000 (18:54 +0000)]
[Hexagon] Fix unused variable warning in release builds
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346537
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Fangrui Song [Fri, 9 Nov 2018 18:32:20 +0000 (18:32 +0000)]
[WebAssembly] Hotfix of WebAssemblyInstructionTableSize after rL346465
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346535
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Simon Pilgrim [Fri, 9 Nov 2018 18:30:59 +0000 (18:30 +0000)]
[TTI] Flip vector types in getShuffleCost SK_ExtractSubvector call
For SK_ExtractSubvector, the default 'Ty' type is the source operand type and 'SubTy' is the destination subvector type
I got this the wrong way around when I added rL346510
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346534
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Stanislav Mekhanoshin [Fri, 9 Nov 2018 18:23:39 +0000 (18:23 +0000)]
[AMDGPU] Cleanup optimize-if-exec-masking.mir test. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346533
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Brendon Cahoon [Fri, 9 Nov 2018 18:16:24 +0000 (18:16 +0000)]
[Hexagon] Implement noreturn optimization
Eliminate the stack frame in functions with the noreturn nounwind
attributes, and when the noreturn-stack-elim target feature is
enabled. This reduces the code and stack space needed for noreturn
functions.
Differential Revision: https://reviews.llvm.org/D54210
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346532
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Greg Clayton [Fri, 9 Nov 2018 18:10:02 +0000 (18:10 +0000)]
Add total function byte size and inline function byte size to "llvm-dwarfdump --statistics"
Differential Revision: https://reviews.llvm.org/D54217
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346531
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Craig Topper [Fri, 9 Nov 2018 18:04:34 +0000 (18:04 +0000)]
[DAGCombiner][X86][Mips] Enable combineShuffleOfScalars to run between vector op legalization and DAG legalization. Fix bad one use check in combineShuffleOfScalars
It's possible for vector op legalization to generate a shuffle. If that happens we should give a chance for DAG combine to combine that with a build_vector input.
I also fixed a bug in combineShuffleOfScalars that was considering the number of uses on a undef input to a shuffle. We don't care how many times undef is used.
Differential Revision: https://reviews.llvm.org/D54283
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346530
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Jordan Rupprecht [Fri, 9 Nov 2018 18:03:21 +0000 (18:03 +0000)]
[llvm-strings] Fix whitespaces to match strings output.
Summary:
The current implementation prepends a space on every line, making it difficult to compare against GNU strings.
The space appears to have come from handling --radix in rL292707. The space is for making sure there's a space between the radix and the value; however the space is still emitted even when there is no radix. This change fixes that so the space is only emitted when there is a radix.
Reviewers: jhenderson
Reviewed By: jhenderson
Subscribers: llvm-commits, compnerd
Differential Revision: https://reviews.llvm.org/D54238
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346529
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Stanislav Mekhanoshin [Fri, 9 Nov 2018 17:58:59 +0000 (17:58 +0000)]
[AMDGPU] Always pass TRI into findRegister[Use/Def]OperandIdx
This only covers AMDGPU BE, hopefully all occurrences.
Differential Revision: https://reviews.llvm.org/D54235
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346528
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Krzysztof Parzyszek [Fri, 9 Nov 2018 17:31:22 +0000 (17:31 +0000)]
[Hexagon] Place globals with explicit .sdata section in small data
Both -fPIC and -G0 disable placement of globals in small data section,
but if a global has an explicit section assigmnent placing it in small
data, it should go there anyway.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346523
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Serge Guelton [Fri, 9 Nov 2018 17:19:45 +0000 (17:19 +0000)]
Type safe version of MachinePassRegistry
Previous version used type erasure through a `void* (*)()` pointer,
which triggered gcc warning and implied a lot of reinterpret_cast.
This version should make it harder to hit ourselves in the foot.
Differential revision: https://reviews.llvm.org/D54203
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346522
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Philip Reames [Fri, 9 Nov 2018 17:09:16 +0000 (17:09 +0000)]
[docs][statepoints] Reformulate open issues list
Some have been partially resolved, so update that. And restructure to make it easie to find and search.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346518
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Fangrui Song [Fri, 9 Nov 2018 16:45:37 +0000 (16:45 +0000)]
Fix -Wsign-compare warning
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346515
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Max Moroz [Fri, 9 Nov 2018 16:44:36 +0000 (16:44 +0000)]
[llvm-cov] Remove "default:" label in the switch covering all enum values.
Summary:
Fixing the build breakage:
http://lab.llvm.org:8011/builders/lld-x86_64-darwin13/builds/27309
Reviewers: vsk, allevato, Dor1s
Reviewed By: Dor1s
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D54323
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346514
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Philip Reames [Fri, 9 Nov 2018 16:40:34 +0000 (16:40 +0000)]
[docs][statepoint] Expand a bit on problems with mixing references and raw pointers since it keeps coming up in discussions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346513
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Zaara Syeda [Fri, 9 Nov 2018 16:36:24 +0000 (16:36 +0000)]
[Power9] Allow gpr callee saved spills in prologue to vectors registers
Currently in llvm, CalleeSavedInfo can only assign a callee saved register to
stack frame index to be spilled in the prologue. We would like to enable
spilling gprs to vector registers. This patch adds the capability to spill to
other registers aside from just the stack. It also adds the changes for power9
to spill gprs to volatile vector registers when they are available.
This happens only for leaf functions when using the option
-ppc-enable-pe-vector-spills.
Differential Revision: https://reviews.llvm.org/D39386
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346512
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Simon Pilgrim [Fri, 9 Nov 2018 16:28:19 +0000 (16:28 +0000)]
[CostModel] Add SK_ExtractSubvector handling to getInstructionThroughput (PR39368)
Add ShuffleVectorInst::isExtractSubvectorMask helper to match shuffle masks.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346510
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Philip Reames [Fri, 9 Nov 2018 16:27:04 +0000 (16:27 +0000)]
[docs][statepoint] tweak a title
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346509
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Alexey Bataev [Fri, 9 Nov 2018 16:22:35 +0000 (16:22 +0000)]
Revert "[DEBUGINFO, NVPTX]DO not emit ',debug' option if no debug info or only debug directives are requested."
This reverts commit r345972. Need to update the description + possibly
to update the patch itself after discussion with Eric Christofer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346508
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Max Moroz [Fri, 9 Nov 2018 16:10:44 +0000 (16:10 +0000)]
[llvm-cov] Add lcov tracefile export format.
Summary:
lcov tracefiles are used by various coverage reporting tools and build
systems (e.g., Bazel). It is a simple text-based format to parse and
more convenient to use than the JSON export format, which needs
additional processing to map regions/segments back to line numbers.
It's a little unfortunate that "text" format is now overloaded to refer
specifically to JSON for export, but I wanted to avoid making any
breaking changes to the UI of the llvm-cov tool at this time.
Patch by Tony Allevato (@allevato).
Reviewers: Dor1s, vsk
Reviewed By: Dor1s, vsk
Subscribers: mgorny, llvm-commits
Differential Revision: https://reviews.llvm.org/D54266
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346506
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Jonas Paulsson [Fri, 9 Nov 2018 15:44:28 +0000 (15:44 +0000)]
[SystemZ] Avoid inserting same value after replication
A minor improvement of buildVector() that skips creating an
INSERT_VECTOR_ELT for a Value which has already been used for the
REPLICATE.
Review: Ulrich Weigand
https://reviews.llvm.org/D54315
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346504
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Nicolai Haehnle [Fri, 9 Nov 2018 15:13:12 +0000 (15:13 +0000)]
AMDGPU: Add testcase to demonstrate a condition with pre-existing waitcnt
Relevant for https://reviews.llvm.org/D54226.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346501
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Sam McCall [Fri, 9 Nov 2018 15:11:34 +0000 (15:11 +0000)]
Revert "[VFS] Add "expand tilde" argument to getRealPath."
This reverts commit r346453.
This is a complex change to a widely-used interface, and was not reviewed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346500
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Sam Parker [Fri, 9 Nov 2018 15:06:33 +0000 (15:06 +0000)]
[ARM] Don't promote i1 types in ARM CGP
Now that we have mixed type sizes, i1 values need to be explicitly
handled as we want to avoid promoting these values.
Differential Revision: https://reviews.llvm.org/D54308
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346499
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Sanjay Patel [Fri, 9 Nov 2018 14:54:58 +0000 (14:54 +0000)]
[x86] try to form broadcast before widening shuffle elements
I noticed that we weren't generating broadcasts as much I thought we would with
D54271, and this is part of the problem.
Widening the shuffle elements means adding bitcasts and hiding the relationship
between a splatted scalar and the vector. If we can form a broadcast, do that
before going through the rest of the shuffle lowering because broadcasts should
be cheap and can often be load-folded.
Differential Revision: https://reviews.llvm.org/D54280
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346498
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Alex Bradbury [Fri, 9 Nov 2018 14:47:36 +0000 (14:47 +0000)]
[RISCV] Avoid unnecessary XOR for seteq/setne 0
Differential Revision: https://reviews.llvm.org/D53492
Patch by James Clarke.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346497
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Alex Bradbury [Fri, 9 Nov 2018 14:35:44 +0000 (14:35 +0000)]
[RISCV] Update test/CodeGen/RISCV/calling-conv.ll after rL346432
The DAGCombiner changes led to a different schedule.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346496
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Petar Avramovic [Fri, 9 Nov 2018 14:21:16 +0000 (14:21 +0000)]
[MIPS GlobalISel] narrowScalar G_CONSTANT
Legalize s64 G_CONSTANT using narrowScalar on MIPS 32.
Differential Revision: https://reviews.llvm.org/D54255
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346495
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Krzysztof Parzyszek [Fri, 9 Nov 2018 14:17:27 +0000 (14:17 +0000)]
[Hexagon] Handle Hexagon's SHF_HEX_GPREL section flag
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346494
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