OSDN Git Service
Adam Nemet [Wed, 6 Dec 2017 16:50:50 +0000 (16:50 +0000)]
[opt-viewer] Suppress noisy Swift remarks
Most likely, this is not how we want to handle this in the long term. This
code should probably be in the Swift repo and somehow plugged into the
opt-viewer. This is still however very experimental at this point so I don't
want to over-engineer it at this point.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319902
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Krzysztof Parzyszek [Wed, 6 Dec 2017 16:40:37 +0000 (16:40 +0000)]
[Hexagon] Generate HVX code for vector construction and access
Support for:
- build vector,
- extract vector element, subvector,
- insert vector element, subvector,
- shuffle.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319901
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Simon Pilgrim [Wed, 6 Dec 2017 15:48:40 +0000 (15:48 +0000)]
[X86][AVX512] Tag BROADCAST instruction scheduler classes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319900
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Nirav Dave [Wed, 6 Dec 2017 15:30:13 +0000 (15:30 +0000)]
[ARM][AArch64][DAG] Reenable post-legalize store merge
Reenable post-legalize stores with constant merging computation and
corresponding test case.
* Properly truncate store merge constants
* Disable merging of truncated stores floating points
* Ensure merges of constant stores into a single vector are
constructed from legal elements.
Reviewers: eastig, efriedma
Reviewed By: eastig
Subscribers: spatel, rengolin, aemerson, javed.absar, kristof.beyls, hiraditya, llvm-commits
Differential Revision: https://reviews.llvm.org/D40701
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319899
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Don Hinton [Wed, 6 Dec 2017 15:25:14 +0000 (15:25 +0000)]
[cmake] Move CMAKE_(C|CXX)_COMPILER variables before CROSS_TOOLCHAIN_FLAGS so
they can be overridden when cross compiling.
Summary:
Since CROSS_TOOLCHAN_FLAGS can set CMAKE_(C|CXX)_COMPILER
variables, move the compiler variables up front so they can be
overridden.
This is a followup to https://reviews.llvm.org/D40229 committed in rL319620.
Thanks to Pavel Labath for reporting this issue.
Reviewers: labath, beanz
Subscribers: mgorny, llvm-commits
Differential Revision: https://reviews.llvm.org/D40896
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319898
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Simon Pilgrim [Wed, 6 Dec 2017 14:07:38 +0000 (14:07 +0000)]
[X86][AVX512] Regenerate vpmovm2*/vpmov*2m avx512 schedule tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319895
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Igor Laevsky [Wed, 6 Dec 2017 14:04:45 +0000 (14:04 +0000)]
[InstSimplify] Fold insertelement into undef if index is out of bounds
Differential Revision: https://reviews.llvm.org/D40650
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319894
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Jonas Paulsson [Wed, 6 Dec 2017 13:53:24 +0000 (13:53 +0000)]
[SystemZ] Bugfix in expandRxSBG()
Csmith discovered a program that caused wrong code generation with -O0:
When handling a SIGN_EXTEND in expandRxSBG(), RxSBG.BitSize may be less than
the Input width (if a truncate was previously traversed), so maskMatters()
should be called with a masked based on the width of the sign extend result
instead.
Review: Ulrich Weigand
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319892
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Benjamin Kramer [Wed, 6 Dec 2017 13:32:36 +0000 (13:32 +0000)]
[X86] Avoid unused variable warning in Release builds. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319891
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Simon Pilgrim [Wed, 6 Dec 2017 13:14:44 +0000 (13:14 +0000)]
[X86][AVX512] Drop default NoItinerary arguments that aren't needed
Requires reordering of AVX512_maskable_common arguments, but helps track what is still missing itinerary tags
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319890
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Max Kazantsev [Wed, 6 Dec 2017 12:44:56 +0000 (12:44 +0000)]
[SCEV][NFC] Check NoWrap flags before lexicographical comparison of SCEVs
Lexicographical comparison of SCEV trees is potentially expensive for big
expression trees. We can define ordering between them for AddRecs and
N-ary operations by SCEV NoWrap flags to make non-equality check
cheaper.
This change does not prevent grouping eqivalent SCEVs together and is
not supposed to have any meaningful impact on behavior of any transforms.
Reviewed By: sanjoy
Differential Revision: https://reviews.llvm.org/D40645
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319889
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Simon Dardis [Wed, 6 Dec 2017 12:42:49 +0000 (12:42 +0000)]
[mips] Fix definition of 'bc' instruction
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319888
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Simon Pilgrim [Wed, 6 Dec 2017 11:59:05 +0000 (11:59 +0000)]
[X86][AVX512] Tag Mask<->Vector instructions scheduler classes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319887
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Francis Visoiu Mistrih [Wed, 6 Dec 2017 11:57:53 +0000 (11:57 +0000)]
[CodeGen] Fix formatting error from r319885
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319886
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Francis Visoiu Mistrih [Wed, 6 Dec 2017 11:55:42 +0000 (11:55 +0000)]
[CodeGen] Better handling of detached MachineOperands
Basically use getMFIfAvailable to check if we can crawl up to the
function.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319885
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Simon Pilgrim [Wed, 6 Dec 2017 11:23:13 +0000 (11:23 +0000)]
[X86][AVX512] Cleanup scalar move scheduler classes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319884
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Mikael Holmen [Wed, 6 Dec 2017 09:27:48 +0000 (09:27 +0000)]
[[Machine]Dominators] Improved printout when verifyDomTree fails [NFC]
Include the function name in the printout.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319882
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Max Kazantsev [Wed, 6 Dec 2017 08:58:16 +0000 (08:58 +0000)]
[SCEV][NFC] Share value cache between SCEVs in GroupByComplexity
Current implementation of `compareSCEVComplexity` is being unreasonable with `SCEVUnknown`s:
every time it sees one, it creates a new value cache and tries to prove equality of two values using it.
This cache reallocates and gets lost from SCEV to SCEV.
This patch changes this behavior: now we create one cache for all values and share it between SCEVs.
Reviewed By: sanjoy
Differential Revision: https://reviews.llvm.org/D40597
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319880
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Craig Topper [Wed, 6 Dec 2017 07:37:20 +0000 (07:37 +0000)]
[X86] Split 512-bit vector extends from types other than vXi1 out of LowerZERO_EXTEND_AVX512/LowerSIGN_EXTEND_AVX512. NFCI
Most of the code in these routines is for handling extends from vXi1 types. The 512-bit handling for other extends is very much like the AVX2 code. So make the special routines just do vXi1 types and move the other 512-bit handling to the place that handles AVX2.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319878
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Hans Wennborg [Wed, 6 Dec 2017 01:47:55 +0000 (01:47 +0000)]
Revert r319482 and r319483 "[memcpyopt] Teach memcpyopt to optimize across basic blocks"
This caused PR35519.
> [memcpyopt] Teach memcpyopt to optimize across basic blocks
>
> This teaches memcpyopt to make a non-local memdep query when a local query
> indicates that the dependency is non-local. This notably allows it to
> eliminate many more llvm.memcpy calls in common Rust code, often by 20-30%.
>
> Fixes PR28958.
>
> Differential Revision: https://reviews.llvm.org/D38374
>
> [memcpyopt] Commit file missed in r319482.
>
> This change was meant to be included with r319482 but was accidentally
> omitted.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319873
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Derek Schuff [Wed, 6 Dec 2017 01:38:29 +0000 (01:38 +0000)]
[WebAssembly] Only emit stack pointer delcaration in BinFormatWasm assembly
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319870
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Vlad Tsyrklevich [Wed, 6 Dec 2017 01:16:08 +0000 (01:16 +0000)]
Revert "[DAGCombine] Move AND nodes to multiple load leaves"
This reverts commit r319773. It was causing some buildbots to hang, e.g.
http://lab.llvm.org:8011/builders/sanitizer-x86_64-linux-android/builds/5589
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319867
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Derek Schuff [Wed, 6 Dec 2017 01:02:44 +0000 (01:02 +0000)]
[WebAssembly] Fix test breakage from r319810
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319865
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Zachary Turner [Wed, 6 Dec 2017 00:58:12 +0000 (00:58 +0000)]
Regex out the local hash comparison test.
Since the local hash is a different number of bytes depending
on host architecture, we don't have a consistent value. I
will need to re-do this test for both x86 and x64. For now
it accepts any value for the local hash.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319864
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Zachary Turner [Wed, 6 Dec 2017 00:26:43 +0000 (00:26 +0000)]
Fix error in llvm-pdbutil.
A recent change made this print the wrong value, breaking some
tests. This is now fixed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319862
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Craig Topper [Wed, 6 Dec 2017 00:15:17 +0000 (00:15 +0000)]
[X86] Update to getSetCCResultType to be more robust to EVT types.
Attempt to determine what the type will be legalized to and then analyze that to see if we will be able to use a vXi1 compare.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319861
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Zachary Turner [Tue, 5 Dec 2017 23:58:18 +0000 (23:58 +0000)]
Teach llvm-pdbutil to dump types from object files.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319859
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Zachary Turner [Tue, 5 Dec 2017 23:19:33 +0000 (23:19 +0000)]
Fix -Wmissing-braces error.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319855
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Zachary Turner [Tue, 5 Dec 2017 23:08:58 +0000 (23:08 +0000)]
[CodeView] Add support for content hashing CodeView type records.
Currently nothing uses this, but this at least gets the core
algorithm in, and adds some test to demonstrate correctness.
Differential Revision: https://reviews.llvm.org/D40736
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319854
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Craig Topper [Tue, 5 Dec 2017 23:08:32 +0000 (23:08 +0000)]
[SelectionDAG] Don't promote the condition operand of VSELECT when promoting the result.
The condition operand should be promoted during operand promotion.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319853
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Craig Topper [Tue, 5 Dec 2017 23:08:30 +0000 (23:08 +0000)]
[SelectionDAG] Don't promote mask operand when widening mstore and mscatter.
If the mask needs to be promoted that should occur by the legalizer detecting the mask operand needs to be promoted not as a side effect of another action.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319852
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Craig Topper [Tue, 5 Dec 2017 23:08:28 +0000 (23:08 +0000)]
[SelectionDAG] Don't promote mask when splitting mstore.
If the mask needs to be promoted it should be handled by operand promotion after the result is legalized.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319851
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Craig Topper [Tue, 5 Dec 2017 23:08:27 +0000 (23:08 +0000)]
[SelectionDAG] Don't promote mask operands of MGATHER and MLOAD to setcc result type while widening the result. Just widen the mask.
The mask will be promoted if necessary when operands are promoted. It's possible the mask type is legal, but the setcc result type is a different. We shouldn't promote to the setcc result type unless the mask needs to be promoted.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319850
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Craig Topper [Tue, 5 Dec 2017 23:08:25 +0000 (23:08 +0000)]
[SelectionDAG] Don't call GetWidenedVector for mask operands of MLOAD/MSTORE.
GetWidenedVector does't guarantee the widened elements are zero which would break the intended behavior of the operation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319849
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Lang Hames [Tue, 5 Dec 2017 22:14:35 +0000 (22:14 +0000)]
[Orc] (Hopefully) Fix a missing typedef.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319845
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Xinliang David Li [Tue, 5 Dec 2017 21:54:01 +0000 (21:54 +0000)]
Revert r319794: [PGO] detect infinite loop and form MST properly: memory leak problem
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319841
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Shoaib Meenai [Tue, 5 Dec 2017 21:49:56 +0000 (21:49 +0000)]
[CMake] Use PRIVATE in target_link_libraries for executables
We currently use target_link_libraries without an explicit scope
specifier (INTERFACE, PRIVATE or PUBLIC) when linking executables.
Dependencies added in this way apply to both the target and its
dependencies, i.e. they become part of the executable's link interface
and are transitive.
Transitive dependencies generally don't make sense for executables,
since you wouldn't normally be linking against an executable. This also
causes issues for generating install export files when using
LLVM_DISTRIBUTION_COMPONENTS. For example, clang has a lot of LLVM
library dependencies, which are currently added as interface
dependencies. If clang is in the distribution components but the LLVM
libraries it depends on aren't (which is a perfectly legitimate use case
if the LLVM libraries are being built static and there are therefore no
run-time dependencies on them), CMake will complain about the LLVM
libraries not being in export set when attempting to generate the
install export file for clang. This is reasonable behavior on CMake's
part, and the right thing is for LLVM's build system to explicitly use
PRIVATE dependencies for executables.
Unfortunately, CMake doesn't allow you to mix and match the keyword and
non-keyword target_link_libraries signatures for a single target; i.e.,
if a single call to target_link_libraries for a particular target uses
one of the INTERFACE, PRIVATE, or PUBLIC keywords, all other calls must
also be updated to use those keywords. This means we must do this change
in a single shot. I also fully expect to have missed some instances; I
tested by enabling all the projects in the monorepo (except dragonegg),
and configuring both with and without shared libraries, on both Darwin
and Linux, but I'm planning to rely on the buildbots for other
configurations (since it should be pretty easy to fix those).
Even after this change, we still have a lot of target_link_libraries
calls that don't specify a scope keyword, mostly for shared libraries.
I'm thinking about addressing those in a follow-up, but that's a
separate change IMO.
Differential Revision: https://reviews.llvm.org/D40823
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319840
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Lang Hames [Tue, 5 Dec 2017 21:44:56 +0000 (21:44 +0000)]
[Orc] Add a SymbolStringPool data structure for efficient storage and fast
comparison of symbol names.
SymbolStringPool is a thread-safe string pool that will be used in upcoming Orc
APIs to facilitate efficient storage and fast comparison of symbol name strings.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319839
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Anna Thomas [Tue, 5 Dec 2017 21:39:37 +0000 (21:39 +0000)]
[SafepointIRVerifier] Allow deriving pointers from unrelocated base
Summary:
This patch allows to use derived pointers (GEPs/bitcasts) of unrelocated
base pointers. We care only about the uses of these derived pointers.
It is acheived by two changes:
1. When we have enough information to say if the pointer is unrelocated at some
point or not, we walk all BBs to remove from their Contributions all valid defs
of unrelocated pointers (GEP with unrelocated base or bitcast of unrelocated
pointer).
2. When it comes to verification we just ignore instructions that were removed
at stage 1.
Patch by Daniil Suchkov!
Reviewers: anna, reames, apilipenko, mkazantsev
Reviewed By: anna, mkazantsev
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D40289
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319838
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Joel Galenson [Tue, 5 Dec 2017 21:33:12 +0000 (21:33 +0000)]
[AArch64] Do not abort if overflow check does not use EQ or NE.
As suggested by Eli Friedman, instead of aborting if an overflow check
uses something other than SETEQ or SETNE, simply do not apply the
optimization.
Differential Revision: https://reviews.llvm.org/D39147
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319837
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Simon Pilgrim [Tue, 5 Dec 2017 21:05:25 +0000 (21:05 +0000)]
[X86][AVX512] Tag BLENDM instruction scheduler classes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319833
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Alina Sbirlea [Tue, 5 Dec 2017 20:51:20 +0000 (20:51 +0000)]
[ModRefInfo] Initialize ArgMask to MRI_NoModRef.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319831
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Simon Pilgrim [Tue, 5 Dec 2017 20:47:11 +0000 (20:47 +0000)]
[X86][AVX512] Tag GATHER/SCATTER instruction scheduler classes
NOTE: At the moment these use the WriteLoad/WriteStore classes, which severely underestimates the costs. This needs to be reviewed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319829
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Paul Robinson [Tue, 5 Dec 2017 20:35:00 +0000 (20:35 +0000)]
[DWARFv5] Emit v5 line table header.
Differential Revision: https://reviews.llvm.org/D40741
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319827
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Matt Arsenault [Tue, 5 Dec 2017 20:32:01 +0000 (20:32 +0000)]
AMDGPU: Fix SDWA crash on inline asm
This was only searching for explicit defs,
and asserting for any implicit or variadic
instruction defs, like inline asm.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319826
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Hans Wennborg [Tue, 5 Dec 2017 20:22:20 +0000 (20:22 +0000)]
Re-commit r319490 "XOR the frame pointer with the stack cookie when protecting the stack"
The patch originally broke Chromium (crbug.com/791714) due to its failing to
specify that the new pseudo instructions clobber EFLAGS. This commit fixes
that.
> Summary: This strengthens the guard and matches MSVC.
>
> Reviewers: hans, etienneb
>
> Subscribers: hiraditya, JDevlieghere, vlad.tsyrklevich, llvm-commits
>
> Differential Revision: https://reviews.llvm.org/D40622
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319824
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Simon Pilgrim [Tue, 5 Dec 2017 20:16:22 +0000 (20:16 +0000)]
[X86][AVX512] Tag VPSLLDQ/VPSRLDQ instruction scheduler classes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319822
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Alina Sbirlea [Tue, 5 Dec 2017 20:12:23 +0000 (20:12 +0000)]
Modify ModRefInfo values using static inline method abstractions [NFC].
Summary:
The aim is to make ModRefInfo checks and changes more intuitive
and less error prone using inline methods that abstract the bit operations.
Ideally ModRefInfo would become an enum class, but that change will require
a wider set of changes into FunctionModRefBehavior.
Reviewers: sanjoy, george.burgess.iv, dberlin, hfinkel
Subscribers: nlopes, llvm-commits
Differential Revision: https://reviews.llvm.org/D40749
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319821
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Ulrich Weigand [Tue, 5 Dec 2017 19:42:07 +0000 (19:42 +0000)]
[SystemZ] Validate shifted compare value in adjustForTestUnderMask
When folding a shift into a test-under-mask comparison, make sure that
there is no loss of precision when creating the shifted comparison
value. This usually never happens, except for certain always-true
comparisons in unoptimized code.
Fixes PR35529.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319818
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Simon Pilgrim [Tue, 5 Dec 2017 19:21:28 +0000 (19:21 +0000)]
[X86][AVX512] Tag VPTRUNC/VPMOVSX/VPMOVZX instruction scheduler classes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319815
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Dan Gohman [Tue, 5 Dec 2017 18:29:48 +0000 (18:29 +0000)]
[WebAssembly] Make stack-pointer imports mutable.
This is not currently valid by the wasm spec, however:
- It replaces doing set_global on an immutable global, which is also
not valid.
- It's expected be valid in the near future:
https://github.com/WebAssembly/threads/blob/master/proposals/threads/Globals.md
- This only occurs before linking, so a fully linked object will be
valid.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319810
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Rafael Espindola [Tue, 5 Dec 2017 18:26:23 +0000 (18:26 +0000)]
Simplify test.
It can use attrib instead of icacls.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319809
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Matt Arsenault [Tue, 5 Dec 2017 18:23:17 +0000 (18:23 +0000)]
AMDGPU: Fix infinite loop with dbg_value
Surprisingly SIOptimizeExecMaskingPreRA can infinite loop
in some case with DBG_VALUE. Most tests using dbg_value are
run at -O0, so don't run this pass. This seems to only
happen when the value argument is undef.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319808
91177308-0d34-0410-b5e6-
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Joel Galenson [Tue, 5 Dec 2017 18:14:24 +0000 (18:14 +0000)]
[CVP] Remove some {s|u}sub.with.overflow checks.
This uses ConstantRange::makeGuaranteedNoWrapRegion's newly-added handling for subtraction to allow CVP to remove some subtraction overflow checks.
Differential Revision: https://reviews.llvm.org/D40039
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319807
91177308-0d34-0410-b5e6-
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Joel Galenson [Tue, 5 Dec 2017 18:14:23 +0000 (18:14 +0000)]
[ConstantRange] Support subtraction in makeGuaranteedNoWrapRegion.
Previously ConstantRange::makeGuaranteedNoWrapRegion only handled addition. This adds support for subtraction.
Differential Revision: https://reviews.llvm.org/D40036
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319806
91177308-0d34-0410-b5e6-
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Simon Pilgrim [Tue, 5 Dec 2017 18:01:26 +0000 (18:01 +0000)]
[X86][X87] Tag FCMOV instruction scheduler classes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319804
91177308-0d34-0410-b5e6-
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Joel Galenson [Tue, 5 Dec 2017 17:59:07 +0000 (17:59 +0000)]
Test commit.
I removed a space at the end of a comment. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319803
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Craig Topper [Tue, 5 Dec 2017 17:37:19 +0000 (17:37 +0000)]
[SelectionDAG] Remove the code that handles SETCC with a scalar result type from vector widening.
There's no such thing as a setcc with vector operands and scalar result. And if we're trying to widen the result we would have to already be looking at a vector result type.
So this patch renames the VSETCC function as the SETCC function and delete the original SETCC function.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319799
91177308-0d34-0410-b5e6-
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Craig Topper [Tue, 5 Dec 2017 17:37:17 +0000 (17:37 +0000)]
[SelectionDAG] Remove unused method declaration.
The method implementation was removed in r318982.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319798
91177308-0d34-0410-b5e6-
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Dan Gohman [Tue, 5 Dec 2017 17:23:43 +0000 (17:23 +0000)]
[WebAssembly] Implement WASM_STACK_POINTER.
Use the .stack_pointer directive to implement WASM_STACK_POINTER for
specifying a global variable to be the stack pointer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319797
91177308-0d34-0410-b5e6-
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Dan Gohman [Tue, 5 Dec 2017 17:21:57 +0000 (17:21 +0000)]
[WebAssembly] Don't emit .import_global for the wasm target.
.import_global is used by the ELF-based target and not needed by the wasm
target.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319796
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Xinliang David Li [Tue, 5 Dec 2017 17:19:41 +0000 (17:19 +0000)]
[PGO] detect infinite loop and form MST properly
Differential Revision: http://reviews.llvm.org/D40702
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319794
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Rafael Espindola [Tue, 5 Dec 2017 16:40:56 +0000 (16:40 +0000)]
Delete temp file if rename fails.
Without this when lld failed to replace the output file it would leave
the temporary behind. The problem is that the existing logic is
- cancel the delete flag
- rename
We have to cancel first to avoid renaming and then crashing and
deleting the old version. What is missing then is deleting the
temporary file if the rename fails.
This can be an issue on both unix and windows, but I am not sure how
to cause the rename to fail reliably on unix. I think it can be done
on ZFS since it has an ACL system similar to what windows uses, but
adding support for checking that in llvm-lit is probably not worth it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319786
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Simon Pilgrim [Tue, 5 Dec 2017 16:17:21 +0000 (16:17 +0000)]
[X86][AVX512] Tag VNNIW instruction scheduler classes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319784
91177308-0d34-0410-b5e6-
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Alexey Bataev [Tue, 5 Dec 2017 16:15:55 +0000 (16:15 +0000)]
[InstCombine] Additional test for PR35354, NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319783
91177308-0d34-0410-b5e6-
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Simon Pilgrim [Tue, 5 Dec 2017 16:10:57 +0000 (16:10 +0000)]
[X86][AVX512] Drop some default NoItinerary arguments that aren't needed any more
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319782
91177308-0d34-0410-b5e6-
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Jina Nahias [Tue, 5 Dec 2017 15:42:56 +0000 (15:42 +0000)]
[x86][AVX512] Lowering kunpack intrinsics to LLVM IR
This patch, together with a matching clang patch (https://reviews.llvm.org/D39719), implements the lowering of X86 kunpack intrinsics to IR.
Differential Revision: https://reviews.llvm.org/D39720
Change-Id: I4088d9428478f9457f6afddc90bd3d66b3daf0a1
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319778
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Bjorn Pettersson [Tue, 5 Dec 2017 15:26:01 +0000 (15:26 +0000)]
Add REQUIRES asserts in combine_loads_from_build_pair.ll
A fixup of r319771, that was causing buildbot failures.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319775
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Sam Parker [Tue, 5 Dec 2017 15:13:47 +0000 (15:13 +0000)]
[DAGCombine] Move AND nodes to multiple load leaves
Search from AND nodes to find whether they can be propagated back to
loads, so that the AND and load can be combined into a narrow load.
We search through OR, XOR and other AND nodes and all bar one of the
leaves are required to be loads or constants. The exception node then
needs to be masked off meaning that the 'and' isn't removed, but the
loads(s) are narrowed still.
Differential Revision: https://reviews.llvm.org/D39604
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319773
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Simon Pilgrim [Tue, 5 Dec 2017 14:59:40 +0000 (14:59 +0000)]
[X86][AVX512] Tag VPMADD52/VPSADBW instruction scheduler classes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319772
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Bjorn Pettersson [Tue, 5 Dec 2017 14:50:05 +0000 (14:50 +0000)]
[DAGCombine] Handle big endian correctly in CombineConsecutiveLoads
Summary:
Found out, at code inspection, that there was a fault in
DAGCombiner::CombineConsecutiveLoads for big-endian targets.
A BUILD_PAIR is always having the least significant bits of
the composite value in element 0. So when we are doing the checks
for consecutive loads, for big endian targets, we should check
if the load to elt 1 is at the lower address and the load
to elt 0 is at the higher address.
Normally this bug only resulted in missed oppurtunities for
doing the load combine. I guess that in some rare situation it
could lead to faulty combines, but I've not seen that happen.
Note that this patch actually will trigger load combine for
some big endian regression tests.
One example is test/CodeGen/PowerPC/anon_aggr.ll where we now get
t76: i64,ch = load<LD8[FixedStack-9]
instead of
t37: i32,ch = load<LD4[FixedStack-10]>
t35: i32,ch = load<LD4[FixedStack-9]>
t41: i64 = build_pair t37, t35
before legalization. Then the legalization will split the LD8
into two loads, so the end result is the same. That should
verify that the transfomation is correct now.
Reviewers: niravd, hfinkel
Reviewed By: niravd
Subscribers: nemanjai, llvm-commits
Differential Revision: https://reviews.llvm.org/D40444
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319771
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Simon Pilgrim [Tue, 5 Dec 2017 14:34:42 +0000 (14:34 +0000)]
[X86][AVX512] Add missing scalar CMPSS/CMPSD logic scheduler classes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319770
91177308-0d34-0410-b5e6-
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Mikael Holmen [Tue, 5 Dec 2017 14:14:00 +0000 (14:14 +0000)]
Bail out of a SimplifyCFG switch table opt at undef values.
Summary:
A true or false result is expected from a comparison, but it seems the possibility of undef was overlooked, which could lead to a failed assert. This is fixed by this patch by bailing out if we encounter undef.
The bug is old and the assert has been there since the end of 2014, so it seems this is unusual enough to forego optimization.
Patch by JesperAntonsson.
Reviewers: spatel, eeckstein, hans
Reviewed By: hans
Subscribers: uabelho, llvm-commits
Differential Revision: https://reviews.llvm.org/D40639
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319768
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Simon Pilgrim [Tue, 5 Dec 2017 14:04:23 +0000 (14:04 +0000)]
[X86][AVX512] Cleanup bit logic scheduler classes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319767
91177308-0d34-0410-b5e6-
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Sam Parker [Tue, 5 Dec 2017 14:03:51 +0000 (14:03 +0000)]
[DAGCombine] isLegalNarrowLoad function (NFC)
Pull the checks upon the load out from ReduceLoadWidth into their own
function.
Differential Revision: https://reviews.llvm.org/D40833
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319766
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Simon Pilgrim [Tue, 5 Dec 2017 13:49:44 +0000 (13:49 +0000)]
[X86][AVX512] Tag scalar CVT and CMP instruction scheduler classes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319765
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Dean Michael Berris [Tue, 5 Dec 2017 12:43:12 +0000 (12:43 +0000)]
[XRay][docs] Document xray_mode and log registration API.
This marks certain flags in XRay as deprecated (in particular,
`xray_naive_log=` and `xray_fdr_log=`), and recommends the use of the
`xray_mode=` flag.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319763
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Igor Laevsky [Tue, 5 Dec 2017 12:18:15 +0000 (12:18 +0000)]
[InstCombine] Don't crash on out of bounds shifts
Differential Revision: https://reviews.llvm.org/D40649
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319761
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Simon Pilgrim [Tue, 5 Dec 2017 12:14:36 +0000 (12:14 +0000)]
[X86][AVX512] Tag VPCMP/VPCMPU instruction scheduler classes
Move hardcoded itinerary out to the instruction declarations. Not sure that IIC_SSE_ALU_F32P is the best schedule for integer comparisons, but I'm not going to change it right now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319760
91177308-0d34-0410-b5e6-
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Simon Pilgrim [Tue, 5 Dec 2017 12:02:22 +0000 (12:02 +0000)]
[X86][AVX512] Cleanup VPCMP scheduler classes
Move hardcoded itinerary out to the instruction declarations. Not sure that IIC_SSE_ALU_F32P is the best schedule for integer comparisons, but I'm not going to change it right now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319758
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Simon Pilgrim [Tue, 5 Dec 2017 11:46:57 +0000 (11:46 +0000)]
[X86][AVX512] Tag VFIXUPIMM instructions scheduler classes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319757
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Jonas Paulsson [Tue, 5 Dec 2017 11:24:39 +0000 (11:24 +0000)]
[SystemZ] set 'guessInstructionProperties = 0' and set flags as needed.
This has proven a healthy exercise, as many cases of incorrect instruction
flags were corrected in the process. As part of this, IntrWriteMem was added
to several SystemZ instrinsics.
Furthermore, a bug was exposed in TwoAddress with this change (as incorrect
hasSideEffects flags were removed and instructions could now be sunk), and
the test case for that bugfix (r319646) is included here as
test/CodeGen/SystemZ/twoaddr-sink.ll.
One temporary test regression (one extra copy) which will hopefully go away
in upcoming patches for similar cases:
test/CodeGen/SystemZ/vec-trunc-to-i1.ll
Review: Ulrich Weigand.
https://reviews.llvm.org/D40437
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319756
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Jonas Paulsson [Tue, 5 Dec 2017 10:52:24 +0000 (10:52 +0000)]
[Regalloc] Generate and store multiple regalloc hints.
MachineRegisterInfo used to allow just one regalloc hint per virtual
register. This patch extends this to a vector of regalloc hints, which is
filled in by common code with sorted copy hints. Such hints will make for
more ID copies that can be removed.
NB! This improvement is currently (and hopefully temporarily) *disabled* by
default, except for SystemZ. The only reason for this is the big impact this
has on tests, which has unfortunately proven unmanageable. It was a long
while since all the tests were updated and just waiting for review (which
didn't happen), but now targets have to enable this themselves
instead. Several targets could get a head-start by downloading the tests
updates from the Phabricator review. Thanks to those who helped, and sorry
you now have to do this step yourselves.
This should be an improvement generally for any target!
The target may still create its own hint, in which case this has highest
priority and is stored first in the vector. If it has target-type, it will
not be recomputed, as per the previous behaviour.
The temporary hook enableMultipleCopyHints() will be removed as soon as all
targets return true.
Review: Quentin Colombet, Ulrich Weigand.
https://reviews.llvm.org/D38128
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319754
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George Rimar [Tue, 5 Dec 2017 10:35:11 +0000 (10:35 +0000)]
Fix build bot after r319750 "[Support/TarWriter] - Don't allow TarWriter to add the same file more than once."
Error was:
error: comparison of integers of different signs: 'const unsigned long' and 'const int' [-Werror,-Wsign-compare]
http://lab.llvm.org:8011/builders/ubuntu-gcc7.1-werror/builds/3469/steps/build-unified-tree/logs/stdio
http://lab.llvm.org:8011/builders/clang-with-thin-lto-ubuntu/builds/7118/steps/build-stage2-compiler/logs/stdio
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319752
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Pavel Labath [Tue, 5 Dec 2017 10:24:15 +0000 (10:24 +0000)]
Re-commit "[cmake] Enable zlib support on windows"
This recommits r319533 which was broken llvm-config --system-libs
output. The reason was that I used find_libraries for searching for the
z library. This returns absolute paths, and when these paths made it
into llvm-config, it made it produce nonsensical flags. To fix this, I
hand-roll a search for the library in the same way that we search for
the terminfo library a couple of lines below.
This is a bit less flexible than the find_library option, as it does not
allow the user to specify the path to the library at configure time
(which is important on windows, as zlib is unlikely to be found in any
of the standard places cmake searches), but I was able to guide the
build to find it with appropriate values of LIB and INCLUDE environment
variables.
Reviewers: compnerd, rnk, beanz, rafael
Subscribers: llvm-commits, mgorny
Differential Revision: https://reviews.llvm.org/D40779
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319751
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George Rimar [Tue, 5 Dec 2017 10:09:59 +0000 (10:09 +0000)]
[Support/TarWriter] - Don't allow TarWriter to add the same file more than once.
This is for PR35460.
Currently when LLD adds files to TarWriter it may pass the same file
multiple times. For example it happens for clang reproduce file which specifies
archive (.a) files more than once in command line.
Patch makes TarWriter to ignore files with the same path, so it will
add only the first one to archive.
Differential revision: https://reviews.llvm.org/D40606
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319750
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Guy Blank [Tue, 5 Dec 2017 09:08:24 +0000 (09:08 +0000)]
[X86] Fix a bug in handling GRXX subclasses in Domain Reassignment pass
When trying to determine the correct Mask register class corresponding
to a GPR register class, not all register classes were handled.
This caused an assertion to be raised on some scenarios.
Differential Revision:
https://reviews.llvm.org/D40290
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319745
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Craig Topper [Tue, 5 Dec 2017 08:15:03 +0000 (08:15 +0000)]
[SelectionDAG] Use WidenTargetBoolean in WidenVecRes_MLOAD and WidenVecOp_MSTORE instead of implementing it manually and incorrectly.
The CONCAT_VECTORS operand get its type from getSetCCResultType, but if the mask type and the setcc have different scalar sizes this creates an illegal CONCAT_VECTORS operation. The concat type should be 2x the mask type, and then an extend should be added if needed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319744
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Michael Trent [Tue, 5 Dec 2017 07:50:00 +0000 (07:50 +0000)]
Test commit, as per the LLVM Developer Policy.
Commit message, as per the same policy. I added a blank space to the end
of the file. Excelsior.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319743
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Craig Topper [Tue, 5 Dec 2017 06:37:21 +0000 (06:37 +0000)]
[X86] Use vector widening to support sign extend from i1 when the dest type is not 512-bits and vlx is not enabled.
Previously we used a wider element type and truncated. But its more efficient to keep the element type and drop unused elements.
If BWI isn't supported and we have a i16 or i8 type, we'll extend it to be i32 and still use a truncate.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319740
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Daniel Sanders [Tue, 5 Dec 2017 05:52:07 +0000 (05:52 +0000)]
Revert r319691: [globalisel][tablegen] Split atomic load/store into separate opcode and enable for AArch64.
Some concerns were raised with the direction. Revert while we discuss it and look into an alternative
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319739
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Kuba Mracek [Tue, 5 Dec 2017 05:22:02 +0000 (05:22 +0000)]
Disable detect_leaks in the ASanified build of LLVM when using Apple LLVM. The released Apple LLVM versions don't support LSan.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319738
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Craig Topper [Tue, 5 Dec 2017 04:47:12 +0000 (04:47 +0000)]
[X86] Fix a crash if avx512bw and xop are both enabled when the IR contrains a v32i8 bitreverse.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319737
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Matt Arsenault [Tue, 5 Dec 2017 03:15:44 +0000 (03:15 +0000)]
AMDGPU: Fix missing subtarget feature initializer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319733
91177308-0d34-0410-b5e6-
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Matt Arsenault [Tue, 5 Dec 2017 03:09:23 +0000 (03:09 +0000)]
AMDGPU: Fix crash when scheduling DBG_VALUE
This calls handleMove with a DBG_VALUE instruction,
which isn't tracked by LiveIntervals. I'm not sure
this is the correct place to fix this. The generic
scheduler seems to have more deliberate region
selection that skips dbg_value.
The test is also really hard to reduce. I haven't been able
to figure out what exactly causes this particular case to
try moving the dbg_value.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319732
91177308-0d34-0410-b5e6-
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Craig Topper [Tue, 5 Dec 2017 01:45:46 +0000 (01:45 +0000)]
[X86] Use vector widening to support zero extend from i1 when the dest type is not 512-bits and vlx is not enabled.
Previously we used a wider element type and truncated. But its more efficient to keep the element type and drop unused elements.
If BWI isn't supported and we have a i16 or i8 type, we'll extend it to be i32 and still use a truncate.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319728
91177308-0d34-0410-b5e6-
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Craig Topper [Tue, 5 Dec 2017 01:28:06 +0000 (01:28 +0000)]
[X86] Don't use kunpck for vXi1 concat_vectors if the upper bits are undef.
This can be efficiently selected by a COPY_TO_REGCLASS without the need for an extra instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319726
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Craig Topper [Tue, 5 Dec 2017 01:28:04 +0000 (01:28 +0000)]
[X86] Use getZeroVector and remove an unnecessary creation of an APInt before calling getConstant. NFCI
The getConstant function can take care of creating the APInt internally.
getZeroVector will take care of using the correct type for the build vector to avoid re-lowering.
The test change here is because execution domain constraints apparently pass through undef inputs of a zeroing xor. So the different ordering of register allocation here caused the dependency to change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319725
91177308-0d34-0410-b5e6-
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Craig Topper [Tue, 5 Dec 2017 01:28:00 +0000 (01:28 +0000)]
[X86] Rearrange some of the code around AVX512 sign/zero extends. NFCI
Move the AVX512 code out of LowerAVXExtend. LowerAVXExtend has two callers but one of them pre-checks for AVX-512 so the code is only live from the other caller. So move the AVX-512 checks up to that caller for symmetry.
Move all of the i1 input type code in Lower_AVX512ZeroExend together.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319724
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Shoaib Meenai [Tue, 5 Dec 2017 01:19:48 +0000 (01:19 +0000)]
[cmake] Modernize some conditionals. NFC
The "x${...}" form was a workaround for CMake versions prior to 3.1,
where the if command would interpret arguments as variables even when
quoted [1]. We can drop the workaround now that our minimum CMake
version is 3.4.
[1] https://cmake.org/cmake/help/v3.1/policy/CMP0054.html
Differential Revision: https://reviews.llvm.org/D40744
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319723
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