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Michael Liao [Tue, 16 Oct 2012 19:49:51 +0000 (19:49 +0000)]
Check .rela instead of ELF64 for the compensation vaue resetting
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166051
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Jakub Staszak [Tue, 16 Oct 2012 19:39:40 +0000 (19:39 +0000)]
80-col fixup.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166050
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Michael Liao [Tue, 16 Oct 2012 19:38:35 +0000 (19:38 +0000)]
Teach DAG combine to fold (trunc (fptoXi x)) to (fptoXi x)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166049
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Rafael Espindola [Tue, 16 Oct 2012 19:34:06 +0000 (19:34 +0000)]
Switch back to the old coalescer for now to fix the 32 bit bit
llvm+clang+compiler-rt bootstrap.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166046
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Jakub Staszak [Tue, 16 Oct 2012 19:32:31 +0000 (19:32 +0000)]
Simplify potentially quadratic behavior while erasing elements from std::vector.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166045
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Bill Wendling [Tue, 16 Oct 2012 18:20:09 +0000 (18:20 +0000)]
And now we can call the other 'get' method from this one and not duplicate the code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166037
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Michael Liao [Tue, 16 Oct 2012 18:14:11 +0000 (18:14 +0000)]
Support v8f32 to v8i8/vi816 conversion through custom lowering
- Add custom FP_TO_SINT on v8i16 (and v8i8 which is legalized as v8i16 due to
vector element-wise widening) to reduce DAG combiner and its overhead added
in X86 backend.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166036
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Bill Wendling [Tue, 16 Oct 2012 18:06:06 +0000 (18:06 +0000)]
Use the appropriate Attributes::get method to create an Attributes object.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166035
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Owen Anderson [Tue, 16 Oct 2012 17:10:33 +0000 (17:10 +0000)]
Speculative fix the mask constants to be of type uintptr_t. I don't know of any case where the old form was incorrect, but I'm more confident that such cases don't exist in this version.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166031
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Dmitri Gribenko [Tue, 16 Oct 2012 15:37:50 +0000 (15:37 +0000)]
Fix function parameter spelling in comments. Caught by -Wdocumentation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166024
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Bill Schmidt [Tue, 16 Oct 2012 13:30:53 +0000 (13:30 +0000)]
This patch addresses PR13949.
For the PowerPC 64-bit ELF Linux ABI, aggregates of size less than 8
bytes are to be passed in the low-order bits ("right-adjusted") of the
doubleword register or memory slot assigned to them. A previous patch
addressed this for aggregates passed in registers. However, small
aggregates passed in the overflow portion of the parameter save area are
still being passed left-adjusted.
The fix is made in PPCTargetLowering::LowerCall_Darwin_Or_64SVR4 on the
caller side, and in PPCTargetLowering::LowerFormalArguments_64SVR4 on
the callee side. The main fix on the callee side simply extends
existing logic for 1- and 2-byte objects to 1- through 7-byte objects,
and correcting a constant left over from 32-bit code. There is also a
fix to a bogus calculation of the offset to the following argument in
the parameter save area.
On the caller side, again a constant left over from 32-bit code is
fixed. Additionally, some code for 1, 2, and 4-byte objects is
duplicated to handle the 3, 5, 6, and 7-byte objects for SVR4 only. The
LowerCall_Darwin_Or_64SVR4 logic is getting fairly convoluted trying to
handle both ABIs, and I propose to separate this into two functions in a
future patch, at which time the duplication can be removed.
The patch adds a new test (structsinmem.ll) to demonstrate correct
passing of structures of all seven sizes. Eight dummy parameters are
used to force these structures to be in the overflow portion of the
parameter save area.
As a side effect, this corrects the case when aggregates passed in
registers are saved into the first eight doublewords of the parameter
save area: Previously they were stored left-justified, and now are
properly stored right-justified. This requires changing the expected
output of existing test case structsinregs.ll.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166022
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Stepan Dyatkovskiy [Tue, 16 Oct 2012 07:16:47 +0000 (07:16 +0000)]
Issue:
Stack is formed improperly for long structures passed as byval arguments for
EABI mode.
If we took AAPCS reference, we can found the next statements:
A: "If the argument requires double-word alignment (8-byte), the NCRN (Next
Core Register Number) is rounded up to the next even register number." (5.5
Parameter Passing, Stage C, C.3).
B: "The alignment of an aggregate shall be the alignment of its most-aligned
component." (4.3 Composite Types, 4.3.1 Aggregates).
So if we have structure with doubles (9 double fields) and 3 Core unused
registers (r1, r2, r3): caller should use r2 and r3 registers only.
Currently r1,r2,r3 set is used, but it is invalid.
Callee VA routine should also use r2 and r3 regs only. All is ok here. This
behaviour is guessed by rounding up SP address with ADD+BFC operations.
Fix:
Main fix is in ARMTargetLowering::HandleByVal. If we detected AAPCS mode and
8 byte alignment, we waste odd registers then.
P.S.:
I also improved LDRB_POST_IMM regression test. Since ldrb instruction will
not generated by current regression test after this patch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166018
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NAKAMURA Takumi [Tue, 16 Oct 2012 06:28:34 +0000 (06:28 +0000)]
Reapply r165661, Patch by Shuxin Yang <shuxin.llvm@gmail.com>.
Original message:
The attached is the fix to radar://
11663049. The optimization can be outlined by following rules:
(select (x != c), e, c) -> select (x != c), e, x),
(select (x == c), c, e) -> select (x == c), x, e)
where the <c> is an integer constant.
The reason for this change is that : on x86, conditional-move-from-constant needs two instructions;
however, conditional-move-from-register need only one instruction.
While the LowerSELECT() sounds to be the most convenient place for this optimization, it turns out to be a bad place. The reason is that by replacing the constant <c> with a symbolic value, it obscure some instruction-combining opportunities which would otherwise be very easy to spot. For that reason, I have to postpone the change to last instruction-combining phase.
The change passes the test of "make check-all -C <build-root/test" and "make -C project/test-suite/SingleSource".
Original message since r165661:
My previous change has a bug: I negated the condition code of a CMOV, and go ahead creating a new CMOV using the *ORIGINAL* condition code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166017
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Bill Wendling [Tue, 16 Oct 2012 06:10:45 +0000 (06:10 +0000)]
Cleanup whitespace.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166016
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Owen Anderson [Tue, 16 Oct 2012 06:04:27 +0000 (06:04 +0000)]
Fix a bug in the set(I,E)/reset(I,E) methods that I recently added. The boundary condition for checking if I and E were in the same word were incorrect, and, beyond that, the mask computation was not using a wide enough constant.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166015
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Craig Topper [Tue, 16 Oct 2012 06:01:50 +0000 (06:01 +0000)]
Move X86MCInstLower class definition into implementation file. It's not needed outside.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166014
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Bill Wendling [Tue, 16 Oct 2012 06:01:44 +0000 (06:01 +0000)]
Cleanup whitespace.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166013
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Bill Wendling [Tue, 16 Oct 2012 05:57:28 +0000 (05:57 +0000)]
Have AttributesImpl defriend the Attributes class.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166012
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Bill Wendling [Tue, 16 Oct 2012 05:55:09 +0000 (05:55 +0000)]
Have AttrBuilder defriend the Attributes class.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166011
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Bill Wendling [Tue, 16 Oct 2012 05:23:31 +0000 (05:23 +0000)]
Use the Attributes::get method which takes an AttrVal value directly to simplify the code a bit. No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166009
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Bill Wendling [Tue, 16 Oct 2012 05:22:28 +0000 (05:22 +0000)]
Put simple c'tors inline.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166008
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Bill Wendling [Tue, 16 Oct 2012 05:20:51 +0000 (05:20 +0000)]
Pass in the context to the Attributes::get method.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166007
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Craig Topper [Tue, 16 Oct 2012 02:21:30 +0000 (02:21 +0000)]
Fix filename in file header.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166004
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Rafael Espindola [Tue, 16 Oct 2012 01:13:06 +0000 (01:13 +0000)]
Fix the cpu name and add -verify-machineinstrs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166003
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Andrew Trick [Tue, 16 Oct 2012 00:22:51 +0000 (00:22 +0000)]
misched: Added handleMove support for updating all kill flags, not just for allocatable regs.
This is a medium term workaround until we have a more robust solution
in the form of a register liveness utility for postRA passes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166001
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Jakob Stoklund Olesen [Tue, 16 Oct 2012 00:05:06 +0000 (00:05 +0000)]
Remove unused BitVectors from getAllocatableSet().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165999
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Nadav Rotem [Mon, 15 Oct 2012 22:50:02 +0000 (22:50 +0000)]
LTO also needs to initialize the TargetTransform infrastructure.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165997
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Jakob Stoklund Olesen [Mon, 15 Oct 2012 22:41:03 +0000 (22:41 +0000)]
Remove RegisterClassInfo::isReserved() and isAllocatable().
Clients can use the equivalent functions in MRI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165990
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Michael Liao [Mon, 15 Oct 2012 22:39:43 +0000 (22:39 +0000)]
Add __builtin_setjmp/_longjmp supprt in X86 backend
- Besides used in SjLj exception handling, __builtin_setjmp/__longjmp is also
used as a light-weight replacement of setjmp/longjmp which are used to
implementation continuation, user-level threading, and etc. The support added
in this patch ONLY addresses this usage and is NOT intended to support SjLj
exception handling as zero-cost DWARF exception handling is used by default
in X86.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165989
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Jakob Stoklund Olesen [Mon, 15 Oct 2012 22:14:34 +0000 (22:14 +0000)]
Remove LIS::isAllocatable() and isReserved() helpers.
All callers can simply use the corresponding MRI functions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165985
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Owen Anderson [Mon, 15 Oct 2012 22:05:27 +0000 (22:05 +0000)]
Add range-based set()/reset() to BitVector. These allow fast setting/resetting of ranges of bits, particularly useful when dealing with very large BitVector's.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165984
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Jakob Stoklund Olesen [Mon, 15 Oct 2012 21:57:41 +0000 (21:57 +0000)]
Switch most getReservedRegs() clients to the MRI equivalent.
Using the cached bit vector in MRI avoids comstantly allocating and
recomputing the reserved register bit vector.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165983
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Jakob Stoklund Olesen [Mon, 15 Oct 2012 21:33:06 +0000 (21:33 +0000)]
Freeze the reserved registers as soon as isel is complete.
Also provide an MRI::getReservedRegs() function to access the frozen
register set, and isReserved() and isAllocatable() methods to test
individual registers.
The various implementations of TRI::getReservedRegs() are quite
complicated, and many passes need to look at the reserved register set.
This patch makes it possible for these passes to use the cached copy in
MRI, avoiding a lot of malloc traffic and repeated calculations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165982
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Jim Grosbach [Mon, 15 Oct 2012 21:23:40 +0000 (21:23 +0000)]
ARM: v1i64 and v2i64 VBSL intrinsic support.
rdar://
12502028
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165981
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David Blaikie [Mon, 15 Oct 2012 21:11:46 +0000 (21:11 +0000)]
Add dependency on llvm-bcanalyzer from tests to the CMake build.
This fixes a CMake build break introduced by r165739.
Thanks Jan Voung for the quick suggestion/fix.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165978
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Bill Wendling [Mon, 15 Oct 2012 20:35:56 +0000 (20:35 +0000)]
Move the Attributes::Builder outside of the Attributes class and into its own class named AttrBuilder. No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165960
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Andrew Trick [Mon, 15 Oct 2012 20:33:14 +0000 (20:33 +0000)]
Check output of the misched unit tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165959
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Bill Wendling [Mon, 15 Oct 2012 19:58:25 +0000 (19:58 +0000)]
Add comments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165958
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Rafael Espindola [Mon, 15 Oct 2012 19:25:43 +0000 (19:25 +0000)]
Add a cpu to try to fix the atom builder.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165956
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Chad Rosier [Mon, 15 Oct 2012 19:08:18 +0000 (19:08 +0000)]
[ms-inline asm] If we parsed a statement and the opcode is valid, then it's an instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165955
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Rafael Espindola [Mon, 15 Oct 2012 19:00:10 +0000 (19:00 +0000)]
Add testcase for pr14088.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165954
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Andrew Trick [Mon, 15 Oct 2012 18:21:08 +0000 (18:21 +0000)]
misched tests: add a triple to speculatively fix windows builders.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165952
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Rafael Espindola [Mon, 15 Oct 2012 18:21:07 +0000 (18:21 +0000)]
Make sure we iterate over newly created instructions. Fixes pr13625. Testcase to
follow in one sec.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165951
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Andrew Trick [Mon, 15 Oct 2012 18:02:27 +0000 (18:02 +0000)]
misched: ILP scheduler for experimental heuristics.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165950
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Chad Rosier [Mon, 15 Oct 2012 17:26:38 +0000 (17:26 +0000)]
[ms-inline asm] Update the end loc for ParseIntelMemOperand.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165947
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Chad Rosier [Mon, 15 Oct 2012 17:19:13 +0000 (17:19 +0000)]
[ms-inline asm] Add a few new APIs to the AsmParser class in support of MS-Style
inline assembly. For the time being, these will be called directly by clang.
However, in the near future I expect these to be sunk back into the MC layer
and more basic APIs (e.g., getClobbers(), getConstraints(), etc.) will be called
by clang.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165946
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Chad Rosier [Mon, 15 Oct 2012 16:50:34 +0000 (16:50 +0000)]
[ms-inline asm] Use incoming argument rather than hard coding to false.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165945
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Jan Wen Voung [Mon, 15 Oct 2012 16:47:58 +0000 (16:47 +0000)]
Fix a typo in bitcode docs, from 165814.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165944
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Micah Villmow [Mon, 15 Oct 2012 16:24:29 +0000 (16:24 +0000)]
Resubmit the changes to llvm core to update the functions to support different pointer sizes on a per address space basis.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165941
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Adhemerval Zanella [Mon, 15 Oct 2012 15:43:14 +0000 (15:43 +0000)]
PowerPC: add EmitTCEntry class for TOC creation
This patch replaces the EmitRawText by a EmitTCEntry class (specialized for
each Streamer) in PowerPC64 TOC entry creation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165940
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Kostya Serebryany [Mon, 15 Oct 2012 14:30:30 +0000 (14:30 +0000)]
[asan] fix a test
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165938
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Kostya Serebryany [Mon, 15 Oct 2012 14:20:06 +0000 (14:20 +0000)]
[asan] make AddressSanitizer to be a FunctionPass instead of ModulePass. This will simplify chaining other FunctionPasses with asan. Also some minor cleanup
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165936
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Chandler Carruth [Mon, 15 Oct 2012 10:24:43 +0000 (10:24 +0000)]
Update the memcpy rewriting to fully support widened int rewriting. This
includes extracting ints for copying elsewhere and inserting ints when
copying into the alloca. This should fix the CanSROA assertion coming
out of Clang's regression test suite.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165931
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Chandler Carruth [Mon, 15 Oct 2012 10:24:40 +0000 (10:24 +0000)]
Follow-up fix to r165928: handle memset rewriting for widened integers,
and generally clean up the memset handling. It had rotted a bit as the
other rewriting logic got polished more.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165930
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Silviu Baranga [Mon, 15 Oct 2012 09:41:32 +0000 (09:41 +0000)]
Fixed PR13938: the ARM backend was crashing because it couldn't select a VDUPLANE node with the vector input size different from the output size. This was bacause the BUILD_VECTOR lowering code didn't check that the size of the input vector was correct for using VDUPLANE.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165929
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Chandler Carruth [Mon, 15 Oct 2012 08:40:30 +0000 (08:40 +0000)]
First major step toward addressing PR14059. This teaches SROA to handle
cases where we have partial integer loads and stores to an otherwise
promotable alloca to widen[1] those loads and stores to cover the entire
alloca and bitcast them into the appropriate type such that promotion
can proceed.
These partial loads and stores stem from an annoying confluence of ARM's
calling convention and ABI lowering and the FCA pre-splitting which
takes place in SROA. Clang lowers a { double, double } in-register
function argument as a [4 x i32] function argument to ensure it is
placed into integer 32-bit registers (a really unnerving implicit
contract between Clang and the ARM backend I would add). This results in
a FCA load of [4 x i32]* from the { double, double } alloca, and SROA
decomposes this into a sequence of i32 loads and stores. Inlining
proceeds, code gets folded, but at the end of the day, we still have i32
stores to the low and high halves of a double alloca. Widening these to
be i64 operations, and bitcasting them to double prior to loading or
storing allows promotion to proceed for these allocas.
I looked quite a bit changing the IR which Clang produces for this case
to be more friendly, but small changes seem unlikely to help. I think
the best representation we could use currently would be to pass 4 i32
arguments thereby avoiding any FCAs, but that would still require this
fix. It seems like it might eventually be nice to somehow encode the ABI
register selection choices outside of the parameter type system so that
the parameter can be a { double, double }, but the CC register
annotations indicate that this should be passed via 4 integer registers.
This patch does not address the second problem in PR14059, which is the
reverse: when a struct alloca is loaded as a *larger* single integer.
This patch also does not address some of the code quality issues with
the FCA-splitting. Those don't actually impede any optimizations really,
but they're on my list to clean up.
[1]: Pedantic footnote: for those concerned about memory model issues
here, this is safe. For the alloca to be promotable, it cannot escape or
have any use of its address that could allow these loads or stores to be
racing. Thus, widening is always safe.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165928
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Chandler Carruth [Mon, 15 Oct 2012 08:40:22 +0000 (08:40 +0000)]
Hoist the canConvertValue predicate and the convertValue transform out
into static helper functions. They're really quite generic and are going
to be needed elsewhere shortly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165927
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Bill Wendling [Mon, 15 Oct 2012 07:29:08 +0000 (07:29 +0000)]
Add an enum for the return and function indexes into the AttrListPtr object. This gets rid of some magic numbers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165924
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Bill Wendling [Mon, 15 Oct 2012 06:53:28 +0000 (06:53 +0000)]
Use a ::get method to create the attribute from Attributes::AttrVals instead of a constructor.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165923
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Bill Wendling [Mon, 15 Oct 2012 06:34:18 +0000 (06:34 +0000)]
Supply a default 'operator=' method.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165922
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Bill Wendling [Mon, 15 Oct 2012 05:40:12 +0000 (05:40 +0000)]
Move the AttributesImpl header file into the VMCore directory so that it can be opaque.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165920
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Bill Wendling [Mon, 15 Oct 2012 04:46:55 +0000 (04:46 +0000)]
Attributes Rewrite
Convert the internal representation of the Attributes class into a pointer to an
opaque object that's uniqued by and stored in the LLVMContext object. The
Attributes class then becomes a thin wrapper around this opaque
object. Eventually, the internal representation will be expanded to include
attributes that represent code generation options, etc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165917
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Meador Inge [Mon, 15 Oct 2012 03:47:37 +0000 (03:47 +0000)]
instcombine: Migrate strcmp and strncmp optimizations
This patch migrates the strcmp and strncmp optimizations from the
simplify-libcalls pass into the instcombine library call simplifier.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165915
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Benjamin Kramer [Sun, 14 Oct 2012 16:06:09 +0000 (16:06 +0000)]
Update CMake build.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165908
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Benjamin Kramer [Sun, 14 Oct 2012 15:56:39 +0000 (15:56 +0000)]
Fix a typo that made ImmutableMap::getMaxElement() useless.
Add a basic unit test for ImmutableMap. Found by inspection.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165907
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Benjamin Kramer [Sun, 14 Oct 2012 11:15:42 +0000 (11:15 +0000)]
Simplify code. No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165904
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Benjamin Kramer [Sun, 14 Oct 2012 10:21:31 +0000 (10:21 +0000)]
Unquadratize SetVector removal loops in DSE.
Erasing from the beginning or middle of the vector is expensive, remove_if can
do it in linear time even though it's a bit ugly without lambdas.
No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165903
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Bill Wendling [Sun, 14 Oct 2012 09:21:44 +0000 (09:21 +0000)]
Remove dead methods.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165902
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Bill Wendling [Sun, 14 Oct 2012 08:54:26 +0000 (08:54 +0000)]
Remove operator cast method in favor of querying with the correct method.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165899
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Benjamin Kramer [Sun, 14 Oct 2012 08:48:40 +0000 (08:48 +0000)]
Fix use after free when deleting attributes in a chained folding set.
Can't follow the intrusive linked list when the element is gone.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165898
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Bill Wendling [Sun, 14 Oct 2012 08:25:35 +0000 (08:25 +0000)]
Don't use the new syntax just yet.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165897
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Bill Wendling [Sun, 14 Oct 2012 07:52:48 +0000 (07:52 +0000)]
Remove the bitwise AND operators from the Attributes class. Replace it with the equivalent from the builder class.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165896
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Bill Wendling [Sun, 14 Oct 2012 07:35:59 +0000 (07:35 +0000)]
Remove the bitwise assignment OR operator from the Attributes class. Replace it with the equivalent from the builder class.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165895
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Bill Wendling [Sun, 14 Oct 2012 07:17:34 +0000 (07:17 +0000)]
Remove the bitwise OR operator from the Attributes class. Replace it with the equivalent from the builder class.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165894
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Bill Wendling [Sun, 14 Oct 2012 06:56:13 +0000 (06:56 +0000)]
Remove the bitwise XOR operator from the Attributes class. Replace it with the equivalent from the builder class.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165893
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Bill Wendling [Sun, 14 Oct 2012 06:39:53 +0000 (06:39 +0000)]
Remove the bitwise NOT operator from the Attributes class. Replace it with the equivalent from the builder class.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165892
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Bill Wendling [Sun, 14 Oct 2012 04:10:01 +0000 (04:10 +0000)]
Decode the LLVM attributes from bitcode using the attributes builder.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165891
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Bill Wendling [Sun, 14 Oct 2012 03:58:29 +0000 (03:58 +0000)]
Use builder to create alignment attributes. Remove dead function.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165890
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Bill Wendling [Sun, 14 Oct 2012 03:28:43 +0000 (03:28 +0000)]
Remove dead method.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165889
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Bill Wendling [Sun, 14 Oct 2012 03:27:15 +0000 (03:27 +0000)]
Don't pass in an Attributes object to something that expects an integral value.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165887
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Benjamin Kramer [Sat, 13 Oct 2012 18:03:34 +0000 (18:03 +0000)]
Remove unused private field.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165881
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Benjamin Kramer [Sat, 13 Oct 2012 17:38:00 +0000 (17:38 +0000)]
X86: Depending on the local semantics of .align this test can also emit a nopl instead of nopw.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165880
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Dmitri Gribenko [Sat, 13 Oct 2012 17:34:49 +0000 (17:34 +0000)]
Documentation: Lexicon.rst: add "BB Vectorization" and "TBAA".
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165879
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Benjamin Kramer [Sat, 13 Oct 2012 17:28:35 +0000 (17:28 +0000)]
X86: Disable long nops for all cpus prior to pentiumpro/i686.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165878
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Jakob Stoklund Olesen [Sat, 13 Oct 2012 17:26:47 +0000 (17:26 +0000)]
Drop <def,dead> flags when merging into an unused lane.
The new coalescer can merge a dead def into an unused lane of an
otherwise live vector register.
Clear the <dead> flag when that happens since the flag refers to the
full virtual register which is still live after the partial dead def.
This fixes PR14079.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165877
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Meador Inge [Sat, 13 Oct 2012 16:45:37 +0000 (16:45 +0000)]
instcombine: Migrate strchr and strrchr optimizations
This patch migrates the strchr and strrchr optimizations from the
simplify-libcalls pass into the instcombine library call simplifier.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165875
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Meador Inge [Sat, 13 Oct 2012 16:45:32 +0000 (16:45 +0000)]
instcombine: Migrate strcat and strncat optimizations
This patch migrates the strcat and strncat optimizations from the
simplify-libcalls pass into the instcombine library call simplifier.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165874
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Meador Inge [Sat, 13 Oct 2012 16:45:24 +0000 (16:45 +0000)]
Implement new LibCallSimplifier class
This patch implements the new LibCallSimplifier class as outlined in [1].
In addition to providing the new base library simplification infrastructure,
all the fortified library call simplifications were moved over to the new
infrastructure. The rest of the library simplification optimizations will
be moved over with follow up patches.
NOTE: The original fortified library call simplifier located in the
SimplifyFortifiedLibCalls class was not removed because it is still
used by CodeGenPrepare. This class will eventually go away too.
[1] http://lists.cs.uiuc.edu/pipermail/llvmdev/2012-August/052283.html
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165873
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Jakob Stoklund Olesen [Sat, 13 Oct 2012 16:15:31 +0000 (16:15 +0000)]
Allow for loops in LiveIntervals::pruneValue().
It is possible that the live range of the value being pruned loops back
into the kill MBB where the search started. When that happens, make sure
that the beginning of KillMBB is also pruned.
Instead of starting a DFS at KillMBB and skipping the root of the
search, start a DFS at each KillMBB successor, and allow the search to
loop back to KillMBB.
This fixes PR14078.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165872
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Benjamin Kramer [Sat, 13 Oct 2012 12:50:19 +0000 (12:50 +0000)]
X86: Fix accidentally swapped operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165871
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Chandler Carruth [Sat, 13 Oct 2012 10:49:33 +0000 (10:49 +0000)]
Teach SROA to cope with wrapper aggregates. These show up a lot in ABI
type coercion code, especially when targetting ARM. Things like [1
x i32] instead of i32 are very common there.
The goal of this logic is to ensure that when we are picking an alloca
type, we look through such wrapper aggregates and across any zero-length
aggregate elements to find the simplest type possible to form a type
partition.
This logic should (generally speaking) rarely fire. It only ends up
kicking in when an alloca is accessed using two different types (for
instance, i32 and float), and the underlying alloca type has wrapper
aggregates around it. I noticed a significant amount of this occurring
looking at stepanov_abstraction generated code for arm, and suspect it
happens elsewhere as well.
Note that this doesn't yet address truly heinous IR productions such as
PR14059 is concerning. Those result in mismatched *sizes* of types in
addition to mismatched access and alloca types.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165870
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Chandler Carruth [Sat, 13 Oct 2012 10:49:30 +0000 (10:49 +0000)]
Speculatively harden the conversion logic. I have no idea if this will
help the dragonegg builders, and no test case at this point, but this
was one dimly plausible case I spotted by inspection. Hopefully will get
a testcase from those bots soon-ish, and will tidy this up with proper
testing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165869
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Benjamin Kramer [Sat, 13 Oct 2012 10:39:49 +0000 (10:39 +0000)]
X86: Promote i8 cmov when both operands are coming from truncates of the same width.
X86 doesn't have i8 cmovs so isel would emit a branch. Emitting branches at this
level is often not a good idea because it's too late for many optimizations to
kick in. This solution doesn't add any extensions (truncs are free) and tries
to avoid introducing partial register stalls by filtering direct copyfromregs.
I'm seeing a ~10% speedup on reading a random .png file with libpng15 via
graphicsmagick on x86_64/westmere, but YMMV depending on the microarchitecture.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165868
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Chandler Carruth [Sat, 13 Oct 2012 05:09:27 +0000 (05:09 +0000)]
Silence a warning in -assert builds.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165867
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Chandler Carruth [Sat, 13 Oct 2012 02:41:05 +0000 (02:41 +0000)]
Clean up how we rewrite loads and stores to the whole alloca. When these
are single value types, the load and store should be directly based upon
the alloca and then bitcasting can fix the type as needed afterward.
This might in theory improve some of the IR coming out of SROA, but
I don't expect big changes yet and don't have any test cases on hand.
This is really just a cleanup/refactoring patch. The next patch will
cause this code path to be hit a lot more, actually get SROA to promote
more allocas and include several more test cases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165864
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Chad Rosier [Sat, 13 Oct 2012 00:26:04 +0000 (00:26 +0000)]
[ms-inline asm] Remove the MatchInstruction() function. Previously, this was
the interface between the front-end and the MC layer when parsing inline
assembly. Unfortunately, this is too deep into the parsing stack. Specifically,
we're unable to handle target-independent assembly (i.e., assembly directives,
labels, etc.). Note the MatchAndEmitInstruction() isn't the correct
abstraction either. I'll be exposing target-independent hooks shortly, so this
is really just a cleanup.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165858
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Andrew Kaylor [Fri, 12 Oct 2012 23:53:16 +0000 (23:53 +0000)]
Check section type rather than assuming it's code when emitting sections while processing relocations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165854
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Manman Ren [Fri, 12 Oct 2012 23:39:43 +0000 (23:39 +0000)]
ARM: tail-call inside a function where part of a byval argument is on caller's
local frame causes problem.
For example:
void f(StructToPass s) {
g(&s, sizeof(s));
}
will cause problem with tail-call since part of s is passed via registers and
saved in f's local frame. When g tries to access s, part of s may be corrupted
since f's local frame is popped out before the tail-call.
The current fix is to disable tail-call if getVarArgsRegSaveSize is not 0 for
the caller. This is a conservative approach, if we can prove the address of
s or part of s is not taken and passed to g, it should be okay to perform
tail-call.
rdar://
12442472
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165853
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Chad Rosier [Fri, 12 Oct 2012 23:09:25 +0000 (23:09 +0000)]
[ms-inline asm] Capitalize per coding standard.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165847
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Jakob Stoklund Olesen [Fri, 12 Oct 2012 23:01:33 +0000 (23:01 +0000)]
Fix buildbots: -misched=shuffle is only available in +Asserts builds.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165846
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