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Andreas Gampe [Thu, 19 Feb 2015 01:23:47 +0000 (01:23 +0000)]
am
2ee8837c: Merge "ART: Templatize IsInt & IsUint"
* commit '
2ee8837c49680fa0c928fb5d5fc6ef7ae6532eea':
ART: Templatize IsInt & IsUint
Andreas Gampe [Thu, 19 Feb 2015 01:18:01 +0000 (01:18 +0000)]
Merge "ART: Templatize IsInt & IsUint"
Andreas Gampe [Sat, 14 Feb 2015 03:23:55 +0000 (19:23 -0800)]
ART: Templatize IsInt & IsUint
Ensure that things are used correctly.
Change-Id: I76f082b32dcee28bbfb4c519daa401ac595873b3
Jeff Hao [Wed, 18 Feb 2015 22:50:56 +0000 (22:50 +0000)]
am
887653c2: Merge "Default to 64-bit for tests of methods with varying ISAs for valgrind."
* commit '
887653c253e9d049d0817867db02392a9a3db40e':
Default to 64-bit for tests of methods with varying ISAs for valgrind.
Andreas Gampe [Wed, 18 Feb 2015 22:50:55 +0000 (22:50 +0000)]
am
a56f1195: Merge "ART: Make run-tests more verbose"
* commit '
a56f11956c3ee2c18e98078737549494638e08aa':
ART: Make run-tests more verbose
Vladimir Marko [Wed, 18 Feb 2015 22:50:37 +0000 (22:50 +0000)]
am
698e4a89: Merge "Distinguish FP and integral constants in LVN."
* commit '
698e4a8942b6f6005dd247a73347f8086c8e7e6e':
Distinguish FP and integral constants in LVN.
Bill Buzbee [Wed, 18 Feb 2015 22:50:31 +0000 (22:50 +0000)]
am
a5c81189: Merge "ART: Fix InsertCaseLabel to return boundary_lir always"
* commit '
a5c81189a5075c53d649135e0417fc075eeead5a':
ART: Fix InsertCaseLabel to return boundary_lir always
Bill Buzbee [Wed, 18 Feb 2015 22:50:30 +0000 (22:50 +0000)]
am
3dbce6f8: Merge "ART: Promoted register may be wrong after the load of zero fp constant"
* commit '
3dbce6f822cc9fa49505adde0a556fd67996268e':
ART: Promoted register may be wrong after the load of zero fp constant
Jeff Hao [Wed, 18 Feb 2015 21:41:11 +0000 (21:41 +0000)]
Merge "Default to 64-bit for tests of methods with varying ISAs for valgrind."
Andreas Gampe [Wed, 18 Feb 2015 21:41:10 +0000 (21:41 +0000)]
Merge "ART: Make run-tests more verbose"
Vladimir Marko [Wed, 18 Feb 2015 18:54:15 +0000 (18:54 +0000)]
Merge "Distinguish FP and integral constants in LVN."
Bill Buzbee [Wed, 18 Feb 2015 17:54:10 +0000 (17:54 +0000)]
Merge "ART: Fix InsertCaseLabel to return boundary_lir always"
Bill Buzbee [Wed, 18 Feb 2015 17:54:00 +0000 (17:54 +0000)]
Merge "ART: Promoted register may be wrong after the load of zero fp constant"
Vladimir Marko [Wed, 18 Feb 2015 17:52:39 +0000 (17:52 +0000)]
Distinguish FP and integral constants in LVN.
Change-Id: I31a58ff19fb95a2f56420359e50332c1dce6cbc7
Vladimir Marko [Wed, 18 Feb 2015 14:41:59 +0000 (14:41 +0000)]
am
ca47c2ec: Merge "Quick: Disable DCE until we fix FP/Core reg mismatches."
* commit '
ca47c2ece95c9ea511864c51c5c3923e087d4499':
Quick: Disable DCE until we fix FP/Core reg mismatches.
Vladimir Marko [Wed, 18 Feb 2015 14:36:59 +0000 (14:36 +0000)]
Merge "Quick: Disable DCE until we fix FP/Core reg mismatches."
Vladimir Marko [Wed, 18 Feb 2015 14:06:43 +0000 (14:06 +0000)]
Quick: Disable DCE until we fix FP/Core reg mismatches.
GVN and TypeInference can miss some FP/Core register
mismatch:
const v0, #X ; marked as float
invoke-virtual v0, void foo(float)
const v0, #X ; marked as core
aput v0, v1, v2 ; float[] not used
The second const is eliminated by the DCE because it writes
the same value to the same dalvik reg. We replace the SSA
register name defined by the first const and used by the
invoke-virtual with the one defined by the second const.
When we generate code for the invoke-virtual, we get a core
location and may need a temporary to set up the FP argument
and we may not have an available temporary.
This may affect the bug below (more investigation needed).
Bug:
19419671
Change-Id: I44abd390706b980c346b36c9828a3bcb4e96726d
Nicolas Geoffray [Wed, 18 Feb 2015 10:14:00 +0000 (10:14 +0000)]
am
35757740: Merge "Avoid generating jmp +0."
* commit '
35757740da77220dc51d5cff3bc3a779f2eea9ef':
Avoid generating jmp +0.
Nicolas Geoffray [Wed, 18 Feb 2015 09:54:39 +0000 (09:54 +0000)]
Merge "Avoid generating jmp +0."
Nicolas Geoffray [Mon, 16 Feb 2015 11:15:43 +0000 (11:15 +0000)]
Avoid generating jmp +0.
When a block branches to a non-following block, but blocks
in-between do branch to it, we can avoid doing the branch.
Change-Id: I9b343f662a4efc718cd4b58168f93162a24e1219
Sebastien Hertz [Wed, 18 Feb 2015 08:34:36 +0000 (08:34 +0000)]
am
de740218: Merge "Follow up 129144"
* commit '
de7402182c1b020dec43aa38d62fa369a4ef52b8':
Follow up 129144
Sebastien Hertz [Wed, 18 Feb 2015 08:28:34 +0000 (08:28 +0000)]
Merge "Follow up 129144"
Vladimir [Wed, 11 Feb 2015 08:11:19 +0000 (14:11 +0600)]
ART: Promoted register may be wrong after the load of zero fp constant
Because of Dalvik byte code's lack of immediate typing,
the same vreg may be used in core, ref and fp operations.
To properly support GC, we must ensure that if a constant zero is loaded
into a fp view of a vreg, it must also be loaded into the core/ref view.
The code that was responsible for ensuring this failed to handle the case
of a vreg having a non-promoted fp view and a promoted core/ref view.
Change-Id: If77295aa93317e749ceacc8c1dd9e582122c368f
Signed-off-by: Vladimir <vladimir.a.ivanov@intel.com>
Signed-off-by: Serguei Katkov <serguei.i.katkov@intel.com>
Andreas Gampe [Wed, 18 Feb 2015 03:25:29 +0000 (19:25 -0800)]
ART: Make run-tests more verbose
Make run-tests log ERROR level on host. Adjust some internal LOG(ERROR)
to LOG(WARNING). Add check scripts to adjust for other LOG(ERROR)
messages.
Bug:
18713034
Change-Id: I2a3e055baa6a0e31f106364c300c20963a59ed94
Jeff Hao [Wed, 18 Feb 2015 02:01:00 +0000 (18:01 -0800)]
Default to 64-bit for tests of methods with varying ISAs for valgrind.
The size of the created methods will technically not be correct, but
they will be larger than necessary when the target is changed to 32-bit,
so valgrind will not complain.
Bug:
19368740
Change-Id: Ic78867b4700248ec6d70f5d7f6d87ce9447ac448
Vladimir Marko [Tue, 17 Feb 2015 22:31:30 +0000 (22:31 +0000)]
am
afba6968: Merge "Dead code elimination based on GVN results."
* commit '
afba696823ec7c019de72f17cd198e91edd3bf4f':
Dead code elimination based on GVN results.
Vladimir Marko [Tue, 17 Feb 2015 22:25:06 +0000 (22:25 +0000)]
Merge "Dead code elimination based on GVN results."
Sebastien Hertz [Fri, 6 Feb 2015 08:16:32 +0000 (09:16 +0100)]
Follow up 129144
Passes JDWP options to debugger on runtime init so we no longer need
to keep them on the heap.
Updates ParseJdwpOption to return Result for consistency.
Bug:
19275792
Change-Id: I68b7e58908164d3e4cf9e3fbcc3dfab6ce0579a5
Vladimir Marko [Fri, 2 Jan 2015 17:00:44 +0000 (17:00 +0000)]
Dead code elimination based on GVN results.
Change-Id: I5b77411a8f088f0b561da14b123cf6b0501c9db5
Igor Murashkin [Tue, 17 Feb 2015 19:09:10 +0000 (19:09 +0000)]
am
17609db4: Merge "art: Fix bug in VariantMap::Set"
* commit '
17609db47537ea6da03db1be530ad13e67cf24db':
art: Fix bug in VariantMap::Set
Igor Murashkin [Tue, 17 Feb 2015 19:05:04 +0000 (19:05 +0000)]
Merge "art: Fix bug in VariantMap::Set"
Igor Murashkin [Sat, 7 Feb 2015 01:59:39 +0000 (17:59 -0800)]
art: Fix bug in VariantMap::Set
Bug:
19295410
Change-Id: I7827583846d710698c0e7bc0ec1a2c3bf901bd50
Nicolas Geoffray [Mon, 16 Feb 2015 11:39:45 +0000 (11:39 +0000)]
am
6e27f821: Merge "Opt compiler: ARM64: Fix blocking fp registers."
* commit '
6e27f82193a8f54cd8ecdc8fb2c4c1adadafbaf4':
Opt compiler: ARM64: Fix blocking fp registers.
Nicolas Geoffray [Mon, 16 Feb 2015 11:32:47 +0000 (11:32 +0000)]
Merge "Opt compiler: ARM64: Fix blocking fp registers."
Zheng Xu [Sun, 15 Feb 2015 10:39:46 +0000 (18:39 +0800)]
Opt compiler: ARM64: Fix blocking fp registers.
VIXL reserved float point registers has not been blocked correctly.
Change-Id: Ie7131d86bbaff48c431e3e26abd2fa26389ac687
Andreas Gampe [Fri, 13 Feb 2015 23:44:19 +0000 (23:44 +0000)]
am
e5f5953e: Merge "ART: Rewrite ThreadStress for easier extensibility"
* commit '
e5f5953e744060fde3b4489cea4d934d529e3e32':
ART: Rewrite ThreadStress for easier extensibility
Andreas Gampe [Fri, 13 Feb 2015 23:38:25 +0000 (23:38 +0000)]
Merge "ART: Rewrite ThreadStress for easier extensibility"
Andreas Gampe [Fri, 13 Feb 2015 23:34:42 +0000 (23:34 +0000)]
am
6bf6ce19: Merge "ART: Add more details to LinkageError"
* commit '
6bf6ce19df0b165122d5e9a593943e3bfb97ad4d':
ART: Add more details to LinkageError
Andreas Gampe [Wed, 11 Jun 2014 15:20:47 +0000 (08:20 -0700)]
ART: Rewrite ThreadStress for easier extensibility
Change-Id: Ie29918bef048e9ef44877c6c601de113ca38790e
Andreas Gampe [Fri, 13 Feb 2015 23:29:33 +0000 (23:29 +0000)]
Merge "ART: Add more details to LinkageError"
Andreas Gampe [Fri, 13 Feb 2015 23:23:18 +0000 (15:23 -0800)]
ART: Add more details to LinkageError
Add the classes or method details that fail during linking to enable
better diagnosis of problems.
Bug:
19294695
Change-Id: Ifab48bc182cd801d44d3aead2168028f27043be0
Andreas Gampe [Fri, 13 Feb 2015 22:12:35 +0000 (22:12 +0000)]
am
5b2c6ec4: Merge "ART: Allow class-loading during deopt"
* commit '
5b2c6ec47cb8585c9e15b8baf74809a07b4387a1':
ART: Allow class-loading during deopt
Andreas Gampe [Fri, 13 Feb 2015 22:06:58 +0000 (22:06 +0000)]
Merge "ART: Allow class-loading during deopt"
Andreas Gampe [Tue, 10 Feb 2015 23:37:27 +0000 (15:37 -0800)]
ART: Allow class-loading during deopt
When deoptimizing, we might touch code that uses unloaded classes.
Bug:
19290147
(cherry picked from commit
44fb719e5f0f5ee7dcf4b1eae703593f1043a169)
Change-Id: I5776f08ba366e9742336caba0d6af85f00629afc
Vladimir Marko [Fri, 13 Feb 2015 20:30:42 +0000 (20:30 +0000)]
am
e032d5d4: Merge "Add tests for wide constants in LVN."
* commit '
e032d5d40b361066088f3855b1e76bc9a740a826':
Add tests for wide constants in LVN.
Vladimir Marko [Fri, 13 Feb 2015 20:24:50 +0000 (20:24 +0000)]
Merge "Add tests for wide constants in LVN."
Vladimir Marko [Fri, 13 Feb 2015 19:47:13 +0000 (19:47 +0000)]
Add tests for wide constants in LVN.
Follow up to
https://android-review.googlesource.com/132210
Change-Id: I4e29483fb9931ae5670539954b69cdb078843e72
Vladimir Marko [Fri, 13 Feb 2015 18:13:43 +0000 (18:13 +0000)]
am
bce88994: Merge "Clean up Scoped-/ArenaAlocator array allocations."
* commit '
bce889940f10319bf67bdc5630c84dd7f6e5c246':
Clean up Scoped-/ArenaAlocator array allocations.
Vladimir Marko [Fri, 13 Feb 2015 18:09:07 +0000 (18:09 +0000)]
Merge "Clean up Scoped-/ArenaAlocator array allocations."
Nicolas Geoffray [Fri, 13 Feb 2015 15:49:56 +0000 (15:49 +0000)]
am
58e42c6e: Merge "Optimize double/float immediate loading on arm."
* commit '
58e42c6e5571b1d3940561399faf163b9c219b57':
Optimize double/float immediate loading on arm.
Nicolas Geoffray [Fri, 13 Feb 2015 15:46:21 +0000 (15:46 +0000)]
Merge "Optimize double/float immediate loading on arm."
Nicolas Geoffray [Wed, 11 Feb 2015 01:10:39 +0000 (01:10 +0000)]
Optimize double/float immediate loading on arm.
Also reserve a D register for temp.
Change-Id: I6584d9005b0f5685c3afcd8e9153b4c87b56aa8e
Vladimir Marko [Fri, 13 Feb 2015 11:57:53 +0000 (11:57 +0000)]
am
94246d41: Merge "LVN handles const-wide/32 incorrectly"
* commit '
94246d41c941bb3b04896a5e5beb4458fe528acf':
LVN handles const-wide/32 incorrectly
Vladimir Marko [Fri, 13 Feb 2015 11:53:08 +0000 (11:53 +0000)]
Merge "LVN handles const-wide/32 incorrectly"
Vladimir Marko [Fri, 13 Feb 2015 10:28:29 +0000 (10:28 +0000)]
Clean up Scoped-/ArenaAlocator array allocations.
Change-Id: Id718f8a4450adf1608306286fa4e6b9194022532
Serguei Katkov [Fri, 6 Feb 2015 11:15:36 +0000 (17:15 +0600)]
LVN handles const-wide/32 incorrectly
Redundant shift to 16 bit should be eliminated otherwise any
32 bit shift of 32 bit constant will result in 0.
Change-Id: I4969b54357bc2d9a836e89dd7919199fff966684
Signed-off-by: Serguei Katkov <serguei.i.katkov@intel.com>
Nicolas Geoffray [Fri, 13 Feb 2015 05:51:01 +0000 (05:51 +0000)]
am
8240a8af: Merge "Support hints for register pairs."
* commit '
8240a8af33aedea9a4fe5c3b394d7c025ad081fb':
Support hints for register pairs.
Nicolas Geoffray [Fri, 13 Feb 2015 05:44:19 +0000 (05:44 +0000)]
Merge "Support hints for register pairs."
Nicolas Geoffray [Wed, 11 Feb 2015 02:29:42 +0000 (02:29 +0000)]
Support hints for register pairs.
Change-Id: Ia49dc5bf3e9a2bd481425bfe7fbeea9feb66c8e6
Chao-ying Fu [Thu, 12 Feb 2015 22:56:18 +0000 (14:56 -0800)]
ART: Fix InsertCaseLabel to return boundary_lir always
This patch doesn't return new_label when cu_->verbose, because
we will not assign offsets to new_label at this stage.
Change-Id: Ie7f625848b0cf7cabfbba694b5c20b0784bc8501
Signed-off-by: Chao-ying Fu <chao-ying.fu@intel.com>
Narayan Kamath [Thu, 12 Feb 2015 13:45:27 +0000 (13:45 +0000)]
am
54097016: Merge "Be more lenient with 4 byte UTF-8 sequences."
* commit '
5409701651407747e172d753f3fddeb6eb423927':
Be more lenient with 4 byte UTF-8 sequences.
Narayan Kamath [Thu, 12 Feb 2015 13:39:05 +0000 (13:39 +0000)]
Merge "Be more lenient with 4 byte UTF-8 sequences."
Narayan Kamath [Thu, 29 Jan 2015 20:06:46 +0000 (20:06 +0000)]
Be more lenient with 4 byte UTF-8 sequences.
Accept 4 byte sequences and convert them into surrogate
pairs instead of expecting 2 separate 3 byte sequences
each encoding one half of a surrogate pair.
Note that in addition to supporting 4 byte sequences in
strings from JNI, we also tolerate them in dex files. This
is mainly for consistency, and there's no need to claim any
sort of official support.
bug:
18848397
bug: https://code.google.com/p/android/issues/detail?id=81341
Change-Id: Ibc98d29e59d98803e640f2489ea4c56912a59b29
Vladimir Marko [Wed, 11 Feb 2015 10:11:13 +0000 (10:11 +0000)]
am
5a3399de: Merge "Fix ImageWriter::ComputeEagerResolvedStringsCallback()."
* commit '
5a3399deaf448c8434d9ba0916ff799b1b791d95':
Fix ImageWriter::ComputeEagerResolvedStringsCallback().
Vladimir Marko [Wed, 11 Feb 2015 10:06:21 +0000 (10:06 +0000)]
Merge "Fix ImageWriter::ComputeEagerResolvedStringsCallback()."
Vladimir Marko [Wed, 3 Dec 2014 17:53:53 +0000 (17:53 +0000)]
Fix ImageWriter::ComputeEagerResolvedStringsCallback().
Change-Id: I1a2abd6d78dd7067d9bdbadbd81dd2fd7711fbc5
Vladimir Marko [Tue, 10 Feb 2015 20:24:57 +0000 (20:24 +0000)]
am
aa874e0b: Merge "Quick: Rewrite Phi node insertion."
* commit '
aa874e0bbfb21aec0661b93cb1c2ce065bc20302':
Quick: Rewrite Phi node insertion.
Vladimir Marko [Tue, 10 Feb 2015 20:19:51 +0000 (20:19 +0000)]
Merge "Quick: Rewrite Phi node insertion."
Nicolas Geoffray [Tue, 10 Feb 2015 19:37:52 +0000 (19:37 +0000)]
am
1d6957f0: Merge "Improve ParallelMoveResolver to work with pairs."
* commit '
1d6957f0b9d560c75a1901a83a45b4f3510a1015':
Improve ParallelMoveResolver to work with pairs.
Nicolas Geoffray [Tue, 10 Feb 2015 19:33:22 +0000 (19:33 +0000)]
Merge "Improve ParallelMoveResolver to work with pairs."
Vladimir Marko [Tue, 10 Feb 2015 19:31:23 +0000 (19:31 +0000)]
am
0525d6aa: Merge "Fix HasSameSignatureWithDifferentClassLoaders()."
* commit '
0525d6aa15cb9db70e26c01f7e7a695bae377268':
Fix HasSameSignatureWithDifferentClassLoaders().
Vladimir Marko [Tue, 10 Feb 2015 19:25:13 +0000 (19:25 +0000)]
Merge "Fix HasSameSignatureWithDifferentClassLoaders()."
Nicolas Geoffray [Tue, 10 Feb 2015 17:08:47 +0000 (17:08 +0000)]
Improve ParallelMoveResolver to work with pairs.
Change-Id: Ie2a540ffdb78f7f15d69c16a08ca2d3e794f65b9
Jeff Hao [Tue, 10 Feb 2015 18:56:35 +0000 (18:56 +0000)]
am
53b36a26: Merge "Handle variable size of methods properly between 32 and 64 bit."
* commit '
53b36a26925e898b5f7cd3fad1d6a133eda62b4b':
Handle variable size of methods properly between 32 and 64 bit.
Jeff Hao [Tue, 10 Feb 2015 18:56:32 +0000 (18:56 +0000)]
am
69c37c3b: Merge "Revert "Revert "Allow preopted apps to have sharpened calls for non-x86 architectures."""
* commit '
69c37c3b5bc868003115898a3d1754604bb6db96':
Revert "Revert "Allow preopted apps to have sharpened calls for non-x86 architectures.""
Jeff Hao [Tue, 10 Feb 2015 18:47:42 +0000 (18:47 +0000)]
Merge "Handle variable size of methods properly between 32 and 64 bit."
Jeff Hao [Tue, 10 Feb 2015 18:47:32 +0000 (18:47 +0000)]
Merge "Revert "Revert "Allow preopted apps to have sharpened calls for non-x86 architectures."""
Vladimir Marko [Tue, 10 Feb 2015 18:22:57 +0000 (18:22 +0000)]
Fix HasSameSignatureWithDifferentClassLoaders().
Add a missing handle and make sure that the handle's
Get() is sequenced after the call that can cause GC.
Change-Id: I3c0479650c40ceb803bfbf658238aeea8e4b0a1a
Vladimir Marko [Mon, 9 Feb 2015 12:35:05 +0000 (12:35 +0000)]
Quick: Rewrite Phi node insertion.
Delay Phi node insertion to the SSAConversion pass to allow
updating the vreg_to_ssa_map_ with INVALID_SREG when we omit
a Phi in the pruned SSA form.
Change-Id: I450dee21f7dc4353d25fc66f4d0ee01671de6e0e
Vladimir Marko [Tue, 10 Feb 2015 12:16:50 +0000 (12:16 +0000)]
am
4ba86c42: Merge "ART: Remove MIRGraph::dex_pc_to_block_map_"
* commit '
4ba86c428f839cb75f5838b8327e893694377590':
ART: Remove MIRGraph::dex_pc_to_block_map_
Vladimir Marko [Tue, 10 Feb 2015 12:09:55 +0000 (12:09 +0000)]
Merge "ART: Remove MIRGraph::dex_pc_to_block_map_"
Nicolas Geoffray [Tue, 10 Feb 2015 01:54:20 +0000 (01:54 +0000)]
am
b276338f: Merge "Fix a compilation error for Mips64."
* commit '
b276338fa8b9c7a3a75bf0187308aa5b6c4c720c':
Fix a compilation error for Mips64.
Nicolas Geoffray [Tue, 10 Feb 2015 01:48:25 +0000 (01:48 +0000)]
Merge "Fix a compilation error for Mips64."
Douglas Leung [Mon, 9 Feb 2015 23:22:26 +0000 (15:22 -0800)]
Fix a compilation error for Mips64.
Change-Id: I4f35750c4b840fce18c467995787e92bc38a7812
Chao-ying Fu [Wed, 12 Nov 2014 00:48:40 +0000 (16:48 -0800)]
ART: Remove MIRGraph::dex_pc_to_block_map_
This patch removes MIRGraph::dex_pc_to_block_map_, adds a local
variable dex_pc_to_block_map inside MIRGraph::InlineMethod(), and
updates several functions to pass dex_pc_to_block_map.
The goal is to limit the scope of dex_pc_to_block_map and
the usage of FindBlock, so that various compiler optimizations
cannot rely on dex pc to look up basic blocks to avoid
duplicated dex pc issues.
Also, this patch changes quick targets to use successor blocks
for switch case target generation at Mir2Lir::InstallSwitchTables().
Change-Id: I9f571efebd2706b4e1606279bd61f3b406ecd1c4
Signed-off-by: Chao-ying Fu <chao-ying.fu@intel.com>
Andreas Gampe [Mon, 9 Feb 2015 21:16:51 +0000 (21:16 +0000)]
am
391b87ee: Merge "ART: Arm intrinsics for Optimizing compiler"
* commit '
391b87ee8d939b60385fde9c48fda8a334ab9ae3':
ART: Arm intrinsics for Optimizing compiler
Andreas Gampe [Mon, 9 Feb 2015 21:09:41 +0000 (21:09 +0000)]
Merge "ART: Arm intrinsics for Optimizing compiler"
Andreas Gampe [Thu, 29 Jan 2015 17:56:07 +0000 (09:56 -0800)]
ART: Arm intrinsics for Optimizing compiler
Add arm32 intrinsics to the optimizing compiler.
Change-Id: If4aeedbf560862074d8ee08ca4484b666d6b9bf0
Mingyao Yang [Mon, 9 Feb 2015 19:57:00 +0000 (19:57 +0000)]
am
0aac8671: Merge "Improve bce so that more bounds checks can be eliminated."
* commit '
0aac867161c4207aace8ae0d0b2abe02bfb8c3d9':
Improve bce so that more bounds checks can be eliminated.
Mingyao Yang [Mon, 9 Feb 2015 19:50:25 +0000 (19:50 +0000)]
Merge "Improve bce so that more bounds checks can be eliminated."
Mingyao Yang [Sat, 31 Jan 2015 00:41:29 +0000 (16:41 -0800)]
Improve bce so that more bounds checks can be eliminated.
For pattern like "int[] array = new int[size+1]", we record this range
for size:
[-1, array.length-1]
This can eliminate more bounds checks.
Also simplify overflow/underflow handling and make it more solid.
Enhance instruction simplifier such that if array is a result of
NewArray with a constant size, replace array.length with that constant.
Plan to move all bce gtests to checker in another change.
Change-Id: Ibe7cc7940b68fb6465dc3e0ff3ebdb0fd6487aa9
Calin Juravle [Mon, 9 Feb 2015 18:49:46 +0000 (18:49 +0000)]
am
2a3611fe: Merge "Fix null check tests"
* commit '
2a3611feeb12bd73ccdbb4692f9ca3705f925d56':
Fix null check tests
Calin Juravle [Mon, 9 Feb 2015 18:43:23 +0000 (18:43 +0000)]
Merge "Fix null check tests"
Calin Juravle [Mon, 9 Feb 2015 18:22:09 +0000 (18:22 +0000)]
Fix null check tests
Change-Id: Iafd3b1f58ed7ce45350b4b3aa493bafc63ade179
Nicolas Geoffray [Sun, 8 Feb 2015 12:03:26 +0000 (12:03 +0000)]
am
62b5f0dd: Merge "Optimize leaf methods."
* commit '
62b5f0dd5f201c71da6b50936f4f720acbad091f':
Optimize leaf methods.
Nicolas Geoffray [Sun, 8 Feb 2015 11:58:40 +0000 (11:58 +0000)]
Merge "Optimize leaf methods."
Hiroshi Yamauchi [Fri, 6 Feb 2015 23:36:34 +0000 (23:36 +0000)]
am
c282c119: Merge "Fix gcstress tests."
* commit '
c282c119bbbe55562407debcf24e0540bf71de04':
Fix gcstress tests.
Christopher Ferris [Fri, 6 Feb 2015 23:36:33 +0000 (23:36 +0000)]
am
a2ae59e0: Merge "Support map data in the backtrace data structure."
* commit '
a2ae59e0fe942981d2ef7ad9196fe29d2aee26be':
Support map data in the backtrace data structure.
Hiroshi Yamauchi [Fri, 6 Feb 2015 23:32:16 +0000 (23:32 +0000)]
Merge "Fix gcstress tests."
Christopher Ferris [Fri, 6 Feb 2015 23:29:10 +0000 (23:29 +0000)]
Merge "Support map data in the backtrace data structure."