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David Blaikie [Fri, 16 May 2014 22:21:45 +0000 (22:21 +0000)]
DebugInfo: Assert rather than conditionalizing when a CU's subprogram list contains declarations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209039
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David Blaikie [Fri, 16 May 2014 21:53:09 +0000 (21:53 +0000)]
DebugInfo: Handle emitting constants of C++ unicode character type.
Patch by Stephan Tolksdorf! (with some test case stuff by me)
Differential Revision: http://reviews.llvm.org/D3810
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209037
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Tom Stellard [Fri, 16 May 2014 20:56:47 +0000 (20:56 +0000)]
R600/SI: Refactor the VOP3_32 tablegen class
This will allow us to use a single MachineInstr to represent
instructions which behave the same but have different encodings
on some subtargets.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209028
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Tom Stellard [Fri, 16 May 2014 20:56:45 +0000 (20:56 +0000)]
R600/SI: Add a PredicateControl class for managing TableGen predicates
This was inspired by the PredicateControl class in the MIPS backend.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209027
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Tom Stellard [Fri, 16 May 2014 20:56:44 +0000 (20:56 +0000)]
R600/SI: Move tablegen patterns away from instruction defs
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209026
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Tom Stellard [Fri, 16 May 2014 20:56:43 +0000 (20:56 +0000)]
R600/SI: Remove unused instruction
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209025
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Tom Stellard [Fri, 16 May 2014 20:56:41 +0000 (20:56 +0000)]
R600/SI: Promote f32 SELECT to i32
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209024
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Tom Stellard [Fri, 16 May 2014 20:56:37 +0000 (20:56 +0000)]
R600/SI: Remove duplicate pattern
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209023
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Reid Kleckner [Fri, 16 May 2014 20:39:27 +0000 (20:39 +0000)]
Add comdat key field to llvm.global_ctors and llvm.global_dtors
This allows us to put dynamic initializers for weak data into the same
comdat group as the data being initialized. This is necessary for MSVC
ABI compatibility. Once we have comdats for guard variables, we can use
the combination to help GlobalOpt fire more often for weak data with
guarded initialization on other platforms.
Reviewers: nlewycky
Differential Revision: http://reviews.llvm.org/D3499
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209015
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Rafael Espindola [Fri, 16 May 2014 20:05:08 +0000 (20:05 +0000)]
Fix a warning in builds without asserts.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209012
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David Blaikie [Fri, 16 May 2014 19:42:10 +0000 (19:42 +0000)]
DebugInfo: Add an assert regarding the subprogram in the subprogram map matching the abstract subprogram.
I'm not sure this is how it'll be going forward (I'd rather prefer the
definition to be in the main SP mapping, for various reasons) but this
helps me understand how it is today.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209009
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Rafael Espindola [Fri, 16 May 2014 19:35:39 +0000 (19:35 +0000)]
Fix most of PR10367.
This patch changes the design of GlobalAlias so that it doesn't take a
ConstantExpr anymore. It now points directly to a GlobalObject, but its type is
independent of the aliasee type.
To avoid changing all alias related tests in this patches, I kept the common
syntax
@foo = alias i32* @bar
to mean the same as now. The cases that used to use cast now use the more
general syntax
@foo = alias i16, i32* @bar.
Note that GlobalAlias now behaves a bit more like GlobalVariable. We
know that its type is always a pointer, so we omit the '*'.
For the bitcode, a nice surprise is that we were writing both identical types
already, so the format change is minimal. Auto upgrade is handled by looking
through the casts and no new fields are needed for now. New bitcode will
simply have different types for Alias and Aliasee.
One last interesting point in the patch is that replaceAllUsesWith becomes
smart enough to avoid putting a ConstantExpr in the aliasee. This seems better
than checking and updating every caller.
A followup patch will delete getAliasedGlobal now that it is redundant. Another
patch will add support for an explicit offset.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209007
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David Blaikie [Fri, 16 May 2014 18:26:53 +0000 (18:26 +0000)]
DebugInfo: Assume the CU's Subprogram list only contains definitions.
DIBuilder maintains this invariant and the current DwarfDebug code could
end up doing weird things if it contained declarations (such as putting
the definition DIE inside a CU that contained the declaration - this
doesn't seem like a good idea, so rather than adding logic to handle
this case we'll just ban in for now & cross that bridge if we come to
it later).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209004
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Chad Rosier [Fri, 16 May 2014 17:15:33 +0000 (17:15 +0000)]
[ARM64] Increases the Sched Model accuracy for Cortex-A53.
Patch by Dave Estes <cestes@codeaurora.org>
http://reviews.llvm.org/D3769
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209001
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David Majnemer [Fri, 16 May 2014 17:14:03 +0000 (17:14 +0000)]
InstSimplify: Improve handling of ashr/lshr
Summary:
Analyze the range of values produced by ashr/lshr cst, %V when it is
being used in an icmp.
Reviewers: nicholas
Subscribers: llvm-commits
Differential Revision: http://reviews.llvm.org/D3774
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209000
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David Majnemer [Fri, 16 May 2014 16:57:04 +0000 (16:57 +0000)]
InstSimplify: Optimize using dividend in sdiv
Summary:
The dividend in an sdiv tells us the largest and smallest possible
results. Use this fact to optimize comparisons against an sdiv with a
constant dividend.
Reviewers: nicholas
Subscribers: llvm-commits
Differential Revision: http://reviews.llvm.org/D3795
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208999
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Tilmann Scheller [Fri, 16 May 2014 16:50:13 +0000 (16:50 +0000)]
[ARM64] Fix wrong comment in load/store optimization pass.
ldr x1, [x0, #64]
add x0, x0, #64
->
ldr x1, [x0], #64
is not a valid transformation, the correct transformation (and what the code actually does) is:
ldr x1, [x0, #64]
add x0, x0, #64
->
ldr x1, [x0, #64]!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208998
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David Blaikie [Fri, 16 May 2014 16:42:40 +0000 (16:42 +0000)]
DwarfDebug: Refactor AT_ranges/AT_high_pc+AT_low_pc emission into helper function.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208997
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Simon Atanasyan [Fri, 16 May 2014 16:01:00 +0000 (16:01 +0000)]
[yaml2obj][ELF] Add an optional `Size` field to the YAML section declaration.
Now the only method to configure ELF section's content and size is to assign
a hexadecimal string to the `Content` field. Unfortunately this way is
completely useless when you need to declare a really large section.
To solve this problem this patch adds one more optional field `Size`
to the `RawContentSection` structure. When yaml2obj generates an ELF file
it uses the following algorithm:
1. If both `Content` and `Size` fields are missed create an empty section.
2. If only `Content` field is missed take section length from the `Size`
field and fill the section by zero.
3. If only `Size` field is missed create a section using data from
the `Content` field.
4. If both `Content` and `Size` fields are provided validate that the `Size`
value is not less than size of `Content` data. Than take section length
from the `Size`, fill beginning of the section by `Content` and the rest
by zero.
Examples
--------
* Create a section 0x10000 bytes long filled by zero
Name: .data
Type: SHT_PROGBITS
Flags: [ SHF_ALLOC ]
Size: 0x10000
* Create a section 0x10000 bytes long starting from 'CA' 'FE' 'BA' 'BE'
Name: .data
Type: SHT_PROGBITS
Flags: [ SHF_ALLOC ]
Content:
CAFEBABE
Size: 0x10000
The patch reviewed by Michael Spencer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208995
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James Molloy [Fri, 16 May 2014 14:24:22 +0000 (14:24 +0000)]
Re-enable inline memcpy expansion for Thumb1.
Patch by Moritz Roth!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208994
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Rafael Espindola [Fri, 16 May 2014 14:22:33 +0000 (14:22 +0000)]
Small dyn_cast and auto cleanup.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208993
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James Molloy [Fri, 16 May 2014 14:14:30 +0000 (14:14 +0000)]
Fix the Load/Store optimization pass to work with Thumb1.
Patch by Moritz Roth!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208992
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James Molloy [Fri, 16 May 2014 14:11:38 +0000 (14:11 +0000)]
Enable the Load/Store optimization pass for Thumb1 but make it return immediately for now.
Patch by Moritz Roth!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208991
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James Molloy [Fri, 16 May 2014 14:08:46 +0000 (14:08 +0000)]
Fix a few comment typos and style issues.
Patch by Moritz Roth!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208990
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Zoran Jovanovic [Fri, 16 May 2014 13:40:57 +0000 (13:40 +0000)]
[mips][mips64r6] Add SELEQZ and SELNEZ instructions
Differential Revision: http://reviews.llvm.org/D3743
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208987
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Rafael Espindola [Fri, 16 May 2014 13:34:04 +0000 (13:34 +0000)]
Change the GlobalAlias constructor to look a bit more like GlobalVariable.
This is part of the fix for pr10367. A GlobalAlias always has a pointer type,
so just have the constructor build the type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208983
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Zoran Jovanovic [Fri, 16 May 2014 13:19:46 +0000 (13:19 +0000)]
[mips][mips64r6] Add Compact indexed jumps.
Differential Revision: http://reviews.llvm.org/D3707
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208981
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Yaron Keren [Fri, 16 May 2014 13:16:30 +0000 (13:16 +0000)]
Fix hardcoded slash to native path seperator which was exposed from llvm::sys::path.
http://reviews.llvm.org/D3687
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208980
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Rafael Espindola [Fri, 16 May 2014 13:02:18 +0000 (13:02 +0000)]
Revert "Implement global merge optimization for global variables."
This reverts commit r208934.
The patch depends on aliases to GEPs with non zero offsets. That is not
supported and fairly broken.
The good news is that GlobalAlias is being redesigned and will have support
for offsets, so this patch should be a nice match for it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208978
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Zoran Jovanovic [Fri, 16 May 2014 12:27:19 +0000 (12:27 +0000)]
[mips][mips64r6] Add Compact zero-compare branch-and-link instructions
Differential Revision: http://reviews.llvm.org/D3718
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208977
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Stepan Dyatkovskiy [Fri, 16 May 2014 11:55:02 +0000 (11:55 +0000)]
MergeFunctions Pass, introduced total ordering among GEP operations.
Patch replaces old isEquivalentGEP implementation, and changes type of
comparison result from bool (equal or not) to {-1, 0, 1} (less, equal, greater).
This patch belongs to patch series that improves MergeFunctions
performance time from O(N*N) to O(N*log(N)).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208976
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NAKAMURA Takumi [Fri, 16 May 2014 11:14:51 +0000 (11:14 +0000)]
MC: Add DwarfTypesDWOSection also to MCCOFF.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208975
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Zoran Jovanovic [Fri, 16 May 2014 11:03:45 +0000 (11:03 +0000)]
[mips][mips64r6] Add compact branch instructions
Differential Revision: http://reviews.llvm.org/D3691
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208974
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Stepan Dyatkovskiy [Fri, 16 May 2014 11:02:22 +0000 (11:02 +0000)]
MergeFunctions Pass, introduced total ordering among operations.
Patch replaces old isEquivalentOperation implementation, and changes type of
comparison result from bool (equal or not) to {-1, 0, 1} (less, equal, greater).
This patch belongs to patch series that improves MergeFunctions
performance time from O(N*N) to O(N*log(N)).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208973
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Zoran Jovanovic [Fri, 16 May 2014 10:27:10 +0000 (10:27 +0000)]
[mips][mips64r6] Add LWPC and LWUPC instructions
Differential Revision: http://reviews.llvm.org/D3788
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208971
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Zoran Jovanovic [Fri, 16 May 2014 09:48:29 +0000 (09:48 +0000)]
[mips][mips64r6] Add Floating Point Compare setting Mask - CMP.condn.fmt
Differential Revision: http://reviews.llvm.org/D3750
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208970
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Tim Northover [Fri, 16 May 2014 09:42:04 +0000 (09:42 +0000)]
TableGen: fix operand counting for aliases
TableGen has a fairly dubious heuristic to decide whether an alias should be
printed: does the alias have lest operands than the real instruction. This is
bad enough (particularly with no way to override it), but it should at least be
calculated consistently for both strings.
This patch implements that logic: first get the *correct* string for the
variant, in the same way as the Matcher, without guessing; then count the
number of whitespace chars.
There are basically 4 changes this brings about after the previous
commits; all of these appear to be good, so I have changed the tests:
+ ARM64: we print "neg X, Y" instead of "sub X, xzr, Y".
+ ARM64: we skip implicit "uxtx" and "uxtw" modifiers.
+ Sparc: we print "mov A, B" instead of "or %g0, A, B".
+ Sparc: we print "fcmpX A, B" instead of "fcmpX %fcc0, A, B"
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208969
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Tim Northover [Fri, 16 May 2014 09:41:48 +0000 (09:41 +0000)]
ARM64: disable printing of "fcmXY ..., #0" aliases
The canonical syntax is "fcmXY ..., #0.0".
This will be tested when the TableGen "should I print this Alias" heuristic is
fixed (very soon).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208968
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Tim Northover [Fri, 16 May 2014 09:41:43 +0000 (09:41 +0000)]
AArch64: disable printing of add/sub alias
This alias appears not to have an appropriate PrintMethod. Normally, I'd look
into it, but since AArch64 is disappearing soon it's probably not worth it.
This will be tested when the TableGen "should I print this Alias" heuristic is
fixed (very soon).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208967
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Tim Northover [Fri, 16 May 2014 09:41:39 +0000 (09:41 +0000)]
Sparc: disable printing of jmp/call aliases (C++ does it)
These aliases are handled entirely in C++ and only having TableGen InstAliases
for some of them was confusing LLVM.
This will be tested when the TableGen "should I print this Alias" heuristic is
fixed (very soon).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208966
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Tim Northover [Fri, 16 May 2014 09:41:35 +0000 (09:41 +0000)]
Sparc: disable printing on longer "brX,pt" aliases
This will be tested when the TableGen "should I print this Alias" heuristic is
fixed (very soon).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208965
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Tim Northover [Fri, 16 May 2014 09:41:30 +0000 (09:41 +0000)]
Mips: don't print subu alias for addiu
Certainly not without having a custom PrintMethod to invert the immediate
beforehand. But probably not at all.
This will be tested when the TableGen "should I print this Alias" heuristic is
fixed (very soon).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208964
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Tim Northover [Fri, 16 May 2014 09:41:26 +0000 (09:41 +0000)]
X86: disable printing of bare "mov" aliases
In AT&T syntax, we should probably print the full "movl" or "movw". TableGen
used to ignore these aliases because it was miscounting the number of operands.
This fixes the issue.
This will be tested when the TableGen "should I print this Alias"
heuristic is fixed (very soon).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208963
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Tim Northover [Fri, 16 May 2014 09:41:21 +0000 (09:41 +0000)]
AArch64: disable printing of MOV -> MOVZ aliases
Actually, MOV sometimes is canonical, but for now this is a better
approximation than what's there.
This will be tested when the TableGen "should I print this Alias" heuristic is
fixed (very soon).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208962
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Tim Northover [Fri, 16 May 2014 09:41:16 +0000 (09:41 +0000)]
ARM64: disable printing of swapped compare-mask aliases
You can perform (say) an fcmle operation by swapping the operands on an fcmge,
but it shouldn't be printed like that.
This will be tested when the TableGen "should I print this Alias" heuristic is
fixed (very soon).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208961
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Tim Northover [Fri, 16 May 2014 09:41:12 +0000 (09:41 +0000)]
ARM64: disable printing of LDUR -> LDR aliases
We accept "ldr w3, [x1, #-1]" as a convenience, but we should still print the
canonical "ldur" form.
This will be tested when the TableGen "should I print this Alias" heuristic is
fixed (very soon).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208960
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Tim Northover [Fri, 16 May 2014 09:41:08 +0000 (09:41 +0000)]
ARM64: give TST aliases priority over ANDS.
If an ANDS instruction has Rd == ZR it should be printed as TST since
its only effect is on the flags register NZCV.
This will be tested when the TableGen "should I print this Alias"
heuristic is fixed (very soon).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208959
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Tim Northover [Fri, 16 May 2014 09:41:03 +0000 (09:41 +0000)]
ARM64: give MOV priority over shorter ORR when printing aliases.
MOV is almost always the right thing to print if possile. People understand it.
This will be tested when the TableGen "should I print this Alias" heuristic is
fixed (very soon).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208958
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Tim Northover [Fri, 16 May 2014 09:40:58 +0000 (09:40 +0000)]
ARM64: give NEG priority over SUB when printing aliases.
For example, the full instruction "sub w0, wzr, w1, uxtw" could print as either
"neg w0, w1" or "sub w0, wzr, w1". The former is better.
This will be tested when the TableGen "should I print this Alias" heuristic is
fixed (very soon).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208957
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Tim Northover [Fri, 16 May 2014 09:40:52 +0000 (09:40 +0000)]
ARM64: disable printing of "lslv" type aliases
You can write "lslv w0, w1, w2" (probably for legacy reasons), but it should be
printed as simply "lsl".
This will be tested when the TableGen "should I print this Alias" heuristic is
fixed (very soon).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208956
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Hao Liu [Fri, 16 May 2014 09:39:02 +0000 (09:39 +0000)]
[ARM64]Implement NEON post-increment LD1(lane) and post-increment LD1R.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208955
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Stepan Dyatkovskiy [Fri, 16 May 2014 08:55:34 +0000 (08:55 +0000)]
MergeFunctions Pass, introduced total ordering among function attributes.
This patch belongs to patch series that improves MergeFunctions
performance time from O(N*N) to O(N*log(N)).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208953
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Zoran Jovanovic [Fri, 16 May 2014 08:42:27 +0000 (08:42 +0000)]
[mips][mips64r6] Add Floating Point Fused Multiply Add Subtract
Differential Revision: http://reviews.llvm.org/D3727
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208952
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Saleem Abdulrasool [Fri, 16 May 2014 05:41:33 +0000 (05:41 +0000)]
ARM: add some integer/floating point conversion libcalls
Add some Windows on ARM specific library calls. These are provided by msvcrt,
and can be used to perform integer to floating-point conversions (and
vice-versa) mirroring similar functions in the RTABI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208949
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Juergen Ributzka [Fri, 16 May 2014 02:33:15 +0000 (02:33 +0000)]
Add C API for thread yielding callback.
Sometimes a LLVM compilation may take more time then a client would like to
wait for. The problem is that it is not possible to safely suspend the LLVM
thread from the outside. When the timing is bad it might be possible that the
LLVM thread holds a global mutex and this would block any progress in any other
thread.
This commit adds a new yield callback function that can be registered with a
context. LLVM will try to yield by calling this callback function, but there is
no guaranteed frequency. LLVM will only do so if it can guarantee that
suspending the thread won't block any forward progress in other LLVM contexts
in the same process.
Once the client receives the call back it can suspend the thread safely and
resume it at another time.
Related to <rdar://problem/
16728690>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208945
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Justin Bogner [Fri, 16 May 2014 00:38:00 +0000 (00:38 +0000)]
ProfileData: Allow multiple profiles in RawInstrProfReader
Allow multiple raw profiles to coexist in a single .profraw file,
given the following conditions:
- Zero padding at the end of or between profiles will be skipped.
- Each profile must start with a valid header.
- Mixing endianness or pointer sizes in concatenated profiles files is
not allowed.
This is needed to handle cases where a program's shared libraries are
profiled as well as the main executable itself, as we'll need to emit
each executable's counters. Combining the tables in the runtime would
be expensive for the instrumented program.
rdar://
16918688
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208938
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Eric Christopher [Fri, 16 May 2014 00:32:52 +0000 (00:32 +0000)]
Remove the Options query functions and just access our Options directly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208937
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Reid Kleckner [Thu, 15 May 2014 23:58:57 +0000 (23:58 +0000)]
musttail: Fix the verification of alignment attributes
Previously this would fail with an assertion failure when trying to add
an alignment attribute without a value.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208935
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Jiangning Liu [Thu, 15 May 2014 23:45:42 +0000 (23:45 +0000)]
Implement global merge optimization for global variables.
This commit implements two command line switches -global-merge-on-external
and -global-merge-aligned, and both of them are false by default, so this
optimization is disabled by default for all targets.
For ARM64, some back-end behaviors need to be tuned to get this optimization
further enabled.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208934
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David Blaikie [Thu, 15 May 2014 23:29:53 +0000 (23:29 +0000)]
DebugInfo: Follow up to r208930, comment usage of 'using' to bring in base class overload.
Code review feedback from Eric Christopher.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208933
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Eric Christopher [Thu, 15 May 2014 23:27:49 +0000 (23:27 +0000)]
Move more MC options into the MCTargetOptions structure.
No functional change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208932
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Eric Christopher [Thu, 15 May 2014 23:27:44 +0000 (23:27 +0000)]
Remove unused llvm namespace bool variable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208931
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David Blaikie [Thu, 15 May 2014 23:18:15 +0000 (23:18 +0000)]
DebugInfo: Don't put fission type units in comdat sections.
Since type units in the dwo file are handled by a debug aware tool, they
don't need to leverage the ELF comdat grouping to implement
deduplication. Avoid creating all the .group sections for these as a
space optimization.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208930
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Eric Christopher [Thu, 15 May 2014 23:06:30 +0000 (23:06 +0000)]
Make the -L option for SaveTempLabels not be static. No functional change.
Note: This option name is terrible, we should fix this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208929
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Reed Kotler [Thu, 15 May 2014 21:54:15 +0000 (21:54 +0000)]
Finish materialize for ints
Summary: We add code to materialize all integer literals.
Test Plan: simplestorei.ll
Reviewers: dsanders
Reviewed By: dsanders
Differential Revision: http://reviews.llvm.org/D3596
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208923
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Matt Arsenault [Thu, 15 May 2014 21:44:05 +0000 (21:44 +0000)]
Use range for
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208922
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Alexey Samsonov [Thu, 15 May 2014 21:24:32 +0000 (21:24 +0000)]
[DWARF parser] Use enums instead of bitfields in DILineInfoSpecifier.
It is more appropriate than the current situation, when one flag
(AbsoluteFilePath) is relevant only if another flag is set.
This refactoring would also simplify fetching the short function name
(stored in DW_AT_name) instead of a linkage name returned currently.
No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208921
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Reid Kleckner [Thu, 15 May 2014 21:10:46 +0000 (21:10 +0000)]
Don't insert lifetime.end markers between a musttail call and ret
The allocas going out of scope are immediately killed by the return
instruction.
This is a resend of r208912, which was committed accidentally.
Reviewers: chandlerc
Differential Revision: http://reviews.llvm.org/D3792
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208920
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Reid Kleckner [Thu, 15 May 2014 20:41:05 +0000 (20:41 +0000)]
Revert "Don't insert lifetime.end markers between a musttail call and ret"
This reverts commit r208912.
It was committed accidentally without review.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208914
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Reid Kleckner [Thu, 15 May 2014 20:39:42 +0000 (20:39 +0000)]
Remove unused variable in inliner
We have to iterate over all the calls that were inlined to find out if
any were musttail.
Sink another variable down to where its used.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208913
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Reid Kleckner [Thu, 15 May 2014 20:39:13 +0000 (20:39 +0000)]
Don't insert lifetime.end markers between a musttail call and ret
The allocas going out of scope are immediately killed by the return
instruction.
Reviewers: chandlerc
Differential Revision: http://reviews.llvm.org/D3630
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208912
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David Blaikie [Thu, 15 May 2014 20:18:50 +0000 (20:18 +0000)]
DebugInfo: Simplify retrieving filename/directory name for line table entry building.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208911
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Reid Kleckner [Thu, 15 May 2014 20:11:28 +0000 (20:11 +0000)]
Teach the inliner how to preserve musttail invariants
The interesting case is what happens when you inline a musttail call
through a musttail call site. In this case, we can't break perfect
forwarding or allow any stack growth.
Instead of merging control flow from the inlined return instruction
after a musttail call into the body of the caller, leave the inlined
return instruction in the caller so that the musttail call stays in the
tail position.
More work is required in http://reviews.llvm.org/D3630 to handle the
case where the inlined function has dynamic allocas or byval arguments.
Reviewers: chandlerc
Differential Revision: http://reviews.llvm.org/D3491
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208910
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David Blaikie [Thu, 15 May 2014 20:09:55 +0000 (20:09 +0000)]
DebugInfo: Add FIXME regarding DILexicalBlock uniquing fields.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208909
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Tom Stellard [Thu, 15 May 2014 19:50:25 +0000 (19:50 +0000)]
autoconf: Fix libLLVM-Major-Minor-Patch.so symlink
The symlink needs to point to a relative path, so we don't break
building in a chroot.
Tested-by: Laurent Carlier <lordheavym@gmail.org>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208908
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Simon Atanasyan [Thu, 15 May 2014 18:04:09 +0000 (18:04 +0000)]
[obj2yaml][ELF] Print relocation's offset as a hex number. Use a proper
types to hold relocation's offset and addend.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208906
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Simon Atanasyan [Thu, 15 May 2014 18:04:02 +0000 (18:04 +0000)]
[obj2yaml][ELF] Do not print empty Link and Info fields for ELF sections.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208905
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Juergen Ributzka [Thu, 15 May 2014 17:49:20 +0000 (17:49 +0000)]
Revert "[PM] Add pass run listeners to the pass manager."
Revert the current implementation and C API. New implementation and C APIs are
in the works.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208904
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Bradley Smith [Thu, 15 May 2014 16:28:32 +0000 (16:28 +0000)]
[ARM64] Improve diagnostics for Cn operands in SYS instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208902
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Simon Atanasyan [Thu, 15 May 2014 16:14:02 +0000 (16:14 +0000)]
[yaml2obj] Add "-o" command line option to specify an output file name.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208900
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NAKAMURA Takumi [Thu, 15 May 2014 15:45:31 +0000 (15:45 +0000)]
llvm/test/CodeGen/X86/combine-sse41-intrinsics.ll: Add explicit triple.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208897
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Andrea Di Biagio [Thu, 15 May 2014 15:18:15 +0000 (15:18 +0000)]
[X86] Teach the backend how to fold SSE4.1/AVX/AVX2 blend intrinsics.
Added target specific combine rules to fold blend intrinsics according
to the following rules:
1) fold(blend A, A, Mask) -> A;
2) fold(blend A, B, <allZeros>) -> A;
3) fold(blend A, B, <allOnes>) -> B.
Added two new tests to verify that the new folding rules work for all
the optimized blend intrinsics.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208895
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Zoran Jovanovic [Thu, 15 May 2014 15:16:36 +0000 (15:16 +0000)]
[mips][mips64r6] Add CLASS.fmt instructions
Differential Revision: http://reviews.llvm.org/D3712
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208894
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Zoran Jovanovic [Thu, 15 May 2014 15:04:37 +0000 (15:04 +0000)]
[mips][mips64r6] Add RINT.fmt instructions
Differential Revision: http://reviews.llvm.org/D3711
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208892
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Zoran Jovanovic [Thu, 15 May 2014 14:58:42 +0000 (14:58 +0000)]
[mips][mips64r6] Add SELEQZ/SELNEZ.fmt instructions
Differential Revision: http://reviews.llvm.org/D3710
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208891
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Zoran Jovanovic [Thu, 15 May 2014 14:54:06 +0000 (14:54 +0000)]
[mips][mips64r6] Add MAX/MIN/MAXA/MINA.fmt instructions
Differential Revision: http://reviews.llvm.org/D3709
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208890
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Tom Stellard [Thu, 15 May 2014 14:41:57 +0000 (14:41 +0000)]
R600/SI: Stop using VSrc_* as the default register class for types.
We now use SReg_* for integer types and VReg_* for floating-point types.
This should help simplify the SIFixSGPRCopies pass and no longer causes
ISel to insert a COPY after termiator instuctions that output a value.
This change is covered by exisitng tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208888
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Tom Stellard [Thu, 15 May 2014 14:41:55 +0000 (14:41 +0000)]
R600/SI: Fix a bug with handling of INSERT_SUBREG in SIFixSGPRCopies
This prevents a future commit from regressing the load-i1.ll test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208887
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Tom Stellard [Thu, 15 May 2014 14:41:54 +0000 (14:41 +0000)]
R600/SI: Only use SALU instructions for 64-bit add in a block of CF depth 0
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208886
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Tom Stellard [Thu, 15 May 2014 14:41:50 +0000 (14:41 +0000)]
R600/SI: Use VALU instructions for i1 ops
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208885
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Tim Northover [Thu, 15 May 2014 13:36:01 +0000 (13:36 +0000)]
TableGen: use correct MIOperand when printing aliases
Previously, TableGen assumed that every aliased operand consumed precisely 1
MachineInstr slot (this was reasonable because until a couple of days ago,
nothing more complicated was eligible for printing).
This allows a couple more ARM64 aliases to print so we can remove the special
code.
On the X86 side, I've gone for explicit AT&T size specifiers as the default, so
turned off a few of the aliases that would have just started printing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208880
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Daniel Sanders [Thu, 15 May 2014 12:18:23 +0000 (12:18 +0000)]
[mips][mips64r6] Add bitswap, and dbitswap
Summary: Depends on D3728
Reviewers: jkolek, zoran.jovanovic, vmedic
Reviewed By: vmedic
Differential Revision: http://reviews.llvm.org/D3729
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208877
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Jay Foad [Thu, 15 May 2014 12:12:55 +0000 (12:12 +0000)]
Instead of littering asserts throughout the code after every call to
computeKnownBits, consolidate them into one assert at the end of
computeKnownBits itself.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208876
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Tim Northover [Thu, 15 May 2014 12:11:02 +0000 (12:11 +0000)]
ARM64: print correct aliases for NEON mov & mvn instructions
In all cases, if a "mov" alias exists, it is the canonical form of the
instruction. Now that TableGen can support aliases containing syntax variants,
we can enable them and improve the quality of the asm output.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208874
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Daniel Sanders [Thu, 15 May 2014 12:06:36 +0000 (12:06 +0000)]
[mips][mips64r6] Add align and dalign
Summary: Depends on D3689
Reviewers: vmedic, zoran.jovanovic, jkolek
Reviewed By: jkolek
Differential Revision: http://reviews.llvm.org/D3728
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208872
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Tim Northover [Thu, 15 May 2014 11:16:32 +0000 (11:16 +0000)]
TableGen/ARM64: print aliases even if they have syntax variants.
To get at least one use of the change (and some actual tests) in with its
commit, I've enabled the AArch64 & ARM64 NEON mov aliases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208867
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Tim Northover [Thu, 15 May 2014 11:16:19 +0000 (11:16 +0000)]
ARM64: add correct vector registers during asm parsing
Previously, we ignored the difference between V64 and V128 when parsing
assembly: they both got mapped to registers in the FPR128 class. This is
basically harmless at the moment because they both print and encode the same
way. However, it will affect the printing of aliases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208866
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Bradley Smith [Thu, 15 May 2014 11:08:30 +0000 (11:08 +0000)]
[ARM64] Improve load/store diagnostics and forbid 32-bit register addresses
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208864
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Bradley Smith [Thu, 15 May 2014 11:07:57 +0000 (11:07 +0000)]
[ARM64] Parse fixed vector lanes properly so that diagnostics can be emitted
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208863
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Bradley Smith [Thu, 15 May 2014 11:07:28 +0000 (11:07 +0000)]
[ARM64] Add/Fixup diagnostics for floating point immediates
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208862
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